Update valgrind-3.18.1-ppc-hwcaps.patch

Update to version checked in upstream.
This commit is contained in:
Mark Wielaard 2022-01-29 22:24:27 +01:00
parent e6b9f20ee0
commit 5fd4dd6339

View File

@ -1,8 +1,10 @@
commit 9d1d6cd6acc612cd94261956a8a94a6403a5d528 commit 3ea8d4327003c3cefe8e82c59be8e92dcfe1a60f
Author: Will Schmidt <will_schmidt@vnet.ibm.com> Author: Carl Love <cel@us.ibm.com>
Date: Tue Jan 4 16:41:00 2022 -0600 Date: Fri Jan 14 23:04:44 2022 +0000
Subject: Assorted changes to protect from side affects from the feature checking code. Assorted changes to protect from side affects from the feature checking code.
Patch contributed by Will Schmidt <will_schmidt@vnet.ibm.com>
This problem was initially reported by Tulio, he assisted me in This problem was initially reported by Tulio, he assisted me in
identifying the underlying issue here. identifying the underlying issue here.
@ -26,26 +28,22 @@ Date: Tue Jan 4 16:41:00 2022 -0600
confirm that r20 is now saved and restored on entry and exit from the confirm that r20 is now saved and restored on entry and exit from the
machine_get_hwcaps() function. machine_get_hwcaps() function.
bugzilla 447995 Valgrind segfault on power10 due to hwcap checking code
diff --git a/coregrind/m_machine.c b/coregrind/m_machine.c diff --git a/coregrind/m_machine.c b/coregrind/m_machine.c
index 0b60ecc0fd44..a860ed67a334 100644 index 0b60ecc0f..089acee64 100644
--- a/coregrind/m_machine.c --- a/coregrind/m_machine.c
+++ b/coregrind/m_machine.c +++ b/coregrind/m_machine.c
@@ -1244,11 +1244,11 @@ Bool VG_(machine_get_hwcaps)( void ) @@ -1246,7 +1246,7 @@ Bool VG_(machine_get_hwcaps)( void )
/* Check for ISA 3.0 support. */
have_isa_3_0 = True;
if (VG_MINIMAL_SETJMP(env_unsup_insn)) { if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
have_isa_3_0 = False; have_isa_3_0 = False;
} else { } else {
- __asm__ __volatile__(".long 0x7d205434"); /* cnttzw RT, RB */ - __asm__ __volatile__(".long 0x7d205434"); /* cnttzw RT, RB */
+ __asm__ __volatile__(".long 00x7f140434"::"r20"); /* cnttzw r20,r24 */ + __asm__ __volatile__(".long 00x7f140434":::"r20"); /* cnttzw r20,r24 */
} }
// ISA 3.1 not supported on 32-bit systems // ISA 3.1 not supported on 32-bit systems
@@ -1358,7 +1358,7 @@ Bool VG_(machine_get_hwcaps)( void )
/* determine dcbz/dcbzl sizes while we still have the signal
@@ -1356,79 +1356,79 @@ Bool VG_(machine_get_hwcaps)( void )
/* Altivec insns */
have_V = True;
if (VG_MINIMAL_SETJMP(env_unsup_insn)) { if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
have_V = False; have_V = False;
} else { } else {
@ -54,7 +52,7 @@ index 0b60ecc0fd44..a860ed67a334 100644
} }
/* General-Purpose optional (fsqrt, fsqrts) */ /* General-Purpose optional (fsqrt, fsqrts) */
have_FX = True; @@ -1366,7 +1366,7 @@ Bool VG_(machine_get_hwcaps)( void )
if (VG_MINIMAL_SETJMP(env_unsup_insn)) { if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
have_FX = False; have_FX = False;
} else { } else {
@ -63,7 +61,7 @@ index 0b60ecc0fd44..a860ed67a334 100644
} }
/* Graphics optional (stfiwx, fres, frsqrte, fsel) */ /* Graphics optional (stfiwx, fres, frsqrte, fsel) */
have_GX = True; @@ -1374,7 +1374,7 @@ Bool VG_(machine_get_hwcaps)( void )
if (VG_MINIMAL_SETJMP(env_unsup_insn)) { if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
have_GX = False; have_GX = False;
} else { } else {
@ -72,7 +70,7 @@ index 0b60ecc0fd44..a860ed67a334 100644
} }
/* VSX support implies Power ISA 2.06 */ /* VSX support implies Power ISA 2.06 */
have_VX = True; @@ -1382,7 +1382,7 @@ Bool VG_(machine_get_hwcaps)( void )
if (VG_MINIMAL_SETJMP(env_unsup_insn)) { if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
have_VX = False; have_VX = False;
} else { } else {
@ -81,7 +79,7 @@ index 0b60ecc0fd44..a860ed67a334 100644
} }
/* Check for Decimal Floating Point (DFP) support. */ /* Check for Decimal Floating Point (DFP) support. */
have_DFP = True; @@ -1390,7 +1390,7 @@ Bool VG_(machine_get_hwcaps)( void )
if (VG_MINIMAL_SETJMP(env_unsup_insn)) { if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
have_DFP = False; have_DFP = False;
} else { } else {
@ -90,7 +88,7 @@ index 0b60ecc0fd44..a860ed67a334 100644
} }
/* Check for ISA 2.07 support. */ /* Check for ISA 2.07 support. */
have_isa_2_07 = True; @@ -1398,7 +1398,7 @@ Bool VG_(machine_get_hwcaps)( void )
if (VG_MINIMAL_SETJMP(env_unsup_insn)) { if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
have_isa_2_07 = False; have_isa_2_07 = False;
} else { } else {
@ -99,7 +97,7 @@ index 0b60ecc0fd44..a860ed67a334 100644
} }
/* Check for ISA 3.0 support. */ /* Check for ISA 3.0 support. */
have_isa_3_0 = True; @@ -1406,7 +1406,7 @@ Bool VG_(machine_get_hwcaps)( void )
if (VG_MINIMAL_SETJMP(env_unsup_insn)) { if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
have_isa_3_0 = False; have_isa_3_0 = False;
} else { } else {
@ -108,7 +106,7 @@ index 0b60ecc0fd44..a860ed67a334 100644
} }
/* Check for ISA 3.1 support. */ /* Check for ISA 3.1 support. */
have_isa_3_1 = True; @@ -1414,7 +1414,7 @@ Bool VG_(machine_get_hwcaps)( void )
if (VG_MINIMAL_SETJMP(env_unsup_insn)) { if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
have_isa_3_1 = False; have_isa_3_1 = False;
} else { } else {
@ -117,9 +115,7 @@ index 0b60ecc0fd44..a860ed67a334 100644
} }
/* Check if Host supports scv instruction */ /* Check if Host supports scv instruction */
have_scv_support = True; @@ -1424,9 +1424,9 @@ Bool VG_(machine_get_hwcaps)( void )
if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
have_scv_support = False;
} else { } else {
/* Set r0 to 13 for the system time call. Don't want to make a random /* Set r0 to 13 for the system time call. Don't want to make a random
system call. */ system call. */
@ -127,10 +123,8 @@ index 0b60ecc0fd44..a860ed67a334 100644
- __asm__ __volatile__(".long 0x6009000d"); /* set r0 to 13 */ - __asm__ __volatile__(".long 0x6009000d"); /* set r0 to 13 */
- __asm__ __volatile__(".long 0x44000001"); /* scv */ - __asm__ __volatile__(".long 0x44000001"); /* scv */
+ __asm__ __volatile__(".long 0x7c000278"); /* clear r0 with xor r0,r0,r0 */ + __asm__ __volatile__(".long 0x7c000278"); /* clear r0 with xor r0,r0,r0 */
+ __asm__ __volatile__(".long 0x6009000d"); /* set r0 to 13 with ori r9,r0,13 */ + __asm__ __volatile__(".long 0x6000000d"); /* set r0 to 13 with ori r0,r0,13 */
+ __asm__ __volatile__(".long 0x44000001"); /* scv 0 */ + __asm__ __volatile__(".long 0x44000001"); /* scv 0 */
} }
/* determine dcbz/dcbzl sizes while we still have the signal /* determine dcbz/dcbzl sizes while we still have the signal
* handlers registered */
find_ppc_dcbz_sz(&vai);