shim-unsigned-riscv64/0006-Implement-__riscv_flush_icache.patch
Andrew Lukoshko 845e29e580 Update to shim 16.1 with RISC-V 64-bit support
- Update shim from 15.8 to 16.1
- Replace separate gnu-efi 4.0.0 tarball with patch-based approach
  (shim 16.1 bundles gnu-efi from rhboot, apply riscv64 support as patch)
- Add 0001-Add-RISC-V-64-support-to-gnu-efi.patch (ncroxon/gnu-efi 4.0.0
  riscv64 files adapted for rhboot/gnu-efi shim-16.1)
- Add 0008-Fix-additional-signedness-warnings-for-riscv64.patch
- Remove 0001-Adopt-modern-ReallocatePool-ABI.patch (not needed with
  rhboot's gnu-efi)
- Rebase all patches for 16.1
- Update SBAT, commit ID, and source checksums
2026-02-23 17:23:04 +00:00

58 lines
1.3 KiB
Diff

From 4d8dd652136cc9f4408a886e9390670d9b415c70 Mon Sep 17 00:00:00 2001
From: Jason Montleon <jason@montleon.com>
Date: Tue, 25 Jun 2024 23:11:38 -0400
Subject: [PATCH] Implement __riscv_flush_icache
Signed-off-by: Jason Montleon <jason@montleon.com>
---
lib/Makefile | 1 +
lib/riscv64/cache.S | 10 ++++++++++
lib/riscv64/edk2asm.h | 6 ++++++
3 files changed, 17 insertions(+)
create mode 100644 lib/riscv64/cache.S
create mode 100644 lib/riscv64/edk2asm.h
diff --git a/lib/Makefile b/lib/Makefile
index 0b79246..2846167 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -32,6 +32,7 @@ DEFINES += -DMDE_CPU_ARM
endif
ifeq ($(ARCH),riscv64)
DEFINES += -DMDE_CPU_RISCV64
+LIBFILES += $(ARCH)/cache.o
endif
LDFLAGS = -nostdlib -znocombreloc
diff --git a/lib/riscv64/cache.S b/lib/riscv64/cache.S
new file mode 100644
index 0000000..b31d6d7
--- /dev/null
+++ b/lib/riscv64/cache.S
@@ -0,0 +1,10 @@
+#include "edk2asm.h"
+
+ .file "cache.S"
+ .text
+
+GCC_ASM_EXPORT(__riscv_flush_icache)
+
+ASM_PFX(__riscv_flush_icache):
+ fence.i
+ ret
diff --git a/lib/riscv64/edk2asm.h b/lib/riscv64/edk2asm.h
new file mode 100644
index 0000000..9515eaf
--- /dev/null
+++ b/lib/riscv64/edk2asm.h
@@ -0,0 +1,6 @@
+
+#define ASM_PFX(x) x
+#define GCC_ASM_EXPORT(x) \
+ .globl x ; \
+ .type x, %function
+
--
2.43.7