175 lines
5.4 KiB
Diff
175 lines
5.4 KiB
Diff
From a35645ca4985b8fdd4f4d8c4d87ae05001061c53 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Volker=20R=C3=BCmelin?= <vr_qemu@t-online.de>
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Date: Sat, 2 Apr 2022 20:28:38 +0200
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Subject: [PATCH 2/3] pci: refactor the pci_config_*() functions
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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RH-Author: Gerd Hoffmann <kraxel@redhat.com>
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RH-MergeRequest: 7: pci: fix reset for q35 and tcg
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RH-Commit: [1/2] 7607f8f3296435a2884902f650ce060c6be07bd1
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RH-Bugzilla: 2083884
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RH-Acked-by: Pawel Polawski <ppolawsk@redhat.com>
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RH-Acked-by: Oliver Steffen <osteffen@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
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Split out the Standard PCI Configuration Access Mechanism
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pci_ioconfig_*() functions from the pci_config_*() functions.
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The standard PCI CAM functions will be used in the next patch.
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Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Volker Rümelin <vr_qemu@t-online.de>
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(cherry picked from commit d24f42b0d819ea473ae05b2f955b822d0126d901)
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---
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src/hw/pci.c | 54 ++++++++++++++++++++++++++++++++++++++++------------
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src/hw/pci.h | 12 +++++++++++-
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2 files changed, 53 insertions(+), 13 deletions(-)
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diff --git a/src/hw/pci.c b/src/hw/pci.c
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index 3df1dae4..f13cbdea 100644
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--- a/src/hw/pci.c
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+++ b/src/hw/pci.c
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@@ -26,63 +26,93 @@ static u32 ioconfig_cmd(u16 bdf, u32 addr)
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return 0x80000000 | (bdf << 8) | (addr & 0xfc);
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}
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+void pci_ioconfig_writel(u16 bdf, u32 addr, u32 val)
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+{
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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+ outl(val, PORT_PCI_DATA);
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+}
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+
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void pci_config_writel(u16 bdf, u32 addr, u32 val)
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{
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if (!MODESEGMENT && mmconfig) {
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writel(mmconfig_addr(bdf, addr), val);
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} else {
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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- outl(val, PORT_PCI_DATA);
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+ pci_ioconfig_writel(bdf, addr, val);
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}
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}
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+void pci_ioconfig_writew(u16 bdf, u32 addr, u16 val)
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+{
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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+ outw(val, PORT_PCI_DATA + (addr & 2));
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+}
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+
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void pci_config_writew(u16 bdf, u32 addr, u16 val)
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{
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if (!MODESEGMENT && mmconfig) {
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writew(mmconfig_addr(bdf, addr), val);
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} else {
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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- outw(val, PORT_PCI_DATA + (addr & 2));
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+ pci_ioconfig_writew(bdf, addr, val);
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}
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}
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+void pci_ioconfig_writeb(u16 bdf, u32 addr, u8 val)
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+{
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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+ outb(val, PORT_PCI_DATA + (addr & 3));
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+}
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+
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void pci_config_writeb(u16 bdf, u32 addr, u8 val)
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{
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if (!MODESEGMENT && mmconfig) {
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writeb(mmconfig_addr(bdf, addr), val);
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} else {
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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- outb(val, PORT_PCI_DATA + (addr & 3));
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+ pci_ioconfig_writeb(bdf, addr, val);
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}
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}
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+u32 pci_ioconfig_readl(u16 bdf, u32 addr)
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+{
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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+ return inl(PORT_PCI_DATA);
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+}
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+
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u32 pci_config_readl(u16 bdf, u32 addr)
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{
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if (!MODESEGMENT && mmconfig) {
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return readl(mmconfig_addr(bdf, addr));
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} else {
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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- return inl(PORT_PCI_DATA);
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+ return pci_ioconfig_readl(bdf, addr);
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}
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}
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+u16 pci_ioconfig_readw(u16 bdf, u32 addr)
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+{
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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+ return inw(PORT_PCI_DATA + (addr & 2));
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+}
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+
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u16 pci_config_readw(u16 bdf, u32 addr)
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{
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if (!MODESEGMENT && mmconfig) {
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return readw(mmconfig_addr(bdf, addr));
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} else {
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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- return inw(PORT_PCI_DATA + (addr & 2));
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+ return pci_ioconfig_readw(bdf, addr);
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}
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}
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+u8 pci_ioconfig_readb(u16 bdf, u32 addr)
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+{
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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+ return inb(PORT_PCI_DATA + (addr & 3));
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+}
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+
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u8 pci_config_readb(u16 bdf, u32 addr)
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{
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if (!MODESEGMENT && mmconfig) {
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return readb(mmconfig_addr(bdf, addr));
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} else {
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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- return inb(PORT_PCI_DATA + (addr & 3));
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+ return pci_ioconfig_readb(bdf, addr);
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}
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}
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diff --git a/src/hw/pci.h b/src/hw/pci.h
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index 01c51f70..ee6acafc 100644
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--- a/src/hw/pci.h
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+++ b/src/hw/pci.h
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@@ -32,6 +32,15 @@ static inline u16 pci_bus_devfn_to_bdf(int bus, u16 devfn) {
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; BDF >= 0 \
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; BDF=pci_next(BDF, (BUS)))
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+// standard PCI configration access mechanism
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+void pci_ioconfig_writel(u16 bdf, u32 addr, u32 val);
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+void pci_ioconfig_writew(u16 bdf, u32 addr, u16 val);
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+void pci_ioconfig_writeb(u16 bdf, u32 addr, u8 val);
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+u32 pci_ioconfig_readl(u16 bdf, u32 addr);
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+u16 pci_ioconfig_readw(u16 bdf, u32 addr);
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+u8 pci_ioconfig_readb(u16 bdf, u32 addr);
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+
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+// PCI configuration access using either PCI CAM or PCIe ECAM
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void pci_config_writel(u16 bdf, u32 addr, u32 val);
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void pci_config_writew(u16 bdf, u32 addr, u16 val);
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void pci_config_writeb(u16 bdf, u32 addr, u8 val);
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@@ -39,9 +48,10 @@ u32 pci_config_readl(u16 bdf, u32 addr);
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u16 pci_config_readw(u16 bdf, u32 addr);
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u8 pci_config_readb(u16 bdf, u32 addr);
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void pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on);
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-void pci_enable_mmconfig(u64 addr, const char *name);
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u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap);
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int pci_next(int bdf, int bus);
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+
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+void pci_enable_mmconfig(u64 addr, const char *name);
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int pci_probe_host(void);
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void pci_reboot(void);
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--
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2.35.3
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