From cc47affe23d7548dfa3c77c3846da87f1ebd2a8e Mon Sep 17 00:00:00 2001 From: CentOS Sources Date: Tue, 27 Sep 2022 09:58:39 -0400 Subject: [PATCH] import seabios-1.16.0-3.module+el8.7.0+16134+e5908aa2 --- .gitignore | 2 +- .seabios.metadata | 2 +- SOURCES/0002-allow-1TB-of-RAM.patch | 15 +- ...vendor-version-fields-to-Seabios-0.5.patch | 14 +- ...around-for-a-win8.1-32-S4-resume-bug.patch | 9 +- ...mware-reserve-IO-for-pcie-pci-bridge.patch | 90 --------- ...urces-for-pcie-pci-bridge-to-fix-reg.patch | 83 --------- ...i-refactor-the-pci_config_-functions.patch | 174 ++++++++++++++++++ ...ce-standard-PCI-configuration-access.patch | 159 ++++++++++++++++ ...t-skip-unbootable-disks-optimitation.patch | 40 ++++ ...-blk-use-larger-default-request-size.patch | 42 +++++ SPECS/seabios.spec | 41 ++++- 12 files changed, 475 insertions(+), 196 deletions(-) delete mode 100644 SOURCES/0005-pci-let-firmware-reserve-IO-for-pcie-pci-bridge.patch delete mode 100644 SOURCES/0006-pci-reserve-resources-for-pcie-pci-bridge-to-fix-reg.patch create mode 100644 SOURCES/seabios-pci-refactor-the-pci_config_-functions.patch create mode 100644 SOURCES/seabios-reset-force-standard-PCI-configuration-access.patch create mode 100644 SOURCES/seabios-shortcut-skip-unbootable-disks-optimitation.patch create mode 100644 SOURCES/seabios-virtio-blk-use-larger-default-request-size.patch diff --git a/.gitignore b/.gitignore index eb8fb8c..fa2b595 100644 --- a/.gitignore +++ b/.gitignore @@ -1 +1 @@ -SOURCES/seabios-1.15.0.tar.gz +SOURCES/seabios-1.16.0.tar.gz diff --git a/.seabios.metadata b/.seabios.metadata index 7e522e1..41a6710 100644 --- a/.seabios.metadata +++ b/.seabios.metadata @@ -1 +1 @@ -1ab1ca5971e59d8d6b5c579b242d586e54a86873 SOURCES/seabios-1.15.0.tar.gz +0cc6b21cfbafa1f9f158c9aca1ab9f5174ebede2 SOURCES/seabios-1.16.0.tar.gz diff --git a/SOURCES/0002-allow-1TB-of-RAM.patch b/SOURCES/0002-allow-1TB-of-RAM.patch index c726ce0..979e2ba 100644 --- a/SOURCES/0002-allow-1TB-of-RAM.patch +++ b/SOURCES/0002-allow-1TB-of-RAM.patch @@ -1,7 +1,10 @@ -From 0dea1df1f9b9a64bd9e71dd1a7b4c6cc9962afa0 Mon Sep 17 00:00:00 2001 +From d659d62b9c094acea66f6f7506877f210a9dd182 Mon Sep 17 00:00:00 2001 From: Andrea Arcangeli Date: Tue, 8 Oct 2013 17:07:23 +0200 Subject: allow >1TB of RAM +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit RH-Author: Andrea Arcangeli Message-id: <1381252043-13480-2-git-send-email-aarcange@redhat.com> @@ -20,15 +23,15 @@ Signed-off-by: Andrea Arcangeli src/post.c | 7 ++++--- 2 files changed, 8 insertions(+), 6 deletions(-) -Signed-off-by: Miroslav Rezanina -(cherry picked from commit 4fee214c41b11b72b3427fda18e9eac1ee647746) +(cherry picked from commit 0dea1df1f9b9a64bd9e71dd1a7b4c6cc9962afa0) +Signed-off-by: Paweł Poławski --- src/fw/paravirt.c | 7 ++++--- src/hw/rtc.h | 7 ++++--- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c -index fba4e52..090d655 100644 +index fba4e52d..090d6555 100644 --- a/src/fw/paravirt.c +++ b/src/fw/paravirt.c @@ -516,9 +516,10 @@ qemu_cfg_e820(void) @@ -46,7 +49,7 @@ index fba4e52..090d655 100644 e820_add(0x100000000ull, high, E820_RAM); dprintf(1, "RamSizeOver4G: 0x%016llx [cmos]\n", RamSizeOver4G); diff --git a/src/hw/rtc.h b/src/hw/rtc.h -index 252e73a..c4369f8 100644 +index 252e73a4..c4369f81 100644 --- a/src/hw/rtc.h +++ b/src/hw/rtc.h @@ -41,9 +41,10 @@ @@ -64,5 +67,5 @@ index 252e73a..c4369f8 100644 // RTC register flags -- -2.27.0 +2.31.1 diff --git a/SOURCES/0003-smbios-set-bios-vendor-version-fields-to-Seabios-0.5.patch b/SOURCES/0003-smbios-set-bios-vendor-version-fields-to-Seabios-0.5.patch index 526a1c6..081cd84 100644 --- a/SOURCES/0003-smbios-set-bios-vendor-version-fields-to-Seabios-0.5.patch +++ b/SOURCES/0003-smbios-set-bios-vendor-version-fields-to-Seabios-0.5.patch @@ -1,7 +1,10 @@ -From cc21704fcfbc62af6789e1362eb05a2dc2b56cbf Mon Sep 17 00:00:00 2001 +From daf5bb8573c22dc133b4f7a8a07a174dbb30a2c5 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Mon, 28 Jul 2014 12:14:11 +0200 Subject: smbios: set bios vendor/version fields to Seabios/0.5.1 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit Message-id: <1406549651-26021-2-git-send-email-kraxel@redhat.com> Patchwork-id: 60264 @@ -20,14 +23,15 @@ fill in the actual version information instead of the bogous 0.5.1 which we are using here for backward compatibility reasons. Signed-off-by: Gerd Hoffmann -Signed-off-by: Miroslav Rezanina -(cherry picked from commit bf361def4623ac1942512f255e5c1450970b5092) + +(cherry picked from commit cc21704fcfbc62af6789e1362eb05a2dc2b56cbf) +Signed-off-by: Paweł Poławski --- src/fw/smbios.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/fw/smbios.c b/src/fw/smbios.c -index 62a563b..4dc1737 100644 +index 730b6898..cb6fc03f 100644 --- a/src/fw/smbios.c +++ b/src/fw/smbios.c @@ -174,8 +174,8 @@ smbios_init_type_0(void *start) @@ -42,5 +46,5 @@ index 62a563b..4dc1737 100644 p->bios_starting_address_segment = 0xe800; -- -2.27.0 +2.31.1 diff --git a/SOURCES/0004-Workaround-for-a-win8.1-32-S4-resume-bug.patch b/SOURCES/0004-Workaround-for-a-win8.1-32-S4-resume-bug.patch index 9b72496..9651e10 100644 --- a/SOURCES/0004-Workaround-for-a-win8.1-32-S4-resume-bug.patch +++ b/SOURCES/0004-Workaround-for-a-win8.1-32-S4-resume-bug.patch @@ -1,4 +1,4 @@ -From 8629f200084ce1aab31d193280d34b5fb16e543f Mon Sep 17 00:00:00 2001 +From 0182f348c6bc7cb676cb52941cbb0b220639c4e0 Mon Sep 17 00:00:00 2001 From: Radim Krcmar Date: Mon, 10 Mar 2014 15:14:27 +0100 Subject: Workaround for a win8.1-32 S4 resume bug @@ -36,12 +36,15 @@ The reason Windows uses NULL pointer is still unknown, but this bug is blocking WHQL certification, so we have to work around it in 7.0. Signed-off-by: Radim Krčmář + +(cherry picked from commit 8629f200084ce1aab31d193280d34b5fb16e543f) +Signed-off-by: Paweł Poławski --- src/clock.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/clock.c b/src/clock.c -index e44e112..298a722 100644 +index e44e1120..298a7229 100644 --- a/src/clock.c +++ b/src/clock.c @@ -309,7 +309,13 @@ handle_08(void) @@ -60,5 +63,5 @@ index e44e112..298a722 100644 pic_eoi1(); } -- -2.27.0 +2.31.1 diff --git a/SOURCES/0005-pci-let-firmware-reserve-IO-for-pcie-pci-bridge.patch b/SOURCES/0005-pci-let-firmware-reserve-IO-for-pcie-pci-bridge.patch deleted file mode 100644 index 614b1f8..0000000 --- a/SOURCES/0005-pci-let-firmware-reserve-IO-for-pcie-pci-bridge.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 153f5ec6899055276eaef20eae7b6d9fd090a05a Mon Sep 17 00:00:00 2001 -From: Igor Mammedov -Date: Mon, 29 Nov 2021 06:48:12 -0500 -Subject: pci: let firmware reserve IO for pcie-pci-bridge - -RH-Bugzilla: 2001921 - -With [1] patch hotplug of rtl8139 succeeds, with caveat that it -fails to initialize IO bar, which is caused by [2] that makes -firmware skip IO reservation for any PCIe device, which isn't -correct in case of pcie-pci-bridge. -Fix it by exposing hotplug type and making IO resource optional -only if PCIe hotplug is in use. - -[1] - "pci: reserve resources for pcie-pci-bridge to fix regressed hotplug on q35" -[2] - -Fixes: 76327b9f32a ("fw/pci: do not automatically allocate IO region for PCIe bridges") -Signed-off-by: Igor Mammedov imammedo@redhat.com -CC: mapfelba@redhat.com -CC: kraxel@redhat.com -CC: mst@redhat.com -CC: lvivier@redhat.com -CC: jusual@redhat.com -Tested-by: Laurent Vivier -Acked-by: Michael S. Tsirkin -Message-Id: <20211129114812.231849-3-imammedo@redhat.com> -Signed-off-by: Gerd Hoffmann ---- - src/fw/pciinit.c | 19 ++++++++++++++----- - 1 file changed, 14 insertions(+), 5 deletions(-) - -diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c -index d25931b..3c99d51 100644 ---- a/src/fw/pciinit.c -+++ b/src/fw/pciinit.c -@@ -793,7 +793,13 @@ pci_region_create_entry(struct pci_bus *bus, struct pci_device *dev, - return entry; - } - --static int pci_bus_hotplug_support(struct pci_bus *bus, u8 pcie_cap) -+typedef enum hotplug_type_t { -+ HOTPLUG_NO_SUPPORTED = 0, -+ HOTPLUG_PCIE, -+ HOTPLUG_SHPC -+} hotplug_type_t; -+ -+static hotplug_type_t pci_bus_hotplug_support(struct pci_bus *bus, u8 pcie_cap) - { - u8 shpc_cap; - -@@ -815,11 +821,12 @@ static int pci_bus_hotplug_support(struct pci_bus *bus, u8 pcie_cap) - */ - u16 slot_implemented = pcie_flags & PCI_EXP_FLAGS_SLOT; - -- return downstream_port && slot_implemented; -+ return downstream_port && slot_implemented ? -+ HOTPLUG_PCIE : HOTPLUG_NO_SUPPORTED; - } - - shpc_cap = pci_find_capability(bus->bus_dev->bdf, PCI_CAP_ID_SHPC, 0); -- return !!shpc_cap; -+ return !!shpc_cap ? HOTPLUG_SHPC : HOTPLUG_NO_SUPPORTED; - } - - /* Test whether bridge support forwarding of transactions -@@ -904,7 +911,7 @@ static int pci_bios_check_devices(struct pci_bus *busses) - u8 pcie_cap = pci_find_capability(bdf, PCI_CAP_ID_EXP, 0); - u8 qemu_cap = pci_find_resource_reserve_capability(bdf); - -- int hotplug_support = pci_bus_hotplug_support(s, pcie_cap); -+ hotplug_type_t hotplug_support = pci_bus_hotplug_support(s, pcie_cap); - for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) { - u64 align = (type == PCI_REGION_TYPE_IO) ? - PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN; -@@ -948,7 +955,9 @@ static int pci_bios_check_devices(struct pci_bus *busses) - if (pci_region_align(&s->r[type]) > align) - align = pci_region_align(&s->r[type]); - u64 sum = pci_region_sum(&s->r[type]); -- int resource_optional = pcie_cap && (type == PCI_REGION_TYPE_IO); -+ int resource_optional = 0; -+ if (hotplug_support == HOTPLUG_PCIE) -+ resource_optional = pcie_cap && (type == PCI_REGION_TYPE_IO); - if (!sum && hotplug_support && !resource_optional) - sum = align; /* reserve min size for hot-plug */ - if (size > sum) { --- -2.27.0 - diff --git a/SOURCES/0006-pci-reserve-resources-for-pcie-pci-bridge-to-fix-reg.patch b/SOURCES/0006-pci-reserve-resources-for-pcie-pci-bridge-to-fix-reg.patch deleted file mode 100644 index 6e5900c..0000000 --- a/SOURCES/0006-pci-reserve-resources-for-pcie-pci-bridge-to-fix-reg.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 4a31485efad9db7feed56f483e123f0b58c38b2f Mon Sep 17 00:00:00 2001 -From: Igor Mammedov -Date: Mon, 29 Nov 2021 06:48:11 -0500 -Subject: pci: reserve resources for pcie-pci-bridge to fix regressed hotplug - on q35 - -RH-Bugzilla: 2001921 - -If QEMU is started with unpopulated pcie-pci-bridge with ACPI PCI -hotplug enabled (default since QEMU-6.1), hotplugging a PCI device -into one of the bridge slots fails due to lack of resources. - -once linux guest is booted (test used Fedora 34), hotplug NIC from -QEMU monitor: - (qemu) device_add rtl8139,bus=pcie-pci-bridge-0,addr=0x2 - -guest fails hotplug with: - pci 0000:01:02.0: [10ec:8139] type 00 class 0x020000 - pci 0000:01:02.0: reg 0x10: [io 0x0000-0x00ff] - pci 0000:01:02.0: reg 0x14: [mem 0x00000000-0x000000ff] - pci 0000:01:02.0: reg 0x30: [mem 0x00000000-0x0003ffff pref] - pci 0000:01:02.0: BAR 6: no space for [mem size 0x00040000 pref] - pci 0000:01:02.0: BAR 6: failed to assign [mem size 0x00040000 pref] - pci 0000:01:02.0: BAR 0: no space for [io size 0x0100] - pci 0000:01:02.0: BAR 0: failed to assign [io size 0x0100] - pci 0000:01:02.0: BAR 1: no space for [mem size 0x00000100] - pci 0000:01:02.0: BAR 1: failed to assign [mem size 0x00000100] - 8139cp: 8139cp: 10/100 PCI Ethernet driver v1.3 (Mar 22, 2004) - PCI Interrupt Link [GSIG] enabled at IRQ 22 - 8139cp 0000:01:02.0: no MMIO resource - 8139cp: probe of 0000:01:02.0 failed with error -5 - -Reason for this is that commit [1] didn't take into account -pcie-pci-bridge, marking bridge as non hotpluggable instead of -handling it as possibly SHPC capable bridge. -Fix issue by checking if pcie-pci-bridge is SHPC capable and -if it is mark it as hotpluggable. - -Fixes regression in QEMU-6.1 and later, since it was switched -to ACPI based PCI hotplug on Q35 by default at that time. - -[1] -Fixes: 3aa31d7d637 ("hw/pci: reserve IO and mem for pci express downstream ports with no devices attached") -Signed-off-by: Igor Mammedov imammedo@redhat.com -CC: mapfelba@redhat.com -CC: kraxel@redhat.com -CC: mst@redhat.com -CC: lvivier@redhat.com -CC: jusual@redhat.com -Tested-by: Laurent Vivier -Acked-by: Michael S. Tsirkin -Message-Id: <20211129114812.231849-2-imammedo@redhat.com> -Signed-off-by: Gerd Hoffmann ---- - src/fw/pciinit.c | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c -index 3c99d51..badf13d 100644 ---- a/src/fw/pciinit.c -+++ b/src/fw/pciinit.c -@@ -808,6 +808,10 @@ static hotplug_type_t pci_bus_hotplug_support(struct pci_bus *bus, u8 pcie_cap) - pcie_cap + PCI_EXP_FLAGS); - u8 port_type = ((pcie_flags & PCI_EXP_FLAGS_TYPE) >> - (__builtin_ffs(PCI_EXP_FLAGS_TYPE) - 1)); -+ -+ if (port_type == PCI_EXP_TYPE_PCI_BRIDGE) -+ goto check_shpc; -+ - u8 downstream_port = (port_type == PCI_EXP_TYPE_DOWNSTREAM) || - (port_type == PCI_EXP_TYPE_ROOT_PORT); - /* -@@ -825,6 +829,7 @@ static hotplug_type_t pci_bus_hotplug_support(struct pci_bus *bus, u8 pcie_cap) - HOTPLUG_PCIE : HOTPLUG_NO_SUPPORTED; - } - -+check_shpc: - shpc_cap = pci_find_capability(bus->bus_dev->bdf, PCI_CAP_ID_SHPC, 0); - return !!shpc_cap ? HOTPLUG_SHPC : HOTPLUG_NO_SUPPORTED; - } --- -2.27.0 - diff --git a/SOURCES/seabios-pci-refactor-the-pci_config_-functions.patch b/SOURCES/seabios-pci-refactor-the-pci_config_-functions.patch new file mode 100644 index 0000000..544298d --- /dev/null +++ b/SOURCES/seabios-pci-refactor-the-pci_config_-functions.patch @@ -0,0 +1,174 @@ +From a35645ca4985b8fdd4f4d8c4d87ae05001061c53 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Volker=20R=C3=BCmelin?= +Date: Sat, 2 Apr 2022 20:28:38 +0200 +Subject: [PATCH 2/3] pci: refactor the pci_config_*() functions +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Gerd Hoffmann +RH-MergeRequest: 7: pci: fix reset for q35 and tcg +RH-Commit: [1/2] 7607f8f3296435a2884902f650ce060c6be07bd1 +RH-Bugzilla: 2083884 +RH-Acked-by: Pawel Polawski +RH-Acked-by: Oliver Steffen +RH-Acked-by: Igor Mammedov +RH-Acked-by: Laszlo Ersek + +Split out the Standard PCI Configuration Access Mechanism +pci_ioconfig_*() functions from the pci_config_*() functions. +The standard PCI CAM functions will be used in the next patch. + +Reviewed-by: Gerd Hoffmann +Signed-off-by: Volker Rümelin +(cherry picked from commit d24f42b0d819ea473ae05b2f955b822d0126d901) +--- + src/hw/pci.c | 54 ++++++++++++++++++++++++++++++++++++++++------------ + src/hw/pci.h | 12 +++++++++++- + 2 files changed, 53 insertions(+), 13 deletions(-) + +diff --git a/src/hw/pci.c b/src/hw/pci.c +index 3df1dae4..f13cbdea 100644 +--- a/src/hw/pci.c ++++ b/src/hw/pci.c +@@ -26,63 +26,93 @@ static u32 ioconfig_cmd(u16 bdf, u32 addr) + return 0x80000000 | (bdf << 8) | (addr & 0xfc); + } + ++void pci_ioconfig_writel(u16 bdf, u32 addr, u32 val) ++{ ++ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); ++ outl(val, PORT_PCI_DATA); ++} ++ + void pci_config_writel(u16 bdf, u32 addr, u32 val) + { + if (!MODESEGMENT && mmconfig) { + writel(mmconfig_addr(bdf, addr), val); + } else { +- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); +- outl(val, PORT_PCI_DATA); ++ pci_ioconfig_writel(bdf, addr, val); + } + } + ++void pci_ioconfig_writew(u16 bdf, u32 addr, u16 val) ++{ ++ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); ++ outw(val, PORT_PCI_DATA + (addr & 2)); ++} ++ + void pci_config_writew(u16 bdf, u32 addr, u16 val) + { + if (!MODESEGMENT && mmconfig) { + writew(mmconfig_addr(bdf, addr), val); + } else { +- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); +- outw(val, PORT_PCI_DATA + (addr & 2)); ++ pci_ioconfig_writew(bdf, addr, val); + } + } + ++void pci_ioconfig_writeb(u16 bdf, u32 addr, u8 val) ++{ ++ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); ++ outb(val, PORT_PCI_DATA + (addr & 3)); ++} ++ + void pci_config_writeb(u16 bdf, u32 addr, u8 val) + { + if (!MODESEGMENT && mmconfig) { + writeb(mmconfig_addr(bdf, addr), val); + } else { +- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); +- outb(val, PORT_PCI_DATA + (addr & 3)); ++ pci_ioconfig_writeb(bdf, addr, val); + } + } + ++u32 pci_ioconfig_readl(u16 bdf, u32 addr) ++{ ++ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); ++ return inl(PORT_PCI_DATA); ++} ++ + u32 pci_config_readl(u16 bdf, u32 addr) + { + if (!MODESEGMENT && mmconfig) { + return readl(mmconfig_addr(bdf, addr)); + } else { +- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); +- return inl(PORT_PCI_DATA); ++ return pci_ioconfig_readl(bdf, addr); + } + } + ++u16 pci_ioconfig_readw(u16 bdf, u32 addr) ++{ ++ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); ++ return inw(PORT_PCI_DATA + (addr & 2)); ++} ++ + u16 pci_config_readw(u16 bdf, u32 addr) + { + if (!MODESEGMENT && mmconfig) { + return readw(mmconfig_addr(bdf, addr)); + } else { +- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); +- return inw(PORT_PCI_DATA + (addr & 2)); ++ return pci_ioconfig_readw(bdf, addr); + } + } + ++u8 pci_ioconfig_readb(u16 bdf, u32 addr) ++{ ++ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); ++ return inb(PORT_PCI_DATA + (addr & 3)); ++} ++ + u8 pci_config_readb(u16 bdf, u32 addr) + { + if (!MODESEGMENT && mmconfig) { + return readb(mmconfig_addr(bdf, addr)); + } else { +- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); +- return inb(PORT_PCI_DATA + (addr & 3)); ++ return pci_ioconfig_readb(bdf, addr); + } + } + +diff --git a/src/hw/pci.h b/src/hw/pci.h +index 01c51f70..ee6acafc 100644 +--- a/src/hw/pci.h ++++ b/src/hw/pci.h +@@ -32,6 +32,15 @@ static inline u16 pci_bus_devfn_to_bdf(int bus, u16 devfn) { + ; BDF >= 0 \ + ; BDF=pci_next(BDF, (BUS))) + ++// standard PCI configration access mechanism ++void pci_ioconfig_writel(u16 bdf, u32 addr, u32 val); ++void pci_ioconfig_writew(u16 bdf, u32 addr, u16 val); ++void pci_ioconfig_writeb(u16 bdf, u32 addr, u8 val); ++u32 pci_ioconfig_readl(u16 bdf, u32 addr); ++u16 pci_ioconfig_readw(u16 bdf, u32 addr); ++u8 pci_ioconfig_readb(u16 bdf, u32 addr); ++ ++// PCI configuration access using either PCI CAM or PCIe ECAM + void pci_config_writel(u16 bdf, u32 addr, u32 val); + void pci_config_writew(u16 bdf, u32 addr, u16 val); + void pci_config_writeb(u16 bdf, u32 addr, u8 val); +@@ -39,9 +48,10 @@ u32 pci_config_readl(u16 bdf, u32 addr); + u16 pci_config_readw(u16 bdf, u32 addr); + u8 pci_config_readb(u16 bdf, u32 addr); + void pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on); +-void pci_enable_mmconfig(u64 addr, const char *name); + u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap); + int pci_next(int bdf, int bus); ++ ++void pci_enable_mmconfig(u64 addr, const char *name); + int pci_probe_host(void); + void pci_reboot(void); + +-- +2.35.3 + diff --git a/SOURCES/seabios-reset-force-standard-PCI-configuration-access.patch b/SOURCES/seabios-reset-force-standard-PCI-configuration-access.patch new file mode 100644 index 0000000..d014eb4 --- /dev/null +++ b/SOURCES/seabios-reset-force-standard-PCI-configuration-access.patch @@ -0,0 +1,159 @@ +From a7e5f1d8f1f874434f8b3e6d6eac784d5e3e3971 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Volker=20R=C3=BCmelin?= +Date: Sat, 2 Apr 2022 20:28:39 +0200 +Subject: [PATCH 3/3] reset: force standard PCI configuration access +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Gerd Hoffmann +RH-MergeRequest: 7: pci: fix reset for q35 and tcg +RH-Commit: [2/2] 693fbb9148c81f344dc9f64e7a36e51b42ee1a95 +RH-Bugzilla: 2083884 +RH-Acked-by: Pawel Polawski +RH-Acked-by: Oliver Steffen +RH-Acked-by: Igor Mammedov +RH-Acked-by: Laszlo Ersek + +After a reset of a QEMU -machine q35 guest, the PCI Express +Enhanced Configuration Mechanism is disabled and the variable +mmconfig no longer matches the configuration register PCIEXBAR +of the Q35 chipset. Until the variable mmconfig is reset to 0, +all pci_config_*() functions no longer work. + +The variable mmconfig is located in one of the read-only C-F +segments. To reset it the pci_config_*() functions are needed, +but they do not work. + +Replace all pci_config_*() calls with Standard PCI Configuration +Mechanism pci_ioconfig_*() calls until mmconfig is overwritten +with 0 by a fresh copy of the BIOS. + +This fixes + +In resume (status=0) +In 32bit resume +Attempting a hard reboot +Unable to unlock ram - bridge not found + +and a reset loop with QEMU -accel tcg. + +Signed-off-by: Volker Rümelin +(cherry picked from commit 01774004c7f7fdc9c1e8f1715f70d3b913f8d491) +--- + src/fw/shadow.c | 14 +++++++------- + src/hw/pci.c | 27 +++++++++++++++++++++++++++ + src/hw/pci.h | 6 ++++++ + 3 files changed, 40 insertions(+), 7 deletions(-) + +diff --git a/src/fw/shadow.c b/src/fw/shadow.c +index 4c627a8f..8930616e 100644 +--- a/src/fw/shadow.c ++++ b/src/fw/shadow.c +@@ -32,8 +32,8 @@ __make_bios_writable_intel(u16 bdf, u32 pam0) + { + // Read in current PAM settings from pci config space + union pamdata_u pamdata; +- pamdata.data32[0] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4)); +- pamdata.data32[1] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4) + 4); ++ pamdata.data32[0] = pci_ioconfig_readl(bdf, ALIGN_DOWN(pam0, 4)); ++ pamdata.data32[1] = pci_ioconfig_readl(bdf, ALIGN_DOWN(pam0, 4) + 4); + u8 *pam = &pamdata.data8[pam0 & 0x03]; + + // Make ram from 0xc0000-0xf0000 writable +@@ -46,8 +46,8 @@ __make_bios_writable_intel(u16 bdf, u32 pam0) + pam[0] = 0x30; + + // Write PAM settings back to pci config space +- pci_config_writel(bdf, ALIGN_DOWN(pam0, 4), pamdata.data32[0]); +- pci_config_writel(bdf, ALIGN_DOWN(pam0, 4) + 4, pamdata.data32[1]); ++ pci_ioconfig_writel(bdf, ALIGN_DOWN(pam0, 4), pamdata.data32[0]); ++ pci_ioconfig_writel(bdf, ALIGN_DOWN(pam0, 4) + 4, pamdata.data32[1]); + + if (!ram_present) + // Copy bios. +@@ -59,7 +59,7 @@ __make_bios_writable_intel(u16 bdf, u32 pam0) + static void + make_bios_writable_intel(u16 bdf, u32 pam0) + { +- int reg = pci_config_readb(bdf, pam0); ++ int reg = pci_ioconfig_readb(bdf, pam0); + if (!(reg & 0x10)) { + // QEMU doesn't fully implement the piix shadow capabilities - + // if ram isn't backing the bios segment when shadowing is +@@ -125,8 +125,8 @@ make_bios_writable(void) + // At this point, statically allocated variables can't be written, + // so do this search manually. + int bdf; +- foreachbdf(bdf, 0) { +- u32 vendev = pci_config_readl(bdf, PCI_VENDOR_ID); ++ pci_ioconfig_foreachbdf(bdf, 0) { ++ u32 vendev = pci_ioconfig_readl(bdf, PCI_VENDOR_ID); + u16 vendor = vendev & 0xffff, device = vendev >> 16; + if (vendor == PCI_VENDOR_ID_INTEL + && device == PCI_DEVICE_ID_INTEL_82441) { +diff --git a/src/hw/pci.c b/src/hw/pci.c +index f13cbdea..8eda84b2 100644 +--- a/src/hw/pci.c ++++ b/src/hw/pci.c +@@ -157,6 +157,33 @@ u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap) + return 0; + } + ++// Helper function for pci_ioconfig_foreachbdf() macro - return next device ++int pci_ioconfig_next(int bdf, int bus) ++{ ++ if (pci_bdf_to_fn(bdf) == 0 ++ && (pci_ioconfig_readb(bdf, PCI_HEADER_TYPE) & 0x80) == 0) ++ // Last found device wasn't a multi-function device - skip to ++ // the next device. ++ bdf += 8; ++ else ++ bdf += 1; ++ ++ for (;;) { ++ if (pci_bdf_to_bus(bdf) != bus) ++ return -1; ++ ++ u16 v = pci_ioconfig_readw(bdf, PCI_VENDOR_ID); ++ if (v != 0x0000 && v != 0xffff) ++ // Device is present. ++ return bdf; ++ ++ if (pci_bdf_to_fn(bdf) == 0) ++ bdf += 8; ++ else ++ bdf += 1; ++ } ++} ++ + // Helper function for foreachbdf() macro - return next device + int + pci_next(int bdf, int bus) +diff --git a/src/hw/pci.h b/src/hw/pci.h +index ee6acafc..b2f5baf4 100644 +--- a/src/hw/pci.h ++++ b/src/hw/pci.h +@@ -27,6 +27,11 @@ static inline u16 pci_bus_devfn_to_bdf(int bus, u16 devfn) { + return (bus << 8) | devfn; + } + ++#define pci_ioconfig_foreachbdf(BDF, BUS) \ ++ for (BDF=pci_ioconfig_next(pci_bus_devfn_to_bdf((BUS), 0)-1, (BUS)) \ ++ ; BDF >= 0 \ ++ ; BDF=pci_ioconfig_next(BDF, (BUS))) ++ + #define foreachbdf(BDF, BUS) \ + for (BDF=pci_next(pci_bus_devfn_to_bdf((BUS), 0)-1, (BUS)) \ + ; BDF >= 0 \ +@@ -39,6 +44,7 @@ void pci_ioconfig_writeb(u16 bdf, u32 addr, u8 val); + u32 pci_ioconfig_readl(u16 bdf, u32 addr); + u16 pci_ioconfig_readw(u16 bdf, u32 addr); + u8 pci_ioconfig_readb(u16 bdf, u32 addr); ++int pci_ioconfig_next(int bdf, int bus); + + // PCI configuration access using either PCI CAM or PCIe ECAM + void pci_config_writel(u16 bdf, u32 addr, u32 val); +-- +2.35.3 + diff --git a/SOURCES/seabios-shortcut-skip-unbootable-disks-optimitation.patch b/SOURCES/seabios-shortcut-skip-unbootable-disks-optimitation.patch new file mode 100644 index 0000000..4507f66 --- /dev/null +++ b/SOURCES/seabios-shortcut-skip-unbootable-disks-optimitation.patch @@ -0,0 +1,40 @@ +From 27b924ad88b53c1bff736d144b90ce655087d1a5 Mon Sep 17 00:00:00 2001 +From: Gerd Hoffmann +Date: Fri, 29 Oct 2021 11:19:10 +0200 +Subject: [PATCH 1/3] shortcut skip-unbootable-disks optimitation + +RH-Author: Gerd Hoffmann +RH-MergeRequest: 6: shortcut skip-unbootable-disks optimitation +RH-Commit: [1/1] 95008c119b45b4a360caa4a7733420d72aec99cb +RH-Bugzilla: 2073012 +RH-Acked-by: Laszlo Ersek +RH-Acked-by: Oliver Steffen +RH-Acked-by: Pawel Polawski +--- + src/boot.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/src/boot.c b/src/boot.c +index 1effd802..b18e7788 100644 +--- a/src/boot.c ++++ b/src/boot.c +@@ -297,11 +297,16 @@ find_prio(const char *glob) + + u8 is_bootprio_strict(void) + { ++#if 0 + static int prio_halt = -2; + + if (prio_halt == -2) + prio_halt = find_prio("HALT"); + return prio_halt >= 0; ++#else ++ // force initializing all disks ++ return 0; ++#endif + } + + int bootprio_find_pci_device(struct pci_device *pci) +-- +2.35.3 + diff --git a/SOURCES/seabios-virtio-blk-use-larger-default-request-size.patch b/SOURCES/seabios-virtio-blk-use-larger-default-request-size.patch new file mode 100644 index 0000000..d2706c0 --- /dev/null +++ b/SOURCES/seabios-virtio-blk-use-larger-default-request-size.patch @@ -0,0 +1,42 @@ +From 88e527d9fbbbe8d05e45f6db8a151d22e7f973d3 Mon Sep 17 00:00:00 2001 +From: Gerd Hoffmann +Date: Thu, 30 Jun 2022 17:28:40 +0200 +Subject: [PATCH] virtio-blk: use larger default request size + +RH-Author: Gerd Hoffmann +RH-MergeRequest: 8: virtio-blk: use larger default request size +RH-Commit: [1/1] df68a35a0d02fb91f61eca9e9342ae5f13f99803 +RH-Bugzilla: 2101787 +RH-Acked-by: Oliver Steffen +RH-Acked-by: Pawel Polawski +RH-Acked-by: Miroslav Rezanina + +Bump default from 8 to 64 blocks. Using 8 by default leads +to requests being splitted on qemu, which slows down boot. + +Some (temporary) debug logging added showed that almost all +requests on a standard fedora install are less than 64 blocks, +so that should bring us back to 1.15 performance levels. + +Signed-off-by: Gerd Hoffmann +(cherry picked from commit 46de2eec93bffa0706e6229c0da2919763c8eb04) +--- + src/hw/virtio-blk.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/hw/virtio-blk.c b/src/hw/virtio-blk.c +index 929ba887..9b4a05a4 100644 +--- a/src/hw/virtio-blk.c ++++ b/src/hw/virtio-blk.c +@@ -95,7 +95,7 @@ virtio_blk_op(struct disk_op_s *op, int write) + blk_num_max = (u16)max_io_size / vdrive->drive.blksize; + else + /* default blk_num_max if hardware doesnot advise a proper value */ +- blk_num_max = 8; ++ blk_num_max = 64; + + if (op->count <= blk_num_max) { + virtio_blk_op_one_segment(vdrive, write, sg); +-- +2.31.1 + diff --git a/SPECS/seabios.spec b/SPECS/seabios.spec index 3d152a1..dfbfcbe 100644 --- a/SPECS/seabios.spec +++ b/SPECS/seabios.spec @@ -1,13 +1,13 @@ Name: seabios -Version: 1.15.0 -Release: 1%{?dist} +Version: 1.16.0 +Release: 3%{?dist} Summary: Open-source legacy BIOS implementation Group: Applications/Emulators License: LGPLv3 URL: https://www.coreboot.org/SeaBIOS -Source0: https://code.coreboot.org/p/seabios/downloads/get/seabios-1.15.0.tar.gz +Source0: https://code.coreboot.org/p/seabios/downloads/get/seabios-1.16.0.tar.gz Source10: config.vga.cirrus Source11: config.vga.qxl @@ -22,8 +22,14 @@ Source21: config.seabios-256k Patch0002: 0002-allow-1TB-of-RAM.patch Patch0003: 0003-smbios-set-bios-vendor-version-fields-to-Seabios-0.5.patch Patch0004: 0004-Workaround-for-a-win8.1-32-S4-resume-bug.patch -Patch0005: 0005-pci-let-firmware-reserve-IO-for-pcie-pci-bridge.patch -Patch0006: 0006-pci-reserve-resources-for-pcie-pci-bridge-to-fix-reg.patch +# For bz#2073012 - Guest whose os is installed multiple disks but boot partition is installed on single disk can't boot into OS on RHEL 8 [rhel-8.7.0] +Patch5: seabios-shortcut-skip-unbootable-disks-optimitation.patch +# For bz#2083884 - qemu reboot problem with seabios 1.16.0 +Patch6: seabios-pci-refactor-the-pci_config_-functions.patch +# For bz#2083884 - qemu reboot problem with seabios 1.16.0 +Patch7: seabios-reset-force-standard-PCI-configuration-access.patch +# For bz#2101787 - [rhel.8.7] Loading a kernel/initrd is sometimes very slow +Patch8: seabios-virtio-blk-use-larger-default-request-size.patch BuildRequires: python3 iasl ExclusiveArch: x86_64 %{power64} @@ -78,8 +84,10 @@ SeaVGABIOS is an open-source VGABIOS implementation. %patch0002 -p1 %patch0003 -p1 %patch0004 -p1 -%patch0005 -p1 -%patch0006 -p1 +%patch5 -p1 +%patch6 -p1 +%patch7 -p1 +%patch8 -p1 %build %ifarch x86_64 @@ -138,6 +146,25 @@ install -m 0644 binaries/vgabios*.bin $RPM_BUILD_ROOT%{_datadir}/seavgabios %changelog +* Wed Jul 27 2022 Miroslav Rezanina - 1.16.0-3 +- seabios-virtio-blk-use-larger-default-request-size.patch [bz#2101787] +- Resolves: bz#2101787 + ([rhel.8.7] Loading a kernel/initrd is sometimes very slow) + +* Mon May 30 2022 Jon Maloy - 1.16.0-2 +- seabios-shortcut-skip-unbootable-disks-optimitation.patch [bz#2073012] +- seabios-pci-refactor-the-pci_config_-functions.patch [bz#2083884] +- seabios-reset-force-standard-PCI-configuration-access.patch [bz#2083884] +- Resolves: bz#2073012 + (Guest whose os is installed multiple disks but boot partition is installed on single disk can't boot into OS on RHEL 8 [rhel-8.7.0]) +- Resolves: bz#2083884 + (qemu reboot problem with seabios 1.16.0) + +* Tue Apr 26 2022 Paweł Poławski - 1.16.0-1 +- Rebase to upstream 1.16 tag [bz#2066828] +- Resolves: bz#2066828 + (rebase seabios to 1.16 release) + * Thu Dec 16 2021 Jon Maloy - 1.15.0-1.el8 - Rebase to 1.15 (bz#2018392) - Resolves: bz#2018392