import seabios-1.16.0-3.module+el8.7.0+16689+53d59bc2
CentOS Sources
11 months ago
committed by
Stepan Oksanichenko
parent
6f569c6590
commit
6ce4fe9c65
@ -1 +1 @@
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SOURCES/seabios-1.15.0.tar.gz
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SOURCES/seabios-1.16.0.tar.gz
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@ -1 +1 @@
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1ab1ca5971e59d8d6b5c579b242d586e54a86873 SOURCES/seabios-1.15.0.tar.gz
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0cc6b21cfbafa1f9f158c9aca1ab9f5174ebede2 SOURCES/seabios-1.16.0.tar.gz
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@ -1,90 +0,0 @@
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From 153f5ec6899055276eaef20eae7b6d9fd090a05a Mon Sep 17 00:00:00 2001
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From: Igor Mammedov <imammedo@redhat.com>
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Date: Mon, 29 Nov 2021 06:48:12 -0500
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Subject: pci: let firmware reserve IO for pcie-pci-bridge
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RH-Bugzilla: 2001921
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With [1] patch hotplug of rtl8139 succeeds, with caveat that it
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fails to initialize IO bar, which is caused by [2] that makes
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firmware skip IO reservation for any PCIe device, which isn't
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correct in case of pcie-pci-bridge.
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Fix it by exposing hotplug type and making IO resource optional
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only if PCIe hotplug is in use.
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[1]
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"pci: reserve resources for pcie-pci-bridge to fix regressed hotplug on q35"
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[2]
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Fixes: 76327b9f32a ("fw/pci: do not automatically allocate IO region for PCIe bridges")
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Signed-off-by: Igor Mammedov imammedo@redhat.com
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CC: mapfelba@redhat.com
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CC: kraxel@redhat.com
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CC: mst@redhat.com
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CC: lvivier@redhat.com
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CC: jusual@redhat.com
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Tested-by: Laurent Vivier <lvivier@redhat.com>
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Acked-by: Michael S. Tsirkin <mst@redhat.com>
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Message-Id: <20211129114812.231849-3-imammedo@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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---
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src/fw/pciinit.c | 19 ++++++++++++++-----
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1 file changed, 14 insertions(+), 5 deletions(-)
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diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
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index d25931b..3c99d51 100644
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--- a/src/fw/pciinit.c
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+++ b/src/fw/pciinit.c
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@@ -793,7 +793,13 @@ pci_region_create_entry(struct pci_bus *bus, struct pci_device *dev,
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return entry;
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}
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-static int pci_bus_hotplug_support(struct pci_bus *bus, u8 pcie_cap)
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+typedef enum hotplug_type_t {
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+ HOTPLUG_NO_SUPPORTED = 0,
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+ HOTPLUG_PCIE,
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+ HOTPLUG_SHPC
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+} hotplug_type_t;
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+
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+static hotplug_type_t pci_bus_hotplug_support(struct pci_bus *bus, u8 pcie_cap)
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{
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u8 shpc_cap;
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@@ -815,11 +821,12 @@ static int pci_bus_hotplug_support(struct pci_bus *bus, u8 pcie_cap)
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*/
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u16 slot_implemented = pcie_flags & PCI_EXP_FLAGS_SLOT;
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- return downstream_port && slot_implemented;
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+ return downstream_port && slot_implemented ?
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+ HOTPLUG_PCIE : HOTPLUG_NO_SUPPORTED;
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}
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shpc_cap = pci_find_capability(bus->bus_dev->bdf, PCI_CAP_ID_SHPC, 0);
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- return !!shpc_cap;
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+ return !!shpc_cap ? HOTPLUG_SHPC : HOTPLUG_NO_SUPPORTED;
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}
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/* Test whether bridge support forwarding of transactions
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@@ -904,7 +911,7 @@ static int pci_bios_check_devices(struct pci_bus *busses)
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u8 pcie_cap = pci_find_capability(bdf, PCI_CAP_ID_EXP, 0);
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u8 qemu_cap = pci_find_resource_reserve_capability(bdf);
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- int hotplug_support = pci_bus_hotplug_support(s, pcie_cap);
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+ hotplug_type_t hotplug_support = pci_bus_hotplug_support(s, pcie_cap);
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for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
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u64 align = (type == PCI_REGION_TYPE_IO) ?
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PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN;
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@@ -948,7 +955,9 @@ static int pci_bios_check_devices(struct pci_bus *busses)
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if (pci_region_align(&s->r[type]) > align)
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align = pci_region_align(&s->r[type]);
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u64 sum = pci_region_sum(&s->r[type]);
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- int resource_optional = pcie_cap && (type == PCI_REGION_TYPE_IO);
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+ int resource_optional = 0;
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+ if (hotplug_support == HOTPLUG_PCIE)
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+ resource_optional = pcie_cap && (type == PCI_REGION_TYPE_IO);
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if (!sum && hotplug_support && !resource_optional)
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sum = align; /* reserve min size for hot-plug */
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if (size > sum) {
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--
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2.27.0
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@ -1,83 +0,0 @@
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From 4a31485efad9db7feed56f483e123f0b58c38b2f Mon Sep 17 00:00:00 2001
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From: Igor Mammedov <imammedo@redhat.com>
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Date: Mon, 29 Nov 2021 06:48:11 -0500
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Subject: pci: reserve resources for pcie-pci-bridge to fix regressed hotplug
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on q35
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RH-Bugzilla: 2001921
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If QEMU is started with unpopulated pcie-pci-bridge with ACPI PCI
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hotplug enabled (default since QEMU-6.1), hotplugging a PCI device
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into one of the bridge slots fails due to lack of resources.
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once linux guest is booted (test used Fedora 34), hotplug NIC from
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QEMU monitor:
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(qemu) device_add rtl8139,bus=pcie-pci-bridge-0,addr=0x2
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guest fails hotplug with:
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pci 0000:01:02.0: [10ec:8139] type 00 class 0x020000
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pci 0000:01:02.0: reg 0x10: [io 0x0000-0x00ff]
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pci 0000:01:02.0: reg 0x14: [mem 0x00000000-0x000000ff]
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pci 0000:01:02.0: reg 0x30: [mem 0x00000000-0x0003ffff pref]
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pci 0000:01:02.0: BAR 6: no space for [mem size 0x00040000 pref]
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pci 0000:01:02.0: BAR 6: failed to assign [mem size 0x00040000 pref]
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pci 0000:01:02.0: BAR 0: no space for [io size 0x0100]
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pci 0000:01:02.0: BAR 0: failed to assign [io size 0x0100]
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pci 0000:01:02.0: BAR 1: no space for [mem size 0x00000100]
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pci 0000:01:02.0: BAR 1: failed to assign [mem size 0x00000100]
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8139cp: 8139cp: 10/100 PCI Ethernet driver v1.3 (Mar 22, 2004)
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PCI Interrupt Link [GSIG] enabled at IRQ 22
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8139cp 0000:01:02.0: no MMIO resource
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8139cp: probe of 0000:01:02.0 failed with error -5
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Reason for this is that commit [1] didn't take into account
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pcie-pci-bridge, marking bridge as non hotpluggable instead of
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handling it as possibly SHPC capable bridge.
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Fix issue by checking if pcie-pci-bridge is SHPC capable and
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if it is mark it as hotpluggable.
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Fixes regression in QEMU-6.1 and later, since it was switched
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to ACPI based PCI hotplug on Q35 by default at that time.
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[1]
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Fixes: 3aa31d7d637 ("hw/pci: reserve IO and mem for pci express downstream ports with no devices attached")
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Signed-off-by: Igor Mammedov imammedo@redhat.com
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CC: mapfelba@redhat.com
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CC: kraxel@redhat.com
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CC: mst@redhat.com
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CC: lvivier@redhat.com
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CC: jusual@redhat.com
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Tested-by: Laurent Vivier <lvivier@redhat.com>
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Acked-by: Michael S. Tsirkin <mst@redhat.com>
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Message-Id: <20211129114812.231849-2-imammedo@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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---
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src/fw/pciinit.c | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
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index 3c99d51..badf13d 100644
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--- a/src/fw/pciinit.c
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+++ b/src/fw/pciinit.c
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@@ -808,6 +808,10 @@ static hotplug_type_t pci_bus_hotplug_support(struct pci_bus *bus, u8 pcie_cap)
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pcie_cap + PCI_EXP_FLAGS);
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u8 port_type = ((pcie_flags & PCI_EXP_FLAGS_TYPE) >>
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(__builtin_ffs(PCI_EXP_FLAGS_TYPE) - 1));
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+
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+ if (port_type == PCI_EXP_TYPE_PCI_BRIDGE)
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+ goto check_shpc;
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+
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u8 downstream_port = (port_type == PCI_EXP_TYPE_DOWNSTREAM) ||
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(port_type == PCI_EXP_TYPE_ROOT_PORT);
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/*
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@@ -825,6 +829,7 @@ static hotplug_type_t pci_bus_hotplug_support(struct pci_bus *bus, u8 pcie_cap)
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HOTPLUG_PCIE : HOTPLUG_NO_SUPPORTED;
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}
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+check_shpc:
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shpc_cap = pci_find_capability(bus->bus_dev->bdf, PCI_CAP_ID_SHPC, 0);
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return !!shpc_cap ? HOTPLUG_SHPC : HOTPLUG_NO_SUPPORTED;
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}
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--
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2.27.0
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@ -0,0 +1,174 @@
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From a35645ca4985b8fdd4f4d8c4d87ae05001061c53 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Volker=20R=C3=BCmelin?= <vr_qemu@t-online.de>
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Date: Sat, 2 Apr 2022 20:28:38 +0200
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Subject: [PATCH 2/3] pci: refactor the pci_config_*() functions
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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RH-Author: Gerd Hoffmann <kraxel@redhat.com>
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RH-MergeRequest: 7: pci: fix reset for q35 and tcg
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RH-Commit: [1/2] 7607f8f3296435a2884902f650ce060c6be07bd1
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RH-Bugzilla: 2083884
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RH-Acked-by: Pawel Polawski <ppolawsk@redhat.com>
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RH-Acked-by: Oliver Steffen <osteffen@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
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Split out the Standard PCI Configuration Access Mechanism
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pci_ioconfig_*() functions from the pci_config_*() functions.
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The standard PCI CAM functions will be used in the next patch.
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Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Volker Rümelin <vr_qemu@t-online.de>
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(cherry picked from commit d24f42b0d819ea473ae05b2f955b822d0126d901)
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---
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src/hw/pci.c | 54 ++++++++++++++++++++++++++++++++++++++++------------
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src/hw/pci.h | 12 +++++++++++-
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2 files changed, 53 insertions(+), 13 deletions(-)
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diff --git a/src/hw/pci.c b/src/hw/pci.c
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index 3df1dae4..f13cbdea 100644
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--- a/src/hw/pci.c
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+++ b/src/hw/pci.c
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@@ -26,63 +26,93 @@ static u32 ioconfig_cmd(u16 bdf, u32 addr)
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return 0x80000000 | (bdf << 8) | (addr & 0xfc);
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}
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+void pci_ioconfig_writel(u16 bdf, u32 addr, u32 val)
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+{
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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+ outl(val, PORT_PCI_DATA);
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+}
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+
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void pci_config_writel(u16 bdf, u32 addr, u32 val)
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{
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if (!MODESEGMENT && mmconfig) {
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writel(mmconfig_addr(bdf, addr), val);
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} else {
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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- outl(val, PORT_PCI_DATA);
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+ pci_ioconfig_writel(bdf, addr, val);
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}
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}
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+void pci_ioconfig_writew(u16 bdf, u32 addr, u16 val)
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+{
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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+ outw(val, PORT_PCI_DATA + (addr & 2));
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+}
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+
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void pci_config_writew(u16 bdf, u32 addr, u16 val)
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{
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if (!MODESEGMENT && mmconfig) {
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writew(mmconfig_addr(bdf, addr), val);
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} else {
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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- outw(val, PORT_PCI_DATA + (addr & 2));
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+ pci_ioconfig_writew(bdf, addr, val);
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}
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}
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+void pci_ioconfig_writeb(u16 bdf, u32 addr, u8 val)
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+{
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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+ outb(val, PORT_PCI_DATA + (addr & 3));
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+}
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+
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void pci_config_writeb(u16 bdf, u32 addr, u8 val)
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{
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if (!MODESEGMENT && mmconfig) {
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writeb(mmconfig_addr(bdf, addr), val);
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} else {
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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- outb(val, PORT_PCI_DATA + (addr & 3));
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+ pci_ioconfig_writeb(bdf, addr, val);
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}
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}
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+u32 pci_ioconfig_readl(u16 bdf, u32 addr)
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+{
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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+ return inl(PORT_PCI_DATA);
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+}
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+
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u32 pci_config_readl(u16 bdf, u32 addr)
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{
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if (!MODESEGMENT && mmconfig) {
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return readl(mmconfig_addr(bdf, addr));
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} else {
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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- return inl(PORT_PCI_DATA);
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+ return pci_ioconfig_readl(bdf, addr);
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}
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}
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+u16 pci_ioconfig_readw(u16 bdf, u32 addr)
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+{
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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+ return inw(PORT_PCI_DATA + (addr & 2));
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+}
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+
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u16 pci_config_readw(u16 bdf, u32 addr)
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{
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if (!MODESEGMENT && mmconfig) {
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return readw(mmconfig_addr(bdf, addr));
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} else {
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
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- return inw(PORT_PCI_DATA + (addr & 2));
|
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+ return pci_ioconfig_readw(bdf, addr);
|
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}
|
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}
|
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|
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+u8 pci_ioconfig_readb(u16 bdf, u32 addr)
|
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+{
|
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+ outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
|
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+ return inb(PORT_PCI_DATA + (addr & 3));
|
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+}
|
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+
|
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u8 pci_config_readb(u16 bdf, u32 addr)
|
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{
|
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if (!MODESEGMENT && mmconfig) {
|
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return readb(mmconfig_addr(bdf, addr));
|
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} else {
|
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- outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD);
|
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- return inb(PORT_PCI_DATA + (addr & 3));
|
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+ return pci_ioconfig_readb(bdf, addr);
|
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}
|
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}
|
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diff --git a/src/hw/pci.h b/src/hw/pci.h
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index 01c51f70..ee6acafc 100644
|
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--- a/src/hw/pci.h
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+++ b/src/hw/pci.h
|
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@@ -32,6 +32,15 @@ static inline u16 pci_bus_devfn_to_bdf(int bus, u16 devfn) {
|
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; BDF >= 0 \
|
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; BDF=pci_next(BDF, (BUS)))
|
||||
|
||||
+// standard PCI configration access mechanism
|
||||
+void pci_ioconfig_writel(u16 bdf, u32 addr, u32 val);
|
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+void pci_ioconfig_writew(u16 bdf, u32 addr, u16 val);
|
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+void pci_ioconfig_writeb(u16 bdf, u32 addr, u8 val);
|
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+u32 pci_ioconfig_readl(u16 bdf, u32 addr);
|
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+u16 pci_ioconfig_readw(u16 bdf, u32 addr);
|
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+u8 pci_ioconfig_readb(u16 bdf, u32 addr);
|
||||
+
|
||||
+// PCI configuration access using either PCI CAM or PCIe ECAM
|
||||
void pci_config_writel(u16 bdf, u32 addr, u32 val);
|
||||
void pci_config_writew(u16 bdf, u32 addr, u16 val);
|
||||
void pci_config_writeb(u16 bdf, u32 addr, u8 val);
|
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@@ -39,9 +48,10 @@ u32 pci_config_readl(u16 bdf, u32 addr);
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u16 pci_config_readw(u16 bdf, u32 addr);
|
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u8 pci_config_readb(u16 bdf, u32 addr);
|
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void pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on);
|
||||
-void pci_enable_mmconfig(u64 addr, const char *name);
|
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u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap);
|
||||
int pci_next(int bdf, int bus);
|
||||
+
|
||||
+void pci_enable_mmconfig(u64 addr, const char *name);
|
||||
int pci_probe_host(void);
|
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void pci_reboot(void);
|
||||
|
||||
--
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2.35.3
|
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|
||||
@ -0,0 +1,159 @@
|
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From a7e5f1d8f1f874434f8b3e6d6eac784d5e3e3971 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Volker=20R=C3=BCmelin?= <vr_qemu@t-online.de>
|
||||
Date: Sat, 2 Apr 2022 20:28:39 +0200
|
||||
Subject: [PATCH 3/3] reset: force standard PCI configuration access
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
RH-Author: Gerd Hoffmann <kraxel@redhat.com>
|
||||
RH-MergeRequest: 7: pci: fix reset for q35 and tcg
|
||||
RH-Commit: [2/2] 693fbb9148c81f344dc9f64e7a36e51b42ee1a95
|
||||
RH-Bugzilla: 2083884
|
||||
RH-Acked-by: Pawel Polawski <ppolawsk@redhat.com>
|
||||
RH-Acked-by: Oliver Steffen <osteffen@redhat.com>
|
||||
RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
|
||||
RH-Acked-by: Laszlo Ersek <lersek@redhat.com>
|
||||
|
||||
After a reset of a QEMU -machine q35 guest, the PCI Express
|
||||
Enhanced Configuration Mechanism is disabled and the variable
|
||||
mmconfig no longer matches the configuration register PCIEXBAR
|
||||
of the Q35 chipset. Until the variable mmconfig is reset to 0,
|
||||
all pci_config_*() functions no longer work.
|
||||
|
||||
The variable mmconfig is located in one of the read-only C-F
|
||||
segments. To reset it the pci_config_*() functions are needed,
|
||||
but they do not work.
|
||||
|
||||
Replace all pci_config_*() calls with Standard PCI Configuration
|
||||
Mechanism pci_ioconfig_*() calls until mmconfig is overwritten
|
||||
with 0 by a fresh copy of the BIOS.
|
||||
|
||||
This fixes
|
||||
|
||||
In resume (status=0)
|
||||
In 32bit resume
|
||||
Attempting a hard reboot
|
||||
Unable to unlock ram - bridge not found
|
||||
|
||||
and a reset loop with QEMU -accel tcg.
|
||||
|
||||
Signed-off-by: Volker Rümelin <vr_qemu@t-online.de>
|
||||
(cherry picked from commit 01774004c7f7fdc9c1e8f1715f70d3b913f8d491)
|
||||
---
|
||||
src/fw/shadow.c | 14 +++++++-------
|
||||
src/hw/pci.c | 27 +++++++++++++++++++++++++++
|
||||
src/hw/pci.h | 6 ++++++
|
||||
3 files changed, 40 insertions(+), 7 deletions(-)
|
||||
|
||||
diff --git a/src/fw/shadow.c b/src/fw/shadow.c
|
||||
index 4c627a8f..8930616e 100644
|
||||
--- a/src/fw/shadow.c
|
||||
+++ b/src/fw/shadow.c
|
||||
@@ -32,8 +32,8 @@ __make_bios_writable_intel(u16 bdf, u32 pam0)
|
||||
{
|
||||
// Read in current PAM settings from pci config space
|
||||
union pamdata_u pamdata;
|
||||
- pamdata.data32[0] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4));
|
||||
- pamdata.data32[1] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4) + 4);
|
||||
+ pamdata.data32[0] = pci_ioconfig_readl(bdf, ALIGN_DOWN(pam0, 4));
|
||||
+ pamdata.data32[1] = pci_ioconfig_readl(bdf, ALIGN_DOWN(pam0, 4) + 4);
|
||||
u8 *pam = &pamdata.data8[pam0 & 0x03];
|
||||
|
||||
// Make ram from 0xc0000-0xf0000 writable
|
||||
@@ -46,8 +46,8 @@ __make_bios_writable_intel(u16 bdf, u32 pam0)
|
||||
pam[0] = 0x30;
|
||||
|
||||
// Write PAM settings back to pci config space
|
||||
- pci_config_writel(bdf, ALIGN_DOWN(pam0, 4), pamdata.data32[0]);
|
||||
- pci_config_writel(bdf, ALIGN_DOWN(pam0, 4) + 4, pamdata.data32[1]);
|
||||
+ pci_ioconfig_writel(bdf, ALIGN_DOWN(pam0, 4), pamdata.data32[0]);
|
||||
+ pci_ioconfig_writel(bdf, ALIGN_DOWN(pam0, 4) + 4, pamdata.data32[1]);
|
||||
|
||||
if (!ram_present)
|
||||
// Copy bios.
|
||||
@@ -59,7 +59,7 @@ __make_bios_writable_intel(u16 bdf, u32 pam0)
|
||||
static void
|
||||
make_bios_writable_intel(u16 bdf, u32 pam0)
|
||||
{
|
||||
- int reg = pci_config_readb(bdf, pam0);
|
||||
+ int reg = pci_ioconfig_readb(bdf, pam0);
|
||||
if (!(reg & 0x10)) {
|
||||
// QEMU doesn't fully implement the piix shadow capabilities -
|
||||
// if ram isn't backing the bios segment when shadowing is
|
||||
@@ -125,8 +125,8 @@ make_bios_writable(void)
|
||||
// At this point, statically allocated variables can't be written,
|
||||
// so do this search manually.
|
||||
int bdf;
|
||||
- foreachbdf(bdf, 0) {
|
||||
- u32 vendev = pci_config_readl(bdf, PCI_VENDOR_ID);
|
||||
+ pci_ioconfig_foreachbdf(bdf, 0) {
|
||||
+ u32 vendev = pci_ioconfig_readl(bdf, PCI_VENDOR_ID);
|
||||
u16 vendor = vendev & 0xffff, device = vendev >> 16;
|
||||
if (vendor == PCI_VENDOR_ID_INTEL
|
||||
&& device == PCI_DEVICE_ID_INTEL_82441) {
|
||||
diff --git a/src/hw/pci.c b/src/hw/pci.c
|
||||
index f13cbdea..8eda84b2 100644
|
||||
--- a/src/hw/pci.c
|
||||
+++ b/src/hw/pci.c
|
||||
@@ -157,6 +157,33 @@ u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap)
|
||||
return 0;
|
||||
}
|
||||
|
||||
+// Helper function for pci_ioconfig_foreachbdf() macro - return next device
|
||||
+int pci_ioconfig_next(int bdf, int bus)
|
||||
+{
|
||||
+ if (pci_bdf_to_fn(bdf) == 0
|
||||
+ && (pci_ioconfig_readb(bdf, PCI_HEADER_TYPE) & 0x80) == 0)
|
||||
+ // Last found device wasn't a multi-function device - skip to
|
||||
+ // the next device.
|
||||
+ bdf += 8;
|
||||
+ else
|
||||
+ bdf += 1;
|
||||
+
|
||||
+ for (;;) {
|
||||
+ if (pci_bdf_to_bus(bdf) != bus)
|
||||
+ return -1;
|
||||
+
|
||||
+ u16 v = pci_ioconfig_readw(bdf, PCI_VENDOR_ID);
|
||||
+ if (v != 0x0000 && v != 0xffff)
|
||||
+ // Device is present.
|
||||
+ return bdf;
|
||||
+
|
||||
+ if (pci_bdf_to_fn(bdf) == 0)
|
||||
+ bdf += 8;
|
||||
+ else
|
||||
+ bdf += 1;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
// Helper function for foreachbdf() macro - return next device
|
||||
int
|
||||
pci_next(int bdf, int bus)
|
||||
diff --git a/src/hw/pci.h b/src/hw/pci.h
|
||||
index ee6acafc..b2f5baf4 100644
|
||||
--- a/src/hw/pci.h
|
||||
+++ b/src/hw/pci.h
|
||||
@@ -27,6 +27,11 @@ static inline u16 pci_bus_devfn_to_bdf(int bus, u16 devfn) {
|
||||
return (bus << 8) | devfn;
|
||||
}
|
||||
|
||||
+#define pci_ioconfig_foreachbdf(BDF, BUS) \
|
||||
+ for (BDF=pci_ioconfig_next(pci_bus_devfn_to_bdf((BUS), 0)-1, (BUS)) \
|
||||
+ ; BDF >= 0 \
|
||||
+ ; BDF=pci_ioconfig_next(BDF, (BUS)))
|
||||
+
|
||||
#define foreachbdf(BDF, BUS) \
|
||||
for (BDF=pci_next(pci_bus_devfn_to_bdf((BUS), 0)-1, (BUS)) \
|
||||
; BDF >= 0 \
|
||||
@@ -39,6 +44,7 @@ void pci_ioconfig_writeb(u16 bdf, u32 addr, u8 val);
|
||||
u32 pci_ioconfig_readl(u16 bdf, u32 addr);
|
||||
u16 pci_ioconfig_readw(u16 bdf, u32 addr);
|
||||
u8 pci_ioconfig_readb(u16 bdf, u32 addr);
|
||||
+int pci_ioconfig_next(int bdf, int bus);
|
||||
|
||||
// PCI configuration access using either PCI CAM or PCIe ECAM
|
||||
void pci_config_writel(u16 bdf, u32 addr, u32 val);
|
||||
--
|
||||
2.35.3
|
||||
|
||||
@ -0,0 +1,42 @@
|
||||
From 88e527d9fbbbe8d05e45f6db8a151d22e7f973d3 Mon Sep 17 00:00:00 2001
|
||||
From: Gerd Hoffmann <kraxel@redhat.com>
|
||||
Date: Thu, 30 Jun 2022 17:28:40 +0200
|
||||
Subject: [PATCH] virtio-blk: use larger default request size
|
||||
|
||||
RH-Author: Gerd Hoffmann <kraxel@redhat.com>
|
||||
RH-MergeRequest: 8: virtio-blk: use larger default request size
|
||||
RH-Commit: [1/1] df68a35a0d02fb91f61eca9e9342ae5f13f99803
|
||||
RH-Bugzilla: 2101787
|
||||
RH-Acked-by: Oliver Steffen <osteffen@redhat.com>
|
||||
RH-Acked-by: Pawel Polawski <ppolawsk@redhat.com>
|
||||
RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
|
||||
|
||||
Bump default from 8 to 64 blocks. Using 8 by default leads
|
||||
to requests being splitted on qemu, which slows down boot.
|
||||
|
||||
Some (temporary) debug logging added showed that almost all
|
||||
requests on a standard fedora install are less than 64 blocks,
|
||||
so that should bring us back to 1.15 performance levels.
|
||||
|
||||
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
|
||||
(cherry picked from commit 46de2eec93bffa0706e6229c0da2919763c8eb04)
|
||||
---
|
||||
src/hw/virtio-blk.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/hw/virtio-blk.c b/src/hw/virtio-blk.c
|
||||
index 929ba887..9b4a05a4 100644
|
||||
--- a/src/hw/virtio-blk.c
|
||||
+++ b/src/hw/virtio-blk.c
|
||||
@@ -95,7 +95,7 @@ virtio_blk_op(struct disk_op_s *op, int write)
|
||||
blk_num_max = (u16)max_io_size / vdrive->drive.blksize;
|
||||
else
|
||||
/* default blk_num_max if hardware doesnot advise a proper value */
|
||||
- blk_num_max = 8;
|
||||
+ blk_num_max = 64;
|
||||
|
||||
if (op->count <= blk_num_max) {
|
||||
virtio_blk_op_one_segment(vdrive, write, sg);
|
||||
--
|
||||
2.31.1
|
||||
|
||||
Loading…
Reference in New Issue