ecb1f8a349
Resolves: RHEL-30089
56 lines
2.3 KiB
Diff
56 lines
2.3 KiB
Diff
From 369fff6c0640fe89be9b915adaa83e66a022e00d Mon Sep 17 00:00:00 2001
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From: Nikita Popov <npopov@redhat.com>
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Date: Wed, 14 Feb 2024 16:26:20 +0100
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Subject: [PATCH] Implicitly enable evex512 if avx512 is enabled
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LLVM 18 requires the evex512 feature to allow use of zmm registers.
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LLVM automatically sets it when using a generic CPU, but not when
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`-C target-cpu` is specified. This will result either in backend
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legalization crashes, or code unexpectedly using ymm instead of
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zmm registers.
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For now, make sure that `avx512*` features imply `evex512`. Long
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term we'll probably have to deal with the AVX10 mess somehow.
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---
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compiler/rustc_codegen_llvm/src/llvm_util.rs | 4 ++++
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tests/ui/asm/x86_64/evex512-implicit-feature.rs | 15 +++++++++++++++
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2 files changed, 19 insertions(+)
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create mode 100644 tests/ui/asm/x86_64/evex512-implicit-feature.rs
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diff --git a/compiler/rustc_codegen_llvm/src/llvm_util.rs b/compiler/rustc_codegen_llvm/src/llvm_util.rs
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index e48479c8da279..54e8ed85e3250 100644
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--- a/compiler/rustc_codegen_llvm/src/llvm_util.rs
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+++ b/compiler/rustc_codegen_llvm/src/llvm_util.rs
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@@ -266,6 +266,10 @@ pub fn to_llvm_features<'a>(sess: &Session, s: &'a str) -> LLVMFeature<'a> {
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("riscv32" | "riscv64", "fast-unaligned-access") if get_version().0 <= 17 => {
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LLVMFeature::new("unaligned-scalar-mem")
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}
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+ // For LLVM 18, enable the evex512 target feature if a avx512 target feature is enabled.
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+ ("x86", s) if get_version().0 >= 18 && s.starts_with("avx512") => {
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+ LLVMFeature::with_dependency(s, TargetFeatureFoldStrength::EnableOnly("evex512"))
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+ }
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(_, s) => LLVMFeature::new(s),
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}
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}
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diff --git a/tests/ui/asm/x86_64/evex512-implicit-feature.rs b/tests/ui/asm/x86_64/evex512-implicit-feature.rs
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new file mode 100644
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index 0000000000000..a15060857eccb
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--- /dev/null
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+++ b/tests/ui/asm/x86_64/evex512-implicit-feature.rs
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@@ -0,0 +1,15 @@
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+// build-pass
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+// only-x86_64
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+// compile-flags: --crate-type=lib -C target-cpu=skylake
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+
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+#![feature(avx512_target_feature)]
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+#![feature(stdsimd)]
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+
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+use std::arch::x86_64::*;
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+
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+#[target_feature(enable = "avx512f")]
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+#[no_mangle]
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+pub unsafe fn test(res: *mut f64, p: *const f64) {
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+ let arg = _mm512_load_pd(p);
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+ _mm512_store_pd(res, _mm512_fmaddsub_pd(arg, arg, arg));
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+}
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