45 lines
2.4 KiB
Diff
45 lines
2.4 KiB
Diff
From bf3ac98d6930ba4e258cf33240c2fe7c99d19eae Mon Sep 17 00:00:00 2001
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From: Nikita Popov <npopov@redhat.com>
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Date: Tue, 6 Jan 2026 11:51:33 +0100
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Subject: [PATCH 1/3] Update amdgpu data layout
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This changed in:
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https://github.com/llvm/llvm-project/commit/853760bca6aa7a960b154cef8c61f87271870b8a
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---
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compiler/rustc_codegen_llvm/src/context.rs | 5 +++++
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compiler/rustc_target/src/spec/targets/amdgcn_amd_amdhsa.rs | 2 +-
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2 files changed, 6 insertions(+), 1 deletion(-)
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diff --git a/compiler/rustc_codegen_llvm/src/context.rs b/compiler/rustc_codegen_llvm/src/context.rs
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index 4b2544b7efdf..4328b15c73f3 100644
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--- a/compiler/rustc_codegen_llvm/src/context.rs
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+++ b/compiler/rustc_codegen_llvm/src/context.rs
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@@ -215,6 +215,11 @@ pub(crate) unsafe fn create_module<'ll>(
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// LLVM 22 updated the ABI alignment for double on AIX: https://github.com/llvm/llvm-project/pull/144673
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target_data_layout = target_data_layout.replace("-f64:32:64", "");
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}
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+ if sess.target.arch == Arch::AmdGpu {
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+ // LLVM 22 specified ELF mangling in the amdgpu data layout:
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+ // https://github.com/llvm/llvm-project/pull/163011
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+ target_data_layout = target_data_layout.replace("-m:e", "");
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+ }
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}
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// Ensure the data-layout values hardcoded remain the defaults.
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diff --git a/compiler/rustc_target/src/spec/targets/amdgcn_amd_amdhsa.rs b/compiler/rustc_target/src/spec/targets/amdgcn_amd_amdhsa.rs
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index 828d853ac65e..d6a2cfc2aab5 100644
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--- a/compiler/rustc_target/src/spec/targets/amdgcn_amd_amdhsa.rs
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+++ b/compiler/rustc_target/src/spec/targets/amdgcn_amd_amdhsa.rs
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@@ -5,7 +5,7 @@
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pub(crate) fn target() -> Target {
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Target {
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arch: Arch::AmdGpu,
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- data_layout: "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9".into(),
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+ data_layout: "e-m:e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9".into(),
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llvm_target: "amdgcn-amd-amdhsa".into(),
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metadata: TargetMetadata {
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description: Some("AMD GPU".into()),
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--
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2.53.0
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