From d6f62a5e52843e0b2651268e350a3c0ebe5c543b Mon Sep 17 00:00:00 2001
From: Crystal Wood <crwood@redhat.com>
Date: Thu, 20 Jun 2024 21:24:17 -0500
Subject: [PATCH 4/7] rteval: Enforce only one latency measurement module at a
 time

Latency modules will step on each other's toes if run at the same time
(on the same CPU, though that's an enhancement for later), so only
run one of them.  A priority mechanism allows selecting

Signed-off-by: Crystal Wood <crwood@redhat.com>
Signed-off-by: John Kacur <jkacur@redhat.com>
---
 rteval/modules/__init__.py               | 11 +++++++++++
 rteval/modules/measurement/cyclictest.py |  1 +
 rteval/modules/measurement/timerlat.py   |  1 +
 3 files changed, 13 insertions(+)

diff --git a/rteval/modules/__init__.py b/rteval/modules/__init__.py
index de1ddc4628c1..2a4eafae71c7 100644
--- a/rteval/modules/__init__.py
+++ b/rteval/modules/__init__.py
@@ -40,6 +40,7 @@ class rtevalModulePrototype(threading.Thread):
                          "finished": threading.Event()}
         self._donotrun = False
         self._exclusive = False
+        self._latency = False
         self.__timestamps = {}
         self.__sleeptime = 2.0
 
@@ -67,6 +68,11 @@ class rtevalModulePrototype(threading.Thread):
         self._exclusive = True
 
 
+    def set_latency(self):
+        """ Sets the module as an exclusive latency measurer """
+        self._latency = True
+
+
     def set_donotrun(self):
         """ set a module's donotrun field to True """
         self._donotrun = True
@@ -412,9 +418,14 @@ class RtEvalModules:
 
         self._logger.log(Log.INFO, f"Preparing {self._module_type} modules")
         exclusive = 0
+        latency = False
         for (modname, mod) in self.__modules:
             if mod.is_exclusive() and mod.WorkloadWillRun():
                 exclusive += 1
+            if mod._latency:
+                if latency:
+                    raise RuntimeError("More than one exclusive latency test")
+                latency = True
         for (modname, mod) in self.__modules:
             if exclusive >= 1:
                 if exclusive != 1:
diff --git a/rteval/modules/measurement/cyclictest.py b/rteval/modules/measurement/cyclictest.py
index 3a34c1b988d6..a9f5b0c4fba7 100644
--- a/rteval/modules/measurement/cyclictest.py
+++ b/rteval/modules/measurement/cyclictest.py
@@ -216,6 +216,7 @@ class Cyclictest(rtevalModulePrototype):
         self.__started = False
         self.__cyclicoutput = None
         self.__breaktraceval = None
+        self.set_latency()
 
 
     @staticmethod
diff --git a/rteval/modules/measurement/timerlat.py b/rteval/modules/measurement/timerlat.py
index f3bdc7098bc0..e4b80c33552e 100644
--- a/rteval/modules/measurement/timerlat.py
+++ b/rteval/modules/measurement/timerlat.py
@@ -216,6 +216,7 @@ class Timerlat(rtevalModulePrototype):
                                                   logfnc=self._log)
         self.__timerlatdata['system'].description = (f"({self.__numcores} cores) ") + info['0']['model name']
         self._log(Log.DEBUG, f"system using {self.__numcores} cpu cores")
+        self.set_latency()
 
 
     def _WorkloadSetup(self):
-- 
2.45.2