85 lines
3.1 KiB
Diff
85 lines
3.1 KiB
Diff
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From d6f62a5e52843e0b2651268e350a3c0ebe5c543b Mon Sep 17 00:00:00 2001
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From: Crystal Wood <crwood@redhat.com>
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Date: Thu, 20 Jun 2024 21:24:17 -0500
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Subject: [PATCH 4/7] rteval: Enforce only one latency measurement module at a
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time
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Latency modules will step on each other's toes if run at the same time
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(on the same CPU, though that's an enhancement for later), so only
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run one of them. A priority mechanism allows selecting
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Signed-off-by: Crystal Wood <crwood@redhat.com>
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Signed-off-by: John Kacur <jkacur@redhat.com>
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---
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rteval/modules/__init__.py | 11 +++++++++++
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rteval/modules/measurement/cyclictest.py | 1 +
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rteval/modules/measurement/timerlat.py | 1 +
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3 files changed, 13 insertions(+)
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diff --git a/rteval/modules/__init__.py b/rteval/modules/__init__.py
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index de1ddc4628c1..2a4eafae71c7 100644
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--- a/rteval/modules/__init__.py
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+++ b/rteval/modules/__init__.py
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@@ -40,6 +40,7 @@ class rtevalModulePrototype(threading.Thread):
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"finished": threading.Event()}
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self._donotrun = False
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self._exclusive = False
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+ self._latency = False
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self.__timestamps = {}
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self.__sleeptime = 2.0
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@@ -67,6 +68,11 @@ class rtevalModulePrototype(threading.Thread):
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self._exclusive = True
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+ def set_latency(self):
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+ """ Sets the module as an exclusive latency measurer """
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+ self._latency = True
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+
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+
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def set_donotrun(self):
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""" set a module's donotrun field to True """
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self._donotrun = True
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@@ -412,9 +418,14 @@ class RtEvalModules:
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self._logger.log(Log.INFO, f"Preparing {self._module_type} modules")
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exclusive = 0
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+ latency = False
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for (modname, mod) in self.__modules:
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if mod.is_exclusive() and mod.WorkloadWillRun():
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exclusive += 1
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+ if mod._latency:
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+ if latency:
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+ raise RuntimeError("More than one exclusive latency test")
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+ latency = True
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for (modname, mod) in self.__modules:
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if exclusive >= 1:
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if exclusive != 1:
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diff --git a/rteval/modules/measurement/cyclictest.py b/rteval/modules/measurement/cyclictest.py
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index 3a34c1b988d6..a9f5b0c4fba7 100644
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--- a/rteval/modules/measurement/cyclictest.py
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+++ b/rteval/modules/measurement/cyclictest.py
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@@ -216,6 +216,7 @@ class Cyclictest(rtevalModulePrototype):
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self.__started = False
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self.__cyclicoutput = None
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self.__breaktraceval = None
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+ self.set_latency()
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@staticmethod
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diff --git a/rteval/modules/measurement/timerlat.py b/rteval/modules/measurement/timerlat.py
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index f3bdc7098bc0..e4b80c33552e 100644
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--- a/rteval/modules/measurement/timerlat.py
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+++ b/rteval/modules/measurement/timerlat.py
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@@ -216,6 +216,7 @@ class Timerlat(rtevalModulePrototype):
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logfnc=self._log)
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self.__timerlatdata['system'].description = (f"({self.__numcores} cores) ") + info['0']['model name']
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self._log(Log.DEBUG, f"system using {self.__numcores} cpu cores")
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+ self.set_latency()
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def _WorkloadSetup(self):
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--
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2.45.2
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