rdma-core/SOURCES/0004-pyverbs-Fix-WC-creatio...

86 lines
2.9 KiB
Diff

From 252e5a0f63663da5128fe714a1e9ea8a35995696 Mon Sep 17 00:00:00 2001
From: Maxim Chicherin <maximc@mellanox.com>
Date: Mon, 19 Aug 2019 11:11:12 +0300
Subject: [PATCH rdma-core 04/13] pyverbs: Fix WC creation process
[ Upstream commit e83c7ff811544302ca3ecbcec23df0bb5b68d23f ]
In WC constructor, parameters assignment was incorrect and values
were not stored properly.
In addition, imm_data attribute was not initiated. imm_data represents
immediate data in network byte order if wc_flags & IBV_WC_WITH_IMM or
stores the invalidated rkey if wc_flags & IBV_WC_WITH_INV.
Fixes: 32165065ffbe ("pyverbs: Introducing completions related classes")
Signed-off-by: Maxim Chicherin <maximc@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
pyverbs/cq.pyx | 33 +++++++++++++++++++++------------
1 file changed, 21 insertions(+), 12 deletions(-)
mode change 100644 => 100755 pyverbs/cq.pyx
diff --git a/pyverbs/cq.pyx b/pyverbs/cq.pyx
old mode 100644
new mode 100755
index dc09924e..3ac5f704
--- a/pyverbs/cq.pyx
+++ b/pyverbs/cq.pyx
@@ -366,18 +366,19 @@ cdef class WC(PyverbsObject):
def __cinit__(self, wr_id=0, status=0, opcode=0, vendor_err=0, byte_len=0,
qp_num=0, src_qp=0, imm_data=0, wc_flags=0, pkey_index=0,
slid=0, sl=0, dlid_path_bits=0):
- self.wr_id = wr_id
- self.status = status
- self.opcode = opcode
- self.vendor_err = vendor_err
- self.byte_len = byte_len
- self.qp_num = qp_num
- self.src_qp = src_qp
- self.wc_flags = wc_flags
- self.pkey_index = pkey_index
- self.slid = slid
- self.sl = sl
- self.dlid_path_bits = dlid_path_bits
+ self.wc.wr_id = wr_id
+ self.wc.status = status
+ self.wc.opcode = opcode
+ self.wc.vendor_err = vendor_err
+ self.wc.byte_len = byte_len
+ self.wc.qp_num = qp_num
+ self.wc.src_qp = src_qp
+ self.wc.wc_flags = wc_flags
+ self.wc.pkey_index = pkey_index
+ self.wc.slid = slid
+ self.wc.imm_data = imm_data
+ self.wc.sl = sl
+ self.wc.dlid_path_bits = dlid_path_bits
@property
def wr_id(self):
@@ -456,6 +457,13 @@ cdef class WC(PyverbsObject):
def sl(self, val):
self.wc.sl = val
+ @property
+ def imm_data(self):
+ return self.wc.imm_data
+ @imm_data.setter
+ def imm_data(self, val):
+ self.wc.imm_data = val
+
@property
def dlid_path_bits(self):
return self.wc.dlid_path_bits
@@ -476,6 +484,7 @@ cdef class WC(PyverbsObject):
print_format.format('pkey index', self.pkey_index) +\
print_format.format('slid', self.slid) +\
print_format.format('sl', self.sl) +\
+ print_format.format('imm_data', self.imm_data) +\
print_format.format('dlid path bits', self.dlid_path_bits)
--
2.20.1