39 lines
1.3 KiB
Diff
39 lines
1.3 KiB
Diff
commit 854364ba44aee9bc5646f6537fc744b0b54aff37
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Author: Muralidhara M K <muralimk@amd.com>
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Date: Thu Aug 20 21:00:57 2020 +0530
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rasdaemon: Add 8 channel decoding for SMCA systems
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Current Scalable Machine Check Architecture (SMCA) systems support up
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to 8 UMC channels.
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To find the UMC channel represented by a bank, look at the 6th nibble
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in the MCA_IPID[InstanceId] field.
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Signed-off-by: Muralidhara M K <muralimk@amd.com>
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[ Adjust commit message. ]
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Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
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Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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diff --git a/mce-amd-smca.c b/mce-amd-smca.c
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index d0b6cb6..7c619fd 100644
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--- a/mce-amd-smca.c
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+++ b/mce-amd-smca.c
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@@ -438,15 +438,7 @@ static void amd_decode_errcode(struct mce_event *e)
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*/
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static int find_umc_channel(struct mce_event *e)
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{
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- uint32_t umc_instance_id[] = {0x50f00, 0x150f00};
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- uint32_t instance_id = EXTRACT(e->ipid, 0, 31);
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- int i, channel = -1;
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-
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- for (i = 0; i < ARRAY_SIZE(umc_instance_id); i++)
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- if (umc_instance_id[i] == instance_id)
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- channel = i;
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-
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- return channel;
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+ return EXTRACT(e->ipid, 0, 31) >> 20;
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}
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/* Decode extended errors according to Scalable MCA specification */
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static void decode_smca_error(struct mce_event *e)
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