67 lines
2.4 KiB
Diff
67 lines
2.4 KiB
Diff
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commit 2a1d217660351c08eb2f8bccebf939abba2f7e69
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Author: Brian WoodsGhannam, Yazen <brian.woods@amd.comYazen.Ghannam@amd.com>
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Date: Fri Nov 1 15:48:13 2019 +0100
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rasdaemon: rename CPU_NAPLES cputype
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Change CPU_NAPLES to CPU_AMD_SMCA to reflect that it isn't just NAPLES
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that is supported, but AMD's Scalable Machine Check Architecture (SMCA).
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[ Yazen: change family check to feature check, and change CPU name. ]
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CC: "mchehab+samsung@kernel.org" <mchehab+samsung@kernel.org>, "Namburu, Chandu-babu" <chandu@amd.com> # Thread-Topic: [PATCH 1/2] rasdaemon: rename CPU_NAPLES cputype
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Signed-off-by: Brian Woods <brian.woods@amd.com>
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Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
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Cc: Chandu-babu Namburu <chandu@amd.com>
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Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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---
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ras-mce-handler.c | 10 ++++++----
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ras-mce-handler.h | 2 +-
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2 files changed, 7 insertions(+), 5 deletions(-)
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--- rasdaemon-0.6.1.orig/ras-mce-handler.c 2021-05-26 15:16:24.699096556 -0400
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+++ rasdaemon-0.6.1/ras-mce-handler.c 2021-05-26 15:18:06.543162745 -0400
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@@ -55,7 +55,7 @@ [CPU_XEON75XX] = "Intel Xeon 7500 series
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[CPU_KNIGHTS_LANDING] = "Knights Landing",
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[CPU_KNIGHTS_MILL] = "Knights Mill",
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[CPU_SKYLAKE_XEON] = "Skylake server",
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- [CPU_NAPLES] = "AMD Family 17h Zen1"
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+ [CPU_AMD_SMCA] = "AMD Scalable MCA",
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};
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static enum cputype select_intel_cputype(struct ras_events *ras)
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@@ -191,8 +191,10 @@ ret = 0;
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if (!strcmp(mce->vendor, "AuthenticAMD")) {
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if (mce->family == 15)
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mce->cputype = CPU_K8;
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- if (mce->family == 23)
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- mce->cputype = CPU_NAPLES;
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+ if (strstr(mce->processor_flags, "smca")) {
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+ mce->cputype = CPU_AMD_SMCA;
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+ goto ret;
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+ }
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if (mce->family > 23) {
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log(ALL, LOG_INFO,
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"Can't parse MCE for this AMD CPU yet %d\n",
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@@ -435,7 +437,7 @@ if (pevent_get_field_val(s, event, "ipid
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case CPU_K8:
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rc = parse_amd_k8_event(ras, &e);
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break;
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- case CPU_NAPLES:
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+ case CPU_AMD_SMCA:
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rc = parse_amd_smca_event(ras, &e);
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break;
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default: /* All other CPU types are Intel */
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--- rasdaemon-0.6.1.orig/ras-mce-handler.h 2021-05-26 15:17:15.409631590 -0400
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+++ rasdaemon-0.6.1/ras-mce-handler.h 2021-05-26 15:18:20.102038424 -0400
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@@ -50,7 +50,7 @@ enum cputype {
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CPU_KNIGHTS_LANDING,
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CPU_KNIGHTS_MILL,
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CPU_SKYLAKE_XEON,
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- CPU_NAPLES,
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+ CPU_AMD_SMCA,
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};
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struct mce_event {
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