qt5-qtdeclarative/0058-V4-JIT-fix-typo-in-Binop-int32Binop.patch

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From 181824f2497b3c874acce0f4a54a5580ee64ea90 Mon Sep 17 00:00:00 2001
From: Julien Brianceau <jbriance@cisco.com>
Date: Mon, 13 Apr 2015 17:00:34 +0200
Subject: [PATCH 58/68] V4 JIT: fix typo in Binop::int32Binop
Change-Id: I68f073ab512b482c9b3b1ad7860f4c759245298e
Reviewed-by: Simon Hausmann <simon.hausmann@theqtcompany.com>
---
src/qml/jit/qv4binop.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/qml/jit/qv4binop.cpp b/src/qml/jit/qv4binop.cpp
index a2d4815..7d6f397 100644
--- a/src/qml/jit/qv4binop.cpp
+++ b/src/qml/jit/qv4binop.cpp
@@ -430,13 +430,13 @@ bool Binop::int32Binop(IR::Expr *leftSource, IR::Expr *rightSource, IR::Expr *ta
as->lshift32(l, Assembler::ScratchRegister, targetReg);
break;
- case IR::OpLShift:
+ case IR::OpRShift:
as->move(r, Assembler::ScratchRegister);
as->and32(Assembler::TrustedImm32(0x1f), Assembler::ScratchRegister);
as->rshift32(l, Assembler::ScratchRegister, targetReg);
break;
- case IR::OpLShift:
+ case IR::OpURShift:
as->move(r, Assembler::ScratchRegister);
as->and32(Assembler::TrustedImm32(0x1f), Assembler::ScratchRegister);
as->storeUInt32(targetReg, target); // IMPORTANT: do NOT do a break here! The stored type of an urshift is different from the other binary operations!
--
2.3.7