0daf0004a7
- kvm-numa-Enable-numa-for-SGX-EPC-sections.patch [bz#2033708] - kvm-numa-Support-SGX-numa-in-the-monitor-and-Libvirt-int.patch [bz#2033708] - kvm-doc-Add-the-SGX-numa-description.patch [bz#2033708] - kvm-Enable-SGX-RH-Only.patch [bz#2033708] - kvm-qapi-Cleanup-SGX-related-comments-and-restore-sectio.patch [bz#2033708] - kvm-block-io-Update-BSC-only-if-want_zero-is-true.patch [bz#2041461] - kvm-iotests-block-status-cache-New-test.patch [bz#2041461] - kvm-iotests-Test-qemu-img-convert-of-zeroed-data-cluster.patch [bz#1882917] - kvm-qemu-img-make-is_allocated_sectors-more-efficient.patch [bz#1882917] - kvm-block-backend-prevent-dangling-BDS-pointers-across-a.patch [bz#2040123] - kvm-iotests-stream-error-on-reset-New-test.patch [bz#2040123] - kvm-hw-arm-smmuv3-Fix-device-reset.patch [bz#2042481] - Resolves: bz#2033708 ([Intel 9.0 Feat] qemu-kvm: SGX 1.5 (SGX1 + Flexible Launch Control) support) - Resolves: bz#2041461 (Inconsistent block status reply in qemu-nbd) - Resolves: bz#1882917 (the target image size is incorrect when converting a badly fragmented file) - Resolves: bz#2040123 (Qemu core dumped when do block-stream to a snapshot node on non-enough space storage) - Resolves: bz#2042481 ([aarch64] Launch guest with "default-bus-bypass-iommu=off,iommu=smmuv3" and "iommu_platform=on", guest hangs after system_reset)
211 lines
6.3 KiB
Diff
211 lines
6.3 KiB
Diff
From 0f75501ba348dc9fb3ce0198ceafc8093149457d Mon Sep 17 00:00:00 2001
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From: Yang Zhong <yang.zhong@intel.com>
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Date: Mon, 1 Nov 2021 12:20:07 -0400
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Subject: [PATCH 02/12] numa: Support SGX numa in the monitor and Libvirt
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interfaces
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RH-Author: Paul Lai <plai@redhat.com>
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RH-MergeRequest: 65: Enable SGX and add SGX Numa support
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RH-Commit: [2/5] 8c19cfb1a139fd4dbac771e695a133f16a68437f
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RH-Bugzilla: 2033708
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RH-Acked-by: Paolo Bonzini <None>
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RH-Acked-by: Bandan Das <None>
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RH-Acked-by: Cornelia Huck <cohuck@redhat.com>
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Add the SGXEPCSection list into SGXInfo to show the multiple
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SGX EPC sections detailed info, not the total size like before.
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This patch can enable numa support for 'info sgx' command and
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QMP interfaces. The new interfaces show each EPC section info
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in one numa node. Libvirt can use QMP interface to get the
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detailed host SGX EPC capabilities to decide how to allocate
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host EPC sections to guest.
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(qemu) info sgx
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SGX support: enabled
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SGX1 support: enabled
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SGX2 support: enabled
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FLC support: enabled
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NUMA node #0: size=67108864
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NUMA node #1: size=29360128
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The QMP interface show:
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(QEMU) query-sgx
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{"return": {"sgx": true, "sgx2": true, "sgx1": true, "sections": \
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[{"node": 0, "size": 67108864}, {"node": 1, "size": 29360128}], "flc": true}}
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(QEMU) query-sgx-capabilities
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{"return": {"sgx": true, "sgx2": true, "sgx1": true, "sections": \
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[{"node": 0, "size": 17070817280}, {"node": 1, "size": 17079205888}], "flc": true}}
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Signed-off-by: Yang Zhong <yang.zhong@intel.com>
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Message-Id: <20211101162009.62161-4-yang.zhong@intel.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 4755927ae12547c2e7cb22c5fa1b39038c6c11b1)
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Signed-off-by: Paul Lai <plai@redhat.com>
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---
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hw/i386/sgx.c | 51 +++++++++++++++++++++++++++++++++++--------
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qapi/misc-target.json | 19 ++++++++++++++--
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2 files changed, 59 insertions(+), 11 deletions(-)
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diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c
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index d04299904a..5de5dd0893 100644
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--- a/hw/i386/sgx.c
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+++ b/hw/i386/sgx.c
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@@ -83,11 +83,13 @@ static uint64_t sgx_calc_section_metric(uint64_t low, uint64_t high)
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((high & MAKE_64BIT_MASK(0, 20)) << 32);
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}
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-static uint64_t sgx_calc_host_epc_section_size(void)
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+static SGXEPCSectionList *sgx_calc_host_epc_sections(void)
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{
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+ SGXEPCSectionList *head = NULL, **tail = &head;
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+ SGXEPCSection *section;
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uint32_t i, type;
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uint32_t eax, ebx, ecx, edx;
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- uint64_t size = 0;
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+ uint32_t j = 0;
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for (i = 0; i < SGX_MAX_EPC_SECTIONS; i++) {
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host_cpuid(0x12, i + 2, &eax, &ebx, &ecx, &edx);
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@@ -101,10 +103,13 @@ static uint64_t sgx_calc_host_epc_section_size(void)
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break;
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}
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- size += sgx_calc_section_metric(ecx, edx);
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+ section = g_new0(SGXEPCSection, 1);
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+ section->node = j++;
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+ section->size = sgx_calc_section_metric(ecx, edx);
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+ QAPI_LIST_APPEND(tail, section);
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}
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- return size;
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+ return head;
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}
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static void sgx_epc_reset(void *opaque)
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@@ -168,13 +173,35 @@ SGXInfo *qmp_query_sgx_capabilities(Error **errp)
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info->sgx1 = eax & (1U << 0) ? true : false;
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info->sgx2 = eax & (1U << 1) ? true : false;
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- info->section_size = sgx_calc_host_epc_section_size();
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+ info->sections = sgx_calc_host_epc_sections();
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close(fd);
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return info;
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}
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+static SGXEPCSectionList *sgx_get_epc_sections_list(void)
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+{
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+ GSList *device_list = sgx_epc_get_device_list();
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+ SGXEPCSectionList *head = NULL, **tail = &head;
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+ SGXEPCSection *section;
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+
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+ for (; device_list; device_list = device_list->next) {
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+ DeviceState *dev = device_list->data;
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+ Object *obj = OBJECT(dev);
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+
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+ section = g_new0(SGXEPCSection, 1);
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+ section->node = object_property_get_uint(obj, SGX_EPC_NUMA_NODE_PROP,
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+ &error_abort);
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+ section->size = object_property_get_uint(obj, SGX_EPC_SIZE_PROP,
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+ &error_abort);
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+ QAPI_LIST_APPEND(tail, section);
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+ }
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+ g_slist_free(device_list);
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+
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+ return head;
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+}
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+
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SGXInfo *qmp_query_sgx(Error **errp)
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{
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SGXInfo *info = NULL;
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@@ -193,14 +220,13 @@ SGXInfo *qmp_query_sgx(Error **errp)
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return NULL;
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}
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- SGXEPCState *sgx_epc = &pcms->sgx_epc;
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info = g_new0(SGXInfo, 1);
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info->sgx = true;
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info->sgx1 = true;
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info->sgx2 = true;
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info->flc = true;
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- info->section_size = sgx_epc->size;
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+ info->sections = sgx_get_epc_sections_list();
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return info;
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}
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@@ -208,6 +234,7 @@ SGXInfo *qmp_query_sgx(Error **errp)
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void hmp_info_sgx(Monitor *mon, const QDict *qdict)
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{
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Error *err = NULL;
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+ SGXEPCSectionList *section_list, *section;
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g_autoptr(SGXInfo) info = qmp_query_sgx(&err);
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if (err) {
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@@ -222,8 +249,14 @@ void hmp_info_sgx(Monitor *mon, const QDict *qdict)
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info->sgx2 ? "enabled" : "disabled");
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monitor_printf(mon, "FLC support: %s\n",
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info->flc ? "enabled" : "disabled");
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- monitor_printf(mon, "size: %" PRIu64 "\n",
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- info->section_size);
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+
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+ section_list = info->sections;
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+ for (section = section_list; section; section = section->next) {
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+ monitor_printf(mon, "NUMA node #%" PRId64 ": ",
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+ section->value->node);
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+ monitor_printf(mon, "size=%" PRIu64 "\n",
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+ section->value->size);
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+ }
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}
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bool sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size)
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diff --git a/qapi/misc-target.json b/qapi/misc-target.json
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index 5aa2b95b7d..1022aa0184 100644
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--- a/qapi/misc-target.json
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+++ b/qapi/misc-target.json
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@@ -337,6 +337,21 @@
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'if': 'TARGET_ARM' }
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+##
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+# @SGXEPCSection:
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+#
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+# Information about intel SGX EPC section info
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+#
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+# @node: the numa node
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+#
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+# @size: the size of epc section
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+#
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+# Since: 6.2
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+##
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+{ 'struct': 'SGXEPCSection',
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+ 'data': { 'node': 'int',
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+ 'size': 'uint64'}}
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+
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##
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# @SGXInfo:
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#
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@@ -350,7 +365,7 @@
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#
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# @flc: true if FLC is supported
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#
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-# @section-size: The EPC section size for guest
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+# @sections: The EPC sections info for guest
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#
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# Since: 6.2
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##
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@@ -359,7 +374,7 @@
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'sgx1': 'bool',
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'sgx2': 'bool',
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'flc': 'bool',
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- 'section-size': 'uint64'},
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+ 'sections': ['SGXEPCSection']},
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'if': 'TARGET_I386' }
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##
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--
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2.27.0
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