321b8a8d36
- kvm-io-move-websock-resource-release-to-close-method.patch [RHEL-120116] - kvm-io-fix-use-after-free-in-websocket-handshake-code.patch [RHEL-120116] - kvm-vfio-Disable-VFIO-migration-with-MultiFD-support.patch [RHEL-126573] - kvm-hw-arm-virt-Use-ACPI-PCI-hotplug-by-default-from-10..patch [RHEL-67323] - kvm-hw-arm-smmu-common-Check-SMMU-has-PCIe-Root-Complex-.patch [RHEL-73800] - kvm-hw-arm-virt-acpi-build-Re-arrange-SMMUv3-IORT-build.patch [RHEL-73800] - kvm-hw-arm-virt-acpi-build-Update-IORT-for-multiple-smmu.patch [RHEL-73800] - kvm-hw-arm-virt-Factor-out-common-SMMUV3-dt-bindings-cod.patch [RHEL-73800] - kvm-hw-arm-virt-Add-an-SMMU_IO_LEN-macro.patch [RHEL-73800] - kvm-hw-pci-Introduce-pci_setup_iommu_per_bus-for-per-bus.patch [RHEL-73800] - kvm-hw-arm-virt-Allow-user-creatable-SMMUv3-dev-instanti.patch [RHEL-73800] - kvm-qemu-options.hx-Document-the-arm-smmuv3-device.patch [RHEL-73800] - kvm-bios-tables-test-Allow-for-smmuv3-test-data.patch [RHEL-73800] - kvm-qtest-bios-tables-test-Add-tests-for-legacy-smmuv3-a.patch [RHEL-73800] - kvm-qtest-bios-tables-test-Update-tables-for-smmuv3-test.patch [RHEL-73800] - kvm-qtest-Do-not-run-bios-tables-test-on-aarch64.patch [] - Resolves: RHEL-120116 (CVE-2025-11234 qemu-kvm: VNC WebSocket handshake use-after-free [rhel-10.2]) - Resolves: RHEL-126573 (VFIO migration using multifd should be disabled by default) - Resolves: RHEL-67323 ([aarch64] Support ACPI based PCI hotplug on ARM) - Resolves: RHEL-73800 (NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1)
161 lines
6.6 KiB
Diff
161 lines
6.6 KiB
Diff
From 51ec91309c99a5d81b53c2762d18c073f672e45a Mon Sep 17 00:00:00 2001
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From: Shameer Kolothum <skolothumtho@nvidia.com>
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Date: Fri, 29 Aug 2025 09:25:32 +0100
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Subject: [PATCH 14/16] qtest/bios-tables-test: Add tests for legacy smmuv3 and
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smmuv3 device
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RH-Author: Eric Auger <eric.auger@redhat.com>
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RH-MergeRequest: 423: hw/arm/virt: Add support for user creatable SMMUv3 device
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RH-Jira: RHEL-73800
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RH-Acked-by: Gavin Shan <gshan@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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RH-Acked-by: Sebastian Ott <sebott@redhat.com>
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RH-Acked-by: Donald Dutile <None>
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RH-Commit: [10/11] 101ed34313636fdc11f7fbdedbe2f91671b84c4b (eauger1/centos-qemu-kvm)
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For the legacy SMMUv3 test, the setup includes three PCIe Root Complexes,
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one of which has bypass_iommu enabled. The generated IORT table contains
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a single SMMUv3 node, a Root Complex(RC) node and 1 ITS node.
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RC node features 4 ID mappings, of which 2 points to SMMU node and the
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remaining ones points to ITS.
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pcie.0 -> {SMMU0} -> {ITS}
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{RC} pcie.1 -> {SMMU0} -> {ITS}
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pcie.2 -> {ITS}
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[all other ids] -> {ITS}
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For the -device arm-smmuv3,... test, the configuration also includes three
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Root Complexes, with two connected to separate SMMUv3 devices.
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The resulting IORT table contains 1 RC node, 2 SMMU nodes and 1 ITS node.
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RC node features 4 ID mappings. 2 of them target the 2 SMMU nodes while
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the others targets the ITS.
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pcie.0 -> {SMMU0} -> {ITS}
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{RC} pcie.1 -> {SMMU1} -> {ITS}
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pcie.2 -> {ITS}
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[all other ids] -> {ITS}
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Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
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Reviewed-by: Eric Auger <eric.auger@redhat.com>
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Tested-by: Eric Auger <eric.auger@redhat.com>
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Tested-by: Nicolin Chen <nicolinc@nvidia.com>
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Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
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Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
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Reviewed-by: Donald Dutile <ddutile@redhat.com>
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Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
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Message-id: 20250829082543.7680-11-skolothumtho@nvidia.com
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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(cherry picked from commit 3f8cd046c151c471d9a34181320f4a7d3f72b32a)
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Signed-off-by: Eric Auger <eric.auger@redhat.com>
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---
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tests/qtest/bios-tables-test.c | 86 ++++++++++++++++++++++++++++++++++
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1 file changed, 86 insertions(+)
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diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
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index 386196edc8..a384aac1be 100644
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--- a/tests/qtest/bios-tables-test.c
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+++ b/tests/qtest/bios-tables-test.c
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@@ -2343,6 +2343,86 @@ static void test_acpi_aarch64_virt_viot(void)
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free_test_data(&data);
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}
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+static void test_acpi_aarch64_virt_smmuv3_legacy(void)
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+{
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+ test_data data = {
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+ .machine = "virt",
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+ .arch = "aarch64",
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+ .tcg_only = true,
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+ .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd",
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+ .uefi_fl2 = "pc-bios/edk2-arm-vars.fd",
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+ .ram_start = 0x40000000ULL,
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+ .scan_len = 128ULL * MiB,
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+ };
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+
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+ /*
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+ * cdrom is plugged into scsi controller to avoid conflict
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+ * with pxb-pcie. See comments in test_acpi_aarch64_virt_tcg_pxb() for
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+ * details.
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+ *
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+ * The setup includes three PCIe root complexes, one of which has
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+ * bypass_iommu enabled. The generated IORT table contains a single
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+ * SMMUv3 node and a Root Complex node with three ID mappings. Two
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+ * of the ID mappings have output references pointing to the SMMUv3
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+ * node and the remaining one points to ITS.
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+ */
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+ data.variant = ".smmuv3-legacy";
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+ test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
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+ " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
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+ " -drive file="
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+ "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
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+ "if=none,media=cdrom,id=drive-scsi0-0-0-1,readonly=on"
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+ " -device scsi-cd,bus=scsi0.0,scsi-id=0,"
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+ "drive=drive-scsi0-0-0-1,id=scsi0-0-0-1,bootindex=1"
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+ " -cpu cortex-a57"
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+ " -M iommu=smmuv3"
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+ " -device pxb-pcie,id=pcie.1,bus=pcie.0,bus_nr=0x10"
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+ " -device pxb-pcie,id=pcie.2,bus=pcie.0,bus_nr=0x20,bypass_iommu=on",
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+ &data);
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+ free_test_data(&data);
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+}
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+
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+static void test_acpi_aarch64_virt_smmuv3_dev(void)
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+{
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+ test_data data = {
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+ .machine = "virt",
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+ .arch = "aarch64",
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+ .tcg_only = true,
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+ .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd",
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+ .uefi_fl2 = "pc-bios/edk2-arm-vars.fd",
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+ .ram_start = 0x40000000ULL,
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+ .scan_len = 128ULL * MiB,
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+ };
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+
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+ /*
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+ * cdrom is plugged into scsi controller to avoid conflict
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+ * with pxb-pcie. See comments in test_acpi_aarch64_virt_tcg_pxb()
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+ * for details.
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+ *
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+ * The setup includes three PCie root complexes, two of which are
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+ * connected to separate SMMUv3 devices. The resulting IORT table
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+ * contains two SMMUv3 nodes and a Root Complex node with ID mappings
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+ * of which two of the ID mappings have output references pointing
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+ * to two different SMMUv3 nodes and the remaining ones pointing to
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+ * ITS.
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+ */
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+ data.variant = ".smmuv3-dev";
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+ test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
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+ " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
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+ " -drive file="
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+ "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
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+ "if=none,media=cdrom,id=drive-scsi0-0-0-1,readonly=on"
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+ " -device scsi-cd,bus=scsi0.0,scsi-id=0,"
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+ "drive=drive-scsi0-0-0-1,id=scsi0-0-0-1,bootindex=1"
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+ " -cpu cortex-a57"
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+ " -device arm-smmuv3,primary-bus=pcie.0,id=smmuv3.0"
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+ " -device pxb-pcie,id=pcie.1,bus=pcie.0,bus_nr=0x10"
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+ " -device arm-smmuv3,primary-bus=pcie.1,id=smmuv3.1"
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+ " -device pxb-pcie,id=pcie.2,bus=pcie.0,bus_nr=0x20",
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+ &data);
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+ free_test_data(&data);
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+}
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+
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#ifndef _WIN32
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# define DEV_NULL "/dev/null"
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#else
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@@ -2776,6 +2856,12 @@ int main(int argc, char *argv[])
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if (qtest_has_device("virtio-iommu-pci")) {
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qtest_add_func("acpi/virt/viot", test_acpi_aarch64_virt_viot);
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}
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+ qtest_add_func("acpi/virt/smmuv3-legacy",
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+ test_acpi_aarch64_virt_smmuv3_legacy);
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+ if (qtest_has_device("arm-smmuv3")) {
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+ qtest_add_func("acpi/virt/smmuv3-dev",
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+ test_acpi_aarch64_virt_smmuv3_dev);
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+ }
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}
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#if 0 /* Disabled for Red Hat Enterprise Linux */
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} else if (strcmp(arch, "riscv64") == 0) {
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--
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2.47.3
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