183 lines
5.8 KiB
Diff
183 lines
5.8 KiB
Diff
From 28cf1b55f346a9f56e84fa57921f5a28a99cd59b Mon Sep 17 00:00:00 2001
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From: Jing Liu <jing2.liu@intel.com>
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Date: Wed, 16 Feb 2022 22:04:32 -0800
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Subject: [PATCH 10/24] x86: add support for KVM_CAP_XSAVE2 and AMX state
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migration
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RH-Author: Paul Lai <plai@redhat.com>
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RH-MergeRequest: 176: Enable KVM AMX support
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RH-Commit: [10/13] d584f455ba1ecd8a4a87f3470e6aac24ba9a1f5a
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RH-Bugzilla: 1916415
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RH-Acked-by: Cornelia Huck <cohuck@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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When dynamic xfeatures (e.g. AMX) are used by the guest, the xsave
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area would be larger than 4KB. KVM_GET_XSAVE2 and KVM_SET_XSAVE
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under KVM_CAP_XSAVE2 works with a xsave buffer larger than 4KB.
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Always use the new ioctls under KVM_CAP_XSAVE2 when KVM supports it.
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Signed-off-by: Jing Liu <jing2.liu@intel.com>
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Signed-off-by: Zeng Guang <guang.zeng@intel.com>
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Signed-off-by: Wei Wang <wei.w.wang@intel.com>
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Signed-off-by: Yang Zhong <yang.zhong@intel.com>
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Message-Id: <20220217060434.52460-7-yang.zhong@intel.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit e56dd3c70abb31893c61ac834109fa7a38841330)
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Signed-off-by: Paul Lai <plai@redhat.com>
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---
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target/i386/cpu.h | 4 ++++
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target/i386/kvm/kvm.c | 42 ++++++++++++++++++++++++--------------
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target/i386/xsave_helper.c | 28 +++++++++++++++++++++++++
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3 files changed, 59 insertions(+), 15 deletions(-)
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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index f2bdef9c26..14a3501b87 100644
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--- a/target/i386/cpu.h
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+++ b/target/i386/cpu.h
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@@ -1522,6 +1522,10 @@ typedef struct CPUX86State {
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uint64_t opmask_regs[NB_OPMASK_REGS];
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YMMReg zmmh_regs[CPU_NB_REGS];
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ZMMReg hi16_zmm_regs[CPU_NB_REGS];
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+#ifdef TARGET_X86_64
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+ uint8_t xtilecfg[64];
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+ uint8_t xtiledata[8192];
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+#endif
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/* sysenter registers */
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uint32_t sysenter_cs;
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diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
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index a64a79d870..d3d476df27 100644
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--- a/target/i386/kvm/kvm.c
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+++ b/target/i386/kvm/kvm.c
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@@ -123,6 +123,7 @@ static uint32_t num_architectural_pmu_gp_counters;
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static uint32_t num_architectural_pmu_fixed_counters;
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static int has_xsave;
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+static int has_xsave2;
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static int has_xcrs;
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static int has_pit_state2;
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static int has_exception_payload;
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@@ -1585,6 +1586,26 @@ static Error *invtsc_mig_blocker;
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#define KVM_MAX_CPUID_ENTRIES 100
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+static void kvm_init_xsave(CPUX86State *env)
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+{
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+ if (has_xsave2) {
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+ env->xsave_buf_len = QEMU_ALIGN_UP(has_xsave2, 4096);
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+ } else if (has_xsave) {
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+ env->xsave_buf_len = sizeof(struct kvm_xsave);
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+ } else {
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+ return;
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+ }
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+
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+ env->xsave_buf = qemu_memalign(4096, env->xsave_buf_len);
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+ memset(env->xsave_buf, 0, env->xsave_buf_len);
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+ /*
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+ * The allocated storage must be large enough for all of the
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+ * possible XSAVE state components.
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+ */
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+ assert(kvm_arch_get_supported_cpuid(kvm_state, 0xd, 0, R_ECX) <=
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+ env->xsave_buf_len);
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+}
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+
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int kvm_arch_init_vcpu(CPUState *cs)
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{
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struct {
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@@ -1614,6 +1635,8 @@ int kvm_arch_init_vcpu(CPUState *cs)
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cpuid_i = 0;
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+ has_xsave2 = kvm_check_extension(cs->kvm_state, KVM_CAP_XSAVE2);
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+
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r = kvm_arch_set_tsc_khz(cs);
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if (r < 0) {
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return r;
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@@ -2003,19 +2026,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
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if (r) {
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goto fail;
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}
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-
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- if (has_xsave) {
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- env->xsave_buf_len = sizeof(struct kvm_xsave);
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- env->xsave_buf = qemu_memalign(4096, env->xsave_buf_len);
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- memset(env->xsave_buf, 0, env->xsave_buf_len);
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-
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- /*
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- * The allocated storage must be large enough for all of the
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- * possible XSAVE state components.
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- */
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- assert(kvm_arch_get_supported_cpuid(kvm_state, 0xd, 0, R_ECX)
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- <= env->xsave_buf_len);
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- }
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+ kvm_init_xsave(env);
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max_nested_state_len = kvm_max_nested_state_length();
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if (max_nested_state_len > 0) {
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@@ -3263,13 +3274,14 @@ static int kvm_get_xsave(X86CPU *cpu)
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{
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CPUX86State *env = &cpu->env;
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void *xsave = env->xsave_buf;
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- int ret;
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+ int type, ret;
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if (!has_xsave) {
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return kvm_get_fpu(cpu);
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}
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- ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_XSAVE, xsave);
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+ type = has_xsave2 ? KVM_GET_XSAVE2 : KVM_GET_XSAVE;
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+ ret = kvm_vcpu_ioctl(CPU(cpu), type, xsave);
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if (ret < 0) {
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return ret;
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}
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diff --git a/target/i386/xsave_helper.c b/target/i386/xsave_helper.c
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index ac61a96344..996e9f3bfe 100644
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--- a/target/i386/xsave_helper.c
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+++ b/target/i386/xsave_helper.c
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@@ -126,6 +126,20 @@ void x86_cpu_xsave_all_areas(X86CPU *cpu, void *buf, uint32_t buflen)
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memcpy(pkru, &env->pkru, sizeof(env->pkru));
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}
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+
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+ e = &x86_ext_save_areas[XSTATE_XTILE_CFG_BIT];
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+ if (e->size && e->offset) {
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+ XSaveXTILECFG *tilecfg = buf + e->offset;
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+
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+ memcpy(tilecfg, &env->xtilecfg, sizeof(env->xtilecfg));
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+ }
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+
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+ e = &x86_ext_save_areas[XSTATE_XTILE_DATA_BIT];
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+ if (e->size && e->offset && buflen >= e->size + e->offset) {
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+ XSaveXTILEDATA *tiledata = buf + e->offset;
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+
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+ memcpy(tiledata, &env->xtiledata, sizeof(env->xtiledata));
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+ }
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#endif
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}
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@@ -247,5 +261,19 @@ void x86_cpu_xrstor_all_areas(X86CPU *cpu, const void *buf, uint32_t buflen)
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pkru = buf + e->offset;
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memcpy(&env->pkru, pkru, sizeof(env->pkru));
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}
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+
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+ e = &x86_ext_save_areas[XSTATE_XTILE_CFG_BIT];
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+ if (e->size && e->offset) {
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+ const XSaveXTILECFG *tilecfg = buf + e->offset;
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+
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+ memcpy(&env->xtilecfg, tilecfg, sizeof(env->xtilecfg));
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+ }
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+
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+ e = &x86_ext_save_areas[XSTATE_XTILE_DATA_BIT];
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+ if (e->size && e->offset && buflen >= e->size + e->offset) {
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+ const XSaveXTILEDATA *tiledata = buf + e->offset;
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+
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+ memcpy(&env->xtiledata, tiledata, sizeof(env->xtiledata));
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+ }
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#endif
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}
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--
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2.35.3
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