118 lines
4.7 KiB
Diff
118 lines
4.7 KiB
Diff
From f1ff9d3b379697a2d4627e9529067195841d86a8 Mon Sep 17 00:00:00 2001
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From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
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Date: Sun, 4 May 2025 17:04:05 +0000
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Subject: [PATCH 25/57] hw/i386/amd_iommu: Allow migration when explicitly
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create the AMDVI-PCI device
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RH-Author: John Allen <None>
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RH-MergeRequest: 380: Add ability to manually specify the AMDVI-PCI device
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RH-Jira: RHEL-70925
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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RH-Commit: [2/3] a42b88116e608a79b6fae13ebe3709874f2a853f (johnalle/qemu-kvm-fork)
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Add migration support for AMD IOMMU model by saving necessary AMDVIState
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parameters for MMIO registers, device table, command buffer, and event
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buffers.
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Also change devtab_len type from size_t to uint64_t to avoid 32-bit build
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issue.
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Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
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Message-Id: <20250504170405.12623-3-suravee.suthikulpanit@amd.com>
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Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
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Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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(cherry picked from commit 28931c2e1591deb4bfaaf744fdc8813e96c230f1)
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JIRA: https://issues.redhat.com/browse/RHEL-70925
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Signed-off-by: John Allen <johnalle@redhat.com>
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---
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hw/i386/amd_iommu.c | 48 +++++++++++++++++++++++++++++++++++++++++++++
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hw/i386/amd_iommu.h | 2 +-
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2 files changed, 49 insertions(+), 1 deletion(-)
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diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
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index 6a5e76cfef..a34e0c5f59 100644
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--- a/hw/i386/amd_iommu.c
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+++ b/hw/i386/amd_iommu.c
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@@ -1611,8 +1611,55 @@ static void amdvi_sysbus_reset(DeviceState *dev)
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amdvi_init(s);
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}
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+static const VMStateDescription vmstate_amdvi_sysbus_migratable = {
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+ .name = "amd-iommu",
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+ .version_id = 1,
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+ .minimum_version_id = 1,
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+ .priority = MIG_PRI_IOMMU,
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+ .fields = (VMStateField[]) {
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+ /* Updated in amdvi_handle_control_write() */
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+ VMSTATE_BOOL(enabled, AMDVIState),
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+ VMSTATE_BOOL(ga_enabled, AMDVIState),
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+ VMSTATE_BOOL(ats_enabled, AMDVIState),
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+ VMSTATE_BOOL(cmdbuf_enabled, AMDVIState),
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+ VMSTATE_BOOL(completion_wait_intr, AMDVIState),
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+ VMSTATE_BOOL(evtlog_enabled, AMDVIState),
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+ VMSTATE_BOOL(evtlog_intr, AMDVIState),
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+ /* Updated in amdvi_handle_devtab_write() */
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+ VMSTATE_UINT64(devtab, AMDVIState),
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+ VMSTATE_UINT64(devtab_len, AMDVIState),
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+ /* Updated in amdvi_handle_cmdbase_write() */
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+ VMSTATE_UINT64(cmdbuf, AMDVIState),
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+ VMSTATE_UINT64(cmdbuf_len, AMDVIState),
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+ /* Updated in amdvi_handle_cmdhead_write() */
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+ VMSTATE_UINT32(cmdbuf_head, AMDVIState),
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+ /* Updated in amdvi_handle_cmdtail_write() */
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+ VMSTATE_UINT32(cmdbuf_tail, AMDVIState),
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+ /* Updated in amdvi_handle_evtbase_write() */
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+ VMSTATE_UINT64(evtlog, AMDVIState),
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+ VMSTATE_UINT32(evtlog_len, AMDVIState),
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+ /* Updated in amdvi_handle_evthead_write() */
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+ VMSTATE_UINT32(evtlog_head, AMDVIState),
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+ /* Updated in amdvi_handle_evttail_write() */
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+ VMSTATE_UINT32(evtlog_tail, AMDVIState),
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+ /* Updated in amdvi_handle_pprbase_write() */
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+ VMSTATE_UINT64(ppr_log, AMDVIState),
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+ VMSTATE_UINT32(pprlog_len, AMDVIState),
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+ /* Updated in amdvi_handle_pprhead_write() */
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+ VMSTATE_UINT32(pprlog_head, AMDVIState),
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+ /* Updated in amdvi_handle_tailhead_write() */
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+ VMSTATE_UINT32(pprlog_tail, AMDVIState),
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+ /* MMIO registers */
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+ VMSTATE_UINT8_ARRAY(mmior, AMDVIState, AMDVI_MMIO_SIZE),
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+ VMSTATE_UINT8_ARRAY(romask, AMDVIState, AMDVI_MMIO_SIZE),
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+ VMSTATE_UINT8_ARRAY(w1cmask, AMDVIState, AMDVI_MMIO_SIZE),
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+ VMSTATE_END_OF_LIST()
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+ }
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+};
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+
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static void amdvi_sysbus_realize(DeviceState *dev, Error **errp)
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{
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+ DeviceClass *dc = (DeviceClass *) object_get_class(OBJECT(dev));
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AMDVIState *s = AMD_IOMMU_DEVICE(dev);
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MachineState *ms = MACHINE(qdev_get_machine());
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PCMachineState *pcms = PC_MACHINE(ms);
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@@ -1634,6 +1681,7 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp)
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}
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s->pci = AMD_IOMMU_PCI(pdev);
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+ dc->vmsd = &vmstate_amdvi_sysbus_migratable;
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} else {
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s->pci = AMD_IOMMU_PCI(object_new(TYPE_AMD_IOMMU_PCI));
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/* This device should take care of IOMMU PCI properties */
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diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h
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index ece71ff0b6..741dd9a910 100644
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--- a/hw/i386/amd_iommu.h
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+++ b/hw/i386/amd_iommu.h
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@@ -329,7 +329,7 @@ struct AMDVIState {
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bool excl_enabled;
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hwaddr devtab; /* base address device table */
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- size_t devtab_len; /* device table length */
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+ uint64_t devtab_len; /* device table length */
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hwaddr cmdbuf; /* command buffer base address */
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uint64_t cmdbuf_len; /* command buffer length */
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--
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2.39.3
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