142 lines
6.6 KiB
Diff
142 lines
6.6 KiB
Diff
From 4114553452f7187283aefa001bc8342fc65b6b72 Mon Sep 17 00:00:00 2001
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From: John Allen <john.allen@amd.com>
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Date: Wed, 11 Dec 2024 15:06:48 -0600
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Subject: [PATCH 04/57] amd_iommu: Add support for pass though mode
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RH-Author: John Allen <None>
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RH-MergeRequest: 303: Interrupt Remap support for emulated amd viommu
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RH-Jira: RHEL-66202
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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RH-Commit: [2/5] 0434fefd554baf27fb9d93026af513c621f8cdb0 (johnalle/qemu-kvm-fork)
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JIRA: https://issues.redhat.com/browse/RHEL-66202
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commit c1f46999ef506d9854534560a94d02cf3cf9edd1
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Author: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
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Date: Fri Sep 27 12:29:10 2024 -0500
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amd_iommu: Add support for pass though mode
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Introduce 'nodma' shared memory region to support PT mode
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so that for each device, we only create an alias to shared memory
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region when DMA-remapping is disabled.
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Reviewed-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
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Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
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Signed-off-by: Santosh Shukla <santosh.shukla@amd.com>
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Message-Id: <20240927172913.121477-3-santosh.shukla@amd.com>
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Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
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Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Signed-off-by: John Allen <john.allen@amd.com>
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---
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hw/i386/amd_iommu.c | 49 ++++++++++++++++++++++++++++++++++++---------
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hw/i386/amd_iommu.h | 2 ++
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2 files changed, 42 insertions(+), 9 deletions(-)
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diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
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index 148b5ee51d..567cb8adc9 100644
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--- a/hw/i386/amd_iommu.c
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+++ b/hw/i386/amd_iommu.c
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@@ -60,8 +60,9 @@ struct AMDVIAddressSpace {
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uint8_t bus_num; /* bus number */
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uint8_t devfn; /* device function */
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AMDVIState *iommu_state; /* AMDVI - one per machine */
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- MemoryRegion root; /* AMDVI Root memory map region */
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+ MemoryRegion root; /* AMDVI Root memory map region */
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IOMMUMemoryRegion iommu; /* Device's address translation region */
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+ MemoryRegion iommu_nodma; /* Alias of shared nodma memory region */
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MemoryRegion iommu_ir; /* Device's interrupt remapping region */
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AddressSpace as; /* device's corresponding address space */
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};
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@@ -1412,6 +1413,7 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
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AMDVIState *s = opaque;
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AMDVIAddressSpace **iommu_as, *amdvi_dev_as;
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int bus_num = pci_bus_num(bus);
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+ X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);
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iommu_as = s->address_spaces[bus_num];
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@@ -1436,13 +1438,13 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
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* Memory region relationships looks like (Address range shows
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* only lower 32 bits to make it short in length...):
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*
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- * |-----------------+-------------------+----------|
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- * | Name | Address range | Priority |
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- * |-----------------+-------------------+----------+
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- * | amdvi_root | 00000000-ffffffff | 0 |
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- * | amdvi_iommu | 00000000-ffffffff | 1 |
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- * | amdvi_iommu_ir | fee00000-feefffff | 64 |
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- * |-----------------+-------------------+----------|
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+ * |--------------------+-------------------+----------|
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+ * | Name | Address range | Priority |
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+ * |--------------------+-------------------+----------+
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+ * | amdvi-root | 00000000-ffffffff | 0 |
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+ * | amdvi-iommu_nodma | 00000000-ffffffff | 0 |
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+ * | amdvi-iommu_ir | fee00000-feefffff | 64 |
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+ * |--------------------+-------------------+----------|
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*/
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memory_region_init_iommu(&amdvi_dev_as->iommu,
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sizeof(amdvi_dev_as->iommu),
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@@ -1461,7 +1463,25 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
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64);
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memory_region_add_subregion_overlap(&amdvi_dev_as->root, 0,
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MEMORY_REGION(&amdvi_dev_as->iommu),
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- 1);
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+ 0);
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+
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+ /* Build the DMA Disabled alias to shared memory */
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+ memory_region_init_alias(&amdvi_dev_as->iommu_nodma, OBJECT(s),
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+ "amdvi-sys", &s->mr_sys, 0,
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+ memory_region_size(&s->mr_sys));
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+ memory_region_add_subregion_overlap(&amdvi_dev_as->root, 0,
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+ &amdvi_dev_as->iommu_nodma,
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+ 0);
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+
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+ if (!x86_iommu->pt_supported) {
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+ memory_region_set_enabled(&amdvi_dev_as->iommu_nodma, false);
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+ memory_region_set_enabled(MEMORY_REGION(&amdvi_dev_as->iommu),
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+ true);
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+ } else {
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+ memory_region_set_enabled(MEMORY_REGION(&amdvi_dev_as->iommu),
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+ false);
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+ memory_region_set_enabled(&amdvi_dev_as->iommu_nodma, true);
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+ }
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}
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return &iommu_as[devfn]->as;
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}
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@@ -1602,6 +1622,17 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp)
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"amdvi-mmio", AMDVI_MMIO_SIZE);
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memory_region_add_subregion(get_system_memory(), AMDVI_BASE_ADDR,
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&s->mr_mmio);
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+
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+ /* Create the share memory regions by all devices */
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+ memory_region_init(&s->mr_sys, OBJECT(s), "amdvi-sys", UINT64_MAX);
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+
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+ /* set up the DMA disabled memory region */
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+ memory_region_init_alias(&s->mr_nodma, OBJECT(s),
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+ "amdvi-nodma", get_system_memory(), 0,
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+ memory_region_size(get_system_memory()));
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+ memory_region_add_subregion_overlap(&s->mr_sys, 0,
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+ &s->mr_nodma, 0);
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+
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pci_setup_iommu(bus, &amdvi_iommu_ops, s);
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amdvi_init(s);
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}
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diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h
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index e5c2ae94f2..be417e51c4 100644
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--- a/hw/i386/amd_iommu.h
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+++ b/hw/i386/amd_iommu.h
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@@ -354,6 +354,8 @@ struct AMDVIState {
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uint32_t pprlog_tail; /* ppr log tail */
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MemoryRegion mr_mmio; /* MMIO region */
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+ MemoryRegion mr_sys;
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+ MemoryRegion mr_nodma;
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uint8_t mmior[AMDVI_MMIO_SIZE]; /* read/write MMIO */
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uint8_t w1cmask[AMDVI_MMIO_SIZE]; /* read/write 1 clear mask */
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uint8_t romask[AMDVI_MMIO_SIZE]; /* MMIO read/only mask */
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--
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2.39.3
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