9092ead740
- kvm-target-i386-fix-operand-size-of-unary-SSE-operations.patch [bz#2173590] - kvm-tests-tcg-i386-Introduce-and-use-reg_t-consistently.patch [bz#2173590] - kvm-target-i386-Fix-BEXTR-instruction.patch [bz#2173590] - kvm-target-i386-Fix-C-flag-for-BLSI-BLSMSK-BLSR.patch [bz#2173590] - kvm-target-i386-fix-ADOX-followed-by-ADCX.patch [bz#2173590] - kvm-target-i386-Fix-32-bit-AD-CO-X-insns-in-64-bit-mode.patch [bz#2173590] - kvm-target-i386-Fix-BZHI-instruction.patch [bz#2173590] - kvm-intel-iommu-fail-DEVIOTLB_UNMAP-without-dt-mode.patch [bz#2156876] - Resolves: bz#2173590 (bugs in emulation of BMI instructions (for libguestfs without KVM)) - Resolves: bz#2156876 ([virtual network][rhel7.9_guest] qemu-kvm: vhost vring error in virtqueue 1: Invalid argument (22))
78 lines
2.9 KiB
Diff
78 lines
2.9 KiB
Diff
From d49e5d193dfccf6f5cfa98ccce5bd491478d563d Mon Sep 17 00:00:00 2001
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From: Richard Henderson <richard.henderson@linaro.org>
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Date: Sat, 14 Jan 2023 13:32:06 -1000
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Subject: [PATCH 7/8] target/i386: Fix BZHI instruction
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RH-Author: Paolo Bonzini <pbonzini@redhat.com>
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RH-MergeRequest: 154: target/i386: fix bugs in emulation of BMI instructions
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RH-Bugzilla: 2173590
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RH-Acked-by: Emanuele Giuseppe Esposito <eesposit@redhat.com>
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RH-Acked-by: Vitaly Kuznetsov <vkuznets@redhat.com>
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RH-Acked-by: Bandan Das <None>
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RH-Commit: [7/7] ad6b343c09c0304ac32cc68670c49d1fc12d8cf8 (bonzini/rhel-qemu-kvm)
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Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2173590
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Upstream-Status: merged
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We did not correctly handle N >= operand size.
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1374
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Message-Id: <20230114233206.3118472-1-richard.henderson@linaro.org>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 9ad2ba6e8e7fc195d0dd0b76ab38bd2fceb1bdd4)
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---
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target/i386/tcg/emit.c.inc | 14 +++++++-------
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tests/tcg/i386/test-i386-bmi2.c | 3 +++
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2 files changed, 10 insertions(+), 7 deletions(-)
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diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
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index e61ae9a2e9..0d01e13002 100644
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--- a/target/i386/tcg/emit.c.inc
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+++ b/target/i386/tcg/emit.c.inc
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@@ -1147,20 +1147,20 @@ static void gen_BLSR(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
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static void gen_BZHI(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
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{
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MemOp ot = decode->op[0].ot;
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- TCGv bound;
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+ TCGv bound = tcg_constant_tl(ot == MO_64 ? 63 : 31);
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+ TCGv zero = tcg_constant_tl(0);
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+ TCGv mone = tcg_constant_tl(-1);
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- tcg_gen_ext8u_tl(s->T1, cpu_regs[s->vex_v]);
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- bound = tcg_constant_tl(ot == MO_64 ? 63 : 31);
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+ tcg_gen_ext8u_tl(s->T1, s->T1);
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/*
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* Note that since we're using BMILG (in order to get O
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* cleared) we need to store the inverse into C.
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*/
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- tcg_gen_setcond_tl(TCG_COND_LT, cpu_cc_src, s->T1, bound);
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- tcg_gen_movcond_tl(TCG_COND_GT, s->T1, s->T1, bound, bound, s->T1);
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+ tcg_gen_setcond_tl(TCG_COND_LEU, cpu_cc_src, s->T1, bound);
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- tcg_gen_movi_tl(s->A0, -1);
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- tcg_gen_shl_tl(s->A0, s->A0, s->T1);
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+ tcg_gen_shl_tl(s->A0, mone, s->T1);
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+ tcg_gen_movcond_tl(TCG_COND_LEU, s->A0, s->T1, bound, s->A0, zero);
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tcg_gen_andc_tl(s->T0, s->T0, s->A0);
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gen_op_update1_cc(s);
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diff --git a/tests/tcg/i386/test-i386-bmi2.c b/tests/tcg/i386/test-i386-bmi2.c
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index 982d4abda4..0244df7987 100644
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--- a/tests/tcg/i386/test-i386-bmi2.c
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+++ b/tests/tcg/i386/test-i386-bmi2.c
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@@ -123,6 +123,9 @@ int main(int argc, char *argv[]) {
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result = bzhiq(mask, 0x1f);
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assert(result == (mask & ~(-1 << 30)));
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+ result = bzhiq(mask, 0x40);
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+ assert(result == mask);
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+
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result = rorxq(0x2132435465768798, 8);
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assert(result == 0x9821324354657687);
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--
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2.39.1
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