59 lines
2.4 KiB
Diff
59 lines
2.4 KiB
Diff
From 6a1d536006d9b6f888bd56ba1ff03c6e66acb020 Mon Sep 17 00:00:00 2001
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From: "plai@redhat.com" <plai@redhat.com>
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Date: Wed, 3 Apr 2019 15:54:34 +0100
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Subject: [PATCH 10/10] Revert "i386: Add CPUID bit for PCONFIG"
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RH-Author: plai@redhat.com
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Message-id: <1554306874-28796-11-git-send-email-plai@redhat.com>
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Patchwork-id: 85388
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O-Subject: [RHEL8.1 qemu-kvm PATCH resend 10/10] Revert "i386: Add CPUID bit for PCONFIG"
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Bugzilla: 1561761
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RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Michael S. Tsirkin <mst@redhat.com>
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From: Robert Hoo <robert.hu@linux.intel.com>
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This reverts commit 5131dc433df54b37e8e918d8fba7fe10344e7a7b.
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For new instruction 'PCONFIG' will not be exposed to guest.
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Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
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Message-Id: <1545227081-213696-3-git-send-email-robert.hu@linux.intel.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 712f807e1965c8f1f1da5bbec2b92a8c540e6631)
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Signed-off-by: Paul Lai <plai@redhat.com>
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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target/i386/cpu.c | 2 +-
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target/i386/cpu.h | 1 -
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2 files changed, 1 insertion(+), 2 deletions(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index ad369be..8e63db6 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -1042,7 +1042,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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- NULL, NULL, "pconfig", NULL,
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+ NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, "spec-ctrl", "stibp",
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NULL, "arch-capabilities", NULL, "ssbd",
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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index 63f692f..3ae0e8c 100644
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--- a/target/i386/cpu.h
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+++ b/target/i386/cpu.h
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@@ -687,7 +687,6 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
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#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
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#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
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-#define CPUID_7_0_EDX_PCONFIG (1U << 18) /* Platform Configuration */
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#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */
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#define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29) /*Arch Capabilities*/
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#define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass Disable */
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--
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1.8.3.1
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