179 lines
5.4 KiB
Diff
179 lines
5.4 KiB
Diff
From eb0fc0ae2750a0462698d6d21ebb56a4249539f9 Mon Sep 17 00:00:00 2001
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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Mon, 17 Feb 2020 16:23:11 +0000
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Subject: [PATCH 1/9] target/i386: kvm: initialize feature MSRs very early
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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RH-Author: Paolo Bonzini <pbonzini@redhat.com>
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Message-id: <20200217162316.2464-2-pbonzini@redhat.com>
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Patchwork-id: 93899
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O-Subject: [RHEL-AV-8.2.0 qemu-kvm PATCH 1/6] target/i386: kvm: initialize feature MSRs very early
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Bugzilla: 1791648
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RH-Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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RH-Acked-by: Maxim Levitsky <mlevitsk@redhat.com>
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RH-Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
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Some read-only MSRs affect the behavior of ioctls such as
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KVM_SET_NESTED_STATE. We can initialize them once and for all
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right after the CPU is realized, since they will never be modified
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by the guest.
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Reported-by: Qingua Cheng <qcheng@redhat.com>
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Cc: qemu-stable@nongnu.org
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Message-Id: <1579544504-3616-2-git-send-email-pbonzini@redhat.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 420ae1fc51c99abfd03b1c590f55617edd2a2bed)
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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target/i386/kvm.c | 81 ++++++++++++++++++++++++++++++--------------------
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target/i386/kvm_i386.h | 1 +
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2 files changed, 49 insertions(+), 33 deletions(-)
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diff --git a/target/i386/kvm.c b/target/i386/kvm.c
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index 86d9a1f..f41605b 100644
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--- a/target/i386/kvm.c
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+++ b/target/i386/kvm.c
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@@ -67,6 +67,8 @@
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* 255 kvm_msr_entry structs */
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#define MSR_BUF_SIZE 4096
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+static void kvm_init_msrs(X86CPU *cpu);
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+
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const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
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KVM_CAP_INFO(SET_TSS_ADDR),
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KVM_CAP_INFO(EXT_CPUID),
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@@ -1842,6 +1844,8 @@ int kvm_arch_init_vcpu(CPUState *cs)
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has_msr_tsc_aux = false;
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}
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+ kvm_init_msrs(cpu);
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+
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r = hyperv_init_vcpu(cpu);
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if (r) {
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goto fail;
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@@ -2660,11 +2664,53 @@ static void kvm_msr_entry_add_vmx(X86CPU *cpu, FeatureWordArray f)
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VMCS12_MAX_FIELD_INDEX << 1);
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}
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+static int kvm_buf_set_msrs(X86CPU *cpu)
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+{
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+ int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, cpu->kvm_msr_buf);
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+ if (ret < 0) {
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+ return ret;
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+ }
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+
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+ if (ret < cpu->kvm_msr_buf->nmsrs) {
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+ struct kvm_msr_entry *e = &cpu->kvm_msr_buf->entries[ret];
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+ error_report("error: failed to set MSR 0x%" PRIx32 " to 0x%" PRIx64,
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+ (uint32_t)e->index, (uint64_t)e->data);
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+ }
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+
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+ assert(ret == cpu->kvm_msr_buf->nmsrs);
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+ return 0;
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+}
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+
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+static void kvm_init_msrs(X86CPU *cpu)
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+{
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+ CPUX86State *env = &cpu->env;
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+
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+ kvm_msr_buf_reset(cpu);
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+ if (has_msr_arch_capabs) {
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+ kvm_msr_entry_add(cpu, MSR_IA32_ARCH_CAPABILITIES,
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+ env->features[FEAT_ARCH_CAPABILITIES]);
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+ }
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+
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+ if (has_msr_core_capabs) {
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+ kvm_msr_entry_add(cpu, MSR_IA32_CORE_CAPABILITY,
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+ env->features[FEAT_CORE_CAPABILITY]);
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+ }
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+
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+ /*
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+ * Older kernels do not include VMX MSRs in KVM_GET_MSR_INDEX_LIST, but
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+ * all kernels with MSR features should have them.
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+ */
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+ if (kvm_feature_msrs && cpu_has_vmx(env)) {
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+ kvm_msr_entry_add_vmx(cpu, env->features);
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+ }
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+
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+ assert(kvm_buf_set_msrs(cpu) == 0);
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+}
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+
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static int kvm_put_msrs(X86CPU *cpu, int level)
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{
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CPUX86State *env = &cpu->env;
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int i;
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- int ret;
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kvm_msr_buf_reset(cpu);
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@@ -2722,17 +2768,6 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
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}
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#endif
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- /* If host supports feature MSR, write down. */
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- if (has_msr_arch_capabs) {
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- kvm_msr_entry_add(cpu, MSR_IA32_ARCH_CAPABILITIES,
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- env->features[FEAT_ARCH_CAPABILITIES]);
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- }
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-
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- if (has_msr_core_capabs) {
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- kvm_msr_entry_add(cpu, MSR_IA32_CORE_CAPABILITY,
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- env->features[FEAT_CORE_CAPABILITY]);
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- }
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-
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/*
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* The following MSRs have side effects on the guest or are too heavy
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* for normal writeback. Limit them to reset or full state updates.
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@@ -2910,14 +2945,6 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
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/* Note: MSR_IA32_FEATURE_CONTROL is written separately, see
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* kvm_put_msr_feature_control. */
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-
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- /*
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- * Older kernels do not include VMX MSRs in KVM_GET_MSR_INDEX_LIST, but
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- * all kernels with MSR features should have them.
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- */
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- if (kvm_feature_msrs && cpu_has_vmx(env)) {
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- kvm_msr_entry_add_vmx(cpu, env->features);
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- }
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}
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if (env->mcg_cap) {
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@@ -2933,19 +2960,7 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
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}
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}
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- ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, cpu->kvm_msr_buf);
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- if (ret < 0) {
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- return ret;
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- }
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-
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- if (ret < cpu->kvm_msr_buf->nmsrs) {
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- struct kvm_msr_entry *e = &cpu->kvm_msr_buf->entries[ret];
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- error_report("error: failed to set MSR 0x%" PRIx32 " to 0x%" PRIx64,
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- (uint32_t)e->index, (uint64_t)e->data);
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- }
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-
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- assert(ret == cpu->kvm_msr_buf->nmsrs);
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- return 0;
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+ return kvm_buf_set_msrs(cpu);
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}
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diff --git a/target/i386/kvm_i386.h b/target/i386/kvm_i386.h
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index 06fe06b..d98c6f6 100644
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--- a/target/i386/kvm_i386.h
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+++ b/target/i386/kvm_i386.h
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@@ -66,4 +66,5 @@ bool kvm_enable_x2apic(void);
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bool kvm_has_x2apic_api(void);
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bool kvm_hv_vpindex_settable(void);
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+
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#endif
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--
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1.8.3.1
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