113 lines
3.7 KiB
Diff
113 lines
3.7 KiB
Diff
From f2f57c1ed926384e074d2048cdbdc30ee2f426eb Mon Sep 17 00:00:00 2001
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From: David Gibson <dgibson@redhat.com>
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Date: Tue, 21 Jan 2020 05:16:13 +0000
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Subject: [PATCH 03/15] ppc: Don't use CPUPPCState::irq_input_state with modern
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Book3s CPU models
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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RH-Author: David Gibson <dgibson@redhat.com>
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Message-id: <20200121051613.388295-4-dgibson@redhat.com>
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Patchwork-id: 93431
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O-Subject: [RHEL-AV-8.2 qemu-kvm PATCH 3/3] ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models
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Bugzilla: 1776638
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RH-Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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RH-Acked-by: Laurent Vivier <lvivier@redhat.com>
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RH-Acked-by: Thomas Huth <thuth@redhat.com>
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From: Greg Kurz <groug@kaod.org>
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The power7_set_irq() and power9_set_irq() functions set this but it is
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never used actually. Modern Book3s compatible CPUs are only supported
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by the pnv and spapr machines. They have an interrupt controller, XICS
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for POWER7/8 and XIVE for POWER9, whose models don't require to track
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IRQ input states at the CPU level.
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Drop these lines to avoid confusion.
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Signed-off-by: Greg Kurz <groug@kaod.org>
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Message-Id: <157548862861.3650476.16622818876928044450.stgit@bahia.lan>
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Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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(cherry picked from commit c1ad0b892ce20cf2b5e619c79e8a0c4c66b235dc)
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Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1776638
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Signed-off-by: David Gibson <dgibson@redhat.com>
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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hw/ppc/ppc.c | 16 ++--------------
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target/ppc/cpu.h | 4 +++-
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2 files changed, 5 insertions(+), 15 deletions(-)
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diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
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index d554b64..730a41f 100644
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--- a/hw/ppc/ppc.c
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+++ b/hw/ppc/ppc.c
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@@ -275,10 +275,9 @@ void ppc970_irq_init(PowerPCCPU *cpu)
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static void power7_set_irq(void *opaque, int pin, int level)
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{
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PowerPCCPU *cpu = opaque;
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- CPUPPCState *env = &cpu->env;
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LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
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- env, pin, level);
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+ &cpu->env, pin, level);
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switch (pin) {
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case POWER7_INPUT_INT:
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@@ -292,11 +291,6 @@ static void power7_set_irq(void *opaque, int pin, int level)
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LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin);
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return;
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}
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- if (level) {
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- env->irq_input_state |= 1 << pin;
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- } else {
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- env->irq_input_state &= ~(1 << pin);
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- }
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}
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void ppcPOWER7_irq_init(PowerPCCPU *cpu)
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@@ -311,10 +305,9 @@ void ppcPOWER7_irq_init(PowerPCCPU *cpu)
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static void power9_set_irq(void *opaque, int pin, int level)
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{
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PowerPCCPU *cpu = opaque;
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- CPUPPCState *env = &cpu->env;
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LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
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- env, pin, level);
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+ &cpu->env, pin, level);
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switch (pin) {
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case POWER9_INPUT_INT:
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@@ -334,11 +327,6 @@ static void power9_set_irq(void *opaque, int pin, int level)
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LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin);
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return;
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}
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- if (level) {
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- env->irq_input_state |= 1 << pin;
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- } else {
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- env->irq_input_state &= ~(1 << pin);
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- }
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}
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void ppcPOWER9_irq_init(PowerPCCPU *cpu)
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diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
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index 5c53801..8887f76 100644
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--- a/target/ppc/cpu.h
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+++ b/target/ppc/cpu.h
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@@ -1090,7 +1090,9 @@ struct CPUPPCState {
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#if !defined(CONFIG_USER_ONLY)
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/*
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* This is the IRQ controller, which is implementation dependent
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- * and only relevant when emulating a complete machine.
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+ * and only relevant when emulating a complete machine. Note that
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+ * this isn't used by recent Book3s compatible CPUs (POWER7 and
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+ * newer).
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*/
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uint32_t irq_input_state;
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void **irq_inputs;
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--
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1.8.3.1
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