qemu-kvm/0029-target-i386-add-compatibility-property-for-pdcm-feat.patch
Miroslav Rezanina f3b86471cd * Wed Oct 22 2025 Miroslav Rezanina <mrezanin@redhat.com> - 10.1.0-1
- Rebase to QEMU 10.1.0
- Resolves: RHEL-117664
  (Rebase qemu-kvm to QEMU 10.1)
2025-10-22 11:10:20 +02:00

107 lines
4.1 KiB
Diff

From 61b2a83e3d0aef9683eed3ada16ef183b027b44d Mon Sep 17 00:00:00 2001
From: Paolo Bonzini <pbonzini@redhat.com>
Date: Thu, 9 Oct 2025 16:47:47 +0200
Subject: [PATCH] target/i386: add compatibility property for pdcm feature
JIRA: https://issues.redhat.com/browse/RHEL-120257
The pdcm feature is supposed to be disabled when PMU is not
available. Up until v10.1, pdcm feature is enabled even when PMU
is off. This behavior has been fixed but this change breaks the
migration of VMs that are run with QEMU < 10.0 and expect the pdcm
feature to be enabled on the destination host.
This commit restores the legacy behavior for machines with version
prior to 10.1 to allow the migration from older QEMU to QEMU 10.1.
Signed-off-by: Hector Cao <hector.cao@canonical.com>
Link: https://lore.kernel.org/r/20250910115733.21149-3-hector.cao@canonical.com
Fixes: e68ec298090 ("i386/cpu: Move adjustment of CPUID_EXT_PDCM before feature_dependencies[] check", 2025-06-20)
[Move property from migration object to CPU. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit 6529f31e0dccadb532c80b36e3efe7aef83f9cad)
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/i386/pc.c | 2 ++
target/i386/cpu.c | 15 ++++++++++++---
target/i386/cpu.h | 6 ++++++
3 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ee8c221505..dc3f140fdc 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -85,6 +85,7 @@ GlobalProperty pc_compat_10_0[] = {
{ TYPE_X86_CPU, "x-consistent-cache", "false" },
{ TYPE_X86_CPU, "x-vendor-cpuid-only-v2", "false" },
{ TYPE_X86_CPU, "x-arch-cap-always-on", "true" },
+ { TYPE_X86_CPU, "x-pdcm-on-even-without-pmu", "true" },
};
const size_t pc_compat_10_0_len = G_N_ELEMENTS(pc_compat_10_0);
@@ -301,6 +302,7 @@ GlobalProperty pc_rhel_9_8_compat[] = {
{ TYPE_X86_CPU, "x-consistent-cache", "false" },
{ TYPE_X86_CPU, "x-vendor-cpuid-only-v2", "false" },
{ TYPE_X86_CPU, "x-arch-cap-always-on", "true" },
+ { TYPE_X86_CPU, "x-pdcm-on-even-without-pmu", "true" },
/* pc_rhel_9_8_compat from pc_compat_9_1 */
{ "ICH9-LPC", "x-smi-swsmi-timer", "off" },
{ "ICH9-LPC", "x-smi-periodic-timer", "off" },
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 9fb70ac344..1c8e0154d1 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -7933,6 +7933,11 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
/* Fixup overflow: max value for bits 23-16 is 255. */
*ebx |= MIN(num, 255) << 16;
}
+ if (cpu->pdcm_on_even_without_pmu) {
+ if (!cpu->enable_pmu) {
+ *ecx &= ~CPUID_EXT_PDCM;
+ }
+ }
break;
case 2: { /* cache info: needed for Pentium Pro compatibility */
const CPUCaches *caches;
@@ -8983,9 +8988,11 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
}
}
- /* PDCM is fixed1 bit for TDX */
- if (!cpu->enable_pmu && !is_tdx_vm()) {
- env->features[FEAT_1_ECX] &= ~CPUID_EXT_PDCM;
+ if (!cpu->pdcm_on_even_without_pmu) {
+ /* PDCM is fixed1 bit for TDX */
+ if (!cpu->enable_pmu && !is_tdx_vm()) {
+ env->features[FEAT_1_ECX] &= ~CPUID_EXT_PDCM;
+ }
}
for (i = 0; i < ARRAY_SIZE(feature_dependencies); i++) {
@@ -10046,6 +10053,8 @@ static const Property x86_cpu_properties[] = {
DEFINE_PROP_BOOL("x-arch-cap-always-on", X86CPU,
arch_cap_always_on, false),
+ DEFINE_PROP_BOOL("x-pdcm-on-even-without-pmu", X86CPU,
+ pdcm_on_even_without_pmu, false),
};
#ifndef CONFIG_USER_ONLY
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index b966bc997c..2187e61654 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2320,6 +2320,12 @@ struct ArchCPU {
*/
bool arch_cap_always_on;
+ /*
+ * Backwards compatibility with QEMU <10.1. The PDCM feature is now disabled when
+ * PMU is not available, but prior to 10.1 it was enabled even if PMU is off.
+ */
+ bool pdcm_on_even_without_pmu;
+
/* Number of physical address bits supported */
uint32_t phys_bits;