From ec6468b65a3af0e2b84575c9f965f61916d0d8ea Mon Sep 17 00:00:00 2001 From: Miroslav Rezanina Date: Fri, 19 Oct 2018 12:53:31 +0200 Subject: Add aarch64 machine types Adding changes to add RHEL machine types for aarch64 architecture. Signed-off-by: Miroslav Rezanina --- Rebase notes (6.1.0): - Use CONFIG_TPM check when using TPM structures - Add support for default_bus_bypass_iommu - ea4c0b32d9 arm/virt: Register highmem and gic-version as class properties - 895e1fa86a hw/arm/virt: Add 8.5 and 9.0 machine types and remove older ones Rebase notes (7.0.0): - Added dtb-kaslr-seed option - Set no_tcg_lpa2 to true Rebase notes (7.1.0 rc0): - replace dtb_kaslr_seed by dtb_randomness Rebase notes (7.1.0 rc3): - Updated dtb_randomness comment Rebase notes (7.2.0 rc0): - Disabled cortex-a35 Rebase notes (8.0.0-rc1): - Moved changed code from target/arm/helper.c to target/arm/arm-qmp-cmds.c Merged patches (6.2.0): - 9a3d4fde0e hw/arm/virt: Remove 9.0 machine type - f7d04d6695 hw: arm: virt: Add hw_compat_rhel_8_5 to 8.5 machine type Merged patches (7.0.0): - 3b82be3dd3 redhat: virt-rhel8.5.0: Update machine type compatibility for QEMU 6.2.0 update - c354a86c9b hw/arm/virt: Register "iommu" as a class property - c1a2630dc9 hw/arm/virt: Register "its" as a class property - 9d8c61dc93 hw/arm/virt: Rename default_bus_bypass_iommu - a1d1b6eeb6 hw/arm/virt: Expose the 'RAS' option - 47f8fe1b82 hw/arm/virt: Add 9.0 machine type and remove 8.5 one - ed2346788f hw/arm/virt: Check no_tcg_its and minor style changes Merged patches (7.0.0): - f79b31bdef hw/arm/virt: Remove the dtb-kaslr-seed machine option - b6fca85f4a hw/arm/virt: Fix missing initialization in instance/class_init() Merged patches (7.1.0 rc0): - ac97dd4f9f RHEL-only: AArch64: Drop unsupported CPU types - e9c0a70664 target/arm: deprecate named CPU models Merged patches (7.2.0 rc0): - 0be2889fa2 Introduce upstream 7.0 compat changes (only applicable parts) Merged patches (8.0.0-rc1): - c1a21266d8 redhat: aarch64: add rhel9.2.0 virt machine type - d97cd7c513 redhat: fix virt-rhel9.2.0 compat props --- hw/arm/virt.c | 251 ++++++++++++++++++++++++++++++++- include/hw/arm/virt.h | 8 ++ target/arm/arm-qmp-cmds.c | 2 + target/arm/cpu-qom.h | 1 + target/arm/cpu.c | 5 + target/arm/cpu.h | 2 + target/arm/cpu64.c | 16 ++- target/arm/cpu_tcg.c | 12 +- tests/qtest/arm-cpu-features.c | 6 + 9 files changed, 289 insertions(+), 14 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 4a6e89c7bc..1ae1654be5 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -81,6 +81,7 @@ #include "hw/char/pl011.h" #include "qemu/guest-random.h" +#if 0 /* Disabled for Red Hat Enterprise Linux */ #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \ static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ void *data) \ @@ -107,7 +108,48 @@ DEFINE_VIRT_MACHINE_LATEST(major, minor, true) #define DEFINE_VIRT_MACHINE(major, minor) \ DEFINE_VIRT_MACHINE_LATEST(major, minor, false) - +#endif /* disabled for RHEL */ + +#define DEFINE_RHEL_MACHINE_LATEST(m, n, s, latest) \ + static void rhel##m##n##s##_virt_class_init(ObjectClass *oc, \ + void *data) \ + { \ + MachineClass *mc = MACHINE_CLASS(oc); \ + rhel##m##n##s##_virt_options(mc); \ + mc->desc = "RHEL " # m "." # n "." # s " ARM Virtual Machine"; \ + if (latest) { \ + mc->alias = "virt"; \ + mc->is_default = 1; \ + } \ + } \ + static const TypeInfo rhel##m##n##s##_machvirt_info = { \ + .name = MACHINE_TYPE_NAME("virt-rhel" # m "." # n "." # s), \ + .parent = TYPE_RHEL_MACHINE, \ + .class_init = rhel##m##n##s##_virt_class_init, \ + }; \ + static void rhel##m##n##s##_machvirt_init(void) \ + { \ + type_register_static(&rhel##m##n##s##_machvirt_info); \ + } \ + type_init(rhel##m##n##s##_machvirt_init); + +#define DEFINE_RHEL_MACHINE_AS_LATEST(major, minor, subminor) \ + DEFINE_RHEL_MACHINE_LATEST(major, minor, subminor, true) +#define DEFINE_RHEL_MACHINE(major, minor, subminor) \ + DEFINE_RHEL_MACHINE_LATEST(major, minor, subminor, false) + +/* This variable is for changes to properties that are RHEL specific, + * different to the current upstream and to be applied to the latest + * machine type. + */ +GlobalProperty arm_rhel_compat[] = { + { + .driver = "virtio-net-pci", + .property = "romfile", + .value = "", + }, +}; +const size_t arm_rhel_compat_len = G_N_ELEMENTS(arm_rhel_compat); /* Number of external interrupt lines to configure the GIC with */ #define NUM_IRQS 256 @@ -204,16 +246,20 @@ static const int a15irqmap[] = { }; static const char *valid_cpus[] = { +#if 0 /* Disabled for Red Hat Enterprise Linux */ ARM_CPU_TYPE_NAME("cortex-a7"), ARM_CPU_TYPE_NAME("cortex-a15"), ARM_CPU_TYPE_NAME("cortex-a35"), ARM_CPU_TYPE_NAME("cortex-a53"), ARM_CPU_TYPE_NAME("cortex-a55"), +#endif /* disabled for RHEL */ ARM_CPU_TYPE_NAME("cortex-a57"), +#if 0 /* Disabled for Red Hat Enterprise Linux */ ARM_CPU_TYPE_NAME("cortex-a72"), ARM_CPU_TYPE_NAME("cortex-a76"), ARM_CPU_TYPE_NAME("a64fx"), ARM_CPU_TYPE_NAME("neoverse-n1"), +#endif /* disabled for RHEL */ ARM_CPU_TYPE_NAME("host"), ARM_CPU_TYPE_NAME("max"), }; @@ -2339,6 +2385,7 @@ static void machvirt_init(MachineState *machine) qemu_add_machine_init_done_notifier(&vms->machine_done); } +#if 0 /* Disabled for Red Hat Enterprise Linux */ static bool virt_get_secure(Object *obj, Error **errp) { VirtMachineState *vms = VIRT_MACHINE(obj); @@ -2366,6 +2413,7 @@ static void virt_set_virt(Object *obj, bool value, Error **errp) vms->virt = value; } +#endif /* disabled for RHEL */ static bool virt_get_highmem(Object *obj, Error **errp) { @@ -2380,7 +2428,7 @@ static void virt_set_highmem(Object *obj, bool value, Error **errp) vms->highmem = value; } - +#if 0 /* Disabled for Red Hat Enterprise Linux */ static bool virt_get_compact_highmem(Object *obj, Error **errp) { VirtMachineState *vms = VIRT_MACHINE(obj); @@ -2436,7 +2484,7 @@ static void virt_set_highmem_mmio(Object *obj, bool value, Error **errp) vms->highmem_mmio = value; } - +#endif /* disabled for RHEL */ static bool virt_get_its(Object *obj, Error **errp) { @@ -2452,6 +2500,7 @@ static void virt_set_its(Object *obj, bool value, Error **errp) vms->its = value; } +#if 0 /* Disabled for Red Hat Enterprise Linux */ static bool virt_get_dtb_randomness(Object *obj, Error **errp) { VirtMachineState *vms = VIRT_MACHINE(obj); @@ -2465,6 +2514,7 @@ static void virt_set_dtb_randomness(Object *obj, bool value, Error **errp) vms->dtb_randomness = value; } +#endif /* disabled for RHEL */ static char *virt_get_oem_id(Object *obj, Error **errp) { @@ -2548,6 +2598,7 @@ static void virt_set_ras(Object *obj, bool value, Error **errp) vms->ras = value; } +#if 0 /* Disabled for Red Hat Enterprise Linux */ static bool virt_get_mte(Object *obj, Error **errp) { VirtMachineState *vms = VIRT_MACHINE(obj); @@ -2561,6 +2612,7 @@ static void virt_set_mte(Object *obj, bool value, Error **errp) vms->mte = value; } +#endif /* disabled for RHEL */ static char *virt_get_gic_version(Object *obj, Error **errp) { @@ -2988,6 +3040,7 @@ static int virt_kvm_type(MachineState *ms, const char *type_str) return fixed_ipa ? 0 : requested_pa_size; } +#if 0 /* Disabled for Red Hat Enterprise Linux */ static void virt_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); @@ -3441,3 +3494,195 @@ static void virt_machine_2_6_options(MachineClass *mc) vmc->no_pmu = true; } DEFINE_VIRT_MACHINE(2, 6) +#endif /* disabled for RHEL */ + +static void rhel_machine_class_init(ObjectClass *oc, void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); + + mc->family = "virt-rhel-Z"; + mc->init = machvirt_init; + /* Maximum supported VCPU count for all virt-rhel* machines */ + mc->max_cpus = 384; +#ifdef CONFIG_TPM + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); +#endif + mc->block_default_type = IF_VIRTIO; + mc->no_cdrom = 1; + mc->pci_allow_0_address = true; + /* We know we will never create a pre-ARMv7 CPU which needs 1K pages */ + mc->minimum_page_bits = 12; + mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids; + mc->cpu_index_to_instance_props = virt_cpu_index_to_props; + mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a57"); + mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; + mc->kvm_type = virt_kvm_type; + assert(!mc->get_hotplug_handler); + mc->get_hotplug_handler = virt_machine_get_hotplug_handler; + hc->pre_plug = virt_machine_device_pre_plug_cb; + hc->plug = virt_machine_device_plug_cb; + hc->unplug_request = virt_machine_device_unplug_request_cb; + hc->unplug = virt_machine_device_unplug_cb; + mc->nvdimm_supported = true; + mc->smp_props.clusters_supported = true; + mc->auto_enable_numa_with_memhp = true; + mc->auto_enable_numa_with_memdev = true; + mc->default_ram_id = "mach-virt.ram"; + + object_class_property_add(oc, "acpi", "OnOffAuto", + virt_get_acpi, virt_set_acpi, + NULL, NULL); + object_class_property_set_description(oc, "acpi", + "Enable ACPI"); + + object_class_property_add_bool(oc, "highmem", virt_get_highmem, + virt_set_highmem); + object_class_property_set_description(oc, "highmem", + "Set on/off to enable/disable using " + "physical address space above 32 bits"); + + object_class_property_add_str(oc, "gic-version", virt_get_gic_version, + virt_set_gic_version); + object_class_property_set_description(oc, "gic-version", + "Set GIC version. " + "Valid values are 2, 3, host and max"); + + object_class_property_add_str(oc, "iommu", virt_get_iommu, virt_set_iommu); + object_class_property_set_description(oc, "iommu", + "Set the IOMMU type. " + "Valid values are none and smmuv3"); + + object_class_property_add_bool(oc, "default-bus-bypass-iommu", + virt_get_default_bus_bypass_iommu, + virt_set_default_bus_bypass_iommu); + object_class_property_set_description(oc, "default-bus-bypass-iommu", + "Set on/off to enable/disable " + "bypass_iommu for default root bus"); + + object_class_property_add_bool(oc, "ras", virt_get_ras, + virt_set_ras); + object_class_property_set_description(oc, "ras", + "Set on/off to enable/disable reporting host memory errors " + "to a KVM guest using ACPI and guest external abort exceptions"); + + object_class_property_add_bool(oc, "its", virt_get_its, + virt_set_its); + object_class_property_set_description(oc, "its", + "Set on/off to enable/disable " + "ITS instantiation"); + + object_class_property_add_str(oc, "x-oem-id", + virt_get_oem_id, + virt_set_oem_id); + object_class_property_set_description(oc, "x-oem-id", + "Override the default value of field OEMID " + "in ACPI table header." + "The string may be up to 6 bytes in size"); + + + object_class_property_add_str(oc, "x-oem-table-id", + virt_get_oem_table_id, + virt_set_oem_table_id); + object_class_property_set_description(oc, "x-oem-table-id", + "Override the default value of field OEM Table ID " + "in ACPI table header." + "The string may be up to 8 bytes in size"); +} + +static void rhel_virt_instance_init(Object *obj) +{ + VirtMachineState *vms = VIRT_MACHINE(obj); + VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); + + /* EL3 is disabled by default and non-configurable for RHEL */ + vms->secure = false; + + /* EL2 is disabled by default and non-configurable for RHEL */ + vms->virt = false; + + /* High memory is enabled by default */ + vms->highmem = true; + vms->highmem_compact = !vmc->no_highmem_compact; + vms->gic_version = VIRT_GIC_VERSION_NOSEL; + + vms->highmem_ecam = !vmc->no_highmem_ecam; + vms->highmem_mmio = true; + vms->highmem_redists = true; + + if (vmc->no_its) { + vms->its = false; + } else { + /* Default allows ITS instantiation */ + vms->its = true; + + if (vmc->no_tcg_its) { + vms->tcg_its = false; + } else { + vms->tcg_its = true; + } + } + + /* Default disallows iommu instantiation */ + vms->iommu = VIRT_IOMMU_NONE; + + /* The default root bus is attached to iommu by default */ + vms->default_bus_bypass_iommu = false; + + /* Default disallows RAS instantiation and is non-configurable for RHEL */ + vms->ras = false; + + /* MTE is disabled by default and non-configurable for RHEL */ + vms->mte = false; + + /* Supply kaslr-seed and rng-seed by default, non-configurable for RHEL */ + vms->dtb_randomness = true; + + vms->irqmap = a15irqmap; + + virt_flash_create(vms); + + vms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); + vms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); +} + +static const TypeInfo rhel_machine_info = { + .name = TYPE_RHEL_MACHINE, + .parent = TYPE_MACHINE, + .abstract = true, + .instance_size = sizeof(VirtMachineState), + .class_size = sizeof(VirtMachineClass), + .class_init = rhel_machine_class_init, + .instance_init = rhel_virt_instance_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_HOTPLUG_HANDLER }, + { } + }, +}; + +static void rhel_machine_init(void) +{ + type_register_static(&rhel_machine_info); +} +type_init(rhel_machine_init); + +static void rhel920_virt_options(MachineClass *mc) +{ + compat_props_add(mc->compat_props, arm_rhel_compat, arm_rhel_compat_len); +} +DEFINE_RHEL_MACHINE_AS_LATEST(9, 2, 0) + +static void rhel900_virt_options(MachineClass *mc) +{ + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + + rhel920_virt_options(mc); + + compat_props_add(mc->compat_props, hw_compat_rhel_9_1, hw_compat_rhel_9_1_len); + + /* Disable FEAT_LPA2 since old kernels (<= v5.12) don't boot with that feature */ + vmc->no_tcg_lpa2 = true; + /* Compact layout for high memory regions was introduced with 9.2.0 */ + vmc->no_highmem_compact = true; +} +DEFINE_RHEL_MACHINE(9, 0, 0) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index e1ddbea96b..81c2363a40 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -187,9 +187,17 @@ struct VirtMachineState { #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) +#if 0 /* disabled for Red Hat Enterprise Linux */ #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE) +#else +#define TYPE_RHEL_MACHINE MACHINE_TYPE_NAME("virt-rhel") +typedef struct VirtMachineClass VirtMachineClass; +typedef struct VirtMachineState VirtMachineState; +DECLARE_OBJ_CHECKERS(VirtMachineState, VirtMachineClass, VIRT_MACHINE, TYPE_RHEL_MACHINE) +#endif + void virt_acpi_setup(VirtMachineState *vms); bool virt_is_acpi_enabled(VirtMachineState *vms); diff --git a/target/arm/arm-qmp-cmds.c b/target/arm/arm-qmp-cmds.c index c8fa524002..3aa089abf3 100644 --- a/target/arm/arm-qmp-cmds.c +++ b/target/arm/arm-qmp-cmds.c @@ -231,6 +231,7 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, static void arm_cpu_add_definition(gpointer data, gpointer user_data) { ObjectClass *oc = data; + CPUClass *cc = CPU_CLASS(oc); CpuDefinitionInfoList **cpu_list = user_data; CpuDefinitionInfo *info; const char *typename; @@ -240,6 +241,7 @@ static void arm_cpu_add_definition(gpointer data, gpointer user_data) info->name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_ARM_CPU)); info->q_typename = g_strdup(typename); + info->deprecated = !!cc->deprecation_note; QAPI_LIST_PREPEND(*cpu_list, info); } diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h index 514c22ced9..f789173451 100644 --- a/target/arm/cpu-qom.h +++ b/target/arm/cpu-qom.h @@ -35,6 +35,7 @@ typedef struct ARMCPUInfo { const char *name; void (*initfn)(Object *obj); void (*class_init)(ObjectClass *oc, void *data); + const char *deprecation_note; } ARMCPUInfo; void arm_cpu_register(const ARMCPUInfo *info); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 5182ed0c91..6740a8b940 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2290,8 +2290,13 @@ static void arm_cpu_instance_init(Object *obj) static void cpu_register_class_init(ObjectClass *oc, void *data) { ARMCPUClass *acc = ARM_CPU_CLASS(oc); + CPUClass *cc = CPU_CLASS(oc); acc->info = data; + + if (acc->info->deprecation_note) { + cc->deprecation_note = acc->info->deprecation_note; + } } void arm_cpu_register(const ARMCPUInfo *info) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c097cae988..829d4a2328 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -34,6 +34,8 @@ #define KVM_HAVE_MCE_INJECTION 1 #endif +#define RHEL_CPU_DEPRECATION "use 'host' / 'max'" + #define EXCP_UDEF 1 /* undefined instruction */ #define EXCP_SWI 2 /* software interrupt */ #define EXCP_PREFETCH_ABORT 3 diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 0fb07cc7b6..47459627fb 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -31,6 +31,7 @@ #include "hw/qdev-properties.h" #include "internals.h" +#if 0 /* Disabled for Red Hat Enterprise Linux */ static void aarch64_a35_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -110,6 +111,7 @@ static void aarch64_a35_initfn(Object *obj) /* These values are the same with A53/A57/A72. */ define_cortex_a72_a57_a53_cp_reginfo(cpu); } +#endif /* disabled for RHEL */ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) { @@ -730,6 +732,7 @@ static void aarch64_a57_initfn(Object *obj) define_cortex_a72_a57_a53_cp_reginfo(cpu); } +#if 0 /* Disabled for Red Hat Enterprise Linux */ static void aarch64_a53_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -1164,6 +1167,7 @@ static void aarch64_neoverse_n1_initfn(Object *obj) define_neoverse_n1_cp_reginfo(cpu); } +#endif /* disabled for RHEL */ static void aarch64_host_initfn(Object *obj) { @@ -1373,14 +1377,19 @@ static void aarch64_max_initfn(Object *obj) } static const ARMCPUInfo aarch64_cpus[] = { +#if 0 /* Disabled for Red Hat Enterprise Linux */ { .name = "cortex-a35", .initfn = aarch64_a35_initfn }, - { .name = "cortex-a57", .initfn = aarch64_a57_initfn }, +#endif /* disabled for RHEL */ + { .name = "cortex-a57", .initfn = aarch64_a57_initfn, + .deprecation_note = RHEL_CPU_DEPRECATION }, +#if 0 /* Disabled for Red Hat Enterprise Linux */ { .name = "cortex-a53", .initfn = aarch64_a53_initfn }, { .name = "cortex-a55", .initfn = aarch64_a55_initfn }, { .name = "cortex-a72", .initfn = aarch64_a72_initfn }, { .name = "cortex-a76", .initfn = aarch64_a76_initfn }, { .name = "a64fx", .initfn = aarch64_a64fx_initfn }, { .name = "neoverse-n1", .initfn = aarch64_neoverse_n1_initfn }, +#endif /* disabled for RHEL */ { .name = "max", .initfn = aarch64_max_initfn }, #if defined(CONFIG_KVM) || defined(CONFIG_HVF) { .name = "host", .initfn = aarch64_host_initfn }, @@ -1452,8 +1461,13 @@ static void aarch64_cpu_instance_init(Object *obj) static void cpu_register_class_init(ObjectClass *oc, void *data) { ARMCPUClass *acc = ARM_CPU_CLASS(oc); + CPUClass *cc = CPU_CLASS(oc); acc->info = data; + + if (acc->info->deprecation_note) { + cc->deprecation_note = acc->info->deprecation_note; + } } void aarch64_cpu_register(const ARMCPUInfo *info) diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c index c154a4dcf2..f29425b656 100644 --- a/target/arm/cpu_tcg.c +++ b/target/arm/cpu_tcg.c @@ -152,10 +152,10 @@ void define_cortex_a72_a57_a53_cp_reginfo(ARMCPU *cpu) } #endif /* !CONFIG_USER_ONLY */ +#if 0 /* Disabled for Red Hat Enterprise Linux */ /* CPU models. These are not needed for the AArch64 linux-user build. */ #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) -#if 0 /* Disabled for Red Hat Enterprise Linux */ #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { @@ -509,7 +509,6 @@ static void cortex_a9_initfn(Object *obj) cpu->isar.reset_pmcr_el0 = 0x41093000; define_arm_cp_regs(cpu, cortexa9_cp_reginfo); } -#endif /* disabled for RHEL */ #ifndef CONFIG_USER_ONLY static uint64_t a15_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri) @@ -534,7 +533,6 @@ static const ARMCPRegInfo cortexa15_cp_reginfo[] = { .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, }; -#if 0 /* Disabled for Red Hat Enterprise Linux */ static void cortex_a7_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -583,7 +581,6 @@ static void cortex_a7_initfn(Object *obj) cpu->isar.reset_pmcr_el0 = 0x41072000; define_arm_cp_regs(cpu, cortexa15_cp_reginfo); /* Same as A15 */ } -#endif /* disabled for RHEL */ static void cortex_a15_initfn(Object *obj) { @@ -632,7 +629,6 @@ static void cortex_a15_initfn(Object *obj) define_arm_cp_regs(cpu, cortexa15_cp_reginfo); } -#if 0 /* Disabled for Red Hat Enterprise Linux */ static void cortex_m0_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -1115,7 +1111,6 @@ static void arm_v7m_class_init(ObjectClass *oc, void *data) cc->gdb_core_xml_file = "arm-m-profile.xml"; } -#endif /* disabled for RHEL */ #ifndef TARGET_AARCH64 /* @@ -1183,7 +1178,6 @@ static void arm_max_initfn(Object *obj) #endif /* !TARGET_AARCH64 */ static const ARMCPUInfo arm_tcg_cpus[] = { -#if 0 /* Disabled for Red Hat Enterprise Linux */ { .name = "arm926", .initfn = arm926_initfn }, { .name = "arm946", .initfn = arm946_initfn }, { .name = "arm1026", .initfn = arm1026_initfn }, @@ -1199,9 +1193,7 @@ static const ARMCPUInfo arm_tcg_cpus[] = { { .name = "cortex-a7", .initfn = cortex_a7_initfn }, { .name = "cortex-a8", .initfn = cortex_a8_initfn }, { .name = "cortex-a9", .initfn = cortex_a9_initfn }, -#endif /* disabled for RHEL */ { .name = "cortex-a15", .initfn = cortex_a15_initfn }, -#if 0 /* Disabled for Red Hat Enterprise Linux */ { .name = "cortex-m0", .initfn = cortex_m0_initfn, .class_init = arm_v7m_class_init }, { .name = "cortex-m3", .initfn = cortex_m3_initfn, @@ -1233,7 +1225,6 @@ static const ARMCPUInfo arm_tcg_cpus[] = { { .name = "pxa270-b1", .initfn = pxa270b1_initfn }, { .name = "pxa270-c0", .initfn = pxa270c0_initfn }, { .name = "pxa270-c5", .initfn = pxa270c5_initfn }, -#endif /* disabled for RHEL */ #ifndef TARGET_AARCH64 { .name = "max", .initfn = arm_max_initfn }, #endif @@ -1261,3 +1252,4 @@ static void arm_tcg_cpu_register_types(void) type_init(arm_tcg_cpu_register_types) #endif /* !CONFIG_USER_ONLY || !TARGET_AARCH64 */ +#endif /* disabled for RHEL */ diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c index 1cb08138ad..834497dfec 100644 --- a/tests/qtest/arm-cpu-features.c +++ b/tests/qtest/arm-cpu-features.c @@ -441,8 +441,10 @@ static void test_query_cpu_model_expansion(const void *data) assert_error(qts, "host", "The CPU type 'host' requires KVM", NULL); /* Test expected feature presence/absence for some cpu types */ +#if 0 /* Disabled for Red Hat Enterprise Linux */ assert_has_feature_enabled(qts, "cortex-a15", "pmu"); assert_has_not_feature(qts, "cortex-a15", "aarch64"); +#endif /* disabled for RHEL */ /* Enabling and disabling pmu should always work. */ assert_has_feature_enabled(qts, "max", "pmu"); @@ -459,6 +461,7 @@ static void test_query_cpu_model_expansion(const void *data) assert_has_feature_enabled(qts, "cortex-a57", "pmu"); assert_has_feature_enabled(qts, "cortex-a57", "aarch64"); +#if 0 /* Disabled for Red Hat Enterprise Linux */ assert_has_feature_enabled(qts, "a64fx", "pmu"); assert_has_feature_enabled(qts, "a64fx", "aarch64"); /* @@ -471,6 +474,7 @@ static void test_query_cpu_model_expansion(const void *data) "{ 'sve384': true }"); assert_error(qts, "a64fx", "cannot enable sve640", "{ 'sve640': true }"); +#endif /* disabled for RHEL */ sve_tests_default(qts, "max"); pauth_tests_default(qts, "max"); @@ -506,9 +510,11 @@ static void test_query_cpu_model_expansion_kvm(const void *data) QDict *resp; char *error; +#if 0 /* Disabled for Red Hat Enterprise Linux */ assert_error(qts, "cortex-a15", "We cannot guarantee the CPU type 'cortex-a15' works " "with KVM on this host", NULL); +#endif /* disabled for RHEL */ assert_has_feature_enabled(qts, "host", "aarch64"); -- 2.39.1