diff --git a/0004-Initial-redhat-build.patch b/0001-Initial-redhat-build.patch similarity index 64% rename from 0004-Initial-redhat-build.patch rename to 0001-Initial-redhat-build.patch index b2d2860..bb8ebba 100644 --- a/0004-Initial-redhat-build.patch +++ b/0001-Initial-redhat-build.patch @@ -1,7 +1,7 @@ -From 8a5eef9fcb74b2fa82ac6122caf3c3d38a26b195 Mon Sep 17 00:00:00 2001 +From 67dd7ae821a4fba377f2240d4930b96df012b840 Mon Sep 17 00:00:00 2001 From: Miroslav Rezanina Date: Wed, 26 May 2021 10:56:02 +0200 -Subject: Initial redhat build +Subject: [PATCH] Initial redhat build This patch introduces redhat build structure in redhat subdirectory. In addition, several issues are fixed in QEMU tree: @@ -16,65 +16,13 @@ We disable make check due to issues with some of the tests. We are rebasing from qemu-kvm-10.0.0-12.el10. Signed-off-by: Miroslav Rezanina - --- -Rebase notes (9.1.0): -- Remove --disable-block-migration and --disable-pvrdma configure options (upstream) -- Removed --disable-avx512f configure option -- Removed qemu-vsmr-helper (changed upstream) - -Rebase notes (10.0.0): -- Split --disable-sanitazers configure option (upstream change) -- Removed s390x-netboot.img (upstream) -- accel-tcg module no longer built (upstream) -- Removed new upstream npcm8xx board rom -- Not package hw-uefi-vars.so -- Not package pnv-pnor.bin on build -- Include riscv support - -Rebase notes (10.1.0 rc0): -- Remove avocado tests installation (removed upstream) -- dtb files installed in special directory (upstream change) -- Remove ast27x0_bootrom.bin -- Removed --disable-avx* configure options -- Removed 32bit archs conditionals -- Conditional qemu-kvm-block-rbd requirement -- Flip ipxe roms and seavgabios arch condition - -Merged patches (9.1.0): -- b206b8f7cb redhat: Remove the s390-netboot.img from the spec file -- 95605107f1 Require new dtrace package - -Merged patches (10.0.0): -- 07c8c9b9ff qemu-guest-agent: Update the logfile path of qga-fsfreeze-hook.log -- 1f54babd2a Recommend systemtap-client from qemu-tools -- 3e4d2a0fb8 Also recommend systemtap-devel from qemu-tools - -Merged patches (10.1.0 rc0): -- 72119e03ea distro: add an explicit valgrind-devel build dep ---- - .distro/Makefile | 101 ++ - .distro/Makefile.common | 42 + - .distro/README.tests | 39 + - .distro/modules-load.conf | 4 + - .distro/qemu-guest-agent.service | 1 - - .distro/qemu-kvm.spec.template | 1795 +++++++++++++++++++++++ - .distro/rpminspect.yaml | 6 +- - .distro/scripts/extract_build_cmd.py | 12 + - .distro/scripts/frh.py | 4 +- - .distro/scripts/process-patches.sh | 6 +- - .gitignore | 1 + - README.systemtap | 43 + - scripts/qemu-guest-agent/fsfreeze-hook | 4 +- - scripts/systemtap/conf.d/qemu_kvm.conf | 4 + - scripts/systemtap/script.d/qemu_kvm.stp | 1 + - ui/vnc-auth-sasl.c | 2 +- - 16 files changed, 2057 insertions(+), 8 deletions(-) - create mode 100644 .distro/Makefile - create mode 100644 .distro/Makefile.common - create mode 100644 .distro/README.tests - create mode 100644 .distro/modules-load.conf - create mode 100644 .distro/qemu-kvm.spec.template + README.systemtap | 43 +++++++++++++++++++++++++ + scripts/qemu-guest-agent/fsfreeze-hook | 4 +-- + scripts/systemtap/conf.d/qemu_kvm.conf | 4 +++ + scripts/systemtap/script.d/qemu_kvm.stp | 1 + + ui/vnc-auth-sasl.c | 2 +- + 5 files changed, 51 insertions(+), 3 deletions(-) create mode 100644 README.systemtap create mode 100644 scripts/systemtap/conf.d/qemu_kvm.conf create mode 100644 scripts/systemtap/script.d/qemu_kvm.stp @@ -173,6 +121,3 @@ index 3f4cfc471d..09dafba18d 100644 if (saslErr != SASL_OK) { error_setg(errp, "Failed to initialize SASL auth: %s", --- -2.39.3 - diff --git a/0005-Enable-disable-devices-for-RHEL.patch b/0002-Enable-disable-devices-for-RHEL.patch similarity index 93% rename from 0005-Enable-disable-devices-for-RHEL.patch rename to 0002-Enable-disable-devices-for-RHEL.patch index 222f261..8542b4b 100644 --- a/0005-Enable-disable-devices-for-RHEL.patch +++ b/0002-Enable-disable-devices-for-RHEL.patch @@ -1,60 +1,12 @@ -From 03cf16ca98c4ed835c4da8c4424bfac5a9ae3aa6 Mon Sep 17 00:00:00 2001 +From f9d8a760501e0cf4147a7d9bcf59c765745fbbe3 Mon Sep 17 00:00:00 2001 From: Miroslav Rezanina Date: Wed, 7 Dec 2022 03:05:48 -0500 -Subject: Enable/disable devices for RHEL +Subject: [PATCH] Enable/disable devices for RHEL This commit adds all changes related to changes in supported devices. Signed-off-by: Miroslav Rezanina - --- -Rebase notes (9.1.0): -- Return value added for kvm_s390_apply_cpu_model -- Added new USB_HID and USB_HUB options -- Fixing valid_cpu_types preprocessing -- Moved x86 cpu deprecation from x86 machine type patch -- Removed unnecessary chunk in cirrus_vga.c -- Not needed hack removal of cpu-v7m.c from build -- Remove ppc64 device configuration -- Remove unnecessary chunks -- Removed CONFIG_VHOST_USER_SCMI and CONFIG_VHOST_USER_SND from some archs - -Rebase notes (10.0.0): -- Added CONFIG_PCI_BRIDGE for aarch64 and x86_64 (new upstream) -- Do not add deprecation_note member as it was added upstream (target/arm/cpu.h) -- Rename CONFIG_ARM_GICV3_TCG to CONFIG_ARM_GICV3 -- Remove deprecated line change for code commented out -- Do not change minimal revision for piix4 -- Remove YongFeng vcpu -- Add rebase devices changes -- Enable virtio-mem on s390x - -Rebase notes (10.1.0 rc0): -- Improved riscv cpu chunk re-added -- Comment out unused code - -Merged commits (9.1.0): -- f24c7a1fee Disable FDC devices -- fe8c6cb1ce Disable vga-cirrus device -- fccd117a12 Enable vhost-user-snd-pci device -- c0b40cc648 target/cpu-models/x86: Remove the existing deprecated CPU models on c10s -- ce42b3da0e x86/cpu: deprecate cpu models that do not support x86-64-v3 -- 01ffa96c3b target/s390x/cpu_models: Disable everything up to the z12 CPU model -- cd57d17e3c target/s390x: Revert the old s390x CPU model disablement code -- 42af7b3ad5 Enable vhost-user-scmi devices -- aa374ce5ea x86/cpu: update deprecation string to match lowest undeprecated model - -Merged commits (10.1.0 rc0): -- 312cdc116e Enable vhost-user-gpu-pci for RHIVOS -- be460986c1 Enable amd-iommu device - -Merged commits (10.1.0 rc2): -- 6306605028 Declare rtl8139 as deprecated - -Merged commits (10.1.0 rc3): -- f06f55a179 Enable uefi variable service for edk2 ---- - .distro/qemu-kvm.spec.template | 20 +-- .../aarch64-softmmu/aarch64-rh-devices.mak | 49 ++++++++ configs/devices/rh-virtio.mak | 10 ++ .../riscv64-softmmu/riscv64-rh-devices.mak | 39 ++++++ @@ -78,7 +30,7 @@ Merged commits (10.1.0 rc3): target/riscv/cpu.c | 6 + target/s390x/cpu_models.c | 2 +- tests/qtest/arm-cpu-features.c | 4 + - 24 files changed, 323 insertions(+), 16 deletions(-) + 23 files changed, 311 insertions(+), 8 deletions(-) create mode 100644 configs/devices/aarch64-softmmu/aarch64-rh-devices.mak create mode 100644 configs/devices/rh-virtio.mak create mode 100644 configs/devices/riscv64-softmmu/riscv64-rh-devices.mak @@ -893,6 +845,3 @@ index eb8ddebffb..2d3304bb4a 100644 sve_tests_default(qts, "max"); pauth_tests_default(qts, "max"); --- -2.39.3 - diff --git a/0006-Machine-type-related-general-changes.patch b/0003-Machine-type-related-general-changes.patch similarity index 95% rename from 0006-Machine-type-related-general-changes.patch rename to 0003-Machine-type-related-general-changes.patch index 310fcfc..4d50454 100644 --- a/0006-Machine-type-related-general-changes.patch +++ b/0003-Machine-type-related-general-changes.patch @@ -1,39 +1,13 @@ -From dcaeeab5909a41372c9445e9f97282e8dd3d1d44 Mon Sep 17 00:00:00 2001 +From 2a4e74aaa600b6acbab1fa25637f1bc10ca789ed Mon Sep 17 00:00:00 2001 From: Miroslav Rezanina Date: Fri, 11 Jan 2019 09:54:45 +0100 -Subject: Machine type related general changes +Subject: [PATCH] Machine type related general changes This patch is first part of original "Add RHEL machine types" patch we split to allow easier review. It contains changes not related to any architecture. Signed-off-by: Miroslav Rezanina - ---- -Rebase notes (9.1.0): -- Upstream removed uuid_encoced argument on smbios_set_defaults - -Rebase notes (10.0.0 rc0): -- Solve conflicting xhci_pci_properties (downstream vs upstream) - -Rebase notes (10.0.0): -- Add riscv changes -- Added upstream compat changes - -Rebase notes (10.1.0 rc2): -- Remove downstream change to i8254 (review comment) - -Rebase notes (10.1.0): -- Added upstream compat changes from 10.1 - -Merged commits (9.1.0): -- 043ad5ce97 Add upstream compatibility bits (partial) -- bfbdab5824 rhel 9.4.0 machine type compat for virtio-gpu migration - -Merged commits (10.0.0 rc0): -- 03502faf70 Add upstream compatibility bits (partial) -- f53dbf7532 remove stale compat definitions (partial) -- d93fcb3940 virtio-net: disable USO for all RHEL9 (partial) --- hw/acpi/piix4.c | 2 +- hw/arm/virt.c | 2 +- @@ -554,6 +528,3 @@ index 79b72c54dd..3b4ea24c20 100644 /* RAM / address space compat: */ bool gigabyte_align; --- -2.39.3 - diff --git a/0007-meson-temporarily-disable-Wunused-function.patch b/0004-meson-temporarily-disable-Wunused-function.patch similarity index 87% rename from 0007-meson-temporarily-disable-Wunused-function.patch rename to 0004-meson-temporarily-disable-Wunused-function.patch index c0313b5..7b03f01 100644 --- a/0007-meson-temporarily-disable-Wunused-function.patch +++ b/0004-meson-temporarily-disable-Wunused-function.patch @@ -1,7 +1,7 @@ -From 7eff7b32584a50d73053b4e3e007621b14ebf766 Mon Sep 17 00:00:00 2001 +From a55eca67d3d95bf1db0e82ba1eaca5006419a9c4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Date: Wed, 3 Jul 2024 13:32:32 +0100 -Subject: meson: temporarily disable -Wunused-function +Subject: [PATCH] meson: temporarily disable -Wunused-function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -31,6 +31,3 @@ index 50c774a195..0e0120a613 100644 ] if host_os != 'darwin' --- -2.39.3 - diff --git a/0008-Remove-upstream-machine-types-for-aarch64-s390x-and-.patch b/0005-Remove-upstream-machine-types-for-aarch64-s390x-and-.patch similarity index 95% rename from 0008-Remove-upstream-machine-types-for-aarch64-s390x-and-.patch rename to 0005-Remove-upstream-machine-types-for-aarch64-s390x-and-.patch index 86d7669..9986ec3 100644 --- a/0008-Remove-upstream-machine-types-for-aarch64-s390x-and-.patch +++ b/0005-Remove-upstream-machine-types-for-aarch64-s390x-and-.patch @@ -1,7 +1,7 @@ -From fca16c8b4612edfa63d7882379897a9907dde738 Mon Sep 17 00:00:00 2001 +From 8bb638561d3ad36be896d7648385d4fdb7bef0df Mon Sep 17 00:00:00 2001 From: Miroslav Rezanina Date: Wed, 10 Jul 2024 02:25:51 -0400 -Subject: Remove upstream machine types for aarch64, s390x and x86_64 +Subject: [PATCH] Remove upstream machine types for aarch64, s390x and x86_64 architectures MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -97,6 +97,3 @@ index a79bd13275..2fca2bcf4d 100644 static void ccw_machine_register_types(void) { type_register_static(&ccw_machine_info); --- -2.39.3 - diff --git a/0009-Adapt-versioned-machine-type-macros-for-RHEL.patch b/0006-Adapt-versioned-machine-type-macros-for-RHEL.patch similarity index 92% rename from 0009-Adapt-versioned-machine-type-macros-for-RHEL.patch rename to 0006-Adapt-versioned-machine-type-macros-for-RHEL.patch index f0ccb30..ebc0fbb 100644 --- a/0009-Adapt-versioned-machine-type-macros-for-RHEL.patch +++ b/0006-Adapt-versioned-machine-type-macros-for-RHEL.patch @@ -1,7 +1,7 @@ -From 0bc1a45f789d1aa6b75496739a77dbc77fc2492c Mon Sep 17 00:00:00 2001 +From 840ad52f0446382a948c97456ba94db17241c2de Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Date: Wed, 3 Jul 2024 15:27:03 +0100 -Subject: Adapt versioned machine type macros for RHEL +Subject: [PATCH] Adapt versioned machine type macros for RHEL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -20,19 +20,12 @@ The versioned machine type macros are changed thus: Signed-off-by: Daniel P. Berrangé Signed-off-by: Miroslav Rezanina --- -Rebase changes (10.1.0 rc0): -- Added deprecetion limits change to docs/conf.py ---- - .distro/Makefile | 2 +- - .distro/Makefile.common | 1 + - .distro/qemu-kvm.spec.template | 1 + - .distro/scripts/process-patches.sh | 3 +++ - docs/conf.py | 4 +-- - include/hw/boards.h | 39 ++++++++++++------------------ - meson.build | 1 + - meson_options.txt | 2 ++ - scripts/meson-buildoptions.sh | 2 ++ - 9 files changed, 29 insertions(+), 26 deletions(-) + docs/conf.py | 4 ++-- + include/hw/boards.h | 39 ++++++++++++++--------------------- + meson.build | 1 + + meson_options.txt | 2 ++ + scripts/meson-buildoptions.sh | 2 ++ + 5 files changed, 23 insertions(+), 25 deletions(-) diff --git a/docs/conf.py b/docs/conf.py index f892a6e1da..0b8861e4bf 100644 @@ -190,6 +183,3 @@ index 0ebe6bc52a..4146dbc88d 100644 --enable-rng-none) printf "%s" -Drng_none=true ;; --disable-rng-none) printf "%s" -Drng_none=false ;; --rtsig-map=*) quote_sh "-Drtsig_map=$2" ;; --- -2.39.3 - diff --git a/0010-Increase-deletion-schedule-to-4-releases.patch b/0007-Increase-deletion-schedule-to-4-releases.patch similarity index 88% rename from 0010-Increase-deletion-schedule-to-4-releases.patch rename to 0007-Increase-deletion-schedule-to-4-releases.patch index 51b1741..69590ea 100644 --- a/0010-Increase-deletion-schedule-to-4-releases.patch +++ b/0007-Increase-deletion-schedule-to-4-releases.patch @@ -1,7 +1,7 @@ -From 7c4955a929940701a7613fe3db516adbcc97576b Mon Sep 17 00:00:00 2001 +From 3d48892605114ddc144dca5b2f34e1ea5a7f1cb1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Date: Wed, 3 Jul 2024 18:45:58 +0100 -Subject: Increase deletion schedule to 4 releases +Subject: [PATCH] Increase deletion schedule to 4 releases MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -32,6 +32,3 @@ index da2fc92ce8..aca254ea18 100644 #define MACHINE_VER_DEPRECATION_MAJOR 1 /* --- -2.39.3 - diff --git a/0011-Add-downstream-aarch64-versioned-virt-machine-types.patch b/0008-Add-downstream-aarch64-versioned-virt-machine-types.patch similarity index 93% rename from 0011-Add-downstream-aarch64-versioned-virt-machine-types.patch rename to 0008-Add-downstream-aarch64-versioned-virt-machine-types.patch index ce712b7..a6404e1 100644 --- a/0011-Add-downstream-aarch64-versioned-virt-machine-types.patch +++ b/0008-Add-downstream-aarch64-versioned-virt-machine-types.patch @@ -1,39 +1,11 @@ -From 59b7559dfa658e325e8c1e23f13f48cf6952ac2e Mon Sep 17 00:00:00 2001 +From 48f8e990ce9175426e1d2c33c3ef64cbb06300ed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Date: Wed, 3 Jul 2024 13:25:47 +0100 -Subject: Add downstream aarch64 versioned 'virt' machine types +Subject: [PATCH] Add downstream aarch64 versioned 'virt' machine types Adding changes to add RHEL machine types for aarch64 architecture. Signed-off-by: Miroslav Rezanina ---- -Rebase notes (9.1.0): -- Merge copy+pasted base machine definition back with upstream - base machine definition to reduce RHEL delta, as is done with - other targets -- Convert to new DEFINE_VIRT_MACHINE macros -- do not remove cpu validation (review comment) -- use ifdef instead of removal for disabling unwanted upstream code - -Rebase notes (10.0.0) -- Removed unwanted sysbus dev -- Set no_nested_smmu -- Use upstream compat - -Rebase notes (10.1.0): -- Use rebase compat - -Merged patches (9.1.0): -- 043ad5ce97 Add upstream compatibility bits (partial) - -Merged patches (10.0.0 rc0): -- 03502faf70 Add upstream compatibility bits -- 17c3bccf2f arm: ensure compatibility of virt-rhel9* -- 12e5b038be arm: create new virt machine type for rhel 9.6 -- fb1bc2766e arm: create virt machine type for rhel10 -- 727307e5ed hw/arm/virt: Fix Manufacturer and Product Name in emulated SMBIOS mode -- d93fcb3940 virtio-net: disable USO for all RHEL9 (partial) -- 0440f3d003 arm: disable pauth for virt-rhel9* in RHEL10 --- hw/arm/virt.c | 154 +++++++++++++++++++++++++++++++++++++----- include/hw/arm/virt.h | 1 + @@ -394,6 +366,3 @@ index 365a28b082..94c79d6c6d 100644 }; struct VirtMachineState { --- -2.39.3 - diff --git a/0012-Add-downstream-s390x-versioned-s390-ccw-virtio-machi.patch b/0009-Add-downstream-s390x-versioned-s390-ccw-virtio-machi.patch similarity index 98% rename from 0012-Add-downstream-s390x-versioned-s390-ccw-virtio-machi.patch rename to 0009-Add-downstream-s390x-versioned-s390-ccw-virtio-machi.patch index 1f3a1b0..6942af7 100644 --- a/0012-Add-downstream-s390x-versioned-s390-ccw-virtio-machi.patch +++ b/0009-Add-downstream-s390x-versioned-s390-ccw-virtio-machi.patch @@ -1,7 +1,8 @@ -From 0976e78ca34a38fbc21c71c2f05e884c0264b62e Mon Sep 17 00:00:00 2001 +From d944ff2722e07a8829b918ec1e414fd7a1421ca1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Date: Wed, 3 Jul 2024 13:44:36 +0100 -Subject: Add downstream s390x versioned 's390-ccw-virtio' machine types +Subject: [PATCH] Add downstream s390x versioned 's390-ccw-virtio' machine + types Adding changes to add RHEL machine types for s390x architecture. @@ -257,6 +258,3 @@ index 5b84604867..d715bdc870 100644 /* check for unavailable features */ if (cpu_list_data->model) { Object *obj; --- -2.39.3 - diff --git a/0013-Add-downstream-x86_64-versioned-pc-q35-machine-types.patch b/0010-Add-downstream-x86_64-versioned-pc-q35-machine-types.patch similarity index 94% rename from 0013-Add-downstream-x86_64-versioned-pc-q35-machine-types.patch rename to 0010-Add-downstream-x86_64-versioned-pc-q35-machine-types.patch index 3e1945f..9ce6c02 100644 --- a/0013-Add-downstream-x86_64-versioned-pc-q35-machine-types.patch +++ b/0010-Add-downstream-x86_64-versioned-pc-q35-machine-types.patch @@ -1,40 +1,11 @@ -From f7424ca0a529f1f3a76a4044b535d1ecd7b5b114 Mon Sep 17 00:00:00 2001 +From a4d11d87c642d697cdacf5eaf5cd6a6d2a0bbe0e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Date: Wed, 3 Jul 2024 13:44:41 +0100 -Subject: Add downstream x86_64 versioned 'pc' & 'q35' machine types +Subject: [PATCH] Add downstream x86_64 versioned 'pc' & 'q35' machine types Adding changes to add RHEL machine types for x86_64 architecture. Signed-off-by: Miroslav Rezanina ---- -Rebase notes (9.1.0): -- Merged pc_q35_machine_rhel_options back into - pc_q35_machine_options to reduce delta to upstream -- Convert to new DEFINE_(I440FX|Q35)_MACHINE macros -- Moved x86 cpu deprecation note to device disable patch - -Rebase notes (10.0.0 rc0): -- Do not use bugfix macro for q35 -- Use upstream compat -- Add downstream specific compat -- Fixing rhel-9.4 compat issue - -Rebase notes (10.1.0): -- Use rebase compat - -Merged patches (9.1.0): -- 043ad5ce97 Add upstream compatibility bits (partial) - -Merged patches (10.0.0 rc0): -- 03502faf70 Add upstream compatibility bits -- 6be70c681b x86: ensure compatibility of pc-q35-rhel9* -- d6b6ae511c x86: create new pc-q35 machine type for rhel 9.6 -- fcf4da60bd x86: create pc-i440fx machine type for rhel10 -- 4acb295fa2 x86: create pc-q35 machine type for rhel10 -- 0489497df8 x86: remove deprecated rhel machine types -- f53dbf7532 remove stale compat definitions (partial) -- 379e14ba88 pc: q35: Bump max_cpus to 4096 vcpus -- d93fcb3940 virtio-net: disable USO for all RHEL9 (partial) --- hw/i386/fw_cfg.c | 2 +- hw/i386/pc.c | 70 ++++++++++++++++++++- @@ -512,6 +483,3 @@ index 5606baf47b..094c56b0cd 100644 val = qtest_inb(qts, 0x505); g_assert_cmpuint(val, ==, PVPANIC_EVENTS); --- -2.39.3 - diff --git a/0014-Disable-virtio-net-pci-romfile-loading-on-riscv64.patch b/0011-Disable-virtio-net-pci-romfile-loading-on-riscv64.patch similarity index 93% rename from 0014-Disable-virtio-net-pci-romfile-loading-on-riscv64.patch rename to 0011-Disable-virtio-net-pci-romfile-loading-on-riscv64.patch index 21b840f..02ea0e7 100644 --- a/0014-Disable-virtio-net-pci-romfile-loading-on-riscv64.patch +++ b/0011-Disable-virtio-net-pci-romfile-loading-on-riscv64.patch @@ -1,7 +1,7 @@ -From 7bc17dffbc537e8546249c7c2d19e426ad50e61f Mon Sep 17 00:00:00 2001 +From 6eb636192635d165336534dbbe312145958df5a6 Mon Sep 17 00:00:00 2001 From: Andrea Bolognani Date: Tue, 10 Jun 2025 14:27:29 +0200 -Subject: Disable virtio-net-pci romfile loading on riscv64 +Subject: [PATCH] Disable virtio-net-pci romfile loading on riscv64 RH-Author: Andrea Bolognani RH-MergeRequest: 373: Various small fixes @@ -53,6 +53,3 @@ index ab5a9ec613..3b187d6c98 100644 } static const TypeInfo virt_machine_typeinfo = { --- -2.39.3 - diff --git a/0015-Revert-meson-temporarily-disable-Wunused-function.patch b/0012-Revert-meson-temporarily-disable-Wunused-function.patch similarity index 84% rename from 0015-Revert-meson-temporarily-disable-Wunused-function.patch rename to 0012-Revert-meson-temporarily-disable-Wunused-function.patch index e3bec6c..60e60aa 100644 --- a/0015-Revert-meson-temporarily-disable-Wunused-function.patch +++ b/0012-Revert-meson-temporarily-disable-Wunused-function.patch @@ -1,7 +1,7 @@ -From d132184ec50656d9ed675801695a66f620fe0821 Mon Sep 17 00:00:00 2001 +From 299a99e5714de89647c0fac650026682b365c040 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Date: Wed, 3 Jul 2024 13:47:04 +0100 -Subject: Revert "meson: temporarily disable -Wunused-function" +Subject: [PATCH] Revert "meson: temporarily disable -Wunused-function" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -27,6 +27,3 @@ index 23494666d9..ef2e5be6e2 100644 ] if host_os != 'darwin' --- -2.39.3 - diff --git a/0016-Enable-make-check.patch b/0013-Enable-make-check.patch similarity index 96% rename from 0016-Enable-make-check.patch rename to 0013-Enable-make-check.patch index 809be58..52d4171 100644 --- a/0016-Enable-make-check.patch +++ b/0013-Enable-make-check.patch @@ -1,29 +1,13 @@ -From 0f4d74ce6ff137291962909aaebc1dbf3dd27508 Mon Sep 17 00:00:00 2001 +From 0cc1623ce4c79af21ce7a3e8c3b67315ff9e3e7b Mon Sep 17 00:00:00 2001 From: Miroslav Rezanina Date: Wed, 2 Sep 2020 09:39:41 +0200 -Subject: Enable make check +Subject: [PATCH] Enable make check Fixing tests after device disabling and machine types changes and enabling make check run during build. Signed-off-by: Miroslav Rezanina - --- -Rebase notes (9.1.0): -- Disable fdc-test -- Use q35 machine type for new pvpanic test - -Rebase notes (10.0.0 rc0) -- Disable mem_addr_space functional test -- Updated removal of q35 test (upstream change) - -Rebase notes (10.0.0): -- Add riscv changes - -Rebase notes (10.1.0 rc0): -- Comment out unused code ---- - .distro/qemu-kvm.spec.template | 4 +-- tests/functional/meson.build | 2 +- tests/functional/test_aarch64_tcg_plugins.py | 4 +-- tests/qemu-iotests/meson.build | 34 ++++++++++---------- @@ -39,7 +23,7 @@ Rebase notes (10.1.0 rc0): tests/qtest/pvpanic-test.c | 2 +- tests/qtest/riscv-csr-test.c | 4 +++ tests/qtest/virtio-net-failover.c | 1 + - 16 files changed, 47 insertions(+), 30 deletions(-) + 15 files changed, 45 insertions(+), 28 deletions(-) diff --git a/tests/functional/meson.build b/tests/functional/meson.build index 311c6f1806..c7f9051c90 100644 @@ -360,6 +344,3 @@ index 5baf81c3e6..aa87bf5698 100644 "-device pcie-root-port,id=root0,addr=0x1,bus=pcie.0,chassis=1 " \ "-device pcie-root-port,id=root1,addr=0x2,bus=pcie.0,chassis=2 " --- -2.39.3 - diff --git a/0017-vfio-cap-number-of-devices-that-can-be-assigned.patch b/0014-vfio-cap-number-of-devices-that-can-be-assigned.patch similarity index 97% rename from 0017-vfio-cap-number-of-devices-that-can-be-assigned.patch rename to 0014-vfio-cap-number-of-devices-that-can-be-assigned.patch index 03adb71..7e945b4 100644 --- a/0017-vfio-cap-number-of-devices-that-can-be-assigned.patch +++ b/0014-vfio-cap-number-of-devices-that-can-be-assigned.patch @@ -1,7 +1,7 @@ -From 0f17fef61fc05f7617e47fcbc6a6c13efa5435d8 Mon Sep 17 00:00:00 2001 +From 0da2ce92246aec2de87b314ed91f188f1b0bfbbd Mon Sep 17 00:00:00 2001 From: Bandan Das Date: Tue, 3 Dec 2013 20:05:13 +0100 -Subject: vfio: cap number of devices that can be assigned +Subject: [PATCH] vfio: cap number of devices that can be assigned RH-Author: Bandan Das Message-id: <1386101113-31560-3-git-send-email-bsd@redhat.com> @@ -135,6 +135,3 @@ index 6e4d5ccdac..9290774299 100644 void vfio_device_irq_disable(VFIODevice *vbasedev, int index); void vfio_device_irq_unmask(VFIODevice *vbasedev, int index); void vfio_device_irq_mask(VFIODevice *vbasedev, int index); --- -2.39.3 - diff --git a/0018-Add-support-statement-to-help-output.patch b/0015-Add-support-statement-to-help-output.patch similarity index 91% rename from 0018-Add-support-statement-to-help-output.patch rename to 0015-Add-support-statement-to-help-output.patch index 884c4ce..890e1d2 100644 --- a/0018-Add-support-statement-to-help-output.patch +++ b/0015-Add-support-statement-to-help-output.patch @@ -1,7 +1,7 @@ -From 74a65ebea34ca36e3f510bc80274ce039df4e383 Mon Sep 17 00:00:00 2001 +From 82d41e31ab3a068793c14288bc5dff21cabf1aa8 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Wed, 4 Dec 2013 18:53:17 +0100 -Subject: Add support statement to -help output +Subject: [PATCH] Add support statement to -help output Add support statement to -help output, reporting direct qemu-kvm usage as unsupported by Red Hat, and advising users to use libvirt instead. @@ -41,6 +41,3 @@ index 3b7057e6c6..d3e6158753 100644 exit(exitcode); } --- -2.39.3 - diff --git a/0019-Use-qemu-kvm-in-documentation-instead-of-qemu-system.patch b/0016-Use-qemu-kvm-in-documentation-instead-of-qemu-system.patch similarity index 92% rename from 0019-Use-qemu-kvm-in-documentation-instead-of-qemu-system.patch rename to 0016-Use-qemu-kvm-in-documentation-instead-of-qemu-system.patch index a7371c5..cebe9fd 100644 --- a/0019-Use-qemu-kvm-in-documentation-instead-of-qemu-system.patch +++ b/0016-Use-qemu-kvm-in-documentation-instead-of-qemu-system.patch @@ -1,7 +1,7 @@ -From 50b5abd584d9157677d694260a797be793fcf985 Mon Sep 17 00:00:00 2001 +From c17ca305893c976061a94fd5058ef5a53493e41a Mon Sep 17 00:00:00 2001 From: Miroslav Rezanina Date: Wed, 8 Jul 2020 08:35:50 +0200 -Subject: Use qemu-kvm in documentation instead of qemu-system- +Subject: [PATCH] Use qemu-kvm in documentation instead of qemu-system- We change the name and location of qemu-kvm binaries. Update documentation to reflect this change. Only architectures available in RHEL are updated. @@ -47,6 +47,3 @@ index ab23f14d21..3837456a61 100644 ``-netdev vhost-vdpa[,vhostdev=/path/to/dev][,vhostfd=h]`` Establish a vhost-vdpa netdev. --- -2.39.3 - diff --git a/0020-qcow2-Deprecation-warning-when-opening-v2-images-rw.patch b/0017-qcow2-Deprecation-warning-when-opening-v2-images-rw.patch similarity index 94% rename from 0020-qcow2-Deprecation-warning-when-opening-v2-images-rw.patch rename to 0017-qcow2-Deprecation-warning-when-opening-v2-images-rw.patch index d264a5f..f0cfa62 100644 --- a/0020-qcow2-Deprecation-warning-when-opening-v2-images-rw.patch +++ b/0017-qcow2-Deprecation-warning-when-opening-v2-images-rw.patch @@ -1,7 +1,7 @@ -From f1ec21d5adafcd06563a6c5404c5d631f470ab0c Mon Sep 17 00:00:00 2001 +From d4a2e3344ea9e909a3262ac569fc0e5fab49562b Mon Sep 17 00:00:00 2001 From: Kevin Wolf Date: Fri, 20 Aug 2021 18:25:12 +0200 -Subject: qcow2: Deprecation warning when opening v2 images rw +Subject: [PATCH] qcow2: Deprecation warning when opening v2 images rw qcow2 v3 has been around for a long time (since QEMU 1.1/RHEL 7), so there is no real reason any more to use it. People still using it might @@ -53,6 +53,3 @@ index 511a55b1e8..35c0fc0d20 100644 -e $'s#\r##' # QEMU monitor uses \r\n line endings } --- -2.39.3 - diff --git a/0021-file-posix-Define-DM_MPATH_PROBE_PATHS.patch b/0018-file-posix-Define-DM_MPATH_PROBE_PATHS.patch similarity index 91% rename from 0021-file-posix-Define-DM_MPATH_PROBE_PATHS.patch rename to 0018-file-posix-Define-DM_MPATH_PROBE_PATHS.patch index e329fe0..97c9a21 100644 --- a/0021-file-posix-Define-DM_MPATH_PROBE_PATHS.patch +++ b/0018-file-posix-Define-DM_MPATH_PROBE_PATHS.patch @@ -1,7 +1,7 @@ -From 90041be5316257fc98eb62af1e8a927e53d2d612 Mon Sep 17 00:00:00 2001 +From fa1f21136ad5acb144c56dbfd0c4fb74d1a9b3e6 Mon Sep 17 00:00:00 2001 From: Kevin Wolf Date: Tue, 29 Apr 2025 17:05:41 +0200 -Subject: file-posix: Define DM_MPATH_PROBE_PATHS +Subject: [PATCH] file-posix: Define DM_MPATH_PROBE_PATHS RH-Author: Kevin Wolf RH-MergeRequest: 370: file-posix: Fix multipath failover with SCSI passthrough @@ -41,6 +41,3 @@ index 8c738674ce..cb2e94d7db 100644 typedef struct BDRVRawState { int fd; bool use_lock; --- -2.39.3 - diff --git a/kvm-e1000e-Prevent-crash-from-legacy-interrupt-firing-af.patch b/0019-e1000e-Prevent-crash-from-legacy-interrupt-firing-af.patch similarity index 93% rename from kvm-e1000e-Prevent-crash-from-legacy-interrupt-firing-af.patch rename to 0019-e1000e-Prevent-crash-from-legacy-interrupt-firing-af.patch index d1e4d00..e0e105e 100644 --- a/kvm-e1000e-Prevent-crash-from-legacy-interrupt-firing-af.patch +++ b/0019-e1000e-Prevent-crash-from-legacy-interrupt-firing-af.patch @@ -1,4 +1,4 @@ -From a2f30bafa346ef50932c359eaf71574ed3c1239d Mon Sep 17 00:00:00 2001 +From dedb116d88615adedd6b651e5fb22083b86857b0 Mon Sep 17 00:00:00 2001 From: Laurent Vivier Date: Thu, 7 Aug 2025 13:08:06 +0200 Subject: [PATCH] e1000e: Prevent crash from legacy interrupt firing after @@ -44,6 +44,10 @@ Reviewed-by: Akihiko Odaki Message-ID: <20250807110806.409065-1-lvivier@redhat.com> Signed-off-by: Philippe Mathieu-Daudé (cherry picked from commit 8e4649cac9bcddc050d2df07908075e9e69bccc7) + +Patch-name: kvm-e1000e-Prevent-crash-from-legacy-interrupt-firing-af.patch +Patch-id: 22 +Patch-present-in-specfile: True --- hw/net/e1000e_core.c | 5 ----- 1 file changed, 5 deletions(-) @@ -64,6 +68,3 @@ index 2413858790..06657bb3ac 100644 res = core->delayed_causes; core->delayed_causes = 0; --- -2.47.3 - diff --git a/kvm-arm-kvm-report-registers-we-failed-to-set.patch b/0020-arm-kvm-report-registers-we-failed-to-set.patch similarity index 96% rename from kvm-arm-kvm-report-registers-we-failed-to-set.patch rename to 0020-arm-kvm-report-registers-we-failed-to-set.patch index 9f956e9..dc3bf8a 100644 --- a/kvm-arm-kvm-report-registers-we-failed-to-set.patch +++ b/0020-arm-kvm-report-registers-we-failed-to-set.patch @@ -1,7 +1,7 @@ -From d635b553683b9a057d7a1a4b7e3348c88dcab6d6 Mon Sep 17 00:00:00 2001 +From f98acf4248abc79bf08a72ff018a496de9389eef Mon Sep 17 00:00:00 2001 From: Cornelia Huck Date: Thu, 11 Sep 2025 17:41:59 +0200 -Subject: [PATCH 1/4] arm/kvm: report registers we failed to set +Subject: [PATCH] arm/kvm: report registers we failed to set RH-Author: Eric Auger RH-MergeRequest: 410: arm/kvm: report registers we failed to set @@ -36,6 +36,10 @@ Message-id: 20250911154159.158046-1-cohuck@redhat.com Signed-off-by: Peter Maydell (cherry picked from commit 19f6dcfe6b8b2a3523362812fc696ab83050d316) Signed-off-by: Eric Auger + +Patch-name: kvm-arm-kvm-report-registers-we-failed-to-set.patch +Patch-id: 23 +Patch-present-in-specfile: True --- target/arm/kvm.c | 86 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) @@ -149,6 +153,3 @@ index 6672344855..c1ec6654ca 100644 } } return ok; --- -2.47.3 - diff --git a/kvm-pcie_sriov-make-pcie_sriov_pf_exit-safe-on-non-SR-IO.patch b/0021-pcie_sriov-make-pcie_sriov_pf_exit-safe-on-non-SR-IO.patch similarity index 91% rename from kvm-pcie_sriov-make-pcie_sriov_pf_exit-safe-on-non-SR-IO.patch rename to 0021-pcie_sriov-make-pcie_sriov_pf_exit-safe-on-non-SR-IO.patch index 8790d13..a100c3c 100644 --- a/kvm-pcie_sriov-make-pcie_sriov_pf_exit-safe-on-non-SR-IO.patch +++ b/0021-pcie_sriov-make-pcie_sriov_pf_exit-safe-on-non-SR-IO.patch @@ -1,7 +1,7 @@ -From db20fe92c8cc22e3317787d6c83056126e912f3a Mon Sep 17 00:00:00 2001 +From 103e764a9c557b38b03f23928bb9f20aeaec9b52 Mon Sep 17 00:00:00 2001 From: Stefan Hajnoczi Date: Wed, 24 Sep 2025 11:51:53 -0400 -Subject: [PATCH 2/4] pcie_sriov: make pcie_sriov_pf_exit() safe on non-SR-IOV +Subject: [PATCH] pcie_sriov: make pcie_sriov_pf_exit() safe on non-SR-IOV devices RH-Author: Stefan Hajnoczi @@ -40,6 +40,10 @@ Message-ID: <20250924155153.579495-1-stefanha@redhat.com> Signed-off-by: Michael S. Tsirkin (cherry picked from commit bab681f752048c3bc22d561b1d314c7ec16419c9) Signed-off-by: Stefan Hajnoczi + +Patch-name: kvm-pcie_sriov-make-pcie_sriov_pf_exit-safe-on-non-SR-IO.patch +Patch-id: 24 +Patch-present-in-specfile: True --- hw/pci/pcie_sriov.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) @@ -68,6 +72,3 @@ index 8a4bf0d6f7..cf1b5b5c05 100644 unparent_vfs(dev, pci_get_word(cfg + PCI_SRIOV_TOTAL_VF)); } } --- -2.47.3 - diff --git a/kvm-target-i386-add-compatibility-property-for-arch_capa.patch b/0022-target-i386-add-compatibility-property-for-arch_capa.patch similarity index 95% rename from kvm-target-i386-add-compatibility-property-for-arch_capa.patch rename to 0022-target-i386-add-compatibility-property-for-arch_capa.patch index 78aa945..1330ae0 100644 --- a/kvm-target-i386-add-compatibility-property-for-arch_capa.patch +++ b/0022-target-i386-add-compatibility-property-for-arch_capa.patch @@ -1,8 +1,7 @@ -From ae1b11511be8c6ea7ac3b6dc46e106bb19829b0f Mon Sep 17 00:00:00 2001 +From e1328dd999ee518164a5620b23b9d4fb698a0daa Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Thu, 9 Oct 2025 16:49:59 +0200 -Subject: [PATCH 3/4] target/i386: add compatibility property for - arch_capabilities +Subject: [PATCH] target/i386: add compatibility property for arch_capabilities RH-Author: Paolo Bonzini RH-MergeRequest: 411: fix x86-64 migration regression in QEMU 10.1 @@ -33,6 +32,10 @@ Fixes: d3a24134e37 ("target/i386: do not expose ARCH_CAPABILITIES on AMD CPU", 2 Signed-off-by: Paolo Bonzini (cherry picked from commit e9efa4a77168ac2816bf9471f878252ce6224710) Signed-off-by: Paolo Bonzini + +Patch-name: kvm-target-i386-add-compatibility-property-for-arch_capa.patch +Patch-id: 25 +Patch-present-in-specfile: True --- hw/i386/pc.c | 2 ++ target/i386/cpu.c | 17 +++++++++++++++++ @@ -130,6 +133,3 @@ index 0eb39d22d6..baa2f80beb 100644 ret &= ~CPUID_7_0_EDX_ARCH_CAPABILITIES; } } else if (function == 7 && index == 1 && reg == R_EAX) { --- -2.47.3 - diff --git a/kvm-target-i386-add-compatibility-property-for-pdcm-feat.patch b/0023-target-i386-add-compatibility-property-for-pdcm-feat.patch similarity index 94% rename from kvm-target-i386-add-compatibility-property-for-pdcm-feat.patch rename to 0023-target-i386-add-compatibility-property-for-pdcm-feat.patch index dfd644c..a605acd 100644 --- a/kvm-target-i386-add-compatibility-property-for-pdcm-feat.patch +++ b/0023-target-i386-add-compatibility-property-for-pdcm-feat.patch @@ -1,7 +1,7 @@ -From 0d2ec98960c89003d3040818b5c5493cd636b98d Mon Sep 17 00:00:00 2001 +From 0bf7082e44f311902726b90b0b38dd2602dcc118 Mon Sep 17 00:00:00 2001 From: Hector Cao Date: Tue, 23 Sep 2025 12:16:41 +0200 -Subject: [PATCH 4/4] target/i386: add compatibility property for pdcm feature +Subject: [PATCH] target/i386: add compatibility property for pdcm feature RH-Author: Paolo Bonzini RH-MergeRequest: 411: fix x86-64 migration regression in QEMU 10.1 @@ -27,6 +27,10 @@ Fixes: e68ec298090 ("i386/cpu: Move adjustment of CPUID_EXT_PDCM before feature_ Signed-off-by: Paolo Bonzini (cherry picked from commit 6529f31e0dccadb532c80b36e3efe7aef83f9cad) Signed-off-by: Paolo Bonzini + +Patch-name: kvm-target-i386-add-compatibility-property-for-pdcm-feat.patch +Patch-id: 26 +Patch-present-in-specfile: True --- hw/i386/pc.c | 2 ++ target/i386/cpu.c | 15 ++++++++++++--- @@ -110,6 +114,3 @@ index b966bc997c..2187e61654 100644 /* Number of physical address bits supported */ uint32_t phys_bits; --- -2.47.3 - diff --git a/kvm-qapi-machine-s390x-add-QAPI-event-SCLP_CPI_INFO_AVAI.patch b/0024-qapi-machine-s390x-add-QAPI-event-SCLP_CPI_INFO_AVAI.patch similarity index 91% rename from kvm-qapi-machine-s390x-add-QAPI-event-SCLP_CPI_INFO_AVAI.patch rename to 0024-qapi-machine-s390x-add-QAPI-event-SCLP_CPI_INFO_AVAI.patch index 796cb88..ff44d0b 100644 --- a/kvm-qapi-machine-s390x-add-QAPI-event-SCLP_CPI_INFO_AVAI.patch +++ b/0024-qapi-machine-s390x-add-QAPI-event-SCLP_CPI_INFO_AVAI.patch @@ -1,8 +1,7 @@ -From c616ee68c53e1ebc10f95e3401e505c034aeb361 Mon Sep 17 00:00:00 2001 +From f8640da2e54f79ca5966e8390c0bd3b5a40c2581 Mon Sep 17 00:00:00 2001 From: Shalini Chellathurai Saroja Date: Thu, 16 Oct 2025 14:17:07 +0200 -Subject: [PATCH 01/10] qapi/machine-s390x: add QAPI event - SCLP_CPI_INFO_AVAILABLE +Subject: [PATCH] qapi/machine-s390x: add QAPI event SCLP_CPI_INFO_AVAILABLE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -26,6 +25,10 @@ Reviewed-by: Thomas Huth Message-ID: <20251016121708.334133-1-shalini@linux.ibm.com> Signed-off-by: Thomas Huth (cherry picked from commit 0ce63280dc6fe9fce1d89922f2d17dcae77827e6) + +Patch-name: kvm-qapi-machine-s390x-add-QAPI-event-SCLP_CPI_INFO_AVAI.patch +Patch-id: 27 +Patch-present-in-specfile: True --- hw/s390x/sclpcpi.c | 4 ++++ qapi/machine-s390x.json | 21 +++++++++++++++++++++ @@ -82,6 +85,3 @@ index 966dbd61d2..8412668b67 100644 +{ 'event': 'SCLP_CPI_INFO_AVAILABLE', + 'features': [ 'unstable' ] +} --- -2.47.3 - diff --git a/kvm-tests-functional-add-tests-for-SCLP-event-CPI.patch b/0025-tests-functional-add-tests-for-SCLP-event-CPI.patch similarity index 93% rename from kvm-tests-functional-add-tests-for-SCLP-event-CPI.patch rename to 0025-tests-functional-add-tests-for-SCLP-event-CPI.patch index 502a79a..0827f7d 100644 --- a/kvm-tests-functional-add-tests-for-SCLP-event-CPI.patch +++ b/0025-tests-functional-add-tests-for-SCLP-event-CPI.patch @@ -1,7 +1,7 @@ -From c8082b70cdd198a4a5236ca0543e2653663fb1d4 Mon Sep 17 00:00:00 2001 +From fdb8dcb26a3840f4ddf03c37389d6ffc80c4b5ba Mon Sep 17 00:00:00 2001 From: Shalini Chellathurai Saroja Date: Thu, 16 Oct 2025 14:17:08 +0200 -Subject: [PATCH 02/10] tests/functional: add tests for SCLP event CPI +Subject: [PATCH] tests/functional: add tests for SCLP event CPI MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -24,6 +24,10 @@ Reviewed-by Thomas Huth Message-ID: <20251016121708.334133-2-shalini@linux.ibm.com> Signed-off-by: Thomas Huth (cherry picked from commit bc436b739c3c8683ef5e8c22391952dcaa95242e) + +Patch-name: kvm-tests-functional-add-tests-for-SCLP-event-CPI.patch +Patch-id: 28 +Patch-present-in-specfile: True --- tests/functional/test_s390x_ccw_virtio.py | 26 +++++++++++++++++++++++ 1 file changed, 26 insertions(+) @@ -71,6 +75,3 @@ index 453711aa0f..0455337856 100755 + if __name__ == '__main__': QemuSystemTest.main() --- -2.47.3 - diff --git a/kvm-redhat-Add-new-rhel9.8.0-and-rhel10.2.0-machine-type.patch b/0026-redhat-Add-new-rhel9.8.0-and-rhel10.2.0-machine-type.patch similarity index 92% rename from kvm-redhat-Add-new-rhel9.8.0-and-rhel10.2.0-machine-type.patch rename to 0026-redhat-Add-new-rhel9.8.0-and-rhel10.2.0-machine-type.patch index 5a719ff..dd7d3fa 100644 --- a/kvm-redhat-Add-new-rhel9.8.0-and-rhel10.2.0-machine-type.patch +++ b/0026-redhat-Add-new-rhel9.8.0-and-rhel10.2.0-machine-type.patch @@ -1,8 +1,8 @@ -From 5c61c4d31ea23e30d79fb7d25d078d47701b2378 Mon Sep 17 00:00:00 2001 +From 79a55b8fb1b4dace565ceedee8f4b5dbcc5e1210 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Thu, 18 Sep 2025 17:41:25 +0200 -Subject: [PATCH 03/10] redhat: Add new -rhel9.8.0 and -rhel10.2.0 machine - types on s390x +Subject: [PATCH] redhat: Add new -rhel9.8.0 and -rhel10.2.0 machine types on + s390x MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -23,6 +23,10 @@ CPI feature and have the "relaxed-translation" for PCI passthrough devices enabled by default. Signed-off-by: Thomas Huth + +Patch-name: kvm-redhat-Add-new-rhel9.8.0-and-rhel10.2.0-machine-type.patch +Patch-id: 29 +Patch-present-in-specfile: True --- hw/s390x/s390-virtio-ccw.c | 34 +++++++++++++++++++++++++++++++--- 1 file changed, 31 insertions(+), 3 deletions(-) @@ -94,6 +98,3 @@ index 9be423858d..4937a0c3b8 100644 compat_props_add(mc->compat_props, hw_compat_rhel_9, hw_compat_rhel_9_len); } DEFINE_CCW_MACHINE(9, 6, 0); --- -2.47.3 - diff --git a/kvm-vfio-rename-field-to-num_initial_regions.patch b/0027-vfio-rename-field-to-num_initial_regions.patch similarity index 97% rename from kvm-vfio-rename-field-to-num_initial_regions.patch rename to 0027-vfio-rename-field-to-num_initial_regions.patch index 84b624d..125e6c3 100644 --- a/kvm-vfio-rename-field-to-num_initial_regions.patch +++ b/0027-vfio-rename-field-to-num_initial_regions.patch @@ -1,7 +1,7 @@ -From de33fcdabae841dba89fae781d6391164b22740f Mon Sep 17 00:00:00 2001 +From 60e7ac0c41c27dfefeb68b53ce76ebd7f1a1e1be Mon Sep 17 00:00:00 2001 From: John Levon Date: Tue, 14 Oct 2025 17:12:26 +0200 -Subject: [PATCH 04/10] vfio: rename field to "num_initial_regions" +Subject: [PATCH] vfio: rename field to "num_initial_regions" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -26,6 +26,10 @@ Signed-off-by: Cédric Le Goater (cherry picked from commit aaca725884b57c9245528a0afb3f32e078543faf) Conflicts: Modified hw/core/sysbus-fdt.c and hw/vfio/platform.c + +Patch-name: kvm-vfio-rename-field-to-num_initial_regions.patch +Patch-id: 30 +Patch-present-in-specfile: True --- hw/core/sysbus-fdt.c | 14 +++++++------- hw/vfio-user/device.c | 2 +- @@ -248,6 +252,3 @@ index 9290774299..df81d319b2 100644 unsigned int flags; VFIOMigration *migration; Error *migration_blocker; --- -2.47.3 - diff --git a/kvm-vfio-only-check-region-info-cache-for-initial-region.patch b/0028-vfio-only-check-region-info-cache-for-initial-region.patch similarity index 91% rename from kvm-vfio-only-check-region-info-cache-for-initial-region.patch rename to 0028-vfio-only-check-region-info-cache-for-initial-region.patch index 02b4fc2..7a15d81 100644 --- a/kvm-vfio-only-check-region-info-cache-for-initial-region.patch +++ b/0028-vfio-only-check-region-info-cache-for-initial-region.patch @@ -1,7 +1,7 @@ -From 9659c700e0afab65e7993459764b2e802178873b Mon Sep 17 00:00:00 2001 +From 2541098f271ffc71046a2bd398043691cf82b2f2 Mon Sep 17 00:00:00 2001 From: John Levon Date: Tue, 14 Oct 2025 17:12:27 +0200 -Subject: [PATCH 05/10] vfio: only check region info cache for initial regions +Subject: [PATCH] vfio: only check region info cache for initial regions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -29,6 +29,10 @@ Reviewed-by: Alex Williamson Link: https://lore.kernel.org/qemu-devel/20251014151227.2298892-3-john.levon@nutanix.com Signed-off-by: Cédric Le Goater (cherry picked from commit ecbe424a63c9f860a901d6a4a75724b046abd796) + +Patch-name: kvm-vfio-only-check-region-info-cache-for-initial-region.patch +Patch-id: 31 +Patch-present-in-specfile: True --- hw/vfio/device.c | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) @@ -78,6 +82,3 @@ index 0b459c0f7c..7ebf41c95e 100644 } return 0; --- -2.47.3 - diff --git a/kvm-arm-create-new-rhel-10.2-specific-virt-machine-type.patch b/0029-arm-create-new-rhel-10.2-specific-virt-machine-type.patch similarity index 86% rename from kvm-arm-create-new-rhel-10.2-specific-virt-machine-type.patch rename to 0029-arm-create-new-rhel-10.2-specific-virt-machine-type.patch index 1d7b92c..7f07f94 100644 --- a/kvm-arm-create-new-rhel-10.2-specific-virt-machine-type.patch +++ b/0029-arm-create-new-rhel-10.2-specific-virt-machine-type.patch @@ -1,7 +1,7 @@ -From 1e99cb806fb7d6a341bf8f7c238aa7261af7dbd0 Mon Sep 17 00:00:00 2001 +From a75749cb933cbb6d1b6cce5dd8b283242069215e Mon Sep 17 00:00:00 2001 From: Sebastian Ott Date: Wed, 29 Oct 2025 15:53:41 +0100 -Subject: [PATCH 06/10] arm: create new rhel 10.2 specific virt machine type +Subject: [PATCH] arm: create new rhel 10.2 specific virt machine type RH-Author: Sebastian Ott RH-MergeRequest: 416: x86, arm: create new rhel 9.8, 10.2 specific machine types @@ -12,6 +12,10 @@ RH-Acked-by: Cornelia Huck RH-Commit: [1/4] 829eed93aefddcc4684ddacff3cd6ff3f991f442 (seott1/cos-qemu-kvm) Signed-off-by: Sebastian Ott + +Patch-name: kvm-arm-create-new-rhel-10.2-specific-virt-machine-type.patch +Patch-id: 32 +Patch-present-in-specfile: True --- hw/arm/virt.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) @@ -45,6 +49,3 @@ index d37d1bb3cf..e68979d2c5 100644 static void virt_rhel_machine_9_6_0_options(MachineClass *mc) { --- -2.47.3 - diff --git a/kvm-arm-create-new-rhel-9.8-specific-virt-machine-type.patch b/0030-arm-create-new-rhel-9.8-specific-virt-machine-type.patch similarity index 86% rename from kvm-arm-create-new-rhel-9.8-specific-virt-machine-type.patch rename to 0030-arm-create-new-rhel-9.8-specific-virt-machine-type.patch index 2327e80..93a987a 100644 --- a/kvm-arm-create-new-rhel-9.8-specific-virt-machine-type.patch +++ b/0030-arm-create-new-rhel-9.8-specific-virt-machine-type.patch @@ -1,7 +1,7 @@ -From c6b6b0d2969f8baf5f09bc1d4953df5e7445820c Mon Sep 17 00:00:00 2001 +From 5ac559365c62f3b6f38b3ebfaab4b9dbf1a0888f Mon Sep 17 00:00:00 2001 From: Sebastian Ott Date: Wed, 29 Oct 2025 16:05:12 +0100 -Subject: [PATCH 07/10] arm: create new rhel 9.8 specific virt machine type +Subject: [PATCH] arm: create new rhel 9.8 specific virt machine type RH-Author: Sebastian Ott RH-MergeRequest: 416: x86, arm: create new rhel 9.8, 10.2 specific machine types @@ -12,6 +12,10 @@ RH-Acked-by: Cornelia Huck RH-Commit: [2/4] fb3fc4decafd0c6e94ef31c0120b843512089573 (seott1/cos-qemu-kvm) Signed-off-by: Sebastian Ott + +Patch-name: kvm-arm-create-new-rhel-9.8-specific-virt-machine-type.patch +Patch-id: 33 +Patch-present-in-specfile: True --- hw/arm/virt.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) @@ -44,6 +48,3 @@ index e68979d2c5..dcdd53043e 100644 DEFINE_VIRT_MACHINE(9, 6, 0) static void virt_rhel_machine_9_4_0_options(MachineClass *mc) --- -2.47.3 - diff --git a/kvm-x86-create-new-rhel-10.2-specific-pc-q35-machine-typ.patch b/0031-x86-create-new-rhel-10.2-specific-pc-q35-machine-typ.patch similarity index 87% rename from kvm-x86-create-new-rhel-10.2-specific-pc-q35-machine-typ.patch rename to 0031-x86-create-new-rhel-10.2-specific-pc-q35-machine-typ.patch index 06321af..5674c58 100644 --- a/kvm-x86-create-new-rhel-10.2-specific-pc-q35-machine-typ.patch +++ b/0031-x86-create-new-rhel-10.2-specific-pc-q35-machine-typ.patch @@ -1,7 +1,7 @@ -From 95622c4261ef6e0eb6688196d87d3bed838aa91d Mon Sep 17 00:00:00 2001 +From 298dd9449200357a9563287ac036cb53283c27ae Mon Sep 17 00:00:00 2001 From: Sebastian Ott Date: Wed, 29 Oct 2025 17:59:07 +0100 -Subject: [PATCH 08/10] x86: create new rhel 10.2 specific pc-q35 machine type +Subject: [PATCH] x86: create new rhel 10.2 specific pc-q35 machine type RH-Author: Sebastian Ott RH-MergeRequest: 416: x86, arm: create new rhel 9.8, 10.2 specific machine types @@ -12,6 +12,10 @@ RH-Acked-by: Cornelia Huck RH-Commit: [3/4] 7f5a5fa45696e579cd08fb3869884ce9543badd5 (seott1/cos-qemu-kvm) Signed-off-by: Sebastian Ott + +Patch-name: kvm-x86-create-new-rhel-10.2-specific-pc-q35-machine-typ.patch +Patch-id: 34 +Patch-present-in-specfile: True --- hw/i386/pc_q35.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) @@ -51,6 +55,3 @@ index e5d10c0335..aea4735dd3 100644 static void pc_q35_rhel_machine_9_6_0_options(MachineClass *m) { --- -2.47.3 - diff --git a/kvm-x86-create-new-rhel-9.8-specific-pc-q35-machine-type.patch b/0032-x86-create-new-rhel-9.8-specific-pc-q35-machine-type.patch similarity index 88% rename from kvm-x86-create-new-rhel-9.8-specific-pc-q35-machine-type.patch rename to 0032-x86-create-new-rhel-9.8-specific-pc-q35-machine-type.patch index 0354574..79dd5c1 100644 --- a/kvm-x86-create-new-rhel-9.8-specific-pc-q35-machine-type.patch +++ b/0032-x86-create-new-rhel-9.8-specific-pc-q35-machine-type.patch @@ -1,7 +1,7 @@ -From ee136e68450beb87b55e3668538b3a52fdf98736 Mon Sep 17 00:00:00 2001 +From 77cd3055b005a8a0e83d8684c630beea6fd0e805 Mon Sep 17 00:00:00 2001 From: Sebastian Ott Date: Wed, 29 Oct 2025 18:05:21 +0100 -Subject: [PATCH 09/10] x86: create new rhel 9.8 specific pc-q35 machine type +Subject: [PATCH] x86: create new rhel 9.8 specific pc-q35 machine type RH-Author: Sebastian Ott RH-MergeRequest: 416: x86, arm: create new rhel 9.8, 10.2 specific machine types @@ -12,6 +12,10 @@ RH-Acked-by: Cornelia Huck RH-Commit: [4/4] 2bfa55e063b4551e8e3299cf4f7aa2520943076a (seott1/cos-qemu-kvm) Signed-off-by: Sebastian Ott + +Patch-name: kvm-x86-create-new-rhel-9.8-specific-pc-q35-machine-type.patch +Patch-id: 35 +Patch-present-in-specfile: True --- hw/i386/pc_q35.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) @@ -51,6 +55,3 @@ index aea4735dd3..efbb5695c2 100644 } DEFINE_Q35_MACHINE(9, 6, 0); --- -2.47.3 - diff --git a/kvm-rh-enable-CONFIG_USB_STORAGE_BOT.patch b/0033-rh-enable-CONFIG_USB_STORAGE_BOT.patch similarity index 91% rename from kvm-rh-enable-CONFIG_USB_STORAGE_BOT.patch rename to 0033-rh-enable-CONFIG_USB_STORAGE_BOT.patch index 8a0984d..1c97491 100644 --- a/kvm-rh-enable-CONFIG_USB_STORAGE_BOT.patch +++ b/0033-rh-enable-CONFIG_USB_STORAGE_BOT.patch @@ -1,7 +1,7 @@ -From c70f4d1ef65ee432a5f2cedb94447d705f6d8686 Mon Sep 17 00:00:00 2001 +From 627b1afca71a6e0a7db77c310fe0d1db53818dd2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Mon, 3 Nov 2025 14:35:38 +0400 -Subject: [PATCH 10/10] rh: enable CONFIG_USB_STORAGE_BOT +Subject: [PATCH] rh: enable CONFIG_USB_STORAGE_BOT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -15,6 +15,10 @@ RH-Commit: [1/1] 612acd1d19c799c7441f63548648eb70b9e1dfd6 (marcandre.lureau-rh/q JIRA: https://issues.redhat.com/browse/RHEL-101929 Signed-off-by: Marc-André Lureau + +Patch-name: kvm-rh-enable-CONFIG_USB_STORAGE_BOT.patch +Patch-id: 36 +Patch-present-in-specfile: True --- configs/devices/aarch64-softmmu/aarch64-rh-devices.mak | 1 + configs/devices/riscv64-softmmu/riscv64-rh-devices.mak | 1 + @@ -57,6 +61,3 @@ index 828cb8aa6f..1f244f766d 100644 CONFIG_USB_STORAGE_CORE=y CONFIG_USB_STORAGE_CLASSIC=y CONFIG_USB_UHCI=y --- -2.47.3 - diff --git a/kvm-io-move-websock-resource-release-to-close-method.patch b/0034-io-move-websock-resource-release-to-close-method.patch similarity index 91% rename from kvm-io-move-websock-resource-release-to-close-method.patch rename to 0034-io-move-websock-resource-release-to-close-method.patch index 052a53e..1a3f2b4 100644 --- a/kvm-io-move-websock-resource-release-to-close-method.patch +++ b/0034-io-move-websock-resource-release-to-close-method.patch @@ -1,7 +1,7 @@ -From 9aaede253bb55035f0a1171fb1c4eda847ca9493 Mon Sep 17 00:00:00 2001 +From 74a15bd54e8c1fb1821d3b69d88f17fc1032e533 Mon Sep 17 00:00:00 2001 From: Jon Maloy Date: Tue, 4 Nov 2025 17:23:29 -0500 -Subject: [PATCH 01/16] io: move websock resource release to close method +Subject: [PATCH] io: move websock resource release to close method MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -40,6 +40,10 @@ Date: Tue Sep 30 11:58:35 2025 +0100 Signed-off-by: Daniel P. Berrangé Signed-off-by: Jon Maloy + +Patch-name: kvm-io-move-websock-resource-release-to-close-method.patch +Patch-id: 37 +Patch-present-in-specfile: True --- io/channel-websock.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) @@ -79,6 +83,3 @@ index 08ddb274f0..a19b902ff9 100644 return qio_channel_close(wioc->master, errp); } --- -2.47.3 - diff --git a/kvm-io-fix-use-after-free-in-websocket-handshake-code.patch b/0035-io-fix-use-after-free-in-websocket-handshake-code.patch similarity index 96% rename from kvm-io-fix-use-after-free-in-websocket-handshake-code.patch rename to 0035-io-fix-use-after-free-in-websocket-handshake-code.patch index 5c59ad0..06af60f 100644 --- a/kvm-io-fix-use-after-free-in-websocket-handshake-code.patch +++ b/0035-io-fix-use-after-free-in-websocket-handshake-code.patch @@ -1,7 +1,7 @@ -From 728cf99416aaaae2cc0fca6ee88f28ccec33d697 Mon Sep 17 00:00:00 2001 +From 87b6a747f5d8bd592976dfe3182a3b5798784f7d Mon Sep 17 00:00:00 2001 From: Jon Maloy Date: Tue, 4 Nov 2025 17:28:47 -0500 -Subject: [PATCH 02/16] io: fix use after free in websocket handshake code +Subject: [PATCH] io: fix use after free in websocket handshake code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -90,6 +90,10 @@ Date: Tue Sep 30 12:03:15 2025 +0100 Signed-off-by: Daniel P. Berrangé Signed-off-by: Jon Maloy + +Patch-name: kvm-io-fix-use-after-free-in-websocket-handshake-code.patch +Patch-id: 38 +Patch-present-in-specfile: True --- include/io/channel-websock.h | 3 ++- io/channel-websock.c | 22 ++++++++++++++++------ @@ -184,6 +188,3 @@ index a19b902ff9..ec5e09f9ab 100644 if (wioc->io_tag) { g_clear_handle_id(&wioc->io_tag, g_source_remove); } --- -2.47.3 - diff --git a/kvm-vfio-Disable-VFIO-migration-with-MultiFD-support.patch b/0036-vfio-Disable-VFIO-migration-with-MultiFD-support.patch similarity index 88% rename from kvm-vfio-Disable-VFIO-migration-with-MultiFD-support.patch rename to 0036-vfio-Disable-VFIO-migration-with-MultiFD-support.patch index 5219676..33dcb64 100644 --- a/kvm-vfio-Disable-VFIO-migration-with-MultiFD-support.patch +++ b/0036-vfio-Disable-VFIO-migration-with-MultiFD-support.patch @@ -1,7 +1,7 @@ -From 66bd3c1e7702962060d23fdc3084f0ace26b94e6 Mon Sep 17 00:00:00 2001 +From 5aa680dc7371173d2ac1c1fb7cdd393819f44dca Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Thu, 6 Nov 2025 16:39:53 +0100 -Subject: [PATCH 03/16] vfio: Disable VFIO migration with MultiFD support +Subject: [PATCH] vfio: Disable VFIO migration with MultiFD support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -21,6 +21,10 @@ related features. However, it should be set to 'off' in RHEL until more testing has been completed. Signed-off-by: Cédric Le Goater + +Patch-name: kvm-vfio-Disable-VFIO-migration-with-MultiFD-support.patch +Patch-id: 39 +Patch-present-in-specfile: True --- hw/vfio/pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) @@ -42,6 +46,3 @@ index 9486521a90..83ecffb535 100644 DEFINE_PROP_ON_OFF_AUTO("x-migration-load-config-after-iter", VFIOPCIDevice, vbasedev.migration_load_config_after_iter, ON_OFF_AUTO_AUTO), --- -2.47.3 - diff --git a/kvm-hw-arm-virt-Use-ACPI-PCI-hotplug-by-default-from-10..patch b/0037-hw-arm-virt-Use-ACPI-PCI-hotplug-by-default-from-10..patch similarity index 90% rename from kvm-hw-arm-virt-Use-ACPI-PCI-hotplug-by-default-from-10..patch rename to 0037-hw-arm-virt-Use-ACPI-PCI-hotplug-by-default-from-10..patch index a30d175..b625def 100644 --- a/kvm-hw-arm-virt-Use-ACPI-PCI-hotplug-by-default-from-10..patch +++ b/0037-hw-arm-virt-Use-ACPI-PCI-hotplug-by-default-from-10..patch @@ -1,7 +1,7 @@ -From 5264d9ea8c029dab0663a3da82f4d8241ad0f1b9 Mon Sep 17 00:00:00 2001 +From 58cba97a715fa3f506234e718191fcc34286f333 Mon Sep 17 00:00:00 2001 From: Eric Auger Date: Fri, 7 Nov 2025 05:23:16 -0500 -Subject: [PATCH 04/16] hw/arm/virt: Use ACPI PCI hotplug by default from 10.2 +Subject: [PATCH] hw/arm/virt: Use ACPI PCI hotplug by default from 10.2 onwards RH-Author: Eric Auger @@ -20,6 +20,10 @@ rhel10 machine types and all rhel9 machine types ACPI PCI hotplug is kept disabled. Signed-off-by: Eric Auger + +Patch-name: kvm-hw-arm-virt-Use-ACPI-PCI-hotplug-by-default-from-10..patch +Patch-id: 40 +Patch-present-in-specfile: True --- hw/arm/virt.c | 9 +++++++++ 1 file changed, 9 insertions(+) @@ -61,6 +65,3 @@ index dcdd53043e..542d702513 100644 compat_props_add(mc->compat_props, hw_compat_rhel_10_2, hw_compat_rhel_10_2_len); compat_props_add(mc->compat_props, hw_compat_rhel_10_1, hw_compat_rhel_10_1_len); } --- -2.47.3 - diff --git a/kvm-hw-arm-smmu-common-Check-SMMU-has-PCIe-Root-Complex-.patch b/0038-hw-arm-smmu-common-Check-SMMU-has-PCIe-Root-Complex-.patch similarity index 95% rename from kvm-hw-arm-smmu-common-Check-SMMU-has-PCIe-Root-Complex-.patch rename to 0038-hw-arm-smmu-common-Check-SMMU-has-PCIe-Root-Complex-.patch index 1f0fe4a..b9e897a 100644 --- a/kvm-hw-arm-smmu-common-Check-SMMU-has-PCIe-Root-Complex-.patch +++ b/0038-hw-arm-smmu-common-Check-SMMU-has-PCIe-Root-Complex-.patch @@ -1,7 +1,7 @@ -From ad929c3b2e90eeb1f81a3f7074cdaaa922b073b9 Mon Sep 17 00:00:00 2001 +From b8a9e338fb98883ba262f04320502d778753d427 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 29 Aug 2025 09:25:23 +0100 -Subject: [PATCH 05/16] hw/arm/smmu-common: Check SMMU has PCIe Root Complex +Subject: [PATCH] hw/arm/smmu-common: Check SMMU has PCIe Root Complex association RH-Author: Eric Auger @@ -38,6 +38,10 @@ Message-id: 20250829082543.7680-2-skolothumtho@nvidia.com Signed-off-by: Peter Maydell (cherry picked from commit d9e6b8424fd2523a0361972d5dd841471879479c) Signed-off-by: Eric Auger + +Patch-name: kvm-hw-arm-smmu-common-Check-SMMU-has-PCIe-Root-Complex-.patch +Patch-id: 41 +Patch-present-in-specfile: True --- hw/arm/smmu-common.c | 31 ++++++++++++++++++++++++++--- hw/pci-bridge/pci_expander_bridge.c | 1 - @@ -126,6 +130,3 @@ index 8cdacbc4e1..a055fd8d32 100644 #define TYPE_PXB_CXL_BUS "pxb-cxl-bus" #define TYPE_PXB_DEV "pxb" OBJECT_DECLARE_SIMPLE_TYPE(PXBDev, PXB_DEV) --- -2.47.3 - diff --git a/kvm-hw-arm-virt-acpi-build-Re-arrange-SMMUv3-IORT-build.patch b/0039-hw-arm-virt-acpi-build-Re-arrange-SMMUv3-IORT-build.patch similarity index 97% rename from kvm-hw-arm-virt-acpi-build-Re-arrange-SMMUv3-IORT-build.patch rename to 0039-hw-arm-virt-acpi-build-Re-arrange-SMMUv3-IORT-build.patch index e12a15d..a5a4996 100644 --- a/kvm-hw-arm-virt-acpi-build-Re-arrange-SMMUv3-IORT-build.patch +++ b/0039-hw-arm-virt-acpi-build-Re-arrange-SMMUv3-IORT-build.patch @@ -1,7 +1,7 @@ -From 221e12accdd5e699d727cd862760829e973a7b2a Mon Sep 17 00:00:00 2001 +From 49538761679e13a5d2c37466e06f79be153aa17f Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 29 Aug 2025 09:25:24 +0100 -Subject: [PATCH 06/16] hw/arm/virt-acpi-build: Re-arrange SMMUv3 IORT build +Subject: [PATCH] hw/arm/virt-acpi-build: Re-arrange SMMUv3 IORT build RH-Author: Eric Auger RH-MergeRequest: 423: hw/arm/virt: Add support for user creatable SMMUv3 device @@ -32,6 +32,10 @@ Message-id: 20250829082543.7680-3-skolothumtho@nvidia.com Signed-off-by: Peter Maydell (cherry picked from commit 0e6a5bfb0eb17f57fb923b7905bd1435204bdd62) Signed-off-by: Eric Auger + +Patch-name: kvm-hw-arm-virt-acpi-build-Re-arrange-SMMUv3-IORT-build.patch +Patch-id: 42 +Patch-present-in-specfile: True --- hw/arm/virt-acpi-build.c | 137 ++++++++++++++++++++++++++------------- hw/arm/virt.c | 1 + @@ -286,6 +290,3 @@ index 94c79d6c6d..98b877c8b9 100644 }; #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) --- -2.47.3 - diff --git a/kvm-hw-arm-virt-acpi-build-Update-IORT-for-multiple-smmu.patch b/0040-hw-arm-virt-acpi-build-Update-IORT-for-multiple-smmu.patch similarity index 96% rename from kvm-hw-arm-virt-acpi-build-Update-IORT-for-multiple-smmu.patch rename to 0040-hw-arm-virt-acpi-build-Update-IORT-for-multiple-smmu.patch index 7e4267a..b7b4b41 100644 --- a/kvm-hw-arm-virt-acpi-build-Update-IORT-for-multiple-smmu.patch +++ b/0040-hw-arm-virt-acpi-build-Update-IORT-for-multiple-smmu.patch @@ -1,7 +1,7 @@ -From f89d89a3758ebd8725e677431f1e7493c65381c2 Mon Sep 17 00:00:00 2001 +From 90910403b2dc85fa6f2106a6bd75f1eee123f359 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 29 Aug 2025 09:25:25 +0100 -Subject: [PATCH 07/16] hw/arm/virt-acpi-build: Update IORT for multiple smmuv3 +Subject: [PATCH] hw/arm/virt-acpi-build: Update IORT for multiple smmuv3 devices RH-Author: Eric Auger @@ -72,6 +72,10 @@ Message-id: 20250829082543.7680-4-skolothumtho@nvidia.com Signed-off-by: Peter Maydell (cherry picked from commit 01e9a18730e6f56f713ed074603a8b0f2982ed26) Signed-off-by: Eric Auger + +Patch-name: kvm-hw-arm-virt-acpi-build-Update-IORT-for-multiple-smmu.patch +Patch-id: 43 +Patch-present-in-specfile: True --- hw/arm/virt-acpi-build.c | 64 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) @@ -165,6 +169,3 @@ index bef4fabe56..96830f7c4e 100644 } num_smmus = smmuv3_devs->len; --- -2.47.3 - diff --git a/kvm-hw-arm-virt-Factor-out-common-SMMUV3-dt-bindings-cod.patch b/0041-hw-arm-virt-Factor-out-common-SMMUV3-dt-bindings-cod.patch similarity index 94% rename from kvm-hw-arm-virt-Factor-out-common-SMMUV3-dt-bindings-cod.patch rename to 0041-hw-arm-virt-Factor-out-common-SMMUV3-dt-bindings-cod.patch index 5935080..989406a 100644 --- a/kvm-hw-arm-virt-Factor-out-common-SMMUV3-dt-bindings-cod.patch +++ b/0041-hw-arm-virt-Factor-out-common-SMMUV3-dt-bindings-cod.patch @@ -1,7 +1,7 @@ -From 1b3c413355ee5f3917e8e39dbf7a281f8e31a0f5 Mon Sep 17 00:00:00 2001 +From cb1057c9f94d149a6ddc2c9310ab6bd4ec260538 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 29 Aug 2025 09:25:26 +0100 -Subject: [PATCH 08/16] hw/arm/virt: Factor out common SMMUV3 dt bindings code +Subject: [PATCH] hw/arm/virt: Factor out common SMMUV3 dt bindings code RH-Author: Eric Auger RH-MergeRequest: 423: hw/arm/virt: Add support for user creatable SMMUv3 device @@ -28,6 +28,10 @@ Message-id: 20250829082543.7680-5-skolothumtho@nvidia.com Signed-off-by: Peter Maydell (cherry picked from commit 7a276b7570266ec39611f9d91089741ec7e9295b) Signed-off-by: Eric Auger + +Patch-name: kvm-hw-arm-virt-Factor-out-common-SMMUV3-dt-bindings-cod.patch +Patch-id: 44 +Patch-present-in-specfile: True --- hw/arm/virt.c | 54 +++++++++++++++++++++++++++------------------------ 1 file changed, 29 insertions(+), 25 deletions(-) @@ -113,6 +117,3 @@ index 0cc9e5f068..9b95a7c9a9 100644 } static void create_virtio_iommu_dt_bindings(VirtMachineState *vms) --- -2.47.3 - diff --git a/kvm-hw-arm-virt-Add-an-SMMU_IO_LEN-macro.patch b/0042-hw-arm-virt-Add-an-SMMU_IO_LEN-macro.patch similarity index 91% rename from kvm-hw-arm-virt-Add-an-SMMU_IO_LEN-macro.patch rename to 0042-hw-arm-virt-Add-an-SMMU_IO_LEN-macro.patch index f511d7c..b7ed1a4 100644 --- a/kvm-hw-arm-virt-Add-an-SMMU_IO_LEN-macro.patch +++ b/0042-hw-arm-virt-Add-an-SMMU_IO_LEN-macro.patch @@ -1,7 +1,7 @@ -From c62e5defde6f02bdd316b772169571d0de5d2d83 Mon Sep 17 00:00:00 2001 +From 2a43ed7e5472ba40c08cb5784fd1aadae9774c0e Mon Sep 17 00:00:00 2001 From: Nicolin Chen Date: Fri, 29 Aug 2025 09:25:27 +0100 -Subject: [PATCH 09/16] hw/arm/virt: Add an SMMU_IO_LEN macro +Subject: [PATCH] hw/arm/virt: Add an SMMU_IO_LEN macro RH-Author: Eric Auger RH-MergeRequest: 423: hw/arm/virt: Add support for user creatable SMMUv3 device @@ -29,6 +29,10 @@ Message-id: 20250829082543.7680-6-skolothumtho@nvidia.com Signed-off-by: Peter Maydell (cherry picked from commit 466197fc7a25658f9187d538c26887f5738d1ac9) Signed-off-by: Eric Auger + +Patch-name: kvm-hw-arm-virt-Add-an-SMMU_IO_LEN-macro.patch +Patch-id: 45 +Patch-present-in-specfile: True --- hw/arm/virt.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) @@ -56,6 +60,3 @@ index 9b95a7c9a9..b435efafe1 100644 [VIRT_PCDIMM_ACPI] = { 0x09070000, MEMORY_HOTPLUG_IO_LEN }, [VIRT_ACPI_GED] = { 0x09080000, ACPI_GED_EVT_SEL_LEN }, [VIRT_NVDIMM_ACPI] = { 0x09090000, NVDIMM_ACPI_IO_LEN}, --- -2.47.3 - diff --git a/kvm-hw-pci-Introduce-pci_setup_iommu_per_bus-for-per-bus.patch b/0043-hw-pci-Introduce-pci_setup_iommu_per_bus-for-per-bus.patch similarity index 95% rename from kvm-hw-pci-Introduce-pci_setup_iommu_per_bus-for-per-bus.patch rename to 0043-hw-pci-Introduce-pci_setup_iommu_per_bus-for-per-bus.patch index b22c39f..5d633f9 100644 --- a/kvm-hw-pci-Introduce-pci_setup_iommu_per_bus-for-per-bus.patch +++ b/0043-hw-pci-Introduce-pci_setup_iommu_per_bus-for-per-bus.patch @@ -1,8 +1,8 @@ -From 34d06db7ea02cd3a0a07082fef93e08bfbf0b06a Mon Sep 17 00:00:00 2001 +From fc47a08ea593b2fdb1d872f40237a818dabad4fc Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 29 Aug 2025 09:25:28 +0100 -Subject: [PATCH 10/16] hw/pci: Introduce pci_setup_iommu_per_bus() for per-bus - IOMMU ops retrieval +Subject: [PATCH] hw/pci: Introduce pci_setup_iommu_per_bus() for per-bus IOMMU + ops retrieval RH-Author: Eric Auger RH-MergeRequest: 423: hw/arm/virt: Add support for user creatable SMMUv3 device @@ -65,6 +65,10 @@ Message-id: 20250829082543.7680-7-skolothumtho@nvidia.com Signed-off-by: Peter Maydell (cherry picked from commit 951bc76fb669eab96cc60e38a50097ad4435163e) Signed-off-by: Eric Auger + +Patch-name: kvm-hw-pci-Introduce-pci_setup_iommu_per_bus-for-per-bus.patch +Patch-id: 46 +Patch-present-in-specfile: True --- hw/pci/pci.c | 31 +++++++++++++++++++++++++++++++ include/hw/pci/pci.h | 2 ++ @@ -145,6 +149,3 @@ index 2261312546..c738446788 100644 uint8_t devfn_min; uint32_t slot_reserved_mask; pci_set_irq_fn set_irq; --- -2.47.3 - diff --git a/kvm-hw-arm-virt-Allow-user-creatable-SMMUv3-dev-instanti.patch b/0044-hw-arm-virt-Allow-user-creatable-SMMUv3-dev-instanti.patch similarity index 97% rename from kvm-hw-arm-virt-Allow-user-creatable-SMMUv3-dev-instanti.patch rename to 0044-hw-arm-virt-Allow-user-creatable-SMMUv3-dev-instanti.patch index 41e280e..548783a 100644 --- a/kvm-hw-arm-virt-Allow-user-creatable-SMMUv3-dev-instanti.patch +++ b/0044-hw-arm-virt-Allow-user-creatable-SMMUv3-dev-instanti.patch @@ -1,8 +1,7 @@ -From 20b24c8ae68ff5059392188762c8d8b24c3dfa28 Mon Sep 17 00:00:00 2001 +From fa04930d828fa4de32a5ecae907fdbf316d88509 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 29 Aug 2025 09:25:29 +0100 -Subject: [PATCH 11/16] hw/arm/virt: Allow user-creatable SMMUv3 dev - instantiation +Subject: [PATCH] hw/arm/virt: Allow user-creatable SMMUv3 dev instantiation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -40,6 +39,10 @@ Message-id: 20250829082543.7680-8-skolothumtho@nvidia.com Signed-off-by: Peter Maydell (cherry picked from commit 66d2f665e163cf1afccd171e3c16f8d3acb3d94a) Signed-off-by: Eric Auger + +Patch-name: kvm-hw-arm-virt-Allow-user-creatable-SMMUv3-dev-instanti.patch +Patch-id: 47 +Patch-present-in-specfile: True --- hw/arm/smmu-common.c | 8 +++++- hw/arm/smmuv3.c | 2 ++ @@ -210,6 +213,3 @@ index e5e2d09294..80d0fecfde 100644 }; struct SMMUBaseClass { --- -2.47.3 - diff --git a/kvm-qemu-options.hx-Document-the-arm-smmuv3-device.patch b/0045-qemu-options.hx-Document-the-arm-smmuv3-device.patch similarity index 88% rename from kvm-qemu-options.hx-Document-the-arm-smmuv3-device.patch rename to 0045-qemu-options.hx-Document-the-arm-smmuv3-device.patch index a6fee5b..6b2bdb9 100644 --- a/kvm-qemu-options.hx-Document-the-arm-smmuv3-device.patch +++ b/0045-qemu-options.hx-Document-the-arm-smmuv3-device.patch @@ -1,7 +1,7 @@ -From bf0ecadea242c05671bf057fc45d8c58862032d3 Mon Sep 17 00:00:00 2001 +From b6fd153e384990dabf068c5c893140d88edcaa40 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 29 Aug 2025 09:25:30 +0100 -Subject: [PATCH 12/16] qemu-options.hx: Document the arm-smmuv3 device +Subject: [PATCH] qemu-options.hx: Document the arm-smmuv3 device RH-Author: Eric Auger RH-MergeRequest: 423: hw/arm/virt: Add support for user creatable SMMUv3 device @@ -26,6 +26,10 @@ Message-id: 20250829082543.7680-9-skolothumtho@nvidia.com Signed-off-by: Peter Maydell (cherry picked from commit 73d3d0187bc6b482d8b15116edce1475c7975b89) Signed-off-by: Eric Auger + +Patch-name: kvm-qemu-options.hx-Document-the-arm-smmuv3-device.patch +Patch-id: 48 +Patch-present-in-specfile: True --- qemu-options.hx | 7 +++++++ 1 file changed, 7 insertions(+) @@ -48,6 +52,3 @@ index 3837456a61..5f146c1860 100644 ERST DEF("name", HAS_ARG, QEMU_OPTION_name, --- -2.47.3 - diff --git a/kvm-bios-tables-test-Allow-for-smmuv3-test-data.patch b/0046-bios-tables-test-Allow-for-smmuv3-test-data.patch similarity index 72% rename from kvm-bios-tables-test-Allow-for-smmuv3-test-data.patch rename to 0046-bios-tables-test-Allow-for-smmuv3-test-data.patch index 72136a7..d2fffd3 100644 --- a/kvm-bios-tables-test-Allow-for-smmuv3-test-data.patch +++ b/0046-bios-tables-test-Allow-for-smmuv3-test-data.patch @@ -1,7 +1,7 @@ -From b4eeed1e8633df76598de0fe6ca5df4be359222c Mon Sep 17 00:00:00 2001 +From b1a804dc528b237d127a99ca6bc25f352e542fc4 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 29 Aug 2025 09:25:31 +0100 -Subject: [PATCH 13/16] bios-tables-test: Allow for smmuv3 test data. +Subject: [PATCH] bios-tables-test: Allow for smmuv3 test data. RH-Author: Eric Auger RH-MergeRequest: 423: hw/arm/virt: Add support for user creatable SMMUv3 device @@ -27,6 +27,10 @@ Message-id: 20250829082543.7680-10-skolothumtho@nvidia.com Signed-off-by: Peter Maydell (cherry picked from commit c69520c13d6ea45a69a7a49361806fa05b19046d) Signed-off-by: Eric Auger + +Patch-name: kvm-bios-tables-test-Allow-for-smmuv3-test-data.patch +Patch-id: 49 +Patch-present-in-specfile: True --- tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev | 0 tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy | 0 @@ -39,6 +43,18 @@ Signed-off-by: Eric Auger create mode 100644 tests/data/acpi/aarch64/virt/IORT.smmuv3-dev create mode 100644 tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy +diff --git a/tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev b/tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev +new file mode 100644 +index 0000000000..e69de29bb2 +diff --git a/tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy b/tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy +new file mode 100644 +index 0000000000..e69de29bb2 +diff --git a/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev b/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev +new file mode 100644 +index 0000000000..e69de29bb2 +diff --git a/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy b/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy +new file mode 100644 +index 0000000000..e69de29bb2 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..2e3e3ccdce 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h @@ -49,6 +65,3 @@ index dfb8523c8b..2e3e3ccdce 100644 +"tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev", +"tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy", +"tests/data/acpi/aarch64/virt/IORT.smmuv3-dev", --- -2.47.3 - diff --git a/kvm-qtest-bios-tables-test-Add-tests-for-legacy-smmuv3-a.patch b/0047-qtest-bios-tables-test-Add-tests-for-legacy-smmuv3-a.patch similarity index 96% rename from kvm-qtest-bios-tables-test-Add-tests-for-legacy-smmuv3-a.patch rename to 0047-qtest-bios-tables-test-Add-tests-for-legacy-smmuv3-a.patch index 4ab008d..59dfcda 100644 --- a/kvm-qtest-bios-tables-test-Add-tests-for-legacy-smmuv3-a.patch +++ b/0047-qtest-bios-tables-test-Add-tests-for-legacy-smmuv3-a.patch @@ -1,7 +1,7 @@ -From 51ec91309c99a5d81b53c2762d18c073f672e45a Mon Sep 17 00:00:00 2001 +From bdd38feb47a92951cd32a33e8fcd8626aa5ff5e0 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 29 Aug 2025 09:25:32 +0100 -Subject: [PATCH 14/16] qtest/bios-tables-test: Add tests for legacy smmuv3 and +Subject: [PATCH] qtest/bios-tables-test: Add tests for legacy smmuv3 and smmuv3 device RH-Author: Eric Auger @@ -47,6 +47,10 @@ Message-id: 20250829082543.7680-11-skolothumtho@nvidia.com Signed-off-by: Peter Maydell (cherry picked from commit 3f8cd046c151c471d9a34181320f4a7d3f72b32a) Signed-off-by: Eric Auger + +Patch-name: kvm-qtest-bios-tables-test-Add-tests-for-legacy-smmuv3-a.patch +Patch-id: 50 +Patch-present-in-specfile: True --- tests/qtest/bios-tables-test.c | 86 ++++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) @@ -155,6 +159,3 @@ index 386196edc8..a384aac1be 100644 } #if 0 /* Disabled for Red Hat Enterprise Linux */ } else if (strcmp(arch, "riscv64") == 0) { --- -2.47.3 - diff --git a/kvm-qtest-bios-tables-test-Update-tables-for-smmuv3-test.patch b/0048-qtest-bios-tables-test-Update-tables-for-smmuv3-test.patch similarity index 90% rename from kvm-qtest-bios-tables-test-Update-tables-for-smmuv3-test.patch rename to 0048-qtest-bios-tables-test-Update-tables-for-smmuv3-test.patch index 9273081..aed7f00 100644 --- a/kvm-qtest-bios-tables-test-Update-tables-for-smmuv3-test.patch +++ b/0048-qtest-bios-tables-test-Update-tables-for-smmuv3-test.patch @@ -1,7 +1,7 @@ -From d6f27731c3d469f4ba68807a4c1f8ee534cc9d57 Mon Sep 17 00:00:00 2001 +From be2f82165c36208d01117404382ad0fee35e4ce0 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 29 Aug 2025 09:25:33 +0100 -Subject: [PATCH 15/16] qtest/bios-tables-test: Update tables for smmuv3 tests +Subject: [PATCH] qtest/bios-tables-test: Update tables for smmuv3 tests RH-Author: Eric Auger RH-MergeRequest: 423: hw/arm/virt: Add support for user creatable SMMUv3 device @@ -259,6 +259,10 @@ Message-id: 20250829082543.7680-12-skolothumtho@nvidia.com Signed-off-by: Peter Maydell (cherry picked from commit d35146a6606cf6ebb4e24bb97dfc0330f074f6e3) Signed-off-by: Eric Auger + +Patch-name: kvm-qtest-bios-tables-test-Update-tables-for-smmuv3-test.patch +Patch-id: 51 +Patch-present-in-specfile: True --- tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev | Bin 0 -> 10230 bytes tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy | Bin 0 -> 10230 bytes @@ -267,6 +271,18 @@ Signed-off-by: Eric Auger tests/qtest/bios-tables-test-allowed-diff.h | 4 ---- 5 files changed, 4 deletions(-) +diff --git a/tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev b/tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev +index e69de29bb2..53d4c07f42 100644 +Binary files a/tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev and b/tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev differ +diff --git a/tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy b/tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy +index e69de29bb2..53d4c07f42 100644 +Binary files a/tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy and b/tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy differ +diff --git a/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev b/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev +index e69de29bb2..67be268f62 100644 +Binary files a/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev and b/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev differ +diff --git a/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy b/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy +index e69de29bb2..41981a449f 100644 +Binary files a/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy and b/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy differ diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 2e3e3ccdce..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h @@ -277,6 +293,3 @@ index 2e3e3ccdce..dfb8523c8b 100644 -"tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev", -"tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy", -"tests/data/acpi/aarch64/virt/IORT.smmuv3-dev", --- -2.47.3 - diff --git a/kvm-qtest-Do-not-run-bios-tables-test-on-aarch64.patch b/0049-qtest-Do-not-run-bios-tables-test-on-aarch64.patch similarity index 82% rename from kvm-qtest-Do-not-run-bios-tables-test-on-aarch64.patch rename to 0049-qtest-Do-not-run-bios-tables-test-on-aarch64.patch index d048675..6be6ce6 100644 --- a/kvm-qtest-Do-not-run-bios-tables-test-on-aarch64.patch +++ b/0049-qtest-Do-not-run-bios-tables-test-on-aarch64.patch @@ -1,7 +1,7 @@ -From 3b21c60b771087e7d566bf738e04e01a7a1bdf09 Mon Sep 17 00:00:00 2001 +From 010f0f393976a1422f16a7252d6fcd986671b8d7 Mon Sep 17 00:00:00 2001 From: Miroslav Rezanina Date: Fri, 14 Nov 2025 06:46:07 +0100 -Subject: [PATCH 16/16] qtest: Do not run bios-tables-test on aarch64 +Subject: [PATCH] qtest: Do not run bios-tables-test on aarch64 We do several disruptive downstream only changes that make bios-tables-test to fail. Disabling it for now. @@ -9,6 +9,10 @@ bios-tables-test to fail. Disabling it for now. This is done to enable fixing RHEL-126573 and RHEL-67323. Signed-off-by: Miroslav Rezanina + +Patch-name: kvm-qtest-Do-not-run-bios-tables-test-on-aarch64.patch +Patch-id: 52 +Patch-present-in-specfile: True --- tests/qtest/meson.build | 1 - 1 file changed, 1 deletion(-) @@ -25,6 +29,3 @@ index ef44ffaf78..13b52ea41a 100644 (config_all_accel.has_key('CONFIG_TCG') and config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? \ ['tpm-tis-device-test', 'tpm-tis-device-swtpm-test'] : []) + \ (config_all_devices.has_key('CONFIG_XLNX_ZYNQMP_ARM') ? ['xlnx-can-test', 'fuzz-xlnx-dp-test'] : []) + \ --- -2.47.3 - diff --git a/kvm-ram-block-attributes-fix-interaction-with-hugetlb-me.patch b/0050-ram-block-attributes-fix-interaction-with-hugetlb-me.patch similarity index 95% rename from kvm-ram-block-attributes-fix-interaction-with-hugetlb-me.patch rename to 0050-ram-block-attributes-fix-interaction-with-hugetlb-me.patch index 5e5f04d..688fcc4 100644 --- a/kvm-ram-block-attributes-fix-interaction-with-hugetlb-me.patch +++ b/0050-ram-block-attributes-fix-interaction-with-hugetlb-me.patch @@ -1,7 +1,7 @@ -From 6b03dd00ce169886ec7aa866c14daa99209a3137 Mon Sep 17 00:00:00 2001 +From 1e83cccb197114db68fa625c40f396ee159bb3a2 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Wed, 19 Nov 2025 12:51:32 +0100 -Subject: [PATCH 1/4] ram-block-attributes: fix interaction with hugetlb memory +Subject: [PATCH] ram-block-attributes: fix interaction with hugetlb memory backends RH-Author: Paolo Bonzini @@ -39,6 +39,10 @@ Cc: qemu-stable Signed-off-by: Peter Xu (cherry picked from commit 8922a758b29251d9009ec509e7f580b76509ab3d) Signed-off-by: Paolo Bonzini + +Patch-name: kvm-ram-block-attributes-fix-interaction-with-hugetlb-me.patch +Patch-id: 53 +Patch-present-in-specfile: True --- system/ram-block-attributes.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) @@ -120,6 +124,3 @@ index 68e8a02703..a7579de5b4 100644 const unsigned long first_bit = offset / block_size; const unsigned long nbits = size / block_size; const unsigned long last_bit = first_bit + nbits - 1; --- -2.47.3 - diff --git a/kvm-ram-block-attributes-Unify-the-retrieval-of-the-bloc.patch b/0051-ram-block-attributes-Unify-the-retrieval-of-the-bloc.patch similarity index 86% rename from kvm-ram-block-attributes-Unify-the-retrieval-of-the-bloc.patch rename to 0051-ram-block-attributes-Unify-the-retrieval-of-the-bloc.patch index 87c0288..c305a5a 100644 --- a/kvm-ram-block-attributes-Unify-the-retrieval-of-the-bloc.patch +++ b/0051-ram-block-attributes-Unify-the-retrieval-of-the-bloc.patch @@ -1,8 +1,7 @@ -From 0e0b1ba11faad72338036b9dfa97a3a8a8bc56dc Mon Sep 17 00:00:00 2001 +From 5752a9e1aeb36ba0819cce747a15ec74eb8b8d98 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Wed, 19 Nov 2025 12:51:32 +0100 -Subject: [PATCH 2/4] ram-block-attributes: Unify the retrieval of the block - size +Subject: [PATCH] ram-block-attributes: Unify the retrieval of the block size RH-Author: Paolo Bonzini RH-MergeRequest: 426: Fix hugetlb memory backends in confidential VMs @@ -25,6 +24,10 @@ Link: https://lore.kernel.org/r/20251023095526.48365-3-chenyi.qiang@intel.com Signed-off-by: Peter Xu (cherry picked from commit b2ceb87b1a210d91a29d525590eb164d1121b8a1) Signed-off-by: Paolo Bonzini + +Patch-name: kvm-ram-block-attributes-Unify-the-retrieval-of-the-bloc.patch +Patch-id: 54 +Patch-present-in-specfile: True --- system/ram-block-attributes.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) @@ -42,6 +45,3 @@ index a7579de5b4..fb7c5c2746 100644 RamBlockAttributes *attr; MemoryRegion *mr = ram_block->mr; --- -2.47.3 - diff --git a/kvm-hw-s390x-Fix-a-possible-crash-with-passed-through-vi.patch b/0052-hw-s390x-Fix-a-possible-crash-with-passed-through-vi.patch similarity index 93% rename from kvm-hw-s390x-Fix-a-possible-crash-with-passed-through-vi.patch rename to 0052-hw-s390x-Fix-a-possible-crash-with-passed-through-vi.patch index 709d857..1061ecf 100644 --- a/kvm-hw-s390x-Fix-a-possible-crash-with-passed-through-vi.patch +++ b/0052-hw-s390x-Fix-a-possible-crash-with-passed-through-vi.patch @@ -1,7 +1,7 @@ -From f607a40a84b80b2cb33ef3bb42b60b84af596cc9 Mon Sep 17 00:00:00 2001 +From cd7ee8d8043415d89a80a6e75c2d58afae270038 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Tue, 18 Nov 2025 18:40:47 +0100 -Subject: [PATCH 3/4] hw/s390x: Fix a possible crash with passed-through virtio +Subject: [PATCH] hw/s390x: Fix a possible crash with passed-through virtio devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -42,6 +42,10 @@ Acked-by: Christian Borntraeger Signed-off-by: Thomas Huth Message-ID: <20251118174047.73103-1-thuth@redhat.com> (cherry picked from commit e5cb62e7b6f99d45a42f0cd358d76d6ee2cef5cd) + +Patch-name: kvm-hw-s390x-Fix-a-possible-crash-with-passed-through-vi.patch +Patch-id: 55 +Patch-present-in-specfile: True --- hw/s390x/s390-hypercall.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) @@ -78,6 +82,3 @@ index ac1b08b2cd..508dd97ca0 100644 vdev = virtio_ccw_get_vdev(sch); if (vq_idx >= VIRTIO_QUEUE_MAX || !virtio_queue_get_num(vdev, vq_idx)) { --- -2.47.3 - diff --git a/kvm-Fix-the-typo-of-vfio-pci-device-s-enable-migration-o.patch b/0053-Fix-the-typo-of-vfio-pci-device-s-enable-migration-o.patch similarity index 85% rename from kvm-Fix-the-typo-of-vfio-pci-device-s-enable-migration-o.patch rename to 0053-Fix-the-typo-of-vfio-pci-device-s-enable-migration-o.patch index 2416ca0..26f17f1 100644 --- a/kvm-Fix-the-typo-of-vfio-pci-device-s-enable-migration-o.patch +++ b/0053-Fix-the-typo-of-vfio-pci-device-s-enable-migration-o.patch @@ -1,7 +1,7 @@ -From 0509eb94d2f166cfd3a24aa5fd14e1af76af8dea Mon Sep 17 00:00:00 2001 +From eaa84431d740547a719a11020feda8ae0ef8834a Mon Sep 17 00:00:00 2001 From: Yanghang Liu Date: Mon, 24 Nov 2025 23:02:37 +0800 -Subject: [PATCH 4/4] Fix the typo of vfio-pci device's enable-migration option +Subject: [PATCH] Fix the typo of vfio-pci device's enable-migration option RH-Author: YangHang Liu RH-MergeRequest: 428: RHEL10: Fix the typo of vfio-pci device's enable-migration option @@ -15,6 +15,10 @@ Reviewed-by: Michael Tokarev Signed-off-by: Michael Tokarev (cherry picked from commit 5f9ac963735598c1efbdce9c4a09f0a64e13d613) Signed-off-by: Yanghang Liu + +Patch-name: kvm-Fix-the-typo-of-vfio-pci-device-s-enable-migration-o.patch +Patch-id: 56 +Patch-present-in-specfile: True --- hw/vfio/pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) @@ -32,6 +36,3 @@ index 83ecffb535..7c057ee2f9 100644 "variant or mdev driver with migration support enabled"); object_class_property_set_description(klass, /* 8.1 */ "vf-token", --- -2.47.3 - diff --git a/kvm-pcie_sriov-Fix-broken-MMIO-accesses-from-SR-IOV-VFs.patch b/0054-pcie_sriov-Fix-broken-MMIO-accesses-from-SR-IOV-VFs.patch similarity index 96% rename from kvm-pcie_sriov-Fix-broken-MMIO-accesses-from-SR-IOV-VFs.patch rename to 0054-pcie_sriov-Fix-broken-MMIO-accesses-from-SR-IOV-VFs.patch index 4e87061..3ce0fad 100644 --- a/kvm-pcie_sriov-Fix-broken-MMIO-accesses-from-SR-IOV-VFs.patch +++ b/0054-pcie_sriov-Fix-broken-MMIO-accesses-from-SR-IOV-VFs.patch @@ -1,7 +1,7 @@ -From 36d73722360db85d210bacef0c8386e5af031447 Mon Sep 17 00:00:00 2001 +From 4bf5116601e58a07863c88426ab408dcc26e0331 Mon Sep 17 00:00:00 2001 From: Damien Bergamini Date: Mon, 1 Sep 2025 15:14:23 +0000 -Subject: [PATCH 1/2] pcie_sriov: Fix broken MMIO accesses from SR-IOV VFs +Subject: [PATCH] pcie_sriov: Fix broken MMIO accesses from SR-IOV VFs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -51,6 +51,10 @@ Message-ID: <20250901151314.1038020-1-clement.mathieu--drif@eviden.com> Signed-off-by: Michael S. Tsirkin (cherry picked from commit 2e54e5fda779a7ba45578884276dca62462f7a06) Signed-off-by: Laurent Vivier + +Patch-name: kvm-pcie_sriov-Fix-broken-MMIO-accesses-from-SR-IOV-VFs.patch +Patch-id: 57 +Patch-present-in-specfile: True --- docs/pcie_sriov.txt | 5 ++--- hw/net/igbvf.c | 6 ++++-- @@ -172,6 +176,3 @@ index aeaa38cf34..b0ea6a62c7 100644 /** * pcie_sriov_pf_init_from_user_created_vfs() - Initialize PF with user-created * VFs, adding ARI to PF --- -2.47.3 - diff --git a/kvm-arm-fix-oob-access-in-compat-handling.patch b/0055-arm-fix-oob-access-in-compat-handling.patch similarity index 87% rename from kvm-arm-fix-oob-access-in-compat-handling.patch rename to 0055-arm-fix-oob-access-in-compat-handling.patch index f27f68b..625ad1e 100644 --- a/kvm-arm-fix-oob-access-in-compat-handling.patch +++ b/0055-arm-fix-oob-access-in-compat-handling.patch @@ -1,7 +1,7 @@ -From c2c080f94d9107273650ebdaf50ca78e8cb2f866 Mon Sep 17 00:00:00 2001 +From fa0a758781fc63888c9af9a585928217fd07c140 Mon Sep 17 00:00:00 2001 From: Sebastian Ott Date: Tue, 25 Nov 2025 09:19:30 +0100 -Subject: [PATCH 2/2] arm: fix oob access in compat handling +Subject: [PATCH] arm: fix oob access in compat handling RH-Author: Sebastian Ott RH-MergeRequest: 430: arm: fix oob access in compat handling @@ -21,6 +21,10 @@ was accessed out of bounds. This led to the weird side effect that the machine type causing migration failures. Fix the length. Signed-off-by: Sebastian Ott + +Patch-name: kvm-arm-fix-oob-access-in-compat-handling.patch +Patch-id: 58 +Patch-present-in-specfile: True --- hw/arm/virt.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) @@ -39,6 +43,3 @@ index e8e64fe7fe..1cfb386f64 100644 /* * RHEL9 kernels have pauth disabled while RHEL10 has it enabled, --- -2.47.3 - diff --git a/kvm-block-backend-Fix-race-when-resuming-queued-requests.patch b/0056-block-backend-Fix-race-when-resuming-queued-requests.patch similarity index 92% rename from kvm-block-backend-Fix-race-when-resuming-queued-requests.patch rename to 0056-block-backend-Fix-race-when-resuming-queued-requests.patch index a9d881b..c8509c2 100644 --- a/kvm-block-backend-Fix-race-when-resuming-queued-requests.patch +++ b/0056-block-backend-Fix-race-when-resuming-queued-requests.patch @@ -1,7 +1,7 @@ -From 1393ba1b8f4ee2b7ec9dcb12317ec2d53c7d793e Mon Sep 17 00:00:00 2001 +From bd02d862e6cdce44a5bf0052db5bf3e6f599934d Mon Sep 17 00:00:00 2001 From: Kevin Wolf Date: Wed, 19 Nov 2025 18:27:20 +0100 -Subject: [PATCH 01/32] block-backend: Fix race when resuming queued requests +Subject: [PATCH] block-backend: Fix race when resuming queued requests RH-Author: Kevin Wolf RH-MergeRequest: 432: block-backend: Fix race when resuming queued requests [c10s] @@ -35,6 +35,10 @@ Reviewed-by: Fiona Ebner Signed-off-by: Kevin Wolf (cherry picked from commit 8eeaa706ba73251063cb80d87ae838d2d5b08e9a) Signed-off-by: Kevin Wolf + +Patch-name: kvm-block-backend-Fix-race-when-resuming-queued-requests.patch +Patch-id: 59 +Patch-present-in-specfile: True --- block/block-backend.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) @@ -68,6 +72,3 @@ index f8d6ba65c1..d6df369188 100644 } qemu_mutex_unlock(&blk->queued_requests_lock); } --- -2.47.3 - diff --git a/kvm-file-posix-Handle-suspended-dm-multipath-better-for-.patch b/0057-file-posix-Handle-suspended-dm-multipath-better-for-.patch similarity index 94% rename from kvm-file-posix-Handle-suspended-dm-multipath-better-for-.patch rename to 0057-file-posix-Handle-suspended-dm-multipath-better-for-.patch index b4dd6ee..13f0664 100644 --- a/kvm-file-posix-Handle-suspended-dm-multipath-better-for-.patch +++ b/0057-file-posix-Handle-suspended-dm-multipath-better-for-.patch @@ -1,8 +1,7 @@ -From 56703080fdf6630d6d844c736f3195b3b7b80f74 Mon Sep 17 00:00:00 2001 +From 0078d9aa02c830ca38a68a1e5b794227c6542c3c Mon Sep 17 00:00:00 2001 From: Kevin Wolf Date: Fri, 28 Nov 2025 23:14:40 +0100 -Subject: [PATCH 02/32] file-posix: Handle suspended dm-multipath better for - SG_IO +Subject: [PATCH] file-posix: Handle suspended dm-multipath better for SG_IO RH-Author: Kevin Wolf RH-MergeRequest: 436: file-posix: Handle suspended dm-multipath better for SG_IO @@ -33,6 +32,10 @@ Message-ID: <20251128221440.89125-1-kwolf@redhat.com> Signed-off-by: Kevin Wolf (cherry picked from commit 2c3165a1a61c299b4a3ae30899e1cc738d20e004) Signed-off-by: Kevin Wolf + +Patch-name: kvm-file-posix-Handle-suspended-dm-multipath-better-for-.patch +Patch-id: 60 +Patch-present-in-specfile: True --- block/file-posix.c | 56 ++++++++++++++++++++++++++++------------------ 1 file changed, 34 insertions(+), 22 deletions(-) @@ -118,6 +121,3 @@ index cb2e94d7db..ffca37130b 100644 return ret; } --- -2.47.3 - diff --git a/kvm-accel-Add-Meson-and-config-support-for-MSHV-accelera.patch b/0058-accel-Add-Meson-and-config-support-for-MSHV-accelera.patch similarity index 95% rename from kvm-accel-Add-Meson-and-config-support-for-MSHV-accelera.patch rename to 0058-accel-Add-Meson-and-config-support-for-MSHV-accelera.patch index 3c906b7..014271d 100644 --- a/kvm-accel-Add-Meson-and-config-support-for-MSHV-accelera.patch +++ b/0058-accel-Add-Meson-and-config-support-for-MSHV-accelera.patch @@ -1,8 +1,7 @@ -From 502e461dabe1eecc22f6a7d22755b8407ee74683 Mon Sep 17 00:00:00 2001 +From da2c7d5f43b53796bfc8e76ea3e9e63c617048ba Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:21 +0200 -Subject: [PATCH 03/32] accel: Add Meson and config support for MSHV - accelerator +Subject: [PATCH] accel: Add Meson and config support for MSHV accelerator MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -26,6 +25,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-2-magnuskulke@linux.microso Signed-off-by: Paolo Bonzini (cherry picked from commit 37e12da5df8eb74042f11e9e7bec8a50b8090adb) Signed-off-by: Igor Mammedov + +Patch-name: kvm-accel-Add-Meson-and-config-support-for-MSHV-accelera.patch +Patch-id: 61 +Patch-present-in-specfile: True --- accel/Kconfig | 3 +++ meson.build | 13 +++++++++++++ @@ -126,6 +129,3 @@ index 4146dbc88d..9aff126c28 100644 --enable-multiprocess) printf "%s" -Dmultiprocess=enabled ;; --disable-multiprocess) printf "%s" -Dmultiprocess=disabled ;; --enable-netmap) printf "%s" -Dnetmap=enabled ;; --- -2.47.3 - diff --git a/kvm-target-i386-emulate-Allow-instruction-decoding-from-.patch b/0059-target-i386-emulate-Allow-instruction-decoding-from-.patch similarity index 95% rename from kvm-target-i386-emulate-Allow-instruction-decoding-from-.patch rename to 0059-target-i386-emulate-Allow-instruction-decoding-from-.patch index 068fd00..8b057c8 100644 --- a/kvm-target-i386-emulate-Allow-instruction-decoding-from-.patch +++ b/0059-target-i386-emulate-Allow-instruction-decoding-from-.patch @@ -1,8 +1,7 @@ -From 35aea0fcc61b1796268f3eae3549721ecd0165fc Mon Sep 17 00:00:00 2001 +From b347fa5c362ac5f1fdcfa5601f4b4a36a2d3798c Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:22 +0200 -Subject: [PATCH 04/32] target/i386/emulate: Allow instruction decoding from - stream +Subject: [PATCH] target/i386/emulate: Allow instruction decoding from stream RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -24,6 +23,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-3-magnuskulke@linux.microso Signed-off-by: Paolo Bonzini (cherry picked from commit 1e25327b244a217078e3fa5df18322c70932f478) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-emulate-Allow-instruction-decoding-from-.patch +Patch-id: 62 +Patch-present-in-specfile: True --- target/i386/emulate/x86_decode.c | 27 +++++++++++++++++++++++---- target/i386/emulate/x86_decode.h | 9 +++++++++ @@ -145,6 +148,3 @@ index a1a961284b..05686b162f 100644 void (*read_mem)(CPUState *cpu, void *data, target_ulong addr, int bytes); void (*write_mem)(CPUState *cpu, void *data, target_ulong addr, int bytes); void (*read_segment_descriptor)(CPUState *cpu, struct x86_segment_descriptor *desc, --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Add-x86-decoder-emu-implementation.patch b/0060-target-i386-mshv-Add-x86-decoder-emu-implementation.patch similarity index 97% rename from kvm-target-i386-mshv-Add-x86-decoder-emu-implementation.patch rename to 0060-target-i386-mshv-Add-x86-decoder-emu-implementation.patch index d64687d..784bd53 100644 --- a/kvm-target-i386-mshv-Add-x86-decoder-emu-implementation.patch +++ b/0060-target-i386-mshv-Add-x86-decoder-emu-implementation.patch @@ -1,7 +1,7 @@ -From 84edc1855313a6a06517794e1b2e65e75691725e Mon Sep 17 00:00:00 2001 +From b49240242f3d6a007abc4027aef16cd0b2f70d8b Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:23 +0200 -Subject: [PATCH 05/32] target/i386/mshv: Add x86 decoder/emu implementation +Subject: [PATCH] target/i386/mshv: Add x86 decoder/emu implementation RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -19,6 +19,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-4-magnuskulke@linux.microso Signed-off-by: Paolo Bonzini (cherry picked from commit 0daf817c80b57e58168309420abf0a8a3d2a60f6) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Add-x86-decoder-emu-implementation.patch +Patch-id: 63 +Patch-present-in-specfile: True --- include/system/mshv.h | 25 +++ target/i386/cpu.h | 2 +- @@ -426,6 +430,3 @@ index 0000000000..d574b3bc52 +{ + return linear_addr(cpu, rip, R_CS); +} --- -2.47.3 - diff --git a/kvm-hw-intc-Generalize-APIC-helper-names-from-kvm_-to-ac.patch b/0061-hw-intc-Generalize-APIC-helper-names-from-kvm_-to-ac.patch similarity index 97% rename from kvm-hw-intc-Generalize-APIC-helper-names-from-kvm_-to-ac.patch rename to 0061-hw-intc-Generalize-APIC-helper-names-from-kvm_-to-ac.patch index 09dbaef..25b3b43 100644 --- a/kvm-hw-intc-Generalize-APIC-helper-names-from-kvm_-to-ac.patch +++ b/0061-hw-intc-Generalize-APIC-helper-names-from-kvm_-to-ac.patch @@ -1,8 +1,7 @@ -From ea903da8f0546ded20f84a3c4f46139a8206609e Mon Sep 17 00:00:00 2001 +From 2dcc4aa67b074801ed831ec53ebeed4fc232dade Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:24 +0200 -Subject: [PATCH 06/32] hw/intc: Generalize APIC helper names from kvm_* to - accel_* +Subject: [PATCH] hw/intc: Generalize APIC helper names from kvm_* to accel_* RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -21,6 +20,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-5-magnuskulke@linux.microso Signed-off-by: Paolo Bonzini (cherry picked from commit 638ac1c78457dd93ccd795b9c6c2673af8c7dd21) Signed-off-by: Igor Mammedov + +Patch-name: kvm-hw-intc-Generalize-APIC-helper-names-from-kvm_-to-ac.patch +Patch-id: 64 +Patch-present-in-specfile: True --- accel/accel-irq.c | 106 +++++++++++++++++++++++++++++++++++++ accel/meson.build | 2 +- @@ -381,6 +384,3 @@ index 342f1ef6a9..2a504ed81f 100644 +int mshv_irqchip_remove_irqfd_notifier_gsi(const EventNotifier *n, int virq); + #endif --- -2.47.3 - diff --git a/kvm-include-hw-hyperv-Add-MSHV-ABI-header-definitions.patch b/0062-include-hw-hyperv-Add-MSHV-ABI-header-definitions.patch similarity index 99% rename from kvm-include-hw-hyperv-Add-MSHV-ABI-header-definitions.patch rename to 0062-include-hw-hyperv-Add-MSHV-ABI-header-definitions.patch index a7351ea..6028702 100644 --- a/kvm-include-hw-hyperv-Add-MSHV-ABI-header-definitions.patch +++ b/0062-include-hw-hyperv-Add-MSHV-ABI-header-definitions.patch @@ -1,7 +1,7 @@ -From 28c5559bcd0f99ca2f361705f7cada968c83eb49 Mon Sep 17 00:00:00 2001 +From ad7d252b610d0cb1cde75dbe3e04db1d6e8ca807 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:25 +0200 -Subject: [PATCH 07/32] include/hw/hyperv: Add MSHV ABI header definitions +Subject: [PATCH] include/hw/hyperv: Add MSHV ABI header definitions RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -22,6 +22,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-6-magnuskulke@linux.microso Signed-off-by: Paolo Bonzini (cherry picked from commit 7db6086287502ad5a015ccc31e85ec9cac7e2716) Signed-off-by: Igor Mammedov + +Patch-name: kvm-include-hw-hyperv-Add-MSHV-ABI-header-definitions.patch +Patch-id: 65 +Patch-present-in-specfile: True --- include/hw/hyperv/hvgdk.h | 20 + include/hw/hyperv/hvgdk_mini.h | 817 ++++++++++++++++++++++++++++++++ @@ -1259,6 +1263,3 @@ index 717c379f9e..828a7809f7 100755 cp "$hdrdir/include/linux/$header" "$output/linux-headers/linux" done --- -2.47.3 - diff --git a/kvm-linux-headers-linux-Add-mshv.h-headers.patch b/0063-linux-headers-linux-Add-mshv.h-headers.patch similarity index 97% rename from kvm-linux-headers-linux-Add-mshv.h-headers.patch rename to 0063-linux-headers-linux-Add-mshv.h-headers.patch index 1c389db..ea1fdc1 100644 --- a/kvm-linux-headers-linux-Add-mshv.h-headers.patch +++ b/0063-linux-headers-linux-Add-mshv.h-headers.patch @@ -1,7 +1,7 @@ -From 38642c3d90746f63ecc1f961ac7ef52b019c1132 Mon Sep 17 00:00:00 2001 +From d0ad38d558917e602d8b85d0737e0dbb38c19a9c Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:26 +0200 -Subject: [PATCH 08/32] linux-headers/linux: Add mshv.h headers +Subject: [PATCH] linux-headers/linux: Add mshv.h headers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -22,6 +22,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-7-magnuskulke@linux.microso Signed-off-by: Paolo Bonzini (cherry picked from commit a6d6878650a0f4982918e8cd9d7ea6c3c3c681f7) Signed-off-by: Igor Mammedov + +Patch-name: kvm-linux-headers-linux-Add-mshv.h-headers.patch +Patch-id: 66 +Patch-present-in-specfile: True --- linux-headers/linux/mshv.h | 291 +++++++++++++++++++++++++++++++++++++ 1 file changed, 291 insertions(+) @@ -324,6 +328,3 @@ index 0000000000..5bc83db6a3 + */ + +#endif --- -2.47.3 - diff --git a/kvm-accel-mshv-Add-accelerator-skeleton.patch b/0064-accel-mshv-Add-accelerator-skeleton.patch similarity index 97% rename from kvm-accel-mshv-Add-accelerator-skeleton.patch rename to 0064-accel-mshv-Add-accelerator-skeleton.patch index e14da46..3514090 100644 --- a/kvm-accel-mshv-Add-accelerator-skeleton.patch +++ b/0064-accel-mshv-Add-accelerator-skeleton.patch @@ -1,7 +1,7 @@ -From a491ddf980ed1c8a54ba06db007d770817554b91 Mon Sep 17 00:00:00 2001 +From 22dc2eb8f036f562d7867d1827c4c66f4488a48e Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Thu, 2 Oct 2025 18:25:02 +0200 -Subject: [PATCH 09/32] accel/mshv: Add accelerator skeleton +Subject: [PATCH] accel/mshv: Add accelerator skeleton RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -22,6 +22,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-8-magnuskulke@linux.microso Signed-off-by: Paolo Bonzini (cherry picked from commit d0d2918f968c55628e17e2733b799fcefb50f16b) Signed-off-by: Igor Mammedov + +Patch-name: kvm-accel-mshv-Add-accelerator-skeleton.patch +Patch-id: 67 +Patch-present-in-specfile: True --- accel/meson.build | 1 + accel/mshv/meson.build | 6 ++ @@ -286,6 +290,3 @@ index 0000000000..132491b599 +}; + +#endif --- -2.47.3 - diff --git a/kvm-accel-mshv-Register-memory-region-listeners.patch b/0065-accel-mshv-Register-memory-region-listeners.patch similarity index 95% rename from kvm-accel-mshv-Register-memory-region-listeners.patch rename to 0065-accel-mshv-Register-memory-region-listeners.patch index 044407a..421c049 100644 --- a/kvm-accel-mshv-Register-memory-region-listeners.patch +++ b/0065-accel-mshv-Register-memory-region-listeners.patch @@ -1,7 +1,7 @@ -From 1c84d5e352e60196218f657292e7f26226ab9647 Mon Sep 17 00:00:00 2001 +From 49e8b7e37e4e481be6a821ec6482c4e8b04e4573 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:28 +0200 -Subject: [PATCH 10/32] accel/mshv: Register memory region listeners +Subject: [PATCH] accel/mshv: Register memory region listeners RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -24,6 +24,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-9-magnuskulke@linux.microso Signed-off-by: Paolo Bonzini (cherry picked from commit 5006ea1344d134356a9b2e1afd521cf8df0c6a85) Signed-off-by: Igor Mammedov + +Patch-name: kvm-accel-mshv-Register-memory-region-listeners.patch +Patch-id: 68 +Patch-present-in-specfile: True --- accel/mshv/mem.c | 25 +++++++++++++++ accel/mshv/meson.build | 1 + @@ -167,6 +171,3 @@ index 132491b599..cfa177ff72 100644 + bool add); + #endif --- -2.47.3 - diff --git a/kvm-accel-mshv-Initialize-VM-partition.patch b/0066-accel-mshv-Initialize-VM-partition.patch similarity index 99% rename from kvm-accel-mshv-Initialize-VM-partition.patch rename to 0066-accel-mshv-Initialize-VM-partition.patch index da24863..e6cffa3 100644 --- a/kvm-accel-mshv-Initialize-VM-partition.patch +++ b/0066-accel-mshv-Initialize-VM-partition.patch @@ -1,7 +1,7 @@ -From f2010418608cbbfe00095d628d74006d69e83138 Mon Sep 17 00:00:00 2001 +From 1c302b4f9597e6666587370392141cd90b723819 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Thu, 2 Oct 2025 18:28:16 +0200 -Subject: [PATCH 11/32] accel/mshv: Initialize VM partition +Subject: [PATCH] accel/mshv: Initialize VM partition RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -21,6 +21,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-10-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit c5f23bccde416aab52fe14dec6f6716a85f0cd04) Signed-off-by: Igor Mammedov + +Patch-name: kvm-accel-mshv-Initialize-VM-partition.patch +Patch-id: 69 +Patch-present-in-specfile: True --- accel/mshv/irq.c | 399 +++++++++++++++++++++++++++++++++++ accel/mshv/mem.c | 129 ++++++++++- @@ -1297,6 +1301,3 @@ index 0000000000..de0c26bc6c + + return ret; +} --- -2.47.3 - diff --git a/kvm-treewide-rename-qemu_wait_io_event-qemu_wait_io_even.patch b/0067-treewide-rename-qemu_wait_io_event-qemu_wait_io_even.patch similarity index 96% rename from kvm-treewide-rename-qemu_wait_io_event-qemu_wait_io_even.patch rename to 0067-treewide-rename-qemu_wait_io_event-qemu_wait_io_even.patch index c894679..7c6d434 100644 --- a/kvm-treewide-rename-qemu_wait_io_event-qemu_wait_io_even.patch +++ b/0067-treewide-rename-qemu_wait_io_event-qemu_wait_io_even.patch @@ -1,8 +1,7 @@ -From 8aa1e85d4a67cbe79da787ddfbe5d65395cd5daf Mon Sep 17 00:00:00 2001 +From d6f3367b197d060d35aeeb781828d0ca4e3dc584 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Tue, 2 Sep 2025 07:17:09 +0200 -Subject: [PATCH 12/32] treewide: rename - qemu_wait_io_event/qemu_wait_io_event_common +Subject: [PATCH] treewide: rename qemu_wait_io_event/qemu_wait_io_event_common RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -22,6 +21,10 @@ Signed-off-by: Igor Mammedov Conflicts: (due to missing cpu exit/interrupt_request refactoring) cpu-common.c include/hw/core/cpu.h + +Patch-name: kvm-treewide-rename-qemu_wait_io_event-qemu_wait_io_even.patch +Patch-id: 70 +Patch-present-in-specfile: True --- accel/dummy-cpus.c | 2 +- accel/hvf/hvf-accel-ops.c | 2 +- @@ -214,6 +217,3 @@ index da58805b1a..2ca4ee0263 100644 } while (!cpu->unplug || cpu_can_run(cpu)); whpx_destroy_vcpu(cpu); --- -2.47.3 - diff --git a/kvm-accel-mshv-Add-vCPU-creation-and-execution-loop.patch b/0068-accel-mshv-Add-vCPU-creation-and-execution-loop.patch similarity index 97% rename from kvm-accel-mshv-Add-vCPU-creation-and-execution-loop.patch rename to 0068-accel-mshv-Add-vCPU-creation-and-execution-loop.patch index a74a8cb..f5f28a9 100644 --- a/kvm-accel-mshv-Add-vCPU-creation-and-execution-loop.patch +++ b/0068-accel-mshv-Add-vCPU-creation-and-execution-loop.patch @@ -1,7 +1,7 @@ -From da65137c39b3662f0288b5149b14c82d2cfa4000 Mon Sep 17 00:00:00 2001 +From 2d8f8fb4690faad8f1b9a93af2aad04a0502acb2 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:30 +0200 -Subject: [PATCH 13/32] accel/mshv: Add vCPU creation and execution loop +Subject: [PATCH] accel/mshv: Add vCPU creation and execution loop RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -24,6 +24,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-11-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 4dc5d4257259764b6fcd035870517fc4140d8962) Signed-off-by: Igor Mammedov + +Patch-name: kvm-accel-mshv-Add-vCPU-creation-and-execution-loop.patch +Patch-id: 71 +Patch-present-in-specfile: True --- accel/mshv/mshv-all.c | 186 +++++++++++++++++++++++++++++++++--- accel/mshv/trace-events | 2 + @@ -412,6 +416,3 @@ index de0c26bc6c..02d71ebc14 100644 /* * Default Microsoft Hypervisor behavior for unimplemented MSR is to send a * fault to the guest if it tries to access it. It is possible to override --- -2.47.3 - diff --git a/kvm-accel-mshv-Add-vCPU-signal-handling.patch b/0069-accel-mshv-Add-vCPU-signal-handling.patch similarity index 91% rename from kvm-accel-mshv-Add-vCPU-signal-handling.patch rename to 0069-accel-mshv-Add-vCPU-signal-handling.patch index 918e2b4..d858613 100644 --- a/kvm-accel-mshv-Add-vCPU-signal-handling.patch +++ b/0069-accel-mshv-Add-vCPU-signal-handling.patch @@ -1,7 +1,7 @@ -From 38112aed4e07ec8f43b552f887bc2077e443ba4b Mon Sep 17 00:00:00 2001 +From f291987a12ea9ff0d7c3bed02fb23faea42f5523 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:31 +0200 -Subject: [PATCH 14/32] accel/mshv: Add vCPU signal handling +Subject: [PATCH] accel/mshv: Add vCPU signal handling RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -18,6 +18,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-12-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 575df4df54e060661db45e6f80293b29ea8901c1) Signed-off-by: Igor Mammedov + +Patch-name: kvm-accel-mshv-Add-vCPU-signal-handling.patch +Patch-id: 72 +Patch-present-in-specfile: True --- accel/mshv/mshv-all.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) @@ -70,6 +74,3 @@ index e02421d79d..fa1f8f35bd 100644 /* signal CPU creation */ cpu_thread_signal_created(cpu); --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Add-CPU-create-and-remove-logic.patch b/0070-target-i386-mshv-Add-CPU-create-and-remove-logic.patch similarity index 89% rename from kvm-target-i386-mshv-Add-CPU-create-and-remove-logic.patch rename to 0070-target-i386-mshv-Add-CPU-create-and-remove-logic.patch index a5f72f5..9763142 100644 --- a/kvm-target-i386-mshv-Add-CPU-create-and-remove-logic.patch +++ b/0070-target-i386-mshv-Add-CPU-create-and-remove-logic.patch @@ -1,7 +1,7 @@ -From 890cb9e42509e42471bc48dc6ddf0283a0b5e8f5 Mon Sep 17 00:00:00 2001 +From 8033e3b98bda1261f95770b68f6337cc6d66bf9d Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:32 +0200 -Subject: [PATCH 15/32] target/i386/mshv: Add CPU create and remove logic +Subject: [PATCH] target/i386/mshv: Add CPU create and remove logic RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -18,6 +18,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-13-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 4ed605c06e743b2ec0bfe35954d88b8c64dd3767) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Add-CPU-create-and-remove-logic.patch +Patch-id: 73 +Patch-present-in-specfile: True --- target/i386/mshv/mshv-cpu.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) @@ -71,6 +75,3 @@ index 02d71ebc14..5069ab7a22 100644 } void mshv_arch_init_vcpu(CPUState *cpu) --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Implement-mshv_store_regs.patch b/0071-target-i386-mshv-Implement-mshv_store_regs.patch similarity index 96% rename from kvm-target-i386-mshv-Implement-mshv_store_regs.patch rename to 0071-target-i386-mshv-Implement-mshv_store_regs.patch index aa3e8d0..0ff4cb5 100644 --- a/kvm-target-i386-mshv-Implement-mshv_store_regs.patch +++ b/0071-target-i386-mshv-Implement-mshv_store_regs.patch @@ -1,7 +1,7 @@ -From 00d2e933423d093c34265d5e8056461308a738f3 Mon Sep 17 00:00:00 2001 +From 2096f4c0379df09a24a0cab1fc8902bba669b632 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Thu, 2 Oct 2025 18:13:31 +0200 -Subject: [PATCH 16/32] target/i386/mshv: Implement mshv_store_regs() +Subject: [PATCH] target/i386/mshv: Implement mshv_store_regs() RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -21,6 +21,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-14-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 2bd7a6aa4743ee85c77c0520e8b422b3bfeab386) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Implement-mshv_store_regs.patch +Patch-id: 74 +Patch-present-in-specfile: True --- include/system/mshv.h | 1 + include/system/mshv_int.h | 2 + @@ -183,6 +187,3 @@ index 5069ab7a22..9ead03ca2d 100644 int mshv_load_regs(CPUState *cpu) { error_report("unimplemented"); --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Implement-mshv_get_standard_regs.patch b/0072-target-i386-mshv-Implement-mshv_get_standard_regs.patch similarity index 95% rename from kvm-target-i386-mshv-Implement-mshv_get_standard_regs.patch rename to 0072-target-i386-mshv-Implement-mshv_get_standard_regs.patch index e68b281..88b6d73 100644 --- a/kvm-target-i386-mshv-Implement-mshv_get_standard_regs.patch +++ b/0072-target-i386-mshv-Implement-mshv_get_standard_regs.patch @@ -1,7 +1,7 @@ -From 11393f9a7ff5fa2ec3182025fe5ba052d5fecee0 Mon Sep 17 00:00:00 2001 +From a60b80bb7d9969cdb0f4281c16104bf1ddc5163d Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:34 +0200 -Subject: [PATCH 17/32] target/i386/mshv: Implement mshv_get_standard_regs() +Subject: [PATCH] target/i386/mshv: Implement mshv_get_standard_regs() RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -23,6 +23,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-15-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 66480a048a01fc833ba153410282609f26166141) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Implement-mshv_get_standard_regs.patch +Patch-id: 75 +Patch-present-in-specfile: True --- include/system/mshv_int.h | 1 + target/i386/mshv/mshv-cpu.c | 116 +++++++++++++++++++++++++++++++++++- @@ -177,6 +181,3 @@ index 9ead03ca2d..4e3eee113b 100644 } int mshv_arch_put_registers(const CPUState *cpu) --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Implement-mshv_get_special_regs.patch b/0073-target-i386-mshv-Implement-mshv_get_special_regs.patch similarity index 95% rename from kvm-target-i386-mshv-Implement-mshv_get_special_regs.patch rename to 0073-target-i386-mshv-Implement-mshv_get_special_regs.patch index 9cede6e..904a389 100644 --- a/kvm-target-i386-mshv-Implement-mshv_get_special_regs.patch +++ b/0073-target-i386-mshv-Implement-mshv_get_special_regs.patch @@ -1,7 +1,7 @@ -From 30862bd55b3d5c95a051638ec49013e64596f46d Mon Sep 17 00:00:00 2001 +From f72c428f6ebc373a6cbe566a7f99db8b7d03efd0 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:35 +0200 -Subject: [PATCH 18/32] target/i386/mshv: Implement mshv_get_special_regs() +Subject: [PATCH] target/i386/mshv: Implement mshv_get_special_regs() RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -22,6 +22,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-16-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 0382c2c8544da66619d16988caaab8e3d9e881d4) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Implement-mshv_get_special_regs.patch +Patch-id: 76 +Patch-present-in-specfile: True --- include/system/mshv_int.h | 1 + target/i386/mshv/mshv-cpu.c | 104 ++++++++++++++++++++++++++++++++++++ @@ -168,6 +172,3 @@ index 4e3eee113b..bc75686f82 100644 return 0; } --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Implement-mshv_arch_put_registers.patch b/0074-target-i386-mshv-Implement-mshv_arch_put_registers.patch similarity index 97% rename from kvm-target-i386-mshv-Implement-mshv_arch_put_registers.patch rename to 0074-target-i386-mshv-Implement-mshv_arch_put_registers.patch index b73fa87..2fe091b 100644 --- a/kvm-target-i386-mshv-Implement-mshv_arch_put_registers.patch +++ b/0074-target-i386-mshv-Implement-mshv_arch_put_registers.patch @@ -1,7 +1,7 @@ -From 78ed99e6783511368371defaebda4cc450a6e266 Mon Sep 17 00:00:00 2001 +From f3e0329c1ce6d3b147baad937f0261ecb2c9f542 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:36 +0200 -Subject: [PATCH 19/32] target/i386/mshv: Implement mshv_arch_put_registers() +Subject: [PATCH] target/i386/mshv: Implement mshv_arch_put_registers() RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -19,6 +19,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-17-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 25a1d871e0f19bbf8fee471af5fefec52465bb09) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Implement-mshv_arch_put_registers.patch +Patch-id: 77 +Patch-present-in-specfile: True --- include/system/mshv_int.h | 15 +++ target/i386/mshv/mshv-cpu.c | 237 ++++++++++++++++++++++++++++++++++++ @@ -314,6 +318,3 @@ index bc75686f82..8b10c79e54 100644 error_report("unimplemented"); abort(); } --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Set-local-interrupt-controller-stat.patch b/0075-target-i386-mshv-Set-local-interrupt-controller-stat.patch similarity index 95% rename from kvm-target-i386-mshv-Set-local-interrupt-controller-stat.patch rename to 0075-target-i386-mshv-Set-local-interrupt-controller-stat.patch index 0a0ef11..13e2000 100644 --- a/kvm-target-i386-mshv-Set-local-interrupt-controller-stat.patch +++ b/0075-target-i386-mshv-Set-local-interrupt-controller-stat.patch @@ -1,7 +1,7 @@ -From 140f8cbaa8665f281fe3e47c81cfd0c306f02d8b Mon Sep 17 00:00:00 2001 +From a03d8784b3b02cc0bd7ff04db10e4ebcece41b54 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:37 +0200 -Subject: [PATCH 20/32] target/i386/mshv: Set local interrupt controller state +Subject: [PATCH] target/i386/mshv: Set local interrupt controller state RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -18,6 +18,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-18-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit ca20d46fa94887a6e42061646a71ee44cbc9adb0) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Set-local-interrupt-controller-stat.patch +Patch-id: 78 +Patch-present-in-specfile: True --- target/i386/mshv/mshv-cpu.c | 117 ++++++++++++++++++++++++++++++++++++ 1 file changed, 117 insertions(+) @@ -178,6 +182,3 @@ index 8b10c79e54..0fe3cbb48d 100644 return 0; } --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Register-CPUID-entries-with-MSHV.patch b/0076-target-i386-mshv-Register-CPUID-entries-with-MSHV.patch similarity index 97% rename from kvm-target-i386-mshv-Register-CPUID-entries-with-MSHV.patch rename to 0076-target-i386-mshv-Register-CPUID-entries-with-MSHV.patch index 678f176..6b419ea 100644 --- a/kvm-target-i386-mshv-Register-CPUID-entries-with-MSHV.patch +++ b/0076-target-i386-mshv-Register-CPUID-entries-with-MSHV.patch @@ -1,7 +1,7 @@ -From d122c4cbb920e5d20ee70da4496b2b686319532f Mon Sep 17 00:00:00 2001 +From 9b579f8392e7c71e60e5791f3b7980774a6253e1 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:38 +0200 -Subject: [PATCH 21/32] target/i386/mshv: Register CPUID entries with MSHV +Subject: [PATCH] target/i386/mshv: Register CPUID entries with MSHV RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -19,6 +19,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-19-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 4fa04dd16216e266564606b7da582e5fce07bced) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Register-CPUID-entries-with-MSHV.patch +Patch-id: 79 +Patch-present-in-specfile: True --- target/i386/mshv/mshv-cpu.c | 206 ++++++++++++++++++++++++++++++++++++ 1 file changed, 206 insertions(+) @@ -247,6 +251,3 @@ index 0fe3cbb48d..2b7a81274b 100644 ret = set_cpu_state(cpu, fpu, xcr0); if (ret < 0) { error_report("failed to set cpu state"); --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Register-MSRs-with-MSHV.patch b/0077-target-i386-mshv-Register-MSRs-with-MSHV.patch similarity index 98% rename from kvm-target-i386-mshv-Register-MSRs-with-MSHV.patch rename to 0077-target-i386-mshv-Register-MSRs-with-MSHV.patch index abda761..4122c7b 100644 --- a/kvm-target-i386-mshv-Register-MSRs-with-MSHV.patch +++ b/0077-target-i386-mshv-Register-MSRs-with-MSHV.patch @@ -1,7 +1,7 @@ -From 5bbfd219b62bdea50ee0d16396f7eed138f7771f Mon Sep 17 00:00:00 2001 +From 100c5e414f7867193fc2973660a6cabbf75f318f Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Thu, 2 Oct 2025 18:19:22 +0200 -Subject: [PATCH 22/32] target/i386/mshv: Register MSRs with MSHV +Subject: [PATCH] target/i386/mshv: Register MSRs with MSHV RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -19,6 +19,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-20-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit f38e2a63e541730e114f6ed09e5f8719e388c8db) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Register-MSRs-with-MSHV.patch +Patch-id: 80 +Patch-present-in-specfile: True --- accel/mshv/meson.build | 1 + accel/mshv/msr.c | 375 ++++++++++++++++++++++++++++++++++++ @@ -523,6 +527,3 @@ index 2b7a81274b..1f43dfc58a 100644 ret = set_cpu_state(cpu, fpu, xcr0); if (ret < 0) { error_report("failed to set cpu state"); --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Integrate-x86-instruction-decoder-e.patch b/0078-target-i386-mshv-Integrate-x86-instruction-decoder-e.patch similarity index 97% rename from kvm-target-i386-mshv-Integrate-x86-instruction-decoder-e.patch rename to 0078-target-i386-mshv-Integrate-x86-instruction-decoder-e.patch index 3dc0f45..d00b198 100644 --- a/kvm-target-i386-mshv-Integrate-x86-instruction-decoder-e.patch +++ b/0078-target-i386-mshv-Integrate-x86-instruction-decoder-e.patch @@ -1,8 +1,7 @@ -From 3d2a5157c0ad300f954ba9b3fddadd4da5120eac Mon Sep 17 00:00:00 2001 +From 0f233bbf8c0eafdef5d1d4ceb9fcd5264dec029e Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:40 +0200 -Subject: [PATCH 23/32] target/i386/mshv: Integrate x86 instruction - decoder/emulator +Subject: [PATCH] target/i386/mshv: Integrate x86 instruction decoder/emulator RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -26,6 +25,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-21-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 9bc6a1d29605a13c541629a651e41787af65a963) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Integrate-x86-instruction-decoder-e.patch +Patch-id: 81 +Patch-present-in-specfile: True --- accel/mshv/mem.c | 65 +++++++++++++++++ include/system/mshv_int.h | 4 ++ @@ -278,6 +281,3 @@ index 1f43dfc58a..424ebdb122 100644 } void mshv_arch_init_vcpu(CPUState *cpu) --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Write-MSRs-to-the-hypervisor.patch b/0079-target-i386-mshv-Write-MSRs-to-the-hypervisor.patch similarity index 93% rename from kvm-target-i386-mshv-Write-MSRs-to-the-hypervisor.patch rename to 0079-target-i386-mshv-Write-MSRs-to-the-hypervisor.patch index 6ec7aa4..70e01c9 100644 --- a/kvm-target-i386-mshv-Write-MSRs-to-the-hypervisor.patch +++ b/0079-target-i386-mshv-Write-MSRs-to-the-hypervisor.patch @@ -1,7 +1,7 @@ -From 07b03c6440308cb6294ee2d2e4518df052b2a363 Mon Sep 17 00:00:00 2001 +From 8e713b554eac614d11513364580ffc8e5723645a Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:41 +0200 -Subject: [PATCH 24/32] target/i386/mshv: Write MSRs to the hypervisor +Subject: [PATCH] target/i386/mshv: Write MSRs to the hypervisor RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -18,6 +18,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-22-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 64118f452cbd97cd9fa790b1c15b65b435f136d2) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Write-MSRs-to-the-hypervisor.patch +Patch-id: 82 +Patch-present-in-specfile: True --- target/i386/mshv/mshv-cpu.c | 68 +++++++++++++++++++++++++++++++++++-- 1 file changed, 66 insertions(+), 2 deletions(-) @@ -108,6 +112,3 @@ index 424ebdb122..33a3ce8b11 100644 } void mshv_arch_amend_proc_features( --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Implement-mshv_vcpu_run.patch b/0080-target-i386-mshv-Implement-mshv_vcpu_run.patch similarity index 98% rename from kvm-target-i386-mshv-Implement-mshv_vcpu_run.patch rename to 0080-target-i386-mshv-Implement-mshv_vcpu_run.patch index b76928c..9e12cb8 100644 --- a/kvm-target-i386-mshv-Implement-mshv_vcpu_run.patch +++ b/0080-target-i386-mshv-Implement-mshv_vcpu_run.patch @@ -1,7 +1,7 @@ -From 334e33f443ce36355a29909ee41f49789ddae6d4 Mon Sep 17 00:00:00 2001 +From 4c7f452f08434460dd37f604d985588b248d7759 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:42 +0200 -Subject: [PATCH 25/32] target/i386/mshv: Implement mshv_vcpu_run() +Subject: [PATCH] target/i386/mshv: Implement mshv_vcpu_run() RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -23,6 +23,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-23-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 6dec60528c419781f1f79cd9837d5f26415a3fd7) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Implement-mshv_vcpu_run.patch +Patch-id: 83 +Patch-present-in-specfile: True --- target/i386/mshv/mshv-cpu.c | 444 +++++++++++++++++++++++++++++++++++- 1 file changed, 442 insertions(+), 2 deletions(-) @@ -484,6 +488,3 @@ index 33a3ce8b11..7edc032cea 100644 } void mshv_remove_vcpu(int vm_fd, int cpu_fd) --- -2.47.3 - diff --git a/kvm-accel-mshv-Handle-overlapping-mem-mappings.patch b/0081-accel-mshv-Handle-overlapping-mem-mappings.patch similarity index 98% rename from kvm-accel-mshv-Handle-overlapping-mem-mappings.patch rename to 0081-accel-mshv-Handle-overlapping-mem-mappings.patch index 92181b5..1718c8b 100644 --- a/kvm-accel-mshv-Handle-overlapping-mem-mappings.patch +++ b/0081-accel-mshv-Handle-overlapping-mem-mappings.patch @@ -1,7 +1,7 @@ -From c6e4e7657d407507a5e8cc6daadc6f309e8a42e9 Mon Sep 17 00:00:00 2001 +From ccc3eea713711a301281dd8ae0f5197cbcc7ac4a Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:43 +0200 -Subject: [PATCH 26/32] accel/mshv: Handle overlapping mem mappings +Subject: [PATCH] accel/mshv: Handle overlapping mem mappings RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -43,6 +43,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-24-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit efc4093358511a58846a409b965213aa1bb9f31a) Signed-off-by: Igor Mammedov + +Patch-name: kvm-accel-mshv-Handle-overlapping-mem-mappings.patch +Patch-id: 84 +Patch-present-in-specfile: True --- accel/mshv/mem.c | 406 +++++++++++++++++++++++++++++++++--- accel/mshv/mshv-all.c | 2 + @@ -690,6 +694,3 @@ index 7edc032cea..de87142bff 100644 case HVMSG_GPA_INTERCEPT: ret = handle_mmio(cpu, msg, &exit_reason); if (ret < 0) { --- -2.47.3 - diff --git a/kvm-qapi-accel-Allow-to-query-mshv-capabilities.patch b/0082-qapi-accel-Allow-to-query-mshv-capabilities.patch similarity index 95% rename from kvm-qapi-accel-Allow-to-query-mshv-capabilities.patch rename to 0082-qapi-accel-Allow-to-query-mshv-capabilities.patch index 5cac472..7ddf854 100644 --- a/kvm-qapi-accel-Allow-to-query-mshv-capabilities.patch +++ b/0082-qapi-accel-Allow-to-query-mshv-capabilities.patch @@ -1,7 +1,7 @@ -From 4c29e56da6378dcd55336748d65a777ac85a7fc8 Mon Sep 17 00:00:00 2001 +From 10f9371fe319b86ceb363b9516438c1ee9cf9656 Mon Sep 17 00:00:00 2001 From: Praveen K Paladugu Date: Tue, 16 Sep 2025 18:48:44 +0200 -Subject: [PATCH 27/32] qapi/accel: Allow to query mshv capabilities +Subject: [PATCH] qapi/accel: Allow to query mshv capabilities RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -19,6 +19,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-25-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit e7b08dfb902430b4f8226d23d7cf9b2762b6fc83) Signed-off-by: Igor Mammedov + +Patch-name: kvm-qapi-accel-Allow-to-query-mshv-capabilities.patch +Patch-id: 85 +Patch-present-in-specfile: True --- hmp-commands-info.hx | 13 +++++++++++++ hw/core/machine-hmp-cmds.c | 15 +++++++++++++++ @@ -164,6 +168,3 @@ index fb28c8d920..664e027246 100644 +# <- { "return": { "enabled": true, "present": true } } +## +{ 'command': 'query-mshv', 'returns': 'MshvInfo' } --- -2.47.3 - diff --git a/kvm-target-i386-mshv-Use-preallocated-page-for-hvcall.patch b/0083-target-i386-mshv-Use-preallocated-page-for-hvcall.patch similarity index 96% rename from kvm-target-i386-mshv-Use-preallocated-page-for-hvcall.patch rename to 0083-target-i386-mshv-Use-preallocated-page-for-hvcall.patch index 259c3b4..b867356 100644 --- a/kvm-target-i386-mshv-Use-preallocated-page-for-hvcall.patch +++ b/0083-target-i386-mshv-Use-preallocated-page-for-hvcall.patch @@ -1,7 +1,7 @@ -From 553c58c0e1560ee83e90b1751ec79874a0a7addf Mon Sep 17 00:00:00 2001 +From 8cf57c4a254598ba434e1322af26e473e1382c73 Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Thu, 2 Oct 2025 09:50:12 +0200 -Subject: [PATCH 28/32] target/i386/mshv: Use preallocated page for hvcall +Subject: [PATCH] target/i386/mshv: Use preallocated page for hvcall RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -21,6 +21,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-26-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit e4a20afce59937073298d716cc829bdc026542dc) Signed-off-by: Igor Mammedov + +Patch-name: kvm-target-i386-mshv-Use-preallocated-page-for-hvcall.patch +Patch-id: 86 +Patch-present-in-specfile: True --- accel/mshv/mshv-all.c | 2 +- include/system/mshv_int.h | 7 +++++++ @@ -188,6 +192,3 @@ index de87142bff..1f7b9cb37e 100644 g_clear_pointer(&env->emu_mmio_buf, g_free); } --- -2.47.3 - diff --git a/kvm-docs-Add-mshv-to-documentation.patch b/0084-docs-Add-mshv-to-documentation.patch similarity index 96% rename from kvm-docs-Add-mshv-to-documentation.patch rename to 0084-docs-Add-mshv-to-documentation.patch index 5de3b56..493588d 100644 --- a/kvm-docs-Add-mshv-to-documentation.patch +++ b/0084-docs-Add-mshv-to-documentation.patch @@ -1,7 +1,7 @@ -From a42a299252fd1c53600387a81924adee6fa761f6 Mon Sep 17 00:00:00 2001 +From 394307bb31702b6dece1df0d4dc14e8bd19b0bec Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:46 +0200 -Subject: [PATCH 29/32] docs: Add mshv to documentation +Subject: [PATCH] docs: Add mshv to documentation RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -17,6 +17,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-27-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 3af71a1a6a7a497df7d3026239d6136b56e3d5ab) Signed-off-by: Igor Mammedov + +Patch-name: kvm-docs-Add-mshv-to-documentation.patch +Patch-id: 87 +Patch-present-in-specfile: True --- docs/about/build-platforms.rst | 2 +- docs/devel/codebase.rst | 2 +- @@ -138,6 +142,3 @@ index 5f146c1860..8eca7faa94 100644 specified, the next one is used if the previous one fails to initialize. --- -2.47.3 - diff --git a/kvm-MAINTAINERS-Add-maintainers-for-mshv-accelerator.patch b/0085-MAINTAINERS-Add-maintainers-for-mshv-accelerator.patch similarity index 86% rename from kvm-MAINTAINERS-Add-maintainers-for-mshv-accelerator.patch rename to 0085-MAINTAINERS-Add-maintainers-for-mshv-accelerator.patch index 0db0143..ac64c91 100644 --- a/kvm-MAINTAINERS-Add-maintainers-for-mshv-accelerator.patch +++ b/0085-MAINTAINERS-Add-maintainers-for-mshv-accelerator.patch @@ -1,7 +1,7 @@ -From 5807bd68ad5c038a57ffb2f665f732dfc51d8868 Mon Sep 17 00:00:00 2001 +From 678f73d1b85bab0d47f11d23df186a6797b2da8e Mon Sep 17 00:00:00 2001 From: Magnus Kulke Date: Tue, 16 Sep 2025 18:48:47 +0200 -Subject: [PATCH 30/32] MAINTAINERS: Add maintainers for mshv accelerator +Subject: [PATCH] MAINTAINERS: Add maintainers for mshv accelerator RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -19,6 +19,10 @@ Link: https://lore.kernel.org/r/20250916164847.77883-28-magnuskulke@linux.micros Signed-off-by: Paolo Bonzini (cherry picked from commit 1872bd9f2dad5113b0c27d352ec49683e0953c7f) Signed-off-by: Igor Mammedov + +Patch-name: kvm-MAINTAINERS-Add-maintainers-for-mshv-accelerator.patch +Patch-id: 88 +Patch-present-in-specfile: True --- MAINTAINERS | 15 +++++++++++++++ 1 file changed, 15 insertions(+) @@ -49,6 +53,3 @@ index a07086ed76..d4696f00d7 100644 X86 Instruction Emulator M: Cameron Esfahani M: Roman Bolshakov --- -2.47.3 - diff --git a/kvm-accel-mshv-initialize-thread-name.patch b/0086-accel-mshv-initialize-thread-name.patch similarity index 85% rename from kvm-accel-mshv-initialize-thread-name.patch rename to 0086-accel-mshv-initialize-thread-name.patch index 71554c0..ee56adf 100644 --- a/kvm-accel-mshv-initialize-thread-name.patch +++ b/0086-accel-mshv-initialize-thread-name.patch @@ -1,7 +1,7 @@ -From f102098ed05c9157f2cffb4ffef8324c4f83f005 Mon Sep 17 00:00:00 2001 +From 8b6f5eb5eee8bac91997ab49a0f07d7d23db387c Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Wed, 22 Oct 2025 14:52:48 +0200 -Subject: [PATCH 31/32] accel/mshv: initialize thread name +Subject: [PATCH] accel/mshv: initialize thread name RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -16,6 +16,10 @@ accelerators. Coverity knows (CID 1641400). Fix it. Signed-off-by: Paolo Bonzini (cherry picked from commit 2cd3c1d35a06a62b25afa80c5baf381ce4b56805) Signed-off-by: Igor Mammedov + +Patch-name: kvm-accel-mshv-initialize-thread-name.patch +Patch-id: 89 +Patch-present-in-specfile: True --- accel/mshv/mshv-all.c | 3 +++ 1 file changed, 3 insertions(+) @@ -34,6 +38,3 @@ index 45174f7c4e..80428d130d 100644 cpu->thread = g_malloc0(sizeof(QemuThread)); cpu->halt_cond = g_malloc0(sizeof(QemuCond)); --- -2.47.3 - diff --git a/kvm-accel-mshv-use-return-value-of-handle_pio_str_read.patch b/0087-accel-mshv-use-return-value-of-handle_pio_str_read.patch similarity index 85% rename from kvm-accel-mshv-use-return-value-of-handle_pio_str_read.patch rename to 0087-accel-mshv-use-return-value-of-handle_pio_str_read.patch index 02b98ee..0683a3f 100644 --- a/kvm-accel-mshv-use-return-value-of-handle_pio_str_read.patch +++ b/0087-accel-mshv-use-return-value-of-handle_pio_str_read.patch @@ -1,7 +1,7 @@ -From 257a0cba46705253cb708f8b74ceb736b80c2c27 Mon Sep 17 00:00:00 2001 +From 94cb07058fe3c3cfac8af7f955cf7d40a231aada Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Wed, 22 Oct 2025 14:54:30 +0200 -Subject: [PATCH 32/32] accel/mshv: use return value of handle_pio_str_read +Subject: [PATCH] accel/mshv: use return value of handle_pio_str_read RH-Author: Igor Mammedov RH-MergeRequest: 437: el10: x86: enablement for Azure L1VH OCP readiness @@ -18,6 +18,10 @@ Analyzed-by: Peter Maydell Signed-off-by: Paolo Bonzini (cherry picked from commit 1557adc82698416bc68033765cfffb0a0b91c6bf) Signed-off-by: Igor Mammedov + +Patch-name: kvm-accel-mshv-use-return-value-of-handle_pio_str_read.patch +Patch-id: 90 +Patch-present-in-specfile: True --- target/i386/mshv/mshv-cpu.c | 4 ++++ 1 file changed, 4 insertions(+) @@ -37,6 +41,3 @@ index 1f7b9cb37e..1c3db02188 100644 reg_names[0] = HV_X64_REGISTER_RDI; reg_values[0] = info->rdi; } --- -2.47.3 - diff --git a/kvm-monitor-generalize-query-mshv-info-mshv-to-query-acc.patch b/0088-monitor-generalize-query-mshv-info-mshv-to-query-acc.patch similarity index 96% rename from kvm-monitor-generalize-query-mshv-info-mshv-to-query-acc.patch rename to 0088-monitor-generalize-query-mshv-info-mshv-to-query-acc.patch index 3f8cbf7..1a153bb 100644 --- a/kvm-monitor-generalize-query-mshv-info-mshv-to-query-acc.patch +++ b/0088-monitor-generalize-query-mshv-info-mshv-to-query-acc.patch @@ -1,7 +1,7 @@ -From afb70cb5eea1e9dad7b5414713d2394ef2c88329 Mon Sep 17 00:00:00 2001 +From 94b83e4df3495f451190a26d0ae481aebf38055f Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Mon, 13 Oct 2025 12:49:04 +0200 -Subject: [PATCH 1/6] monitor: generalize query-mshv/"info mshv" to +Subject: [PATCH] monitor: generalize query-mshv/"info mshv" to query-accelerators/"info accelerators" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -33,6 +33,10 @@ Reviewed-by: Daniel P. Berrangé Signed-off-by: Paolo Bonzini (cherry picked from commit 71d5babbd6fffc7def1ecbf29f9753e3a2807761) Signed-off-by: Igor Mammedov + +Patch-name: kvm-monitor-generalize-query-mshv-info-mshv-to-query-acc.patch +Patch-id: 91 +Patch-present-in-specfile: True --- hmp-commands-info.hx | 15 ++++++++---- hw/core/machine-hmp-cmds.c | 23 +++++++++++-------- @@ -230,6 +234,3 @@ index 664e027246..2b92060884 100644 ## -{ 'command': 'query-mshv', 'returns': 'MshvInfo' } +{ 'command': 'query-accelerators', 'returns': 'AcceleratorInfo' } --- -2.47.3 - diff --git a/kvm-block-Improve-comments-in-BlockLimits.patch b/0089-block-Improve-comments-in-BlockLimits.patch similarity index 94% rename from kvm-block-Improve-comments-in-BlockLimits.patch rename to 0089-block-Improve-comments-in-BlockLimits.patch index 1e2aeda..2654226 100644 --- a/kvm-block-Improve-comments-in-BlockLimits.patch +++ b/0089-block-Improve-comments-in-BlockLimits.patch @@ -1,7 +1,7 @@ -From e5745092ebc473f359cb2eef67ff375a1e942a74 Mon Sep 17 00:00:00 2001 +From 95cb09a4a0a6b81a5a5e52384a345a3379c8c674 Mon Sep 17 00:00:00 2001 From: Kevin Wolf Date: Fri, 24 Oct 2025 14:30:37 +0200 -Subject: [PATCH 2/6] block: Improve comments in BlockLimits +Subject: [PATCH] block: Improve comments in BlockLimits RH-Author: Kevin Wolf RH-MergeRequest: 439: block: Expose block limits in monitor and qemu-img info @@ -26,6 +26,10 @@ Reviewed-by: Eric Blake Signed-off-by: Kevin Wolf (cherry picked from commit 46dd683d56b1328cb2bc923914bfd7ac590064f7) Signed-off-by: Kevin Wolf + +Patch-name: kvm-block-Improve-comments-in-BlockLimits.patch +Patch-id: 92 +Patch-present-in-specfile: True --- include/block/block_int-common.h | 30 +++++++++++++++++------------- 1 file changed, 17 insertions(+), 13 deletions(-) @@ -93,6 +97,3 @@ index 034c0634c8..5206f32d53 100644 size_t opt_mem_alignment; /* maximum number of iovec elements */ --- -2.47.3 - diff --git a/kvm-block-Expose-block-limits-for-images-in-QMP.patch b/0090-block-Expose-block-limits-for-images-in-QMP.patch similarity index 97% rename from kvm-block-Expose-block-limits-for-images-in-QMP.patch rename to 0090-block-Expose-block-limits-for-images-in-QMP.patch index 4c67a90..c97cf34 100644 --- a/kvm-block-Expose-block-limits-for-images-in-QMP.patch +++ b/0090-block-Expose-block-limits-for-images-in-QMP.patch @@ -1,7 +1,7 @@ -From c8b07a9c5c6926a63c2db56c3de8046b2160417d Mon Sep 17 00:00:00 2001 +From 2b27b1a46e5c0c2eb53bf7d9d2a9759d0ffc3f2c Mon Sep 17 00:00:00 2001 From: Kevin Wolf Date: Fri, 24 Oct 2025 14:30:38 +0200 -Subject: [PATCH 3/6] block: Expose block limits for images in QMP +Subject: [PATCH] block: Expose block limits for images in QMP RH-Author: Kevin Wolf RH-MergeRequest: 439: block: Expose block limits in monitor and qemu-img info @@ -22,6 +22,10 @@ Message-ID: <20251024123041.51254-3-kwolf@redhat.com> Signed-off-by: Kevin Wolf (cherry picked from commit d2634e18286a5772f04cc724e64f8b16a2124587) Signed-off-by: Kevin Wolf + +Patch-name: kvm-block-Expose-block-limits-for-images-in-QMP.patch +Patch-id: 93 +Patch-present-in-specfile: True --- block/qapi.c | 34 ++++++++++++++-- qapi/block-core.json | 66 ++++++++++++++++++++++++++++++++ @@ -250,6 +254,3 @@ index 35c0fc0d20..cd8b506dba 100644 discard=2 regex_json_end="^${line%%[^ ]*}\\},? *$" elif [[ $line =~ $regex_json_child_start ]]; then --- -2.47.3 - diff --git a/kvm-qemu-img-info-Optionally-show-block-limits.patch b/0091-qemu-img-info-Optionally-show-block-limits.patch similarity index 97% rename from kvm-qemu-img-info-Optionally-show-block-limits.patch rename to 0091-qemu-img-info-Optionally-show-block-limits.patch index c528e64..110d559 100644 --- a/kvm-qemu-img-info-Optionally-show-block-limits.patch +++ b/0091-qemu-img-info-Optionally-show-block-limits.patch @@ -1,7 +1,7 @@ -From 264e2c0bff1ae09ef89757eac655401dbdf10d90 Mon Sep 17 00:00:00 2001 +From 70f342dce4cfe8b2fe3998ad06c5072e4481067f Mon Sep 17 00:00:00 2001 From: Kevin Wolf Date: Fri, 24 Oct 2025 14:30:39 +0200 -Subject: [PATCH 4/6] qemu-img info: Optionally show block limits +Subject: [PATCH] qemu-img info: Optionally show block limits RH-Author: Kevin Wolf RH-MergeRequest: 439: block: Expose block limits in monitor and qemu-img info @@ -26,6 +26,10 @@ Message-ID: <20251024123041.51254-4-kwolf@redhat.com> Signed-off-by: Kevin Wolf (cherry picked from commit 5b4b3bfdfc28d2398f34194d260d6eef9a9048b4) Signed-off-by: Kevin Wolf + +Patch-name: kvm-qemu-img-info-Optionally-show-block-limits.patch +Patch-id: 94 +Patch-present-in-specfile: True --- block/qapi.c | 34 ++++++++++++++++++++++++++++++++-- docs/tools/qemu-img.rst | 6 +++++- @@ -235,6 +239,3 @@ index 7a162fdc08..5cdbeda969 100644 if (!list) { return 1; } --- -2.47.3 - diff --git a/kvm-qemu-img-info-Add-cache-mode-option.patch b/0092-qemu-img-info-Add-cache-mode-option.patch similarity index 96% rename from kvm-qemu-img-info-Add-cache-mode-option.patch rename to 0092-qemu-img-info-Add-cache-mode-option.patch index c685595..03152a6 100644 --- a/kvm-qemu-img-info-Add-cache-mode-option.patch +++ b/0092-qemu-img-info-Add-cache-mode-option.patch @@ -1,7 +1,7 @@ -From 67461afaa7e25c6a41cb542ecc1a2b8696d5489d Mon Sep 17 00:00:00 2001 +From cc4a0ad4fd6ab541216e49620cdb0e4132ea7c99 Mon Sep 17 00:00:00 2001 From: Kevin Wolf Date: Fri, 24 Oct 2025 14:30:40 +0200 -Subject: [PATCH 5/6] qemu-img info: Add cache mode option +Subject: [PATCH] qemu-img info: Add cache mode option RH-Author: Kevin Wolf RH-MergeRequest: 439: block: Expose block limits in monitor and qemu-img info @@ -22,6 +22,10 @@ Reviewed-by: Eric Blake Signed-off-by: Kevin Wolf (cherry picked from commit 911992fd6ec7a84c7cc82831b4bcd8a2ca5ccc76) Signed-off-by: Kevin Wolf + +Patch-name: kvm-qemu-img-info-Add-cache-mode-option.patch +Patch-id: 95 +Patch-present-in-specfile: True --- docs/tools/qemu-img.rst | 2 +- qemu-img-cmds.hx | 4 ++-- @@ -148,6 +152,3 @@ index 5cdbeda969..a7791896c1 100644 limits, force_share); if (!list) { return 1; --- -2.47.3 - diff --git a/kvm-rh-configs-enable-CONFIG_TDX-for-x86_64.patch b/0093-rh-configs-enable-CONFIG_TDX-for-x86_64.patch similarity index 83% rename from kvm-rh-configs-enable-CONFIG_TDX-for-x86_64.patch rename to 0093-rh-configs-enable-CONFIG_TDX-for-x86_64.patch index 68bc045..cf40610 100644 --- a/kvm-rh-configs-enable-CONFIG_TDX-for-x86_64.patch +++ b/0093-rh-configs-enable-CONFIG_TDX-for-x86_64.patch @@ -1,7 +1,7 @@ -From 94e93fc7673af3236dc13cd8cfe90953c48bc813 Mon Sep 17 00:00:00 2001 +From 1e80aae75dd950911dfa06c0ea814c751342f931 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Fri, 12 Dec 2025 12:30:30 +0100 -Subject: [PATCH 6/6] rh: configs: enable CONFIG_TDX for x86_64 +Subject: [PATCH] rh: configs: enable CONFIG_TDX for x86_64 RH-Author: Paolo Bonzini RH-MergeRequest: 445: rh: configs: enable CONFIG_TDX for x86_64 @@ -16,6 +16,10 @@ TDX support is included in 10.1 but we still need to enable it, because RHEL is built --without-default-devices. Signed-off-by: Paolo Bonzini + +Patch-name: kvm-rh-configs-enable-CONFIG_TDX-for-x86_64.patch +Patch-id: 96 +Patch-present-in-specfile: True --- configs/devices/x86_64-softmmu/x86_64-rh-devices.mak | 1 + 1 file changed, 1 insertion(+) @@ -32,6 +36,3 @@ index 1f244f766d..9063ae1b53 100644 CONFIG_TEST_DEVICES=y CONFIG_USB=y CONFIG_USB_EHCI=y --- -2.47.3 - diff --git a/kvm-block-Fix-BDS-use-after-free-during-shutdown.patch b/0094-block-Fix-BDS-use-after-free-during-shutdown.patch similarity index 93% rename from kvm-block-Fix-BDS-use-after-free-during-shutdown.patch rename to 0094-block-Fix-BDS-use-after-free-during-shutdown.patch index 0bc5baf..f0fce65 100644 --- a/kvm-block-Fix-BDS-use-after-free-during-shutdown.patch +++ b/0094-block-Fix-BDS-use-after-free-during-shutdown.patch @@ -1,4 +1,4 @@ -From 8f3dbb64c2217e7c46df964311f210c6a3c9e8be Mon Sep 17 00:00:00 2001 +From ce67b67635b76cdd7f43f21988ce2170f47425ef Mon Sep 17 00:00:00 2001 From: Kevin Wolf Date: Mon, 15 Dec 2025 16:07:14 +0100 Subject: [PATCH] block: Fix BDS use after free during shutdown @@ -43,6 +43,10 @@ Reviewed-by: Stefan Hajnoczi Signed-off-by: Kevin Wolf (cherry picked from commit 307bc43095b8ab1765fd66c26003d5da06681c05) Signed-off-by: Thomas Huth + +Patch-name: kvm-block-Fix-BDS-use-after-free-during-shutdown.patch +Patch-id: 97 +Patch-present-in-specfile: True --- blockdev.c | 1 + 1 file changed, 1 insertion(+) @@ -59,6 +63,3 @@ index b451fee6e1..76c8dd0573 100644 bdrv_unref(bs); } } --- -2.47.3 - diff --git a/kvm-fix-pc_rhel_10_2_compat_len.patch b/0095-fix-pc_rhel_10_2_compat_len.patch similarity index 85% rename from kvm-fix-pc_rhel_10_2_compat_len.patch rename to 0095-fix-pc_rhel_10_2_compat_len.patch index b93defd..de649c6 100644 --- a/kvm-fix-pc_rhel_10_2_compat_len.patch +++ b/0095-fix-pc_rhel_10_2_compat_len.patch @@ -1,7 +1,7 @@ -From c4415936b6033aff4b2e38b1c470c920e14fa35a Mon Sep 17 00:00:00 2001 +From a04b03ae978dcec172e27cbaffaca5cfec50eb9c Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Mon, 12 Jan 2026 09:19:07 +0100 -Subject: [PATCH 1/4] fix pc_rhel_10_2_compat_len +Subject: [PATCH] fix pc_rhel_10_2_compat_len RH-Author: Gerd Hoffmann RH-MergeRequest: 447: q35: increase default tseg size @@ -14,6 +14,10 @@ pc_rhel_10_2_compat_len variable, it calculates the length of the wrong array. Fix it. Signed-off-by: Gerd Hoffmann + +Patch-name: kvm-fix-pc_rhel_10_2_compat_len.patch +Patch-id: 98 +Patch-present-in-specfile: True --- hw/i386/pc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) @@ -31,6 +35,3 @@ index 446d4a7c93..394a84eb8a 100644 GlobalProperty pc_rhel_10_1_compat[] = { /* pc_rhel_10_1_compat from pc_compat_9_1 */ --- -2.47.3 - diff --git a/kvm-q35-increase-default-tseg-size.patch b/0096-q35-increase-default-tseg-size.patch similarity index 91% rename from kvm-q35-increase-default-tseg-size.patch rename to 0096-q35-increase-default-tseg-size.patch index 9ac5d51..8e07c36 100644 --- a/kvm-q35-increase-default-tseg-size.patch +++ b/0096-q35-increase-default-tseg-size.patch @@ -1,7 +1,7 @@ -From 50db9d559ad56dfa54de13adbb494edca24d9d43 Mon Sep 17 00:00:00 2001 +From 552c6b5fb530feebcfab92b18e5ccc592ae2af2e Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Thu, 6 Nov 2025 11:56:40 +0100 -Subject: [PATCH 2/4] q35: increase default tseg size +Subject: [PATCH] q35: increase default tseg size RH-Author: Gerd Hoffmann RH-MergeRequest: 447: q35: increase default tseg size @@ -28,6 +28,10 @@ Message-Id: <20251106105640.1642109-1-kraxel@redhat.com> rhel-9.6 + older machine types too ] Resolves: RHEL-126707 + +Patch-name: kvm-q35-increase-default-tseg-size.patch +Patch-id: 99 +Patch-present-in-specfile: True --- hw/i386/pc.c | 1 + hw/pci-host/q35.c | 2 +- @@ -58,6 +62,3 @@ index 1951ae440c..a708758d36 100644 DEFINE_PROP_BOOL("smbase-smram", MCHPCIState, has_smram_at_smbase, true), }; --- -2.47.3 - diff --git a/kvm-hw-intc-ioapic-Fix-ACCEL_KERNEL_GSI_IRQFD_POSSIBLE-t.patch b/0097-hw-intc-ioapic-Fix-ACCEL_KERNEL_GSI_IRQFD_POSSIBLE-t.patch similarity index 90% rename from kvm-hw-intc-ioapic-Fix-ACCEL_KERNEL_GSI_IRQFD_POSSIBLE-t.patch rename to 0097-hw-intc-ioapic-Fix-ACCEL_KERNEL_GSI_IRQFD_POSSIBLE-t.patch index fc1797d..729ade2 100644 --- a/kvm-hw-intc-ioapic-Fix-ACCEL_KERNEL_GSI_IRQFD_POSSIBLE-t.patch +++ b/0097-hw-intc-ioapic-Fix-ACCEL_KERNEL_GSI_IRQFD_POSSIBLE-t.patch @@ -1,7 +1,7 @@ -From 7ecba7856c08f410391ccb12620aeb304d800815 Mon Sep 17 00:00:00 2001 +From 1b13e3592cda0576d62195f63a9a692459218173 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Thu, 6 Nov 2025 11:51:48 +0100 -Subject: [PATCH 3/4] hw/intc/ioapic: Fix ACCEL_KERNEL_GSI_IRQFD_POSSIBLE typo +Subject: [PATCH] hw/intc/ioapic: Fix ACCEL_KERNEL_GSI_IRQFD_POSSIBLE typo MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -37,6 +37,10 @@ Message-ID: <20251106105148.737093-1-clg@redhat.com> Signed-off-by: Philippe Mathieu-Daudé (cherry picked from commit 3abfbb571143ba865488b6c11f8ad75dda97d1a3) Signed-off-by: Cédric Le Goater + +Patch-name: kvm-hw-intc-ioapic-Fix-ACCEL_KERNEL_GSI_IRQFD_POSSIBLE-t.patch +Patch-id: 100 +Patch-present-in-specfile: True --- hw/intc/ioapic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) @@ -63,6 +67,3 @@ index e431d00311..38e4384648 100644 IOAPICCommonState *s = container_of(notifier, IOAPICCommonState, machine_done); --- -2.47.3 - diff --git a/kvm-redhat-allow-5-level-paging-for-TDX-VMs.patch b/0098-redhat-allow-5-level-paging-for-TDX-VMs.patch similarity index 86% rename from kvm-redhat-allow-5-level-paging-for-TDX-VMs.patch rename to 0098-redhat-allow-5-level-paging-for-TDX-VMs.patch index 533cfcf..f9bc01b 100644 --- a/kvm-redhat-allow-5-level-paging-for-TDX-VMs.patch +++ b/0098-redhat-allow-5-level-paging-for-TDX-VMs.patch @@ -1,7 +1,7 @@ -From 966c9312152322e6c2bb434861388a34754911c8 Mon Sep 17 00:00:00 2001 +From 273b5c9f7ae94d9fc31f1a72fc81062154d90f13 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Fri, 18 Jul 2025 18:03:50 +0200 -Subject: [PATCH 4/4] redhat: allow 5-level paging for TDX VMs +Subject: [PATCH] redhat: allow 5-level paging for TDX VMs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -22,6 +22,10 @@ must be kept forever as a delta from upstream. Resolves: https://issues.redhat.com/browse/RHEL-111853 Signed-off-by: Paolo Bonzini + +Patch-name: kvm-redhat-allow-5-level-paging-for-TDX-VMs.patch +Patch-id: 101 +Patch-present-in-specfile: True --- target/i386/kvm/tdx.c | 1 + 1 file changed, 1 insertion(+) @@ -38,6 +42,3 @@ index dbf0fa2c91..91fe19b7d4 100644 /* invtsc is fixed1 for TD guest */ object_property_set_bool(OBJECT(cpu), "invtsc", true, &error_abort); --- -2.47.3 - diff --git a/kvm-rbd-Run-co-BH-CB-in-the-coroutine-s-AioContext.patch b/0099-rbd-Run-co-BH-CB-in-the-coroutine-s-AioContext.patch similarity index 93% rename from kvm-rbd-Run-co-BH-CB-in-the-coroutine-s-AioContext.patch rename to 0099-rbd-Run-co-BH-CB-in-the-coroutine-s-AioContext.patch index 789185b..56e6d01 100644 --- a/kvm-rbd-Run-co-BH-CB-in-the-coroutine-s-AioContext.patch +++ b/0099-rbd-Run-co-BH-CB-in-the-coroutine-s-AioContext.patch @@ -1,8 +1,8 @@ -From 339f5506d877c9e32852aff3cbe165a0aa2964c5 Mon Sep 17 00:00:00 2001 +From 95ce8e6aeb01ecb8ba9e7a27b4bf0221f20ee0fa Mon Sep 17 00:00:00 2001 From: Hanna Czenczek Date: Mon, 10 Nov 2025 16:48:37 +0100 -Subject: [PATCH 01/19] =?UTF-8?q?rbd:=20Run=20co=20BH=20CB=20in=20the=20co?= - =?UTF-8?q?routine=E2=80=99s=20AioContext?= +Subject: [PATCH] =?UTF-8?q?rbd:=20Run=20co=20BH=20CB=20in=20the=20coroutin?= + =?UTF-8?q?e=E2=80=99s=20AioContext?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -66,6 +66,10 @@ Reviewed-by: Kevin Wolf Signed-off-by: Kevin Wolf (cherry picked from commit 89d22536d1a1715083ef8118fe7e6e9239f900c1) Signed-off-by: Hanna Czenczek + +Patch-name: kvm-rbd-Run-co-BH-CB-in-the-coroutine-s-AioContext.patch +Patch-id: 102 +Patch-present-in-specfile: True --- block/rbd.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) @@ -122,6 +126,3 @@ index 3611dc81cf..2a70b5a983 100644 if (task.ret < 0) { error_report("rbd request failed: cmd %d offset %" PRIu64 " bytes %" --- -2.47.3 - diff --git a/kvm-curl-Fix-coroutine-waking.patch b/0100-curl-Fix-coroutine-waking.patch similarity index 96% rename from kvm-curl-Fix-coroutine-waking.patch rename to 0100-curl-Fix-coroutine-waking.patch index 5dbf7ce..77cef8a 100644 --- a/kvm-curl-Fix-coroutine-waking.patch +++ b/0100-curl-Fix-coroutine-waking.patch @@ -1,7 +1,7 @@ -From 14d1e6aa70f97aa75c8f3f78e3c730e286e3b683 Mon Sep 17 00:00:00 2001 +From 666e58f4a706d9d96dc6857b5568c04893a6cc49 Mon Sep 17 00:00:00 2001 From: Hanna Czenczek Date: Mon, 10 Nov 2025 16:48:40 +0100 -Subject: [PATCH 02/19] curl: Fix coroutine waking +Subject: [PATCH] curl: Fix coroutine waking MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -45,6 +45,10 @@ Reviewed-by: Kevin Wolf Signed-off-by: Kevin Wolf (cherry picked from commit 53d5c7ffac7bd4e0d12174432ebb2b3e88614b15) Signed-off-by: Hanna Czenczek + +Patch-name: kvm-curl-Fix-coroutine-waking.patch +Patch-id: 103 +Patch-present-in-specfile: True --- block/curl.c | 45 +++++++++++++++++++++++++++++++-------------- 1 file changed, 31 insertions(+), 14 deletions(-) @@ -167,6 +171,3 @@ index 5467678024..d69bcdff79 100644 return acb.ret; } --- -2.47.3 - diff --git a/kvm-block-io-Take-reqs_lock-for-tracked_requests.patch b/0101-block-io-Take-reqs_lock-for-tracked_requests.patch similarity index 90% rename from kvm-block-io-Take-reqs_lock-for-tracked_requests.patch rename to 0101-block-io-Take-reqs_lock-for-tracked_requests.patch index d5a053a..5a93e99 100644 --- a/kvm-block-io-Take-reqs_lock-for-tracked_requests.patch +++ b/0101-block-io-Take-reqs_lock-for-tracked_requests.patch @@ -1,7 +1,7 @@ -From c2e109dd6504a8fb06fddf3b5e86956a4699bdef Mon Sep 17 00:00:00 2001 +From 5e5356aba514057c36c6311193907f21dedd4609 Mon Sep 17 00:00:00 2001 From: Hanna Czenczek Date: Mon, 10 Nov 2025 16:48:45 +0100 -Subject: [PATCH 03/19] block/io: Take reqs_lock for tracked_requests +Subject: [PATCH] block/io: Take reqs_lock for tracked_requests RH-Author: Hanna Czenczek RH-MergeRequest: 454: Multithreading fixes for rbd, curl, qcow2 @@ -38,6 +38,10 @@ Reviewed-by: Kevin Wolf Signed-off-by: Kevin Wolf (cherry picked from commit 9b9ee60c07f52009f9bb659f54c42afae95c1d94) Signed-off-by: Hanna Czenczek + +Patch-name: kvm-block-io-Take-reqs_lock-for-tracked_requests.patch +Patch-id: 104 +Patch-present-in-specfile: True --- block/io.c | 3 +++ 1 file changed, 3 insertions(+) @@ -61,6 +65,3 @@ index 9bd8ba8431..37df1e0253 100644 return NULL; } --- -2.47.3 - diff --git a/kvm-qcow2-Re-initialize-lock-in-invalidate_cache.patch b/0102-qcow2-Re-initialize-lock-in-invalidate_cache.patch similarity index 86% rename from kvm-qcow2-Re-initialize-lock-in-invalidate_cache.patch rename to 0102-qcow2-Re-initialize-lock-in-invalidate_cache.patch index 738ae4a..8752278 100644 --- a/kvm-qcow2-Re-initialize-lock-in-invalidate_cache.patch +++ b/0102-qcow2-Re-initialize-lock-in-invalidate_cache.patch @@ -1,7 +1,7 @@ -From cfe4b6407a08b56490c3cadd4e01f810fb22070c Mon Sep 17 00:00:00 2001 +From 9797f504d1a5c8125bfc08fa44745728eddaa1c4 Mon Sep 17 00:00:00 2001 From: Hanna Czenczek Date: Mon, 10 Nov 2025 16:48:46 +0100 -Subject: [PATCH 04/19] qcow2: Re-initialize lock in invalidate_cache +Subject: [PATCH] qcow2: Re-initialize lock in invalidate_cache RH-Author: Hanna Czenczek RH-MergeRequest: 454: Multithreading fixes for rbd, curl, qcow2 @@ -23,6 +23,10 @@ Reviewed-by: Kevin Wolf Signed-off-by: Kevin Wolf (cherry picked from commit 90db3a1721b30daf839901813616c0854f383cc5) Signed-off-by: Hanna Czenczek + +Patch-name: kvm-qcow2-Re-initialize-lock-in-invalidate_cache.patch +Patch-id: 105 +Patch-present-in-specfile: True --- block/qcow2.c | 2 ++ 1 file changed, 2 insertions(+) @@ -40,6 +44,3 @@ index 6df65aab93..374ca53829 100644 options = qdict_clone_shallow(bs->options); --- -2.47.3 - diff --git a/kvm-qcow2-Fix-cache_clean_timer.patch b/0103-qcow2-Fix-cache_clean_timer.patch similarity index 98% rename from kvm-qcow2-Fix-cache_clean_timer.patch rename to 0103-qcow2-Fix-cache_clean_timer.patch index 00befca..e8948fc 100644 --- a/kvm-qcow2-Fix-cache_clean_timer.patch +++ b/0103-qcow2-Fix-cache_clean_timer.patch @@ -1,7 +1,7 @@ -From ebcb7dbc060ca295d2ec1daba67ba84fe2ede3bc Mon Sep 17 00:00:00 2001 +From f4201c509db712e3055e9f7105e6c2ad081cb086 Mon Sep 17 00:00:00 2001 From: Hanna Czenczek Date: Mon, 10 Nov 2025 16:48:47 +0100 -Subject: [PATCH 05/19] qcow2: Fix cache_clean_timer +Subject: [PATCH] qcow2: Fix cache_clean_timer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -67,6 +67,10 @@ Reviewed-by: Kevin Wolf Signed-off-by: Kevin Wolf (cherry picked from commit f86dde9a1524f0d7fca0f4037f560e6131d31f7f) Signed-off-by: Hanna Czenczek + +Patch-name: kvm-qcow2-Fix-cache_clean_timer.patch +Patch-id: 106 +Patch-present-in-specfile: True --- block/qcow2.c | 141 ++++++++++++++++++++++++++++++++++++++++---------- block/qcow2.h | 5 +- @@ -333,6 +337,3 @@ index a9e3481c6e..3e38bccd87 100644 QLIST_HEAD(, QCowL2Meta) cluster_allocs; --- -2.47.3 - diff --git a/kvm-net-bundle-all-offloads-in-a-single-struct.patch b/0104-net-bundle-all-offloads-in-a-single-struct.patch similarity index 98% rename from kvm-net-bundle-all-offloads-in-a-single-struct.patch rename to 0104-net-bundle-all-offloads-in-a-single-struct.patch index 7d62dd7..39d915a 100644 --- a/kvm-net-bundle-all-offloads-in-a-single-struct.patch +++ b/0104-net-bundle-all-offloads-in-a-single-struct.patch @@ -1,7 +1,7 @@ -From e98a5779344e632fab5cce16508fb6fbdb847332 Mon Sep 17 00:00:00 2001 +From f59449c1f1ef8be5b5c1d7ba3d3bcb29a32ab508 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:15 +0200 -Subject: [PATCH 06/19] net: bundle all offloads in a single struct +Subject: [PATCH] net: bundle all offloads in a single struct RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -27,6 +27,10 @@ Message-ID: (cherry picked from commit e5fd02d8253abdc25c0eb145765734890c256b71) Signed-off-by: Laurent Vivier + +Patch-name: kvm-net-bundle-all-offloads-in-a-single-struct.patch +Patch-id: 107 +Patch-present-in-specfile: True --- hw/net/e1000e_core.c | 5 +++-- hw/net/igb_core.c | 5 +++-- @@ -361,6 +365,3 @@ index 8857ff299d..f8bbe1cb0c 100644 void tap_fd_set_vnet_hdr_len(int fd, int len); int tap_fd_set_vnet_le(int fd, int vnet_is_le); int tap_fd_set_vnet_be(int fd, int vnet_is_be); --- -2.47.3 - diff --git a/kvm-linux-headers-deal-with-counted_by-annotation.patch b/0105-linux-headers-deal-with-counted_by-annotation.patch similarity index 87% rename from kvm-linux-headers-deal-with-counted_by-annotation.patch rename to 0105-linux-headers-deal-with-counted_by-annotation.patch index eb0be84..fc97b1e 100644 --- a/kvm-linux-headers-deal-with-counted_by-annotation.patch +++ b/0105-linux-headers-deal-with-counted_by-annotation.patch @@ -1,7 +1,7 @@ -From aa56db1a8eb6ede62e58ab4827fc8a7ba8a2ec4a Mon Sep 17 00:00:00 2001 +From 868f8378ad87c06291b27ed934d45a60835a5c4e Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:16 +0200 -Subject: [PATCH 07/19] linux-headers: deal with counted_by annotation +Subject: [PATCH] linux-headers: deal with counted_by annotation RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -26,6 +26,10 @@ Message-ID: (cherry picked from commit c3d9dcd87f0d228ea3ac5a42076da829cff401f0) Signed-off-by: Laurent Vivier + +Patch-name: kvm-linux-headers-deal-with-counted_by-annotation.patch +Patch-id: 108 +Patch-present-in-specfile: True --- scripts/update-linux-headers.sh | 1 + 1 file changed, 1 insertion(+) @@ -42,6 +46,3 @@ index 828a7809f7..844d9cb9f5 100755 -e 's/__attribute__((packed))/QEMU_PACKED/' \ -e 's/__inline__/inline/' \ -e 's/__BITS_PER_LONG/HOST_LONG_BITS/' \ --- -2.47.3 - diff --git a/kvm-linux-headers-Update-to-Linux-v6.17-rc1.patch b/0106-linux-headers-Update-to-Linux-v6.17-rc1.patch similarity index 99% rename from kvm-linux-headers-Update-to-Linux-v6.17-rc1.patch rename to 0106-linux-headers-Update-to-Linux-v6.17-rc1.patch index efc0d20..26d9454 100644 --- a/kvm-linux-headers-Update-to-Linux-v6.17-rc1.patch +++ b/0106-linux-headers-Update-to-Linux-v6.17-rc1.patch @@ -1,7 +1,7 @@ -From b5bbab573e01c1225e7368dba469086a78bc1570 Mon Sep 17 00:00:00 2001 +From 38d1ae10f85229eb18efe04ef6cf97807bb24906 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:17 +0200 -Subject: [PATCH 08/19] linux-headers: Update to Linux v6.17-rc1 +Subject: [PATCH] linux-headers: Update to Linux v6.17-rc1 RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -24,6 +24,10 @@ Message-ID: <0b1f3c011f90583ab52aa4fef04df6db35cc4a69.1758549625.git.pabeni@redh Signed-off-by: Michael S. Tsirkin (cherry picked from commit 8de6cd5452eb9c58c0d105dbc9718bd0e83cc70f) Signed-off-by: Laurent Vivier + +Patch-name: kvm-linux-headers-Update-to-Linux-v6.17-rc1.patch +Patch-id: 109 +Patch-present-in-specfile: True --- include/standard-headers/drm/drm_fourcc.h | 56 ++++++- include/standard-headers/linux/ethtool.h | 4 +- @@ -936,6 +940,3 @@ index d4b3e2ae13..283348b64a 100644 +#define VHOST_GET_FORK_FROM_OWNER _IOR(VHOST_VIRTIO, 0x84, __u8) + #endif --- -2.47.3 - diff --git a/kvm-virtio-introduce-extended-features-type.patch b/0107-virtio-introduce-extended-features-type.patch similarity index 96% rename from kvm-virtio-introduce-extended-features-type.patch rename to 0107-virtio-introduce-extended-features-type.patch index caf0e14..59a420a 100644 --- a/kvm-virtio-introduce-extended-features-type.patch +++ b/0107-virtio-introduce-extended-features-type.patch @@ -1,7 +1,7 @@ -From 4c9ae4b3a9e2c556dcf284924a154ed85534d77f Mon Sep 17 00:00:00 2001 +From 4a15df3f80b1ae570815b936c3197ae7af757c34 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:18 +0200 -Subject: [PATCH 09/19] virtio: introduce extended features type +Subject: [PATCH] virtio: introduce extended features type RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -33,6 +33,10 @@ Message-ID: <6a9bbb5eb33830f20afbcb7e64d300af4126dd98.1758549625.git.pabeni@redh Signed-off-by: Michael S. Tsirkin (cherry picked from commit b15a61fdae976eb1ca8f2deee6a63dc3407d7ec6) Signed-off-by: Laurent Vivier + +Patch-name: kvm-virtio-introduce-extended-features-type.patch +Patch-id: 110 +Patch-present-in-specfile: True --- include/hw/virtio/virtio-features.h | 126 ++++++++++++++++++++++++++++ include/hw/virtio/virtio.h | 7 +- @@ -196,6 +200,3 @@ index c594764f23..39e4059a66 100644 size_t config_len; void *config; --- -2.47.3 - diff --git a/kvm-virtio-serialize-extended-features-state.patch b/0108-virtio-serialize-extended-features-state.patch similarity index 97% rename from kvm-virtio-serialize-extended-features-state.patch rename to 0108-virtio-serialize-extended-features-state.patch index 97a19d7..8a74c9c 100644 --- a/kvm-virtio-serialize-extended-features-state.patch +++ b/0108-virtio-serialize-extended-features-state.patch @@ -1,7 +1,7 @@ -From 0f4e78c05a49b1ab51bd057df02b5c42f7914ebf Mon Sep 17 00:00:00 2001 +From 2a5c6ab051df97c68f211fd6994260dc0a5cf0e4 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:19 +0200 -Subject: [PATCH 10/19] virtio: serialize extended features state +Subject: [PATCH] virtio: serialize extended features state RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -34,6 +34,10 @@ Message-ID: (cherry picked from commit 0a49a97433279512a03f3d9f36164a46caf498c6) Signed-off-by: Laurent Vivier + +Patch-name: kvm-virtio-serialize-extended-features-state.patch +Patch-id: 111 +Patch-present-in-specfile: True --- hw/virtio/virtio.c | 88 ++++++++++++++++++++++++++++++---------------- 1 file changed, 57 insertions(+), 31 deletions(-) @@ -217,6 +221,3 @@ index 9a81ad912e..bf53c211e5 100644 } if (!virtio_device_started(vdev, vdev->status) && --- -2.47.3 - diff --git a/kvm-virtio-add-support-for-negotiating-extended-features.patch b/0109-virtio-add-support-for-negotiating-extended-features.patch similarity index 95% rename from kvm-virtio-add-support-for-negotiating-extended-features.patch rename to 0109-virtio-add-support-for-negotiating-extended-features.patch index 53a5d72..3234f9b 100644 --- a/kvm-virtio-add-support-for-negotiating-extended-features.patch +++ b/0109-virtio-add-support-for-negotiating-extended-features.patch @@ -1,7 +1,7 @@ -From d7e0acde126d1f5385096d6b7247de82ee6b0e8d Mon Sep 17 00:00:00 2001 +From 42b15aaaa8dc5d1e3b06e27478f01531a9bb8e24 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:20 +0200 -Subject: [PATCH 11/19] virtio: add support for negotiating extended features +Subject: [PATCH] virtio: add support for negotiating extended features RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -34,6 +34,10 @@ Message-ID: <9bb29d70adc3f2b8c7756d4e3cd076cffee87826.1758549625.git.pabeni@redh Signed-off-by: Michael S. Tsirkin (cherry picked from commit 64a6a336f42bc6305ab7589fd874cb4a3d403bd0) Signed-off-by: Laurent Vivier + +Patch-name: kvm-virtio-add-support-for-negotiating-extended-features.patch +Patch-id: 112 +Patch-present-in-specfile: True --- hw/virtio/virtio-bus.c | 11 ++++++++--- hw/virtio/virtio.c | 14 +++++++++++--- @@ -128,6 +132,3 @@ index 39e4059a66..2aeb021fb3 100644 /* Base devices. */ typedef struct VirtIOBlkConf VirtIOBlkConf; --- -2.47.3 - diff --git a/kvm-virtio-pci-implement-support-for-extended-features.patch b/0110-virtio-pci-implement-support-for-extended-features.patch similarity index 96% rename from kvm-virtio-pci-implement-support-for-extended-features.patch rename to 0110-virtio-pci-implement-support-for-extended-features.patch index 98821d9..047332b 100644 --- a/kvm-virtio-pci-implement-support-for-extended-features.patch +++ b/0110-virtio-pci-implement-support-for-extended-features.patch @@ -1,7 +1,7 @@ -From 71096da8a19183bbe11f28d5dfe6cf6cc38d9585 Mon Sep 17 00:00:00 2001 +From 2a8d763d0fa9b29c700787255347f26040e11af2 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:21 +0200 -Subject: [PATCH 12/19] virtio-pci: implement support for extended features +Subject: [PATCH] virtio-pci: implement support for extended features RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -31,6 +31,10 @@ Message-ID: (cherry picked from commit 712c79d6d374e7abe94599de5ba2d155d5a79955) Signed-off-by: Laurent Vivier + +Patch-name: kvm-virtio-pci-implement-support-for-extended-features.patch +Patch-id: 113 +Patch-present-in-specfile: True --- hw/virtio/virtio-pci.c | 76 ++++++++++++++++++++++++++++++---- include/hw/virtio/virtio-pci.h | 2 +- @@ -191,6 +195,3 @@ index eab5394898..639752977e 100644 VirtIOPCIQueue vqs[VIRTIO_QUEUE_MAX]; VirtIOIRQFD *vector_irqfd; --- -2.47.3 - diff --git a/kvm-vhost-add-support-for-negotiating-extended-features.patch b/0111-vhost-add-support-for-negotiating-extended-features.patch similarity index 97% rename from kvm-vhost-add-support-for-negotiating-extended-features.patch rename to 0111-vhost-add-support-for-negotiating-extended-features.patch index d3e50e5..9acac96 100644 --- a/kvm-vhost-add-support-for-negotiating-extended-features.patch +++ b/0111-vhost-add-support-for-negotiating-extended-features.patch @@ -1,7 +1,7 @@ -From 32cf8e1f3e289c67f49240e8301979d78801258b Mon Sep 17 00:00:00 2001 +From d88da2c642b4fef72856abc4d6f01be7d9992fd6 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:22 +0200 -Subject: [PATCH 13/19] vhost: add support for negotiating extended features +Subject: [PATCH] vhost: add support for negotiating extended features RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -30,6 +30,10 @@ Message-ID: (cherry picked from commit 9f979ef0e01a2dd47d167c482a9e2d1dcdff2d3f) Signed-off-by: Laurent Vivier + +Patch-name: kvm-vhost-add-support-for-negotiating-extended-features.patch +Patch-id: 114 +Patch-present-in-specfile: True --- hw/virtio/vhost.c | 68 ++++++++++++++++++++++--------- include/hw/virtio/vhost-backend.h | 6 +++ @@ -287,6 +291,3 @@ index 66be6afc88..08bbb4dfe9 100644 unsigned int vhost_get_max_memslots(void); unsigned int vhost_get_free_memslots(void); --- -2.47.3 - diff --git a/kvm-qmp-update-virtio-features-map-to-support-extended-f.patch b/0112-qmp-update-virtio-features-map-to-support-extended-f.patch similarity index 98% rename from kvm-qmp-update-virtio-features-map-to-support-extended-f.patch rename to 0112-qmp-update-virtio-features-map-to-support-extended-f.patch index 279bf95..b3733dd 100644 --- a/kvm-qmp-update-virtio-features-map-to-support-extended-f.patch +++ b/0112-qmp-update-virtio-features-map-to-support-extended-f.patch @@ -1,8 +1,7 @@ -From af8775763edabeeb175f72d3db0b23a20fc177e0 Mon Sep 17 00:00:00 2001 +From 6aed5637412413e2e31290d360f958fbbc7f6471 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:23 +0200 -Subject: [PATCH 14/19] qmp: update virtio features map to support extended - features +Subject: [PATCH] qmp: update virtio features map to support extended features RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -31,6 +30,10 @@ Message-ID: (cherry picked from commit a76f5b795cab8ea0654e4813caa694470d7250a9) Signed-off-by: Laurent Vivier + +Patch-name: kvm-qmp-update-virtio-features-map-to-support-extended-f.patch +Patch-id: 115 +Patch-present-in-specfile: True --- hw/virtio/virtio-hmp-cmds.c | 3 +- hw/virtio/virtio-qmp.c | 91 +++++++++++++++++++++++++------------ @@ -324,6 +327,3 @@ index 9d652fe4a8..05295ab665 100644 ## # @VirtQueueStatus: --- -2.47.3 - diff --git a/kvm-vhost-backend-implement-extended-features-support.patch b/0113-vhost-backend-implement-extended-features-support.patch similarity index 95% rename from kvm-vhost-backend-implement-extended-features-support.patch rename to 0113-vhost-backend-implement-extended-features-support.patch index fe43faa..229a25a 100644 --- a/kvm-vhost-backend-implement-extended-features-support.patch +++ b/0113-vhost-backend-implement-extended-features-support.patch @@ -1,7 +1,7 @@ -From d0e31af77cd51df8c17fa4d304571f8b1eb5ce29 Mon Sep 17 00:00:00 2001 +From 79d0dc15d00a76936d885c2b558f4d0489ba0f6a Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:24 +0200 -Subject: [PATCH 15/19] vhost-backend: implement extended features support +Subject: [PATCH] vhost-backend: implement extended features support RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -29,6 +29,10 @@ Message-ID: <150daade3d59e77629276920e014ee8e5fc12121.1758549625.git.pabeni@redh Signed-off-by: Michael S. Tsirkin (cherry picked from commit f412c1f57ab58fd595efee26264193759220ca6f) Signed-off-by: Laurent Vivier + +Patch-name: kvm-vhost-backend-implement-extended-features-support.patch +Patch-id: 116 +Patch-present-in-specfile: True --- hw/virtio/vhost-backend.c | 62 ++++++++++++++++++++++++++++++++------- 1 file changed, 51 insertions(+), 11 deletions(-) @@ -128,6 +132,3 @@ index 833804dd40..4367db0d95 100644 .vhost_set_backend_cap = vhost_kernel_set_backend_cap, .vhost_set_owner = vhost_kernel_set_owner, .vhost_get_vq_index = vhost_kernel_get_vq_index, --- -2.47.3 - diff --git a/kvm-vhost-net-implement-extended-features-support.patch b/0114-vhost-net-implement-extended-features-support.patch similarity index 97% rename from kvm-vhost-net-implement-extended-features-support.patch rename to 0114-vhost-net-implement-extended-features-support.patch index bf04384..187da73 100644 --- a/kvm-vhost-net-implement-extended-features-support.patch +++ b/0114-vhost-net-implement-extended-features-support.patch @@ -1,7 +1,7 @@ -From 7eb0a4d5d5a03fd631b87c59dc531080f93a0640 Mon Sep 17 00:00:00 2001 +From dd61f185a77feed10b60acc0675fb49c59dd64c2 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:25 +0200 -Subject: [PATCH 16/19] vhost-net: implement extended features support +Subject: [PATCH] vhost-net: implement extended features support RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -26,6 +26,10 @@ Message-ID: <69c78c432e28e146a8874b2a7d00e9cbd111b1ba.1758549625.git.pabeni@redh Signed-off-by: Michael S. Tsirkin (cherry picked from commit d55ad8c9a9a5edd8152f13fc97879d66972f103e) Signed-off-by: Laurent Vivier + +Patch-name: kvm-vhost-net-implement-extended-features-support.patch +Patch-id: 117 +Patch-present-in-specfile: True --- hw/net/vhost_net-stub.c | 8 +++----- hw/net/vhost_net.c | 45 +++++++++++++++++++++++------------------ @@ -232,6 +236,3 @@ index 879781dad7..0225207491 100644 int vhost_net_set_mtu(struct vhost_net *net, uint16_t mtu); --- -2.47.3 - diff --git a/kvm-virtio-net-implement-extended-features-support.patch b/0115-virtio-net-implement-extended-features-support.patch similarity index 98% rename from kvm-virtio-net-implement-extended-features-support.patch rename to 0115-virtio-net-implement-extended-features-support.patch index 1af6377..c515574 100644 --- a/kvm-virtio-net-implement-extended-features-support.patch +++ b/0115-virtio-net-implement-extended-features-support.patch @@ -1,7 +1,7 @@ -From cd61fca5f53b5047a432db36f33ee85edf4f6ac3 Mon Sep 17 00:00:00 2001 +From f811c7182921181a194dfae21c5b9f4475799c39 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:26 +0200 -Subject: [PATCH 17/19] virtio-net: implement extended features support +Subject: [PATCH] virtio-net: implement extended features support RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -28,6 +28,10 @@ Message-ID: (cherry picked from commit 3a7741c3bdc3537de4159418d712debbd22e4df6) Signed-off-by: Laurent Vivier + +Patch-name: kvm-virtio-net-implement-extended-features-support.patch +Patch-id: 118 +Patch-present-in-specfile: True --- hw/net/virtio-net.c | 140 +++++++++++++++++++-------------- include/hw/virtio/virtio-net.h | 2 +- @@ -326,6 +330,3 @@ index 73fdefc0dc..5b8ab7bda7 100644 uint32_t rsc_timeout; uint8_t rsc4_enabled; uint8_t rsc6_enabled; --- -2.47.3 - diff --git a/kvm-net-implement-tunnel-probing.patch b/0116-net-implement-tunnel-probing.patch similarity index 98% rename from kvm-net-implement-tunnel-probing.patch rename to 0116-net-implement-tunnel-probing.patch index 24305cb..bc7db41 100644 --- a/kvm-net-implement-tunnel-probing.patch +++ b/0116-net-implement-tunnel-probing.patch @@ -1,7 +1,7 @@ -From 0cad25c7acac95a4af0d46f4d0207de4ac973370 Mon Sep 17 00:00:00 2001 +From 8800549775ccdf06cadf734e49b25292fa0abac9 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:27 +0200 -Subject: [PATCH 18/19] net: implement tunnel probing +Subject: [PATCH] net: implement tunnel probing RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -35,6 +35,10 @@ Message-ID: (cherry picked from commit fffac046282c99801b62fa7fa1032cdc261bca6d) Signed-off-by: Laurent Vivier + +Patch-name: kvm-net-implement-tunnel-probing.patch +Patch-id: 119 +Patch-present-in-specfile: True --- hw/net/virtio-net.c | 41 +++++++++++++++++++++++++++++++++++++++++ include/net/net.h | 3 +++ @@ -312,6 +316,3 @@ index f8bbe1cb0c..b76a05044b 100644 void tap_fd_set_offload(int fd, const NetOffloads *ol); void tap_fd_set_vnet_hdr_len(int fd, int len); int tap_fd_set_vnet_le(int fd, int vnet_is_le); --- -2.47.3 - diff --git a/kvm-net-implement-UDP-tunnel-features-offloading.patch b/0117-net-implement-UDP-tunnel-features-offloading.patch similarity index 97% rename from kvm-net-implement-UDP-tunnel-features-offloading.patch rename to 0117-net-implement-UDP-tunnel-features-offloading.patch index f7ecee1..ab94dee 100644 --- a/kvm-net-implement-UDP-tunnel-features-offloading.patch +++ b/0117-net-implement-UDP-tunnel-features-offloading.patch @@ -1,7 +1,7 @@ -From 97f8e0bbaddf37dcf147f6405a8a96921469d60d Mon Sep 17 00:00:00 2001 +From d867c23b456854789bd8c340400d841ad995ea97 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Mon, 22 Sep 2025 16:18:28 +0200 -Subject: [PATCH 19/19] net: implement UDP tunnel features offloading +Subject: [PATCH] net: implement UDP tunnel features offloading RH-Author: Laurent Vivier RH-MergeRequest: 456: backport support for GSO over UDP tunnel offload @@ -39,6 +39,10 @@ Message-ID: <093b4bc68368046bffbcab2202227632d6e4e83b.1758549625.git.pabeni@redh Signed-off-by: Michael S. Tsirkin (cherry picked from commit a5289563ad74a2a37e8d2101d82935454c71fef4) Signed-off-by: Laurent Vivier + +Patch-name: kvm-net-implement-UDP-tunnel-features-offloading.patch +Patch-id: 120 +Patch-present-in-specfile: True --- hw/net/virtio-net.c | 34 ++++++++++++++++++++++++++-------- include/net/net.h | 2 ++ @@ -204,6 +208,3 @@ index 9f65e3fb3d..dc2a2859ec 100644 VHOST_INVALID_FEATURE_BIT }; --- -2.47.3 - diff --git a/0118-hw-pci-host-gpex-acpi-Fix-_DSM-function-0-support-re.patch b/0118-hw-pci-host-gpex-acpi-Fix-_DSM-function-0-support-re.patch new file mode 100644 index 0000000..7bab17b --- /dev/null +++ b/0118-hw-pci-host-gpex-acpi-Fix-_DSM-function-0-support-re.patch @@ -0,0 +1,63 @@ +From c0991e3f62fb9d643a4639d989c7d354757c0501 Mon Sep 17 00:00:00 2001 +From: Eric Auger +Date: Wed, 22 Oct 2025 09:06:38 +0100 +Subject: [PATCH] hw/pci-host/gpex-acpi: Fix _DSM function 0 support return + value +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] c39e9dd7c7 (clegoate/qemu-kvm-centos) + +Currently, only function 0 is supported. According to the ACPI +Specification, Revision 6.6, Section 9.1.1 “_DSM (Device Specific +Method)”, bit 0 should be 0 to indicate that no other functions +are supported beyond function 0. + +The resulting AML change looks like this: + +Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method +{ + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { +- 0x01 // . ++ 0x00 // . + }) + } + } +} + +Fixes: 5b85eabe68f9 ("acpi: add acpi_dsdt_add_gpex") +Signed-off-by: Eric Auger +Signed-off-by: Shameer Kolothum +Tested-by: Zhangfei Gao +Reviewed-by: Michael S. Tsirkin +Signed-off-by: Michael S. Tsirkin +Message-Id: <20251022080639.243965-3-skolothumtho@nvidia.com> +(cherry picked from commit 325aa2d86a20786c308b0874d15a60d1b924bd0e) +Signed-off-by: Eric Auger +--- + hw/pci-host/gpex-acpi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c +index 952a0ace19..4587baeb78 100644 +--- a/hw/pci-host/gpex-acpi.c ++++ b/hw/pci-host/gpex-acpi.c +@@ -64,7 +64,7 @@ static Aml *build_pci_host_bridge_dsm_method(void) + UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); + ifctx = aml_if(aml_equal(aml_arg(0), UUID)); + ifctx1 = aml_if(aml_equal(aml_arg(2), aml_int(0))); +- uint8_t byte_list[1] = {1}; ++ uint8_t byte_list[1] = {0}; + buf = aml_buffer(1, byte_list); + aml_append(ifctx1, aml_return(buf)); + aml_append(ifctx, ifctx1); diff --git a/0119-vfio-scsi-ui-Error-check-qio_channel_socket_connect_.patch b/0119-vfio-scsi-ui-Error-check-qio_channel_socket_connect_.patch new file mode 100644 index 0000000..f11c36e --- /dev/null +++ b/0119-vfio-scsi-ui-Error-check-qio_channel_socket_connect_.patch @@ -0,0 +1,96 @@ +From 9104a093516d2a2955e4e59fab759fd80ba40e8e Mon Sep 17 00:00:00 2001 +From: Markus Armbruster +Date: Wed, 23 Jul 2025 15:32:57 +0200 +Subject: [PATCH] vfio scsi ui: Error-check qio_channel_socket_connect_sync() + the same way +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 2e8de55b71 (clegoate/qemu-kvm-centos) + +qio_channel_socket_connect_sync() returns 0 on success, and -1 on +failure, with errp set. Some callers check the return value, and some +check whether errp was set. + +For consistency, always check the return value, and always check it's +negative. + +Signed-off-by: Markus Armbruster +Message-ID: <20250723133257.1497640-3-armbru@redhat.com> +Reviewed-by: Zhao Liu +(cherry picked from commit ec14a3de622ae30a8afa78b6f564bc743b753ee1) +Signed-off-by: Eric Auger +--- + hw/vfio-user/proxy.c | 2 +- + scsi/pr-manager-helper.c | 9 ++------- + ui/input-barrier.c | 5 +---- + 3 files changed, 4 insertions(+), 12 deletions(-) + +diff --git a/hw/vfio-user/proxy.c b/hw/vfio-user/proxy.c +index 2275d3fe39..2c03d49f97 100644 +--- a/hw/vfio-user/proxy.c ++++ b/hw/vfio-user/proxy.c +@@ -885,7 +885,7 @@ VFIOUserProxy *vfio_user_connect_dev(SocketAddress *addr, Error **errp) + + sioc = qio_channel_socket_new(); + ioc = QIO_CHANNEL(sioc); +- if (qio_channel_socket_connect_sync(sioc, addr, errp)) { ++ if (qio_channel_socket_connect_sync(sioc, addr, errp) < 0) { + object_unref(OBJECT(ioc)); + return NULL; + } +diff --git a/scsi/pr-manager-helper.c b/scsi/pr-manager-helper.c +index 6b86f01b01..aea751fb04 100644 +--- a/scsi/pr-manager-helper.c ++++ b/scsi/pr-manager-helper.c +@@ -105,20 +105,15 @@ static int pr_manager_helper_initialize(PRManagerHelper *pr_mgr, + .u.q_unix.path = path + }; + QIOChannelSocket *sioc = qio_channel_socket_new(); +- Error *local_err = NULL; +- + uint32_t flags; + int r; + + assert(!pr_mgr->ioc); + qio_channel_set_name(QIO_CHANNEL(sioc), "pr-manager-helper"); +- qio_channel_socket_connect_sync(sioc, +- &saddr, +- &local_err); ++ r = qio_channel_socket_connect_sync(sioc, &saddr, errp); + g_free(path); +- if (local_err) { ++ if (r < 0) { + object_unref(OBJECT(sioc)); +- error_propagate(errp, local_err); + return -ENOTCONN; + } + +diff --git a/ui/input-barrier.c b/ui/input-barrier.c +index 9793258aac..0a2198ca50 100644 +--- a/ui/input-barrier.c ++++ b/ui/input-barrier.c +@@ -490,7 +490,6 @@ static gboolean input_barrier_event(QIOChannel *ioc G_GNUC_UNUSED, + static void input_barrier_complete(UserCreatable *uc, Error **errp) + { + InputBarrier *ib = INPUT_BARRIER(uc); +- Error *local_err = NULL; + + if (!ib->name) { + error_setg(errp, QERR_MISSING_PARAMETER, "name"); +@@ -506,9 +505,7 @@ static void input_barrier_complete(UserCreatable *uc, Error **errp) + ib->sioc = qio_channel_socket_new(); + qio_channel_set_name(QIO_CHANNEL(ib->sioc), "barrier-client"); + +- qio_channel_socket_connect_sync(ib->sioc, &ib->saddr, &local_err); +- if (local_err) { +- error_propagate(errp, local_err); ++ if (qio_channel_socket_connect_sync(ib->sioc, &ib->saddr, errp) < 0) { + return; + } + diff --git a/0120-vfio-igd-Enable-quirks-when-IGD-is-not-the-primary-d.patch b/0120-vfio-igd-Enable-quirks-when-IGD-is-not-the-primary-d.patch new file mode 100644 index 0000000..a3c3d9b --- /dev/null +++ b/0120-vfio-igd-Enable-quirks-when-IGD-is-not-the-primary-d.patch @@ -0,0 +1,85 @@ +From 8171e9c49fe8395fd598d35c68827a3ef3cdcdc8 Mon Sep 17 00:00:00 2001 +From: Tomita Moeko +Date: Thu, 14 Aug 2025 00:05:10 +0800 +Subject: [PATCH] vfio/igd: Enable quirks when IGD is not the primary display +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 0fe0984864 (clegoate/qemu-kvm-centos) + +Since linux 6.15, commit 41112160ca87 ("vfio/pci: match IGD devices in +display controller class"), IGD related regions are also exposed when +IGD is not primary display (device class is Display controller). + +Allow IGD quirks to be enabled in this configuration so that guests can +have display output on IGD when it is not the primary display. + +Signed-off-by: Tomita Moeko +Reviewed-by: Alex Williamson +Link: https://lore.kernel.org/qemu-devel/20250813160510.23553-1-tomitamoeko@gmail.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 432ca3dfa3d57a7bf1e427576fcfca4ab0079a50) +Signed-off-by: Eric Auger +--- + hw/vfio/igd.c | 7 ++++--- + hw/vfio/pci.h | 5 +++++ + 2 files changed, 9 insertions(+), 3 deletions(-) + +diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c +index ee0767b0b8..f116c40ccd 100644 +--- a/hw/vfio/igd.c ++++ b/hw/vfio/igd.c +@@ -460,7 +460,7 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) + int gen; + + if (!vfio_pci_is(vdev, PCI_VENDOR_ID_INTEL, PCI_ANY_ID) || +- !vfio_is_vga(vdev) || nr != 0) { ++ !vfio_is_base_display(vdev) || nr != 0) { + return; + } + +@@ -518,7 +518,7 @@ static bool vfio_pci_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp) + Error *err = NULL; + + if (!vfio_pci_is(vdev, PCI_VENDOR_ID_INTEL, PCI_ANY_ID) || +- !vfio_is_vga(vdev)) { ++ !vfio_is_base_display(vdev)) { + return true; + } + +@@ -534,12 +534,13 @@ static bool vfio_pci_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp) + /* + * For backward compatibility, enable legacy mode when + * - Device geneation is 6 to 9 (including both) +- * - IGD claims VGA cycles on host ++ * - IGD exposes itself as VGA controller and claims VGA cycles on host + * - Machine type is i440fx (pc_piix) + * - IGD device is at guest BDF 00:02.0 + * - Not manually disabled by x-igd-legacy-mode=off + */ + if ((vdev->igd_legacy_mode != ON_OFF_AUTO_OFF) && ++ vfio_is_vga(vdev) && + (gen >= 6 && gen <= 9) && + !(gmch & IGD_GMCH_VGA_DISABLE) && + !strcmp(MACHINE_GET_CLASS(qdev_get_machine())->family, "pc_piix") && +diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h +index 81555d8774..056f5e12cf 100644 +--- a/hw/vfio/pci.h ++++ b/hw/vfio/pci.h +@@ -204,6 +204,11 @@ static inline bool vfio_is_vga(VFIOPCIDevice *vdev) + return (vdev->class_code >> 8) == PCI_CLASS_DISPLAY_VGA; + } + ++static inline bool vfio_is_base_display(VFIOPCIDevice *vdev) ++{ ++ return (vdev->class_code >> 16) == PCI_BASE_CLASS_DISPLAY; ++} ++ + /* MSI/MSI-X/INTx */ + void vfio_pci_vector_init(VFIOPCIDevice *vdev, int nr); + void vfio_pci_add_kvm_msi_virq(VFIOPCIDevice *vdev, VFIOMSIVector *vector, diff --git a/0121-vfio-Remove-vfio-amd-xgbe-device.patch b/0121-vfio-Remove-vfio-amd-xgbe-device.patch new file mode 100644 index 0000000..3c6f1cb --- /dev/null +++ b/0121-vfio-Remove-vfio-amd-xgbe-device.patch @@ -0,0 +1,619 @@ +From c54dcd922c1eff2b309c26016b44327240ee2381 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= +Date: Mon, 1 Sep 2025 08:46:28 +0200 +Subject: [PATCH] vfio: Remove 'vfio-amd-xgbe' device +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 81c5b1d466 (clegoate/qemu-kvm-centos) + +Conflicts: + hw/arm/virt.c: due to the downstream-only handling of RAMFB + hw/core/sysbus-fdt.c: downstream 60e7ac0c41c2 ("vfio: rename +field to "num_initial_regions") touches sysbus-fdt.c. Anyway that code +is removed + +The VFIO_AMD_XGBE device type has been deprecated in the QEMU 10.0 +timeframe. The AMD "Seattle" device is not supported anymore. Remove it. + +Reviewed-by: Eric Auger +Reviewed-by: Alex Williamson +Link: https://lore.kernel.org/qemu-devel/20250901064631.530723-6-clg@redhat.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit aeb1a50d4a7f464a8ff0a66e0beec2a5e1ef6342) +Signed-off-by: Eric Auger +--- + docs/about/deprecated.rst | 6 - + docs/about/removed-features.rst | 9 + + docs/devel/kconfig.rst | 1 - + hw/arm/Kconfig | 1 - + hw/arm/virt.c | 2 - + hw/core/sysbus-fdt.c | 315 -------------------------------- + hw/vfio/Kconfig | 5 - + hw/vfio/amd-xgbe.c | 61 ------- + hw/vfio/meson.build | 1 - + include/hw/vfio/vfio-amd-xgbe.h | 46 ----- + 10 files changed, 9 insertions(+), 438 deletions(-) + delete mode 100644 hw/vfio/amd-xgbe.c + delete mode 100644 include/hw/vfio/vfio-amd-xgbe.h + +diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst +index d50645a071..631871ffc8 100644 +--- a/docs/about/deprecated.rst ++++ b/docs/about/deprecated.rst +@@ -526,12 +526,6 @@ The vfio-calxeda-xgmac device allows to assign a host Calxeda Highbank + string) to a guest. Calxeda HW has been ewasted now and there is no point + keeping that device. + +-``-device vfio-amd-xgbe`` (since 10.0) +-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +-The vfio-amd-xgbe device allows to assign a host AMD 10GbE controller +-to a guest ("amd,xgbe-seattle-v1a" compatibility string). AMD "Seattle" +-is not supported anymore and there is no point keeping that device. +- + ``-device vfio-platform`` (since 10.0) + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + The vfio-platform device allows to assign a host platform device +diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst +index d7c2113fc3..759c067412 100644 +--- a/docs/about/removed-features.rst ++++ b/docs/about/removed-features.rst +@@ -1262,6 +1262,15 @@ The corresponding upstream server project is no longer maintained. + Users are recommended to switch to an alternative distributed block + device driver such as RBD. + ++VFIO devices ++------------ ++ ++``-device vfio-amd-xgbe`` (since 10.2) ++'''''''''''''''''''''''''''''''''''''' ++The vfio-amd-xgbe device allows to assign a host AMD 10GbE controller ++to a guest ("amd,xgbe-seattle-v1a" compatibility string). AMD "Seattle" ++is not supported anymore and there is no point keeping that device. ++ + Tools + ----- + +diff --git a/docs/devel/kconfig.rst b/docs/devel/kconfig.rst +index 493b76c4fb..9fdf501529 100644 +--- a/docs/devel/kconfig.rst ++++ b/docs/devel/kconfig.rst +@@ -59,7 +59,6 @@ stanza like the following:: + config ARM_VIRT + bool + imply PCI_DEVICES +- imply VFIO_AMD_XGBE + imply VFIO_XGMAC + select A15MPCORE + select ACPI +diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig +index 2aa4b5d778..64b2ec87b5 100644 +--- a/hw/arm/Kconfig ++++ b/hw/arm/Kconfig +@@ -5,7 +5,6 @@ config ARM_VIRT + depends on TCG || KVM || HVF + imply PCI_DEVICES + imply TEST_DEVICES +- imply VFIO_AMD_XGBE + imply VFIO_PLATFORM + imply VFIO_XGMAC + imply TPM_TIS_SYSBUS +diff --git a/hw/arm/virt.c b/hw/arm/virt.c +index 1cfb386f64..93532f37c0 100644 +--- a/hw/arm/virt.c ++++ b/hw/arm/virt.c +@@ -39,7 +39,6 @@ + #include "hw/arm/virt.h" + #include "hw/block/flash.h" + #include "hw/vfio/vfio-calxeda-xgmac.h" +-#include "hw/vfio/vfio-amd-xgbe.h" + #include "hw/display/ramfb.h" + #include "net/net.h" + #include "system/device_tree.h" +@@ -3332,7 +3331,6 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data) + mc->max_cpus = 384; + #if 0 /* Disabled for Red Hat Enterprise Linux */ + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_CALXEDA_XGMAC); +- machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_AMD_XGBE); + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_PLATFORM); + #endif + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); +diff --git a/hw/core/sysbus-fdt.c b/hw/core/sysbus-fdt.c +index 673e083d31..0caffe4845 100644 +--- a/hw/core/sysbus-fdt.c ++++ b/hw/core/sysbus-fdt.c +@@ -35,7 +35,6 @@ + #include "hw/platform-bus.h" + #include "hw/vfio/vfio-platform.h" + #include "hw/vfio/vfio-calxeda-xgmac.h" +-#include "hw/vfio/vfio-amd-xgbe.h" + #include "hw/vfio/vfio-region.h" + #include "hw/display/ramfb.h" + #include "hw/uefi/var-service-api.h" +@@ -69,142 +68,6 @@ typedef struct HostProperty { + + #ifdef CONFIG_LINUX + +-/** +- * copy_properties_from_host +- * +- * copies properties listed in an array from host device tree to +- * guest device tree. If a non optional property is not found, the +- * function asserts. An optional property is ignored if not found +- * in the host device tree. +- * @props: array of HostProperty to copy +- * @nb_props: number of properties in the array +- * @host_dt: host device tree blob +- * @guest_dt: guest device tree blob +- * @node_path: host dt node path where the property is supposed to be +- found +- * @nodename: guest node name the properties should be added to +- */ +-static void copy_properties_from_host(HostProperty *props, int nb_props, +- void *host_fdt, void *guest_fdt, +- char *node_path, char *nodename) +-{ +- int i, prop_len; +- const void *r; +- Error *err = NULL; +- +- for (i = 0; i < nb_props; i++) { +- r = qemu_fdt_getprop(host_fdt, node_path, +- props[i].name, +- &prop_len, +- &err); +- if (r) { +- qemu_fdt_setprop(guest_fdt, nodename, +- props[i].name, r, prop_len); +- } else { +- if (props[i].optional && prop_len == -FDT_ERR_NOTFOUND) { +- /* optional property does not exist */ +- error_free(err); +- } else { +- error_report_err(err); +- } +- if (!props[i].optional) { +- /* mandatory property not found: bail out */ +- exit(1); +- } +- err = NULL; +- } +- } +-} +- +-/* clock properties whose values are copied/pasted from host */ +-static HostProperty clock_copied_properties[] = { +- {"compatible", false}, +- {"#clock-cells", false}, +- {"clock-frequency", true}, +- {"clock-output-names", true}, +-}; +- +-/** +- * fdt_build_clock_node +- * +- * Build a guest clock node, used as a dependency from a passthrough'ed +- * device. Most information are retrieved from the host clock node. +- * Also check the host clock is a fixed one. +- * +- * @host_fdt: host device tree blob from which info are retrieved +- * @guest_fdt: guest device tree blob where the clock node is added +- * @host_phandle: phandle of the clock in host device tree +- * @guest_phandle: phandle to assign to the guest node +- */ +-static void fdt_build_clock_node(void *host_fdt, void *guest_fdt, +- uint32_t host_phandle, +- uint32_t guest_phandle) +-{ +- char *node_path = NULL; +- char *nodename; +- const void *r; +- int ret, node_offset, prop_len, path_len = 16; +- +- node_offset = fdt_node_offset_by_phandle(host_fdt, host_phandle); +- if (node_offset <= 0) { +- error_report("not able to locate clock handle %d in host device tree", +- host_phandle); +- exit(1); +- } +- node_path = g_malloc(path_len); +- while ((ret = fdt_get_path(host_fdt, node_offset, node_path, path_len)) +- == -FDT_ERR_NOSPACE) { +- path_len += 16; +- node_path = g_realloc(node_path, path_len); +- } +- if (ret < 0) { +- error_report("not able to retrieve node path for clock handle %d", +- host_phandle); +- exit(1); +- } +- +- r = qemu_fdt_getprop(host_fdt, node_path, "compatible", &prop_len, +- &error_fatal); +- if (strcmp(r, "fixed-clock")) { +- error_report("clock handle %d is not a fixed clock", host_phandle); +- exit(1); +- } +- +- nodename = strrchr(node_path, '/'); +- qemu_fdt_add_subnode(guest_fdt, nodename); +- +- copy_properties_from_host(clock_copied_properties, +- ARRAY_SIZE(clock_copied_properties), +- host_fdt, guest_fdt, +- node_path, nodename); +- +- qemu_fdt_setprop_cell(guest_fdt, nodename, "phandle", guest_phandle); +- +- g_free(node_path); +-} +- +-/** +- * sysfs_to_dt_name: convert the name found in sysfs into the node name +- * for instance e0900000.xgmac is converted into xgmac@e0900000 +- * @sysfs_name: directory name in sysfs +- * +- * returns the device tree name upon success or NULL in case the sysfs name +- * does not match the expected format +- */ +-static char *sysfs_to_dt_name(const char *sysfs_name) +-{ +- gchar **substrings = g_strsplit(sysfs_name, ".", 2); +- char *dt_name = NULL; +- +- if (!substrings || !substrings[0] || !substrings[1]) { +- goto out; +- } +- dt_name = g_strdup_printf("%s@%s", substrings[1], substrings[0]); +-out: +- g_strfreev(substrings); +- return dt_name; +-} +- + /* Device Specific Code */ + + /** +@@ -263,182 +126,6 @@ static int add_calxeda_midway_xgmac_fdt_node(SysBusDevice *sbdev, void *opaque) + return 0; + } + +-/* AMD xgbe properties whose values are copied/pasted from host */ +-static HostProperty amd_xgbe_copied_properties[] = { +- {"compatible", false}, +- {"dma-coherent", true}, +- {"amd,per-channel-interrupt", true}, +- {"phy-mode", false}, +- {"mac-address", true}, +- {"amd,speed-set", false}, +- {"amd,serdes-blwc", true}, +- {"amd,serdes-cdr-rate", true}, +- {"amd,serdes-pq-skew", true}, +- {"amd,serdes-tx-amp", true}, +- {"amd,serdes-dfe-tap-config", true}, +- {"amd,serdes-dfe-tap-enable", true}, +- {"clock-names", false}, +-}; +- +-/** +- * add_amd_xgbe_fdt_node +- * +- * Generates the combined xgbe/phy node following kernel >=4.2 +- * binding documentation: +- * Documentation/devicetree/bindings/net/amd-xgbe.txt: +- * Also 2 clock nodes are created (dma and ptp) +- * +- * Asserts in case of error +- */ +-static int add_amd_xgbe_fdt_node(SysBusDevice *sbdev, void *opaque) +-{ +- PlatformBusFDTData *data = opaque; +- PlatformBusDevice *pbus = data->pbus; +- VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(sbdev); +- VFIODevice *vbasedev = &vdev->vbasedev; +- VFIOINTp *intp; +- const char *parent_node = data->pbus_node_name; +- char **node_path, *nodename, *dt_name; +- void *guest_fdt = data->fdt, *host_fdt; +- const void *r; +- int i, prop_len; +- uint32_t *irq_attr, *reg_attr; +- const uint32_t *host_clock_phandles; +- uint64_t mmio_base, irq_number; +- uint32_t guest_clock_phandles[2]; +- +- host_fdt = load_device_tree_from_sysfs(); +- +- dt_name = sysfs_to_dt_name(vbasedev->name); +- if (!dt_name) { +- error_report("%s incorrect sysfs device name %s", +- __func__, vbasedev->name); +- exit(1); +- } +- node_path = qemu_fdt_node_path(host_fdt, dt_name, vdev->compat, +- &error_fatal); +- if (!node_path || !node_path[0]) { +- error_report("%s unable to retrieve node path for %s/%s", +- __func__, dt_name, vdev->compat); +- exit(1); +- } +- +- if (node_path[1]) { +- error_report("%s more than one node matching %s/%s!", +- __func__, dt_name, vdev->compat); +- exit(1); +- } +- +- g_free(dt_name); +- +- if (vbasedev->num_initial_regions != 5) { +- error_report("%s Does the host dt node combine XGBE/PHY?", __func__); +- exit(1); +- } +- +- /* generate nodes for DMA_CLK and PTP_CLK */ +- r = qemu_fdt_getprop(host_fdt, node_path[0], "clocks", +- &prop_len, &error_fatal); +- if (prop_len != 8) { +- error_report("%s clocks property should contain 2 handles", __func__); +- exit(1); +- } +- host_clock_phandles = r; +- guest_clock_phandles[0] = qemu_fdt_alloc_phandle(guest_fdt); +- guest_clock_phandles[1] = qemu_fdt_alloc_phandle(guest_fdt); +- +- /** +- * clock handles fetched from host dt are in be32 layout whereas +- * rest of the code uses cpu layout. Also guest clock handles are +- * in cpu layout. +- */ +- fdt_build_clock_node(host_fdt, guest_fdt, +- be32_to_cpu(host_clock_phandles[0]), +- guest_clock_phandles[0]); +- +- fdt_build_clock_node(host_fdt, guest_fdt, +- be32_to_cpu(host_clock_phandles[1]), +- guest_clock_phandles[1]); +- +- /* combined XGBE/PHY node */ +- mmio_base = platform_bus_get_mmio_addr(pbus, sbdev, 0); +- nodename = g_strdup_printf("%s/%s@%" PRIx64, parent_node, +- vbasedev->name, mmio_base); +- qemu_fdt_add_subnode(guest_fdt, nodename); +- +- copy_properties_from_host(amd_xgbe_copied_properties, +- ARRAY_SIZE(amd_xgbe_copied_properties), +- host_fdt, guest_fdt, +- node_path[0], nodename); +- +- qemu_fdt_setprop_cells(guest_fdt, nodename, "clocks", +- guest_clock_phandles[0], +- guest_clock_phandles[1]); +- +- reg_attr = g_new(uint32_t, vbasedev->num_initial_regions * 2); +- for (i = 0; i < vbasedev->num_initial_regions; i++) { +- mmio_base = platform_bus_get_mmio_addr(pbus, sbdev, i); +- reg_attr[2 * i] = cpu_to_be32(mmio_base); +- reg_attr[2 * i + 1] = cpu_to_be32( +- memory_region_size(vdev->regions[i]->mem)); +- } +- qemu_fdt_setprop(guest_fdt, nodename, "reg", reg_attr, +- vbasedev->num_initial_regions * 2 * sizeof(uint32_t)); +- +- irq_attr = g_new(uint32_t, vbasedev->num_irqs * 3); +- for (i = 0; i < vbasedev->num_irqs; i++) { +- irq_number = platform_bus_get_irqn(pbus, sbdev , i) +- + data->irq_start; +- irq_attr[3 * i] = cpu_to_be32(GIC_FDT_IRQ_TYPE_SPI); +- irq_attr[3 * i + 1] = cpu_to_be32(irq_number); +- /* +- * General device interrupt and PCS auto-negotiation interrupts are +- * level-sensitive while the 4 per-channel interrupts are edge +- * sensitive +- */ +- QLIST_FOREACH(intp, &vdev->intp_list, next) { +- if (intp->pin == i) { +- break; +- } +- } +- if (intp->flags & VFIO_IRQ_INFO_AUTOMASKED) { +- irq_attr[3 * i + 2] = cpu_to_be32(GIC_FDT_IRQ_FLAGS_LEVEL_HI); +- } else { +- irq_attr[3 * i + 2] = cpu_to_be32(GIC_FDT_IRQ_FLAGS_EDGE_LO_HI); +- } +- } +- qemu_fdt_setprop(guest_fdt, nodename, "interrupts", +- irq_attr, vbasedev->num_irqs * 3 * sizeof(uint32_t)); +- +- g_free(host_fdt); +- g_strfreev(node_path); +- g_free(irq_attr); +- g_free(reg_attr); +- g_free(nodename); +- return 0; +-} +- +-/* DT compatible matching */ +-static bool vfio_platform_match(SysBusDevice *sbdev, +- const BindingEntry *entry) +-{ +- VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(sbdev); +- const char *compat; +- unsigned int n; +- +- for (n = vdev->num_compat, compat = vdev->compat; n > 0; +- n--, compat += strlen(compat) + 1) { +- if (!strcmp(entry->compat, compat)) { +- return true; +- } +- } +- +- return false; +-} +- +-#define VFIO_PLATFORM_BINDING(compat, add_fn) \ +- {TYPE_VFIO_PLATFORM, (compat), (add_fn), vfio_platform_match} +- + #endif /* CONFIG_LINUX */ + + #ifdef CONFIG_TPM +@@ -513,8 +200,6 @@ static bool type_match(SysBusDevice *sbdev, const BindingEntry *entry) + static const BindingEntry bindings[] = { + #ifdef CONFIG_LINUX + TYPE_BINDING(TYPE_VFIO_CALXEDA_XGMAC, add_calxeda_midway_xgmac_fdt_node), +- TYPE_BINDING(TYPE_VFIO_AMD_XGBE, add_amd_xgbe_fdt_node), +- VFIO_PLATFORM_BINDING("amd,xgbe-seattle-v1a", add_amd_xgbe_fdt_node), + #endif + #ifdef CONFIG_TPM + TYPE_BINDING(TYPE_TPM_TIS_SYSBUS, add_tpm_tis_fdt_node), +diff --git a/hw/vfio/Kconfig b/hw/vfio/Kconfig +index 91d9023b79..bc984f1986 100644 +--- a/hw/vfio/Kconfig ++++ b/hw/vfio/Kconfig +@@ -28,11 +28,6 @@ config VFIO_XGMAC + default y + depends on VFIO_PLATFORM + +-config VFIO_AMD_XGBE +- bool +- default y +- depends on VFIO_PLATFORM +- + config VFIO_AP + bool + default y +diff --git a/hw/vfio/amd-xgbe.c b/hw/vfio/amd-xgbe.c +deleted file mode 100644 +index 58f590e385..0000000000 +--- a/hw/vfio/amd-xgbe.c ++++ /dev/null +@@ -1,61 +0,0 @@ +-/* +- * AMD XGBE VFIO device +- * +- * Copyright Linaro Limited, 2015 +- * +- * Authors: +- * Eric Auger +- * +- * This work is licensed under the terms of the GNU GPL, version 2. See +- * the COPYING file in the top-level directory. +- * +- */ +- +-#include "qemu/osdep.h" +-#include "hw/vfio/vfio-amd-xgbe.h" +-#include "migration/vmstate.h" +-#include "qemu/module.h" +-#include "qemu/error-report.h" +- +-static void amd_xgbe_realize(DeviceState *dev, Error **errp) +-{ +- VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(dev); +- VFIOAmdXgbeDeviceClass *k = VFIO_AMD_XGBE_DEVICE_GET_CLASS(dev); +- +- warn_report("-device vfio-amd-xgbe is deprecated"); +- vdev->compat = g_strdup("amd,xgbe-seattle-v1a"); +- vdev->num_compat = 1; +- +- k->parent_realize(dev, errp); +-} +- +-static const VMStateDescription vfio_platform_amd_xgbe_vmstate = { +- .name = "vfio-amd-xgbe", +- .unmigratable = 1, +-}; +- +-static void vfio_amd_xgbe_class_init(ObjectClass *klass, const void *data) +-{ +- DeviceClass *dc = DEVICE_CLASS(klass); +- VFIOAmdXgbeDeviceClass *vcxc = +- VFIO_AMD_XGBE_DEVICE_CLASS(klass); +- device_class_set_parent_realize(dc, amd_xgbe_realize, +- &vcxc->parent_realize); +- dc->desc = "VFIO AMD XGBE"; +- dc->vmsd = &vfio_platform_amd_xgbe_vmstate; +-} +- +-static const TypeInfo vfio_amd_xgbe_dev_info = { +- .name = TYPE_VFIO_AMD_XGBE, +- .parent = TYPE_VFIO_PLATFORM, +- .instance_size = sizeof(VFIOAmdXgbeDevice), +- .class_init = vfio_amd_xgbe_class_init, +- .class_size = sizeof(VFIOAmdXgbeDeviceClass), +-}; +- +-static void register_amd_xgbe_dev_type(void) +-{ +- type_register_static(&vfio_amd_xgbe_dev_info); +-} +- +-type_init(register_amd_xgbe_dev_type) +diff --git a/hw/vfio/meson.build b/hw/vfio/meson.build +index bfaf6be805..0edcaf5155 100644 +--- a/hw/vfio/meson.build ++++ b/hw/vfio/meson.build +@@ -20,7 +20,6 @@ vfio_ss.add(when: 'CONFIG_VFIO_IGD', if_true: files('igd.c')) + specific_ss.add_all(when: 'CONFIG_VFIO', if_true: vfio_ss) + + system_ss.add(when: 'CONFIG_VFIO_XGMAC', if_true: files('calxeda-xgmac.c')) +-system_ss.add(when: 'CONFIG_VFIO_AMD_XGBE', if_true: files('amd-xgbe.c')) + system_ss.add(when: 'CONFIG_VFIO', if_true: files( + 'cpr.c', + 'cpr-legacy.c', +diff --git a/include/hw/vfio/vfio-amd-xgbe.h b/include/hw/vfio/vfio-amd-xgbe.h +deleted file mode 100644 +index a894546c02..0000000000 +--- a/include/hw/vfio/vfio-amd-xgbe.h ++++ /dev/null +@@ -1,46 +0,0 @@ +-/* +- * VFIO AMD XGBE device +- * +- * Copyright Linaro Limited, 2015 +- * +- * Authors: +- * Eric Auger +- * +- * This work is licensed under the terms of the GNU GPL, version 2. See +- * the COPYING file in the top-level directory. +- * +- */ +- +-#ifndef HW_VFIO_VFIO_AMD_XGBE_H +-#define HW_VFIO_VFIO_AMD_XGBE_H +- +-#include "hw/vfio/vfio-platform.h" +-#include "qom/object.h" +- +-#define TYPE_VFIO_AMD_XGBE "vfio-amd-xgbe" +- +-/** +- * This device exposes: +- * - 5 MMIO regions: MAC, PCS, SerDes Rx/Tx regs, +- SerDes Integration Registers 1/2 & 2/2 +- * - 2 level sensitive IRQs and optional DMA channel IRQs +- */ +-struct VFIOAmdXgbeDevice { +- VFIOPlatformDevice vdev; +-}; +- +-typedef struct VFIOAmdXgbeDevice VFIOAmdXgbeDevice; +- +-struct VFIOAmdXgbeDeviceClass { +- /*< private >*/ +- VFIOPlatformDeviceClass parent_class; +- /*< public >*/ +- DeviceRealize parent_realize; +-}; +- +-typedef struct VFIOAmdXgbeDeviceClass VFIOAmdXgbeDeviceClass; +- +-DECLARE_OBJ_CHECKERS(VFIOAmdXgbeDevice, VFIOAmdXgbeDeviceClass, +- VFIO_AMD_XGBE_DEVICE, TYPE_VFIO_AMD_XGBE) +- +-#endif diff --git a/0122-vfio-Remove-vfio-calxeda-xgmac-device.patch b/0122-vfio-Remove-vfio-calxeda-xgmac-device.patch new file mode 100644 index 0000000..d5d26df --- /dev/null +++ b/0122-vfio-Remove-vfio-calxeda-xgmac-device.patch @@ -0,0 +1,362 @@ +From a1ea0dd77ab0043ed556922c67ba77c3215c7a74 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= +Date: Mon, 1 Sep 2025 08:46:29 +0200 +Subject: [PATCH] vfio: Remove 'vfio-calxeda-xgmac' device +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] dbc2834a07 (clegoate/qemu-kvm-centos) + +Conflicts: + hw/arm/virt.c: due to the downstream-only code in #if 0 + hw/core/sysbus-fdt.c: downstream 60e7ac0c41c2 ("vfio: rename + field to "num_initial_regions") touches sysbus-fdt.c. Anyway that code + is removed + +The VFIO_XGMAC device type has been deprecated in the QEMU 10.0 +timeframe. Remove it. + +Reviewed-by: Eric Auger +Reviewed-by: Alex Williamson +Link: https://lore.kernel.org/qemu-devel/20250901064631.530723-7-clg@redhat.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 8ebc416ac17a71aec267df1ca5cb5301cc6c4906) +Signed-off-by: Eric Auger +--- + docs/about/deprecated.rst | 7 --- + docs/about/removed-features.rst | 7 +++ + docs/devel/kconfig.rst | 1 - + hw/arm/Kconfig | 1 - + hw/arm/virt.c | 3 +- + hw/core/sysbus-fdt.c | 68 ---------------------------- + hw/vfio/Kconfig | 5 -- + hw/vfio/calxeda-xgmac.c | 61 ------------------------- + hw/vfio/meson.build | 1 - + include/hw/vfio/vfio-calxeda-xgmac.h | 43 ------------------ + 10 files changed, 8 insertions(+), 189 deletions(-) + delete mode 100644 hw/vfio/calxeda-xgmac.c + delete mode 100644 include/hw/vfio/vfio-calxeda-xgmac.h + +diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst +index 631871ffc8..0df97eb2b7 100644 +--- a/docs/about/deprecated.rst ++++ b/docs/about/deprecated.rst +@@ -519,13 +519,6 @@ which is not enough for all types of use cases, use ``reconnect-ms`` instead. + VFIO device options + ''''''''''''''''''' + +-``-device vfio-calxeda-xgmac`` (since 10.0) +-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +-The vfio-calxeda-xgmac device allows to assign a host Calxeda Highbank +-10Gb XGMAC Ethernet controller device ("calxeda,hb-xgmac" compatibility +-string) to a guest. Calxeda HW has been ewasted now and there is no point +-keeping that device. +- + ``-device vfio-platform`` (since 10.0) + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + The vfio-platform device allows to assign a host platform device +diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst +index 759c067412..47e632b4ac 100644 +--- a/docs/about/removed-features.rst ++++ b/docs/about/removed-features.rst +@@ -1265,6 +1265,13 @@ device driver such as RBD. + VFIO devices + ------------ + ++``-device vfio-calxeda-xgmac`` (since 10.2) ++''''''''''''''''''''''''''''''''''''''''''' ++The vfio-calxeda-xgmac device allows to assign a host Calxeda Highbank ++10Gb XGMAC Ethernet controller device ("calxeda,hb-xgmac" compatibility ++string) to a guest. Calxeda HW has been ewasted now and there is no point ++keeping that device. ++ + ``-device vfio-amd-xgbe`` (since 10.2) + '''''''''''''''''''''''''''''''''''''' + The vfio-amd-xgbe device allows to assign a host AMD 10GbE controller +diff --git a/docs/devel/kconfig.rst b/docs/devel/kconfig.rst +index 9fdf501529..1d4a114a02 100644 +--- a/docs/devel/kconfig.rst ++++ b/docs/devel/kconfig.rst +@@ -59,7 +59,6 @@ stanza like the following:: + config ARM_VIRT + bool + imply PCI_DEVICES +- imply VFIO_XGMAC + select A15MPCORE + select ACPI + select ARM_SMMUV3 +diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig +index 64b2ec87b5..3fca48349a 100644 +--- a/hw/arm/Kconfig ++++ b/hw/arm/Kconfig +@@ -6,7 +6,6 @@ config ARM_VIRT + imply PCI_DEVICES + imply TEST_DEVICES + imply VFIO_PLATFORM +- imply VFIO_XGMAC + imply TPM_TIS_SYSBUS + imply TPM_TIS_I2C + imply NVDIMM +diff --git a/hw/arm/virt.c b/hw/arm/virt.c +index 93532f37c0..09faaeec4c 100644 +--- a/hw/arm/virt.c ++++ b/hw/arm/virt.c +@@ -38,7 +38,7 @@ + #include "hw/arm/primecell.h" + #include "hw/arm/virt.h" + #include "hw/block/flash.h" +-#include "hw/vfio/vfio-calxeda-xgmac.h" ++#include "hw/vfio/vfio-platform.h" + #include "hw/display/ramfb.h" + #include "net/net.h" + #include "system/device_tree.h" +@@ -3330,7 +3330,6 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data) + /* Maximum supported VCPU count for all virt-rhel* machines */ + mc->max_cpus = 384; + #if 0 /* Disabled for Red Hat Enterprise Linux */ +- machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_CALXEDA_XGMAC); + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_PLATFORM); + #endif + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); +diff --git a/hw/core/sysbus-fdt.c b/hw/core/sysbus-fdt.c +index 0caffe4845..59f1d17de1 100644 +--- a/hw/core/sysbus-fdt.c ++++ b/hw/core/sysbus-fdt.c +@@ -33,9 +33,6 @@ + #include "system/tpm.h" + #include "hw/arm/smmuv3.h" + #include "hw/platform-bus.h" +-#include "hw/vfio/vfio-platform.h" +-#include "hw/vfio/vfio-calxeda-xgmac.h" +-#include "hw/vfio/vfio-region.h" + #include "hw/display/ramfb.h" + #include "hw/uefi/var-service-api.h" + #include "hw/arm/fdt.h" +@@ -66,68 +63,6 @@ typedef struct HostProperty { + bool optional; + } HostProperty; + +-#ifdef CONFIG_LINUX +- +-/* Device Specific Code */ +- +-/** +- * add_calxeda_midway_xgmac_fdt_node +- * +- * Generates a simple node with following properties: +- * compatible string, regs, interrupts, dma-coherent +- */ +-static int add_calxeda_midway_xgmac_fdt_node(SysBusDevice *sbdev, void *opaque) +-{ +- PlatformBusFDTData *data = opaque; +- PlatformBusDevice *pbus = data->pbus; +- void *fdt = data->fdt; +- const char *parent_node = data->pbus_node_name; +- int compat_str_len, i; +- char *nodename; +- uint32_t *irq_attr, *reg_attr; +- uint64_t mmio_base, irq_number; +- VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(sbdev); +- VFIODevice *vbasedev = &vdev->vbasedev; +- +- mmio_base = platform_bus_get_mmio_addr(pbus, sbdev, 0); +- nodename = g_strdup_printf("%s/%s@%" PRIx64, parent_node, +- vbasedev->name, mmio_base); +- qemu_fdt_add_subnode(fdt, nodename); +- +- compat_str_len = strlen(vdev->compat) + 1; +- qemu_fdt_setprop(fdt, nodename, "compatible", +- vdev->compat, compat_str_len); +- +- qemu_fdt_setprop(fdt, nodename, "dma-coherent", "", 0); +- +- reg_attr = g_new(uint32_t, vbasedev->num_initial_regions * 2); +- for (i = 0; i < vbasedev->num_initial_regions; i++) { +- mmio_base = platform_bus_get_mmio_addr(pbus, sbdev, i); +- reg_attr[2 * i] = cpu_to_be32(mmio_base); +- reg_attr[2 * i + 1] = cpu_to_be32( +- memory_region_size(vdev->regions[i]->mem)); +- } +- qemu_fdt_setprop(fdt, nodename, "reg", reg_attr, +- vbasedev->num_initial_regions * 2 * sizeof(uint32_t)); +- +- irq_attr = g_new(uint32_t, vbasedev->num_irqs * 3); +- for (i = 0; i < vbasedev->num_irqs; i++) { +- irq_number = platform_bus_get_irqn(pbus, sbdev , i) +- + data->irq_start; +- irq_attr[3 * i] = cpu_to_be32(GIC_FDT_IRQ_TYPE_SPI); +- irq_attr[3 * i + 1] = cpu_to_be32(irq_number); +- irq_attr[3 * i + 2] = cpu_to_be32(GIC_FDT_IRQ_FLAGS_LEVEL_HI); +- } +- qemu_fdt_setprop(fdt, nodename, "interrupts", +- irq_attr, vbasedev->num_irqs * 3 * sizeof(uint32_t)); +- g_free(irq_attr); +- g_free(reg_attr); +- g_free(nodename); +- return 0; +-} +- +-#endif /* CONFIG_LINUX */ +- + #ifdef CONFIG_TPM + /* + * add_tpm_tis_fdt_node: Create a DT node for TPM TIS +@@ -198,9 +133,6 @@ static bool type_match(SysBusDevice *sbdev, const BindingEntry *entry) + + /* list of supported dynamic sysbus bindings */ + static const BindingEntry bindings[] = { +-#ifdef CONFIG_LINUX +- TYPE_BINDING(TYPE_VFIO_CALXEDA_XGMAC, add_calxeda_midway_xgmac_fdt_node), +-#endif + #ifdef CONFIG_TPM + TYPE_BINDING(TYPE_TPM_TIS_SYSBUS, add_tpm_tis_fdt_node), + #endif +diff --git a/hw/vfio/Kconfig b/hw/vfio/Kconfig +index bc984f1986..9a1dbe2926 100644 +--- a/hw/vfio/Kconfig ++++ b/hw/vfio/Kconfig +@@ -23,11 +23,6 @@ config VFIO_PLATFORM + select VFIO + depends on LINUX && PLATFORM_BUS + +-config VFIO_XGMAC +- bool +- default y +- depends on VFIO_PLATFORM +- + config VFIO_AP + bool + default y +diff --git a/hw/vfio/calxeda-xgmac.c b/hw/vfio/calxeda-xgmac.c +deleted file mode 100644 +index 03f2ff5763..0000000000 +--- a/hw/vfio/calxeda-xgmac.c ++++ /dev/null +@@ -1,61 +0,0 @@ +-/* +- * calxeda xgmac VFIO device +- * +- * Copyright Linaro Limited, 2014 +- * +- * Authors: +- * Eric Auger +- * +- * This work is licensed under the terms of the GNU GPL, version 2. See +- * the COPYING file in the top-level directory. +- * +- */ +- +-#include "qemu/osdep.h" +-#include "hw/vfio/vfio-calxeda-xgmac.h" +-#include "migration/vmstate.h" +-#include "qemu/module.h" +-#include "qemu/error-report.h" +- +-static void calxeda_xgmac_realize(DeviceState *dev, Error **errp) +-{ +- VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(dev); +- VFIOCalxedaXgmacDeviceClass *k = VFIO_CALXEDA_XGMAC_DEVICE_GET_CLASS(dev); +- +- warn_report("-device vfio-calxeda-xgmac is deprecated"); +- vdev->compat = g_strdup("calxeda,hb-xgmac"); +- vdev->num_compat = 1; +- +- k->parent_realize(dev, errp); +-} +- +-static const VMStateDescription vfio_platform_calxeda_xgmac_vmstate = { +- .name = "vfio-calxeda-xgmac", +- .unmigratable = 1, +-}; +- +-static void vfio_calxeda_xgmac_class_init(ObjectClass *klass, const void *data) +-{ +- DeviceClass *dc = DEVICE_CLASS(klass); +- VFIOCalxedaXgmacDeviceClass *vcxc = +- VFIO_CALXEDA_XGMAC_DEVICE_CLASS(klass); +- device_class_set_parent_realize(dc, calxeda_xgmac_realize, +- &vcxc->parent_realize); +- dc->desc = "VFIO Calxeda XGMAC"; +- dc->vmsd = &vfio_platform_calxeda_xgmac_vmstate; +-} +- +-static const TypeInfo vfio_calxeda_xgmac_dev_info = { +- .name = TYPE_VFIO_CALXEDA_XGMAC, +- .parent = TYPE_VFIO_PLATFORM, +- .instance_size = sizeof(VFIOCalxedaXgmacDevice), +- .class_init = vfio_calxeda_xgmac_class_init, +- .class_size = sizeof(VFIOCalxedaXgmacDeviceClass), +-}; +- +-static void register_calxeda_xgmac_dev_type(void) +-{ +- type_register_static(&vfio_calxeda_xgmac_dev_info); +-} +- +-type_init(register_calxeda_xgmac_dev_type) +diff --git a/hw/vfio/meson.build b/hw/vfio/meson.build +index 0edcaf5155..06473a0789 100644 +--- a/hw/vfio/meson.build ++++ b/hw/vfio/meson.build +@@ -19,7 +19,6 @@ vfio_ss.add(when: 'CONFIG_VFIO_IGD', if_true: files('igd.c')) + + specific_ss.add_all(when: 'CONFIG_VFIO', if_true: vfio_ss) + +-system_ss.add(when: 'CONFIG_VFIO_XGMAC', if_true: files('calxeda-xgmac.c')) + system_ss.add(when: 'CONFIG_VFIO', if_true: files( + 'cpr.c', + 'cpr-legacy.c', +diff --git a/include/hw/vfio/vfio-calxeda-xgmac.h b/include/hw/vfio/vfio-calxeda-xgmac.h +deleted file mode 100644 +index 8482f151dd..0000000000 +--- a/include/hw/vfio/vfio-calxeda-xgmac.h ++++ /dev/null +@@ -1,43 +0,0 @@ +-/* +- * VFIO calxeda xgmac device +- * +- * Copyright Linaro Limited, 2014 +- * +- * Authors: +- * Eric Auger +- * +- * This work is licensed under the terms of the GNU GPL, version 2. See +- * the COPYING file in the top-level directory. +- * +- */ +- +-#ifndef HW_VFIO_VFIO_CALXEDA_XGMAC_H +-#define HW_VFIO_VFIO_CALXEDA_XGMAC_H +- +-#include "hw/vfio/vfio-platform.h" +-#include "qom/object.h" +- +-#define TYPE_VFIO_CALXEDA_XGMAC "vfio-calxeda-xgmac" +- +-/** +- * This device exposes: +- * - a single MMIO region corresponding to its register space +- * - 3 IRQS (main and 2 power related IRQs) +- */ +-struct VFIOCalxedaXgmacDevice { +- VFIOPlatformDevice vdev; +-}; +-typedef struct VFIOCalxedaXgmacDevice VFIOCalxedaXgmacDevice; +- +-struct VFIOCalxedaXgmacDeviceClass { +- /*< private >*/ +- VFIOPlatformDeviceClass parent_class; +- /*< public >*/ +- DeviceRealize parent_realize; +-}; +-typedef struct VFIOCalxedaXgmacDeviceClass VFIOCalxedaXgmacDeviceClass; +- +-DECLARE_OBJ_CHECKERS(VFIOCalxedaXgmacDevice, VFIOCalxedaXgmacDeviceClass, +- VFIO_CALXEDA_XGMAC_DEVICE, TYPE_VFIO_CALXEDA_XGMAC) +- +-#endif diff --git a/0123-hw-arm-virt-Include-system-system.h.patch b/0123-hw-arm-virt-Include-system-system.h.patch new file mode 100644 index 0000000..86231d2 --- /dev/null +++ b/0123-hw-arm-virt-Include-system-system.h.patch @@ -0,0 +1,43 @@ +From a688474867f8634d085cfbf524719244265a5e6f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= +Date: Mon, 1 Sep 2025 08:46:24 +0200 +Subject: [PATCH] hw/arm/virt: Include 'system/system.h' +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] a6ba6f76fb (clegoate/qemu-kvm-centos) + +hw/arm/virt.c should include 'system/system.h' for : + + serial_hd() + qemu_add_machine_init_done_notifier() + +Reviewed-by: Philippe Mathieu-Daudé +Reviewed-by: Peter Maydell +Link: https://lore.kernel.org/qemu-devel/20250731144019.1403591-1-clg@redhat.com +Signed-off-by: Cédric Le Goater +Message-ID: <20250901064631.530723-2-clg@redhat.com> +Signed-off-by: Philippe Mathieu-Daudé +(cherry picked from commit 319ca84949fc3134774342d50790592680c3b9b0) +Signed-off-by: Eric Auger +--- + hw/arm/virt.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/hw/arm/virt.c b/hw/arm/virt.c +index 09faaeec4c..545b5076fd 100644 +--- a/hw/arm/virt.c ++++ b/hw/arm/virt.c +@@ -49,6 +49,7 @@ + #include "system/kvm.h" + #include "system/hvf.h" + #include "system/qtest.h" ++#include "system/system.h" + #include "hw/loader.h" + #include "qapi/error.h" + #include "qemu/bitops.h" diff --git a/0124-vfio-Remove-vfio-platform.patch b/0124-vfio-Remove-vfio-platform.patch new file mode 100644 index 0000000..0cb1738 --- /dev/null +++ b/0124-vfio-Remove-vfio-platform.patch @@ -0,0 +1,995 @@ +From 9ca1f7cb4d8f7de7da209ff5a70a96018044b674 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= +Date: Mon, 1 Sep 2025 08:46:30 +0200 +Subject: [PATCH] vfio: Remove 'vfio-platform' +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] c6c3f3444c (clegoate/qemu-kvm-centos) + +Conflicts: + hw/arm/virt.c: contextual diff due to downstream-only sections + hw/vfio/platform.c: contextual diff due to downstream + 60e7ac0c41c2 ("vfio: rename field to "num_initial_regions"") + anyway the file is removed + +The VFIO_PLATFORM device type has been deprecated in the QEMU 10.0 +timeframe. All dependent devices have been removed. Now remove the +core vfio platform framework. + +Rename VFIO_DEVICE_TYPE_PLATFORM enum to VFIO_DEVICE_TYPE_UNUSED to +maintain the same index for the CCW and AP VFIO device types. + +Reviewed-by: Eric Auger +Reviewed-by: Alex Williamson +Link: https://lore.kernel.org/qemu-devel/20250901064631.530723-8-clg@redhat.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 762c85543948bf1f7838d663995648635d3f4b92) +Signed-off-by: Eric Auger +--- + docs/about/deprecated.rst | 12 - + docs/about/removed-features.rst | 9 + + hw/arm/Kconfig | 1 - + hw/arm/virt.c | 4 - + hw/vfio/Kconfig | 6 - + hw/vfio/meson.build | 1 - + hw/vfio/platform.c | 716 -------------------------------- + hw/vfio/trace-events | 11 - + include/hw/vfio/vfio-device.h | 2 +- + include/hw/vfio/vfio-platform.h | 78 ---- + 10 files changed, 10 insertions(+), 830 deletions(-) + delete mode 100644 hw/vfio/platform.c + delete mode 100644 include/hw/vfio/vfio-platform.h + +diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst +index 0df97eb2b7..fc422acc3e 100644 +--- a/docs/about/deprecated.rst ++++ b/docs/about/deprecated.rst +@@ -516,18 +516,6 @@ Stream ``reconnect`` (since 9.2) + The ``reconnect`` option only allows specifying second granularity timeouts, + which is not enough for all types of use cases, use ``reconnect-ms`` instead. + +-VFIO device options +-''''''''''''''''''' +- +-``-device vfio-platform`` (since 10.0) +-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +-The vfio-platform device allows to assign a host platform device +-to a guest in a generic manner. Integrating a new device into +-the vfio-platform infrastructure requires some adaptation at +-both kernel and qemu level. No such attempt has been done for years +-and the conclusion is that vfio-platform has not got any traction. +-PCIe passthrough shall be the mainline solution. +- + CPU device properties + ''''''''''''''''''''' + +diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst +index 47e632b4ac..177128812d 100644 +--- a/docs/about/removed-features.rst ++++ b/docs/about/removed-features.rst +@@ -1278,6 +1278,15 @@ The vfio-amd-xgbe device allows to assign a host AMD 10GbE controller + to a guest ("amd,xgbe-seattle-v1a" compatibility string). AMD "Seattle" + is not supported anymore and there is no point keeping that device. + ++``-device vfio-platform`` (since 10.2) ++'''''''''''''''''''''''''''''''''''''' ++The vfio-platform device allows to assign a host platform device ++to a guest in a generic manner. Integrating a new device into ++the vfio-platform infrastructure requires some adaptation at ++both kernel and qemu level. No such attempt has been done for years ++and the conclusion is that vfio-platform has not got any traction. ++PCIe passthrough shall be the mainline solution. ++ + Tools + ----- + +diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig +index 3fca48349a..3baa6c6c74 100644 +--- a/hw/arm/Kconfig ++++ b/hw/arm/Kconfig +@@ -5,7 +5,6 @@ config ARM_VIRT + depends on TCG || KVM || HVF + imply PCI_DEVICES + imply TEST_DEVICES +- imply VFIO_PLATFORM + imply TPM_TIS_SYSBUS + imply TPM_TIS_I2C + imply NVDIMM +diff --git a/hw/arm/virt.c b/hw/arm/virt.c +index 545b5076fd..5f871e7a8f 100644 +--- a/hw/arm/virt.c ++++ b/hw/arm/virt.c +@@ -38,7 +38,6 @@ + #include "hw/arm/primecell.h" + #include "hw/arm/virt.h" + #include "hw/block/flash.h" +-#include "hw/vfio/vfio-platform.h" + #include "hw/display/ramfb.h" + #include "net/net.h" + #include "system/device_tree.h" +@@ -3330,9 +3329,6 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data) + mc->init = machvirt_init; + /* Maximum supported VCPU count for all virt-rhel* machines */ + mc->max_cpus = 384; +-#if 0 /* Disabled for Red Hat Enterprise Linux */ +- machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_PLATFORM); +-#endif + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_UEFI_VARS_SYSBUS); + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ARM_SMMUV3); +diff --git a/hw/vfio/Kconfig b/hw/vfio/Kconfig +index 9a1dbe2926..27de24e4db 100644 +--- a/hw/vfio/Kconfig ++++ b/hw/vfio/Kconfig +@@ -17,12 +17,6 @@ config VFIO_CCW + select VFIO + depends on LINUX && S390_CCW_VIRTIO + +-config VFIO_PLATFORM +- bool +- default y +- select VFIO +- depends on LINUX && PLATFORM_BUS +- + config VFIO_AP + bool + default y +diff --git a/hw/vfio/meson.build b/hw/vfio/meson.build +index 06473a0789..d3ed3cb7ac 100644 +--- a/hw/vfio/meson.build ++++ b/hw/vfio/meson.build +@@ -13,7 +13,6 @@ vfio_ss.add(when: 'CONFIG_VFIO_PCI', if_true: files( + 'pci.c', + )) + vfio_ss.add(when: 'CONFIG_VFIO_CCW', if_true: files('ccw.c')) +-vfio_ss.add(when: 'CONFIG_VFIO_PLATFORM', if_true: files('platform.c')) + vfio_ss.add(when: 'CONFIG_VFIO_AP', if_true: files('ap.c')) + vfio_ss.add(when: 'CONFIG_VFIO_IGD', if_true: files('igd.c')) + +diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c +deleted file mode 100644 +index c9349ba7b7..0000000000 +--- a/hw/vfio/platform.c ++++ /dev/null +@@ -1,716 +0,0 @@ +-/* +- * vfio based device assignment support - platform devices +- * +- * Copyright Linaro Limited, 2014 +- * +- * Authors: +- * Kim Phillips +- * Eric Auger +- * +- * This work is licensed under the terms of the GNU GPL, version 2. See +- * the COPYING file in the top-level directory. +- * +- * Based on vfio based PCI device assignment support: +- * Copyright Red Hat, Inc. 2012 +- */ +- +-#include "qemu/osdep.h" +-#include CONFIG_DEVICES /* CONFIG_IOMMUFD */ +-#include "qapi/error.h" +-#include +-#include +- +-#include "hw/vfio/vfio-platform.h" +-#include "system/iommufd.h" +-#include "migration/vmstate.h" +-#include "qemu/error-report.h" +-#include "qemu/lockable.h" +-#include "qemu/main-loop.h" +-#include "qemu/module.h" +-#include "qemu/range.h" +-#include "system/memory.h" +-#include "system/address-spaces.h" +-#include "qemu/queue.h" +-#include "hw/sysbus.h" +-#include "trace.h" +-#include "hw/irq.h" +-#include "hw/platform-bus.h" +-#include "hw/qdev-properties.h" +-#include "system/kvm.h" +-#include "hw/vfio/vfio-region.h" +- +-/* +- * Functions used whatever the injection method +- */ +- +-static inline bool vfio_irq_is_automasked(VFIOINTp *intp) +-{ +- return intp->flags & VFIO_IRQ_INFO_AUTOMASKED; +-} +- +-/** +- * vfio_init_intp - allocate, initialize the IRQ struct pointer +- * and add it into the list of IRQs +- * @vbasedev: the VFIO device handle +- * @info: irq info struct retrieved from VFIO driver +- * @errp: error object +- */ +-static VFIOINTp *vfio_init_intp(VFIODevice *vbasedev, +- struct vfio_irq_info info, Error **errp) +-{ +- int ret; +- VFIOPlatformDevice *vdev = +- container_of(vbasedev, VFIOPlatformDevice, vbasedev); +- SysBusDevice *sbdev = SYS_BUS_DEVICE(vdev); +- VFIOINTp *intp; +- +- intp = g_malloc0(sizeof(*intp)); +- intp->vdev = vdev; +- intp->pin = info.index; +- intp->flags = info.flags; +- intp->state = VFIO_IRQ_INACTIVE; +- intp->kvm_accel = false; +- +- sysbus_init_irq(sbdev, &intp->qemuirq); +- +- /* Get an eventfd for trigger */ +- intp->interrupt = g_new0(EventNotifier, 1); +- ret = event_notifier_init(intp->interrupt, 0); +- if (ret) { +- g_free(intp->interrupt); +- g_free(intp); +- error_setg_errno(errp, -ret, +- "failed to initialize trigger eventfd notifier"); +- return NULL; +- } +- if (vfio_irq_is_automasked(intp)) { +- /* Get an eventfd for resample/unmask */ +- intp->unmask = g_new0(EventNotifier, 1); +- ret = event_notifier_init(intp->unmask, 0); +- if (ret) { +- g_free(intp->interrupt); +- g_free(intp->unmask); +- g_free(intp); +- error_setg_errno(errp, -ret, +- "failed to initialize resample eventfd notifier"); +- return NULL; +- } +- } +- +- QLIST_INSERT_HEAD(&vdev->intp_list, intp, next); +- return intp; +-} +- +-/** +- * vfio_set_trigger_eventfd - set VFIO eventfd handling +- * +- * @intp: IRQ struct handle +- * @handler: handler to be called on eventfd signaling +- * +- * Setup VFIO signaling and attach an optional user-side handler +- * to the eventfd +- */ +-static int vfio_set_trigger_eventfd(VFIOINTp *intp, +- eventfd_user_side_handler_t handler) +-{ +- VFIODevice *vbasedev = &intp->vdev->vbasedev; +- int32_t fd = event_notifier_get_fd(intp->interrupt); +- Error *err = NULL; +- +- qemu_set_fd_handler(fd, (IOHandler *)handler, NULL, intp); +- +- if (!vfio_device_irq_set_signaling(vbasedev, intp->pin, 0, +- VFIO_IRQ_SET_ACTION_TRIGGER, fd, &err)) { +- error_reportf_err(err, VFIO_MSG_PREFIX, vbasedev->name); +- qemu_set_fd_handler(fd, NULL, NULL, NULL); +- return -EINVAL; +- } +- +- return 0; +-} +- +-/* +- * Functions only used when eventfds are handled on user-side +- * ie. without irqfd +- */ +- +-/** +- * vfio_mmap_set_enabled - enable/disable the fast path mode +- * @vdev: the VFIO platform device +- * @enabled: the target mmap state +- * +- * enabled = true ~ fast path = MMIO region is mmaped (no KVM TRAP); +- * enabled = false ~ slow path = MMIO region is trapped and region callbacks +- * are called; slow path enables to trap the device IRQ status register reset +-*/ +- +-static void vfio_mmap_set_enabled(VFIOPlatformDevice *vdev, bool enabled) +-{ +- int i; +- +- for (i = 0; i < vdev->vbasedev.num_initial_regions; i++) { +- vfio_region_mmaps_set_enabled(vdev->regions[i], enabled); +- } +-} +- +-/** +- * vfio_intp_mmap_enable - timer function, restores the fast path +- * if there is no more active IRQ +- * @opaque: actually points to the VFIO platform device +- * +- * Called on mmap timer timeout, this function checks whether the +- * IRQ is still active and if not, restores the fast path. +- * by construction a single eventfd is handled at a time. +- * if the IRQ is still active, the timer is re-programmed. +- */ +-static void vfio_intp_mmap_enable(void *opaque) +-{ +- VFIOINTp *tmp; +- VFIOPlatformDevice *vdev = (VFIOPlatformDevice *)opaque; +- +- QEMU_LOCK_GUARD(&vdev->intp_mutex); +- QLIST_FOREACH(tmp, &vdev->intp_list, next) { +- if (tmp->state == VFIO_IRQ_ACTIVE) { +- trace_vfio_platform_intp_mmap_enable(tmp->pin); +- /* re-program the timer to check active status later */ +- timer_mod(vdev->mmap_timer, +- qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + +- vdev->mmap_timeout); +- return; +- } +- } +- vfio_mmap_set_enabled(vdev, true); +-} +- +-/** +- * vfio_intp_inject_pending_lockheld - Injects a pending IRQ +- * @opaque: opaque pointer, in practice the VFIOINTp handle +- * +- * The function is called on a previous IRQ completion, from +- * vfio_platform_eoi, while the intp_mutex is locked. +- * Also in such situation, the slow path already is set and +- * the mmap timer was already programmed. +- */ +-static void vfio_intp_inject_pending_lockheld(VFIOINTp *intp) +-{ +- trace_vfio_platform_intp_inject_pending_lockheld(intp->pin, +- event_notifier_get_fd(intp->interrupt)); +- +- intp->state = VFIO_IRQ_ACTIVE; +- +- /* trigger the virtual IRQ */ +- qemu_set_irq(intp->qemuirq, 1); +-} +- +-/** +- * vfio_intp_interrupt - The user-side eventfd handler +- * @opaque: opaque pointer which in practice is the VFIOINTp handle +- * +- * the function is entered in event handler context: +- * the vIRQ is injected into the guest if there is no other active +- * or pending IRQ. +- */ +-static void vfio_intp_interrupt(VFIOINTp *intp) +-{ +- int ret; +- VFIOINTp *tmp; +- VFIOPlatformDevice *vdev = intp->vdev; +- bool delay_handling = false; +- +- QEMU_LOCK_GUARD(&vdev->intp_mutex); +- if (intp->state == VFIO_IRQ_INACTIVE) { +- QLIST_FOREACH(tmp, &vdev->intp_list, next) { +- if (tmp->state == VFIO_IRQ_ACTIVE || +- tmp->state == VFIO_IRQ_PENDING) { +- delay_handling = true; +- break; +- } +- } +- } +- if (delay_handling) { +- /* +- * the new IRQ gets a pending status and is pushed in +- * the pending queue +- */ +- intp->state = VFIO_IRQ_PENDING; +- trace_vfio_intp_interrupt_set_pending(intp->pin); +- QSIMPLEQ_INSERT_TAIL(&vdev->pending_intp_queue, +- intp, pqnext); +- event_notifier_test_and_clear(intp->interrupt); +- return; +- } +- +- trace_vfio_platform_intp_interrupt(intp->pin, +- event_notifier_get_fd(intp->interrupt)); +- +- ret = event_notifier_test_and_clear(intp->interrupt); +- if (!ret) { +- error_report("Error when clearing fd=%d (ret = %d)", +- event_notifier_get_fd(intp->interrupt), ret); +- } +- +- intp->state = VFIO_IRQ_ACTIVE; +- +- /* sets slow path */ +- vfio_mmap_set_enabled(vdev, false); +- +- /* trigger the virtual IRQ */ +- qemu_set_irq(intp->qemuirq, 1); +- +- /* +- * Schedule the mmap timer which will restore fastpath when no IRQ +- * is active anymore +- */ +- if (vdev->mmap_timeout) { +- timer_mod(vdev->mmap_timer, +- qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + +- vdev->mmap_timeout); +- } +-} +- +-/** +- * vfio_platform_eoi - IRQ completion routine +- * @vbasedev: the VFIO device handle +- * +- * De-asserts the active virtual IRQ and unmasks the physical IRQ +- * (effective for level sensitive IRQ auto-masked by the VFIO driver). +- * Then it handles next pending IRQ if any. +- * eoi function is called on the first access to any MMIO region +- * after an IRQ was triggered, trapped since slow path was set. +- * It is assumed this access corresponds to the IRQ status +- * register reset. With such a mechanism, a single IRQ can be +- * handled at a time since there is no way to know which IRQ +- * was completed by the guest (we would need additional details +- * about the IRQ status register mask). +- */ +-static void vfio_platform_eoi(VFIODevice *vbasedev) +-{ +- VFIOINTp *intp; +- VFIOPlatformDevice *vdev = +- container_of(vbasedev, VFIOPlatformDevice, vbasedev); +- +- QEMU_LOCK_GUARD(&vdev->intp_mutex); +- QLIST_FOREACH(intp, &vdev->intp_list, next) { +- if (intp->state == VFIO_IRQ_ACTIVE) { +- trace_vfio_platform_eoi(intp->pin, +- event_notifier_get_fd(intp->interrupt)); +- intp->state = VFIO_IRQ_INACTIVE; +- +- /* deassert the virtual IRQ */ +- qemu_set_irq(intp->qemuirq, 0); +- +- if (vfio_irq_is_automasked(intp)) { +- /* unmasks the physical level-sensitive IRQ */ +- vfio_device_irq_unmask(vbasedev, intp->pin); +- } +- +- /* a single IRQ can be active at a time */ +- break; +- } +- } +- /* in case there are pending IRQs, handle the first one */ +- if (!QSIMPLEQ_EMPTY(&vdev->pending_intp_queue)) { +- intp = QSIMPLEQ_FIRST(&vdev->pending_intp_queue); +- vfio_intp_inject_pending_lockheld(intp); +- QSIMPLEQ_REMOVE_HEAD(&vdev->pending_intp_queue, pqnext); +- } +-} +- +-/** +- * vfio_start_eventfd_injection - starts the virtual IRQ injection using +- * user-side handled eventfds +- * @sbdev: the sysbus device handle +- * @irq: the qemu irq handle +- */ +- +-static void vfio_start_eventfd_injection(SysBusDevice *sbdev, qemu_irq irq) +-{ +- VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(sbdev); +- VFIOINTp *intp; +- +- QLIST_FOREACH(intp, &vdev->intp_list, next) { +- if (intp->qemuirq == irq) { +- break; +- } +- } +- assert(intp); +- +- if (vfio_set_trigger_eventfd(intp, vfio_intp_interrupt)) { +- abort(); +- } +-} +- +-/* +- * Functions used for irqfd +- */ +- +-/** +- * vfio_set_resample_eventfd - sets the resamplefd for an IRQ +- * @intp: the IRQ struct handle +- * programs the VFIO driver to unmask this IRQ when the +- * intp->unmask eventfd is triggered +- */ +-static int vfio_set_resample_eventfd(VFIOINTp *intp) +-{ +- int32_t fd = event_notifier_get_fd(intp->unmask); +- VFIODevice *vbasedev = &intp->vdev->vbasedev; +- Error *err = NULL; +- +- qemu_set_fd_handler(fd, NULL, NULL, NULL); +- if (!vfio_device_irq_set_signaling(vbasedev, intp->pin, 0, +- VFIO_IRQ_SET_ACTION_UNMASK, fd, &err)) { +- error_reportf_err(err, VFIO_MSG_PREFIX, vbasedev->name); +- return -EINVAL; +- } +- return 0; +-} +- +-/** +- * vfio_start_irqfd_injection - starts the virtual IRQ injection using +- * irqfd +- * +- * @sbdev: the sysbus device handle +- * @irq: the qemu irq handle +- * +- * In case the irqfd setup fails, we fallback to userspace handled eventfd +- */ +-static void vfio_start_irqfd_injection(SysBusDevice *sbdev, qemu_irq irq) +-{ +- VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(sbdev); +- VFIOINTp *intp; +- +- if (!kvm_irqfds_enabled() || !kvm_resamplefds_enabled() || +- !vdev->irqfd_allowed) { +- goto fail_irqfd; +- } +- +- QLIST_FOREACH(intp, &vdev->intp_list, next) { +- if (intp->qemuirq == irq) { +- break; +- } +- } +- assert(intp); +- +- if (kvm_irqchip_add_irqfd_notifier(kvm_state, intp->interrupt, +- intp->unmask, irq) < 0) { +- goto fail_irqfd; +- } +- +- if (vfio_set_trigger_eventfd(intp, NULL) < 0) { +- goto fail_vfio; +- } +- if (vfio_irq_is_automasked(intp)) { +- if (vfio_set_resample_eventfd(intp) < 0) { +- goto fail_vfio; +- } +- trace_vfio_platform_start_level_irqfd_injection(intp->pin, +- event_notifier_get_fd(intp->interrupt), +- event_notifier_get_fd(intp->unmask)); +- } else { +- trace_vfio_platform_start_edge_irqfd_injection(intp->pin, +- event_notifier_get_fd(intp->interrupt)); +- } +- +- intp->kvm_accel = true; +- +- return; +-fail_vfio: +- kvm_irqchip_remove_irqfd_notifier(kvm_state, intp->interrupt, irq); +- abort(); +-fail_irqfd: +- vfio_start_eventfd_injection(sbdev, irq); +-} +- +-/* VFIO skeleton */ +- +-static void vfio_platform_compute_needs_reset(VFIODevice *vbasedev) +-{ +- vbasedev->needs_reset = true; +-} +- +-/* not implemented yet */ +-static int vfio_platform_hot_reset_multi(VFIODevice *vbasedev) +-{ +- return -1; +-} +- +-/** +- * vfio_populate_device - Allocate and populate MMIO region +- * and IRQ structs according to driver returned information +- * @vbasedev: the VFIO device handle +- * @errp: error object +- * +- */ +-static bool vfio_populate_device(VFIODevice *vbasedev, Error **errp) +-{ +- VFIOINTp *intp, *tmp; +- int i, ret = -1; +- VFIOPlatformDevice *vdev = +- container_of(vbasedev, VFIOPlatformDevice, vbasedev); +- +- if (!(vbasedev->flags & VFIO_DEVICE_FLAGS_PLATFORM)) { +- error_setg(errp, "this isn't a platform device"); +- return false; +- } +- +- vdev->regions = g_new0(VFIORegion *, vbasedev->num_initial_regions); +- +- for (i = 0; i < vbasedev->num_initial_regions; i++) { +- char *name = g_strdup_printf("VFIO %s region %d\n", vbasedev->name, i); +- +- vdev->regions[i] = g_new0(VFIORegion, 1); +- ret = vfio_region_setup(OBJECT(vdev), vbasedev, +- vdev->regions[i], i, name); +- g_free(name); +- if (ret) { +- error_setg_errno(errp, -ret, "failed to get region %d info", i); +- goto reg_error; +- } +- } +- +- vdev->mmap_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, +- vfio_intp_mmap_enable, vdev); +- +- QSIMPLEQ_INIT(&vdev->pending_intp_queue); +- +- for (i = 0; i < vbasedev->num_irqs; i++) { +- struct vfio_irq_info irq; +- +- ret = vfio_device_get_irq_info(vbasedev, i, &irq); +- +- if (ret) { +- error_setg_errno(errp, -ret, "failed to get device irq info"); +- goto irq_err; +- } else { +- trace_vfio_platform_populate_interrupts(irq.index, +- irq.count, +- irq.flags); +- intp = vfio_init_intp(vbasedev, irq, errp); +- if (!intp) { +- goto irq_err; +- } +- } +- } +- return true; +-irq_err: +- timer_del(vdev->mmap_timer); +- QLIST_FOREACH_SAFE(intp, &vdev->intp_list, next, tmp) { +- QLIST_REMOVE(intp, next); +- g_free(intp); +- } +-reg_error: +- for (i = 0; i < vbasedev->num_initial_regions; i++) { +- if (vdev->regions[i]) { +- vfio_region_finalize(vdev->regions[i]); +- } +- g_free(vdev->regions[i]); +- } +- g_free(vdev->regions); +- return false; +-} +- +-/* specialized functions for VFIO Platform devices */ +-static VFIODeviceOps vfio_platform_ops = { +- .vfio_compute_needs_reset = vfio_platform_compute_needs_reset, +- .vfio_hot_reset_multi = vfio_platform_hot_reset_multi, +- .vfio_eoi = vfio_platform_eoi, +-}; +- +-/** +- * vfio_base_device_init - perform preliminary VFIO setup +- * @vbasedev: the VFIO device handle +- * @errp: error object +- * +- * Implement the VFIO command sequence that allows to discover +- * assigned device resources: group extraction, device +- * fd retrieval, resource query. +- * Precondition: the device name must be initialized +- */ +-static bool vfio_base_device_init(VFIODevice *vbasedev, Error **errp) +-{ +- /* @fd takes precedence over @sysfsdev which takes precedence over @host */ +- if (vbasedev->fd < 0 && vbasedev->sysfsdev) { +- vfio_device_free_name(vbasedev); +- vbasedev->name = g_path_get_basename(vbasedev->sysfsdev); +- } else if (vbasedev->fd < 0) { +- if (!vbasedev->name || strchr(vbasedev->name, '/')) { +- error_setg(errp, "wrong host device name"); +- return false; +- } +- +- vbasedev->sysfsdev = g_strdup_printf("/sys/bus/platform/devices/%s", +- vbasedev->name); +- } +- +- if (!vfio_device_get_name(vbasedev, errp)) { +- return false; +- } +- +- if (!vfio_device_attach(vbasedev->name, vbasedev, +- &address_space_memory, errp)) { +- return false; +- } +- +- if (vfio_populate_device(vbasedev, errp)) { +- return true; +- } +- +- vfio_device_detach(vbasedev); +- return false; +-} +- +-/** +- * vfio_platform_realize - the device realize function +- * @dev: device state pointer +- * @errp: error +- * +- * initialize the device, its memory regions and IRQ structures +- * IRQ are started separately +- */ +-static void vfio_platform_realize(DeviceState *dev, Error **errp) +-{ +- ERRP_GUARD(); +- VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(dev); +- SysBusDevice *sbdev = SYS_BUS_DEVICE(dev); +- VFIODevice *vbasedev = &vdev->vbasedev; +- int i; +- +- warn_report("-device vfio-platform is deprecated"); +- qemu_mutex_init(&vdev->intp_mutex); +- +- trace_vfio_platform_realize(vbasedev->sysfsdev ? +- vbasedev->sysfsdev : vbasedev->name, +- vdev->compat); +- +- if (!vfio_base_device_init(vbasedev, errp)) { +- goto init_err; +- } +- +- if (!vdev->compat) { +- GError *gerr = NULL; +- gchar *contents; +- gsize length; +- char *path; +- +- path = g_strdup_printf("%s/of_node/compatible", vbasedev->sysfsdev); +- if (!g_file_get_contents(path, &contents, &length, &gerr)) { +- error_setg(errp, "%s", gerr->message); +- g_error_free(gerr); +- g_free(path); +- return; +- } +- g_free(path); +- vdev->compat = contents; +- for (vdev->num_compat = 0; length; vdev->num_compat++) { +- size_t skip = strlen(contents) + 1; +- contents += skip; +- length -= skip; +- } +- } +- +- for (i = 0; i < vbasedev->num_initial_regions; i++) { +- if (vfio_region_mmap(vdev->regions[i])) { +- warn_report("%s mmap unsupported, performance may be slow", +- memory_region_name(vdev->regions[i]->mem)); +- } +- sysbus_init_mmio(sbdev, vdev->regions[i]->mem); +- } +- return; +- +-init_err: +- if (vdev->vbasedev.name) { +- error_prepend(errp, VFIO_MSG_PREFIX, vdev->vbasedev.name); +- } else { +- error_prepend(errp, "vfio error: "); +- } +-} +- +-static const VMStateDescription vfio_platform_vmstate = { +- .name = "vfio-platform", +- .unmigratable = 1, +-}; +- +-static const Property vfio_platform_dev_properties[] = { +- DEFINE_PROP_STRING("host", VFIOPlatformDevice, vbasedev.name), +- DEFINE_PROP_STRING("sysfsdev", VFIOPlatformDevice, vbasedev.sysfsdev), +- DEFINE_PROP_BOOL("x-no-mmap", VFIOPlatformDevice, vbasedev.no_mmap, false), +- DEFINE_PROP_UINT32("mmap-timeout-ms", VFIOPlatformDevice, +- mmap_timeout, 1100), +- DEFINE_PROP_BOOL("x-irqfd", VFIOPlatformDevice, irqfd_allowed, true), +-#ifdef CONFIG_IOMMUFD +- DEFINE_PROP_LINK("iommufd", VFIOPlatformDevice, vbasedev.iommufd, +- TYPE_IOMMUFD_BACKEND, IOMMUFDBackend *), +-#endif +-}; +- +-static void vfio_platform_instance_init(Object *obj) +-{ +- VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(obj); +- VFIODevice *vbasedev = &vdev->vbasedev; +- +- vfio_device_init(vbasedev, VFIO_DEVICE_TYPE_PLATFORM, &vfio_platform_ops, +- DEVICE(vdev), false); +-} +- +-#ifdef CONFIG_IOMMUFD +-static void vfio_platform_set_fd(Object *obj, const char *str, Error **errp) +-{ +- vfio_device_set_fd(&VFIO_PLATFORM_DEVICE(obj)->vbasedev, str, errp); +-} +-#endif +- +-static void vfio_platform_class_init(ObjectClass *klass, const void *data) +-{ +- DeviceClass *dc = DEVICE_CLASS(klass); +- SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass); +- +- dc->realize = vfio_platform_realize; +- device_class_set_props(dc, vfio_platform_dev_properties); +-#ifdef CONFIG_IOMMUFD +- object_class_property_add_str(klass, "fd", NULL, vfio_platform_set_fd); +-#endif +- dc->vmsd = &vfio_platform_vmstate; +- dc->desc = "VFIO-based platform device assignment"; +- sbc->connect_irq_notifier = vfio_start_irqfd_injection; +- set_bit(DEVICE_CATEGORY_MISC, dc->categories); +- +- object_class_property_set_description(klass, /* 2.4 */ +- "host", +- "Host device name of assigned device"); +- object_class_property_set_description(klass, /* 2.4 and 2.5 */ +- "x-no-mmap", +- "Disable MMAP for device. Allows to trace MMIO " +- "accesses (DEBUG)"); +- object_class_property_set_description(klass, /* 2.4 */ +- "mmap-timeout-ms", +- "When EOI is not provided by KVM/QEMU, wait time " +- "(milliseconds) to re-enable device direct access " +- "after level interrupt (DEBUG)"); +- object_class_property_set_description(klass, /* 2.4 */ +- "x-irqfd", +- "Allow disabling irqfd support (DEBUG)"); +- object_class_property_set_description(klass, /* 2.6 */ +- "sysfsdev", +- "Host sysfs path of assigned device"); +-#ifdef CONFIG_IOMMUFD +- object_class_property_set_description(klass, /* 9.0 */ +- "iommufd", +- "Set host IOMMUFD backend device"); +-#endif +-} +- +-static const TypeInfo vfio_platform_dev_info = { +- .name = TYPE_VFIO_PLATFORM, +- .parent = TYPE_DYNAMIC_SYS_BUS_DEVICE, +- .instance_size = sizeof(VFIOPlatformDevice), +- .instance_init = vfio_platform_instance_init, +- .class_init = vfio_platform_class_init, +- .class_size = sizeof(VFIOPlatformDeviceClass), +-}; +- +-static void register_vfio_platform_dev_type(void) +-{ +- type_register_static(&vfio_platform_dev_info); +-} +- +-type_init(register_vfio_platform_dev_type) +diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events +index fc6ed230d0..e3d571f8c8 100644 +--- a/hw/vfio/trace-events ++++ b/hw/vfio/trace-events +@@ -127,17 +127,6 @@ vfio_region_unmap(const char *name, unsigned long offset, unsigned long end) "Re + vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) "Device %s region %d: %d sparse mmap entries" + vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) "sparse entry %d [0x%lx - 0x%lx]" + +-# platform.c +-vfio_platform_realize(char *name, char *compat) "vfio device %s, compat = %s" +-vfio_platform_eoi(int pin, int fd) "EOI IRQ pin %d (fd=%d)" +-vfio_platform_intp_mmap_enable(int pin) "IRQ #%d still active, stay in slow path" +-vfio_platform_intp_interrupt(int pin, int fd) "Inject IRQ #%d (fd = %d)" +-vfio_platform_intp_inject_pending_lockheld(int pin, int fd) "Inject pending IRQ #%d (fd = %d)" +-vfio_platform_populate_interrupts(int pin, int count, int flags) "- IRQ index %d: count %d, flags=0x%x" +-vfio_intp_interrupt_set_pending(int index) "irq %d is set PENDING" +-vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) "IRQ index=%d, fd = %d, resamplefd = %d" +-vfio_platform_start_edge_irqfd_injection(int index, int fd) "IRQ index=%d, fd = %d" +- + # spapr.c + vfio_prereg_listener_region_add_skip(uint64_t start, uint64_t end) "0x%"PRIx64" - 0x%"PRIx64 + vfio_prereg_listener_region_del_skip(uint64_t start, uint64_t end) "0x%"PRIx64" - 0x%"PRIx64 +diff --git a/include/hw/vfio/vfio-device.h b/include/hw/vfio/vfio-device.h +index df81d319b2..2bc16a1a2e 100644 +--- a/include/hw/vfio/vfio-device.h ++++ b/include/hw/vfio/vfio-device.h +@@ -36,7 +36,7 @@ + + enum { + VFIO_DEVICE_TYPE_PCI = 0, +- VFIO_DEVICE_TYPE_PLATFORM = 1, ++ VFIO_DEVICE_TYPE_UNUSED = 1, + VFIO_DEVICE_TYPE_CCW = 2, + VFIO_DEVICE_TYPE_AP = 3, + }; +diff --git a/include/hw/vfio/vfio-platform.h b/include/hw/vfio/vfio-platform.h +deleted file mode 100644 +index 256d8500b7..0000000000 +--- a/include/hw/vfio/vfio-platform.h ++++ /dev/null +@@ -1,78 +0,0 @@ +-/* +- * vfio based device assignment support - platform devices +- * +- * Copyright Linaro Limited, 2014 +- * +- * Authors: +- * Kim Phillips +- * +- * This work is licensed under the terms of the GNU GPL, version 2. See +- * the COPYING file in the top-level directory. +- * +- * Based on vfio based PCI device assignment support: +- * Copyright Red Hat, Inc. 2012 +- */ +- +-#ifndef HW_VFIO_VFIO_PLATFORM_H +-#define HW_VFIO_VFIO_PLATFORM_H +- +-#include "hw/sysbus.h" +-#include "hw/vfio/vfio-device.h" +-#include "qemu/event_notifier.h" +-#include "qemu/queue.h" +-#include "qom/object.h" +- +-#define TYPE_VFIO_PLATFORM "vfio-platform" +- +-enum { +- VFIO_IRQ_INACTIVE = 0, +- VFIO_IRQ_PENDING = 1, +- VFIO_IRQ_ACTIVE = 2, +- /* VFIO_IRQ_ACTIVE_AND_PENDING cannot happen with VFIO */ +-}; +- +-typedef struct VFIOINTp { +- QLIST_ENTRY(VFIOINTp) next; /* entry for IRQ list */ +- QSIMPLEQ_ENTRY(VFIOINTp) pqnext; /* entry for pending IRQ queue */ +- EventNotifier *interrupt; /* eventfd triggered on interrupt */ +- EventNotifier *unmask; /* eventfd for unmask on QEMU bypass */ +- qemu_irq qemuirq; +- struct VFIOPlatformDevice *vdev; /* back pointer to device */ +- int state; /* inactive, pending, active */ +- uint8_t pin; /* index */ +- uint32_t flags; /* IRQ info flags */ +- bool kvm_accel; /* set when QEMU bypass through KVM enabled */ +-} VFIOINTp; +- +-/* function type for user side eventfd handler */ +-typedef void (*eventfd_user_side_handler_t)(VFIOINTp *intp); +- +-typedef struct VFIORegion VFIORegion; +- +-struct VFIOPlatformDevice { +- SysBusDevice sbdev; +- VFIODevice vbasedev; /* not a QOM object */ +- VFIORegion **regions; +- QLIST_HEAD(, VFIOINTp) intp_list; /* list of IRQs */ +- /* queue of pending IRQs */ +- QSIMPLEQ_HEAD(, VFIOINTp) pending_intp_queue; +- char *compat; /* DT compatible values, separated by NUL */ +- unsigned int num_compat; /* number of compatible values */ +- uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */ +- QEMUTimer *mmap_timer; /* allows fast-path resume after IRQ hit */ +- QemuMutex intp_mutex; /* protect the intp_list IRQ state */ +- bool irqfd_allowed; /* debug option to force irqfd on/off */ +-}; +-typedef struct VFIOPlatformDevice VFIOPlatformDevice; +- +-struct VFIOPlatformDeviceClass { +- /*< private >*/ +- SysBusDeviceClass parent_class; +- /*< public >*/ +-}; +-typedef struct VFIOPlatformDeviceClass VFIOPlatformDeviceClass; +- +-DECLARE_OBJ_CHECKERS(VFIOPlatformDevice, VFIOPlatformDeviceClass, +- VFIO_PLATFORM_DEVICE, TYPE_VFIO_PLATFORM) +- +-#endif /* HW_VFIO_VFIO_PLATFORM_H */ diff --git a/0125-vfio-Move-vfio-region.h-under-hw-vfio.patch b/0125-vfio-Move-vfio-region.h-under-hw-vfio.patch new file mode 100644 index 0000000..067fafb --- /dev/null +++ b/0125-vfio-Move-vfio-region.h-under-hw-vfio.patch @@ -0,0 +1,32 @@ +From 3e4a01133095c9e4031cf37666820cd3126faeaa Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= +Date: Mon, 1 Sep 2025 08:46:31 +0200 +Subject: [PATCH] vfio: Move vfio-region.h under hw/vfio/ +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] e997a7a982 (clegoate/qemu-kvm-centos) + +Since the removal of vfio-platform, header file vfio-region.h no +longer needs to be a public VFIO interface. Move it under hw/vfio. + +Reviewed-by: Eric Auger +Reviewed-by: Alex Williamson +Link: https://lore.kernel.org/qemu-devel/20250901064631.530723-9-clg@redhat.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit e7a47f717718441b546090fe3fa91e2705ca125b) +Signed-off-by: Eric Auger +--- + {include/hw => hw}/vfio/vfio-region.h | 0 + 1 file changed, 0 insertions(+), 0 deletions(-) + rename {include/hw => hw}/vfio/vfio-region.h (100%) + +diff --git a/include/hw/vfio/vfio-region.h b/hw/vfio/vfio-region.h +similarity index 100% +rename from include/hw/vfio/vfio-region.h +rename to hw/vfio/vfio-region.h diff --git a/0126-vfio-container-set-error-on-cpr-failure.patch b/0126-vfio-container-set-error-on-cpr-failure.patch new file mode 100644 index 0000000..9fde882 --- /dev/null +++ b/0126-vfio-container-set-error-on-cpr-failure.patch @@ -0,0 +1,43 @@ +From 5697094f81d83e0f86b830af30f842000e471f78 Mon Sep 17 00:00:00 2001 +From: Steve Sistare +Date: Wed, 13 Aug 2025 07:17:47 -0700 +Subject: [PATCH] vfio/container: set error on cpr failure +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 8c07eb516f (clegoate/qemu-kvm-centos) + +Set an error message if vfio_cpr_ram_discard_register_listener fails so +the fail label gets a valid error object. + +Reported-by: Cédric Le Goater +Fixes: eba1f657cbb1 ("vfio/container: recover from unmap-all-vaddr failure") +Signed-off-by: Steve Sistare +Reviewed-by: Zhenzhong Duan +Link: https://lore.kernel.org/qemu-devel/1755094667-281419-1-git-send-email-steven.sistare@oracle.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 36cd81dc139f899127d868ba9baaf3079c336efc) +Signed-off-by: Eric Auger +--- + hw/vfio/listener.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/hw/vfio/listener.c b/hw/vfio/listener.c +index f498e23a93..5ebafaa07e 100644 +--- a/hw/vfio/listener.c ++++ b/hw/vfio/listener.c +@@ -574,6 +574,9 @@ void vfio_container_region_add(VFIOContainerBase *bcontainer, + vfio_ram_discard_register_listener(bcontainer, section); + } else if (!vfio_cpr_ram_discard_register_listener(bcontainer, + section)) { ++ error_setg(&err, ++ "vfio_cpr_ram_discard_register_listener for %s failed", ++ memory_region_name(section->mr)); + goto fail; + } + return; diff --git a/0127-vfio-Report-an-error-when-the-dma_max_mappings-limit.patch b/0127-vfio-Report-an-error-when-the-dma_max_mappings-limit.patch new file mode 100644 index 0000000..943a771 --- /dev/null +++ b/0127-vfio-Report-an-error-when-the-dma_max_mappings-limit.patch @@ -0,0 +1,88 @@ +From 6ad1411b8f9d942bacd3f795dcd2b8f9251385a0 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= +Date: Thu, 14 Aug 2025 17:34:19 +0200 +Subject: [PATCH] vfio: Report an error when the 'dma_max_mappings' limit is + reached +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 74f7504f04 (clegoate/qemu-kvm-centos) + +The VFIO IOMMU Type1 kernel driver enforces a default IOMMU mapping +limit of 65535, which is configurable via the 'dma_max_mappings' +module parameter. When this limit is reached, QEMU issues a warning +and fails the mapping operation, but allows the VM to continue +running, potentially causing issues later. This scenario occurs with +SEV-SNP guests, which must update all IOMMU mappings during +initialization. + +To address this, update vfio_ram_discard_register_listener() to accept +an 'Error **' parameter and propagate the error to the caller. This +change will halt the VM immediately, at init time, with the same error +message. + +Additionally, the same behavior will be enforced at runtime. While +this might be considered too brutal, the rarity of this case and the +planned removal of the dma_max_mappings module parameter make it a +reasonable approach. + +Cc: Alex Williamson +Reviewed-by: Yi Liu +Reviewed-by: Alex Williamson +Link: https://lore.kernel.org/qemu-devel/20250814153419.1643897-1-clg@redhat.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit ceb59c1cc61dee57c8806571e7c723e555914547) +Signed-off-by: Eric Auger +--- + hw/vfio/listener.c | 13 +++++++++---- + 1 file changed, 9 insertions(+), 4 deletions(-) + +diff --git a/hw/vfio/listener.c b/hw/vfio/listener.c +index 5ebafaa07e..c244be5e21 100644 +--- a/hw/vfio/listener.c ++++ b/hw/vfio/listener.c +@@ -250,8 +250,9 @@ static int vfio_ram_discard_notify_populate(RamDiscardListener *rdl, + return 0; + } + +-static void vfio_ram_discard_register_listener(VFIOContainerBase *bcontainer, +- MemoryRegionSection *section) ++static bool vfio_ram_discard_register_listener(VFIOContainerBase *bcontainer, ++ MemoryRegionSection *section, ++ Error **errp) + { + RamDiscardManager *rdm = memory_region_get_ram_discard_manager(section->mr); + int target_page_size = qemu_target_page_size(); +@@ -316,13 +317,15 @@ static void vfio_ram_discard_register_listener(VFIOContainerBase *bcontainer, + + if (vrdl_mappings + max_memslots - vrdl_count > + bcontainer->dma_max_mappings) { +- warn_report("%s: possibly running out of DMA mappings. E.g., try" ++ error_setg(errp, "%s: possibly running out of DMA mappings. E.g., try" + " increasing the 'block-size' of virtio-mem devies." + " Maximum possible DMA mappings: %d, Maximum possible" + " memslots: %d", __func__, bcontainer->dma_max_mappings, + max_memslots); ++ return false; + } + } ++ return true; + } + + static void vfio_ram_discard_unregister_listener(VFIOContainerBase *bcontainer, +@@ -571,7 +574,9 @@ void vfio_container_region_add(VFIOContainerBase *bcontainer, + */ + if (memory_region_has_ram_discard_manager(section->mr)) { + if (!cpr_remap) { +- vfio_ram_discard_register_listener(bcontainer, section); ++ if (!vfio_ram_discard_register_listener(bcontainer, section, &err)) { ++ goto fail; ++ } + } else if (!vfio_cpr_ram_discard_register_listener(bcontainer, + section)) { + error_setg(&err, diff --git a/0128-hw-vfio-user-add-x-pci-class-code.patch b/0128-hw-vfio-user-add-x-pci-class-code.patch new file mode 100644 index 0000000..bba41e1 --- /dev/null +++ b/0128-hw-vfio-user-add-x-pci-class-code.patch @@ -0,0 +1,41 @@ +From 69764215fdabeab249d3c5f5fc7561b132eb0af2 Mon Sep 17 00:00:00 2001 +From: John Levon +Date: Wed, 27 Aug 2025 20:08:10 +0100 +Subject: [PATCH] hw/vfio-user: add x-pci-class-code +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 2487b9d148 (clegoate/qemu-kvm-centos) + +This new option was not added to vfio_user_pci_dev_properties, which +caused an incorrect class code for vfio-user devices. + +Fixes: a59d06305fff ("vfio/pci: Introduce x-pci-class-code option") +Signed-off-by: John Levon +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250827190810.1645340-1-john.levon@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 1b50621881241ac5bc75ae7f8aa4c278ada8a668) +Signed-off-by: Eric Auger +--- + hw/vfio-user/pci.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index be71c77729..dfaa89498d 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -406,6 +406,8 @@ static const Property vfio_user_pci_dev_properties[] = { + sub_vendor_id, PCI_ANY_ID), + DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice, + sub_device_id, PCI_ANY_ID), ++ DEFINE_PROP_UINT32("x-pci-class-code", VFIOPCIDevice, ++ class_code, PCI_ANY_ID), + DEFINE_PROP_BOOL("x-send-queued", VFIOUserPCIDevice, send_queued, false), + DEFINE_PROP_UINT32("x-msg-timeout", VFIOUserPCIDevice, wait_time, 5000), + DEFINE_PROP_BOOL("x-no-posted-writes", VFIOUserPCIDevice, no_post, false), diff --git a/0129-vfio-Introduce-helper-vfio_pci_from_vfio_device.patch b/0129-vfio-Introduce-helper-vfio_pci_from_vfio_device.patch new file mode 100644 index 0000000..a2b618d --- /dev/null +++ b/0129-vfio-Introduce-helper-vfio_pci_from_vfio_device.patch @@ -0,0 +1,149 @@ +From 638e36393965fba3ac6c14dfd40033ac6c2ddb9a Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Fri, 22 Aug 2025 02:40:42 -0400 +Subject: [PATCH] vfio: Introduce helper vfio_pci_from_vfio_device() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] b86eb538b0 (clegoate/qemu-kvm-centos) + +Introduce helper vfio_pci_from_vfio_device() to transform from VFIODevice +to VFIOPCIDevice, also to hide low level VFIO_DEVICE_TYPE_PCI type check. + +Suggested-by: Cédric Le Goater +Signed-off-by: Zhenzhong Duan +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250822064101.123526-5-zhenzhong.duan@intel.com +[ clg: Added documentation ] +Signed-off-by: Cédric Le Goater +(cherry picked from commit bb1a6f1f43374a1850c314c4d0e945667d013d07) +Signed-off-by: Eric Auger +--- + hw/vfio/container.c | 4 ++-- + hw/vfio/device.c | 2 +- + hw/vfio/iommufd.c | 4 ++-- + hw/vfio/listener.c | 4 ++-- + hw/vfio/pci.c | 9 +++++++++ + hw/vfio/pci.h | 12 ++++++++++++ + 6 files changed, 28 insertions(+), 7 deletions(-) + +diff --git a/hw/vfio/container.c b/hw/vfio/container.c +index b912b9396b..c1554c1fd1 100644 +--- a/hw/vfio/container.c ++++ b/hw/vfio/container.c +@@ -1101,7 +1101,7 @@ static int vfio_legacy_pci_hot_reset(VFIODevice *vbasedev, bool single) + /* Prep dependent devices for reset and clear our marker. */ + QLIST_FOREACH(vbasedev_iter, &group->device_list, next) { + if (!vbasedev_iter->dev->realized || +- vbasedev_iter->type != VFIO_DEVICE_TYPE_PCI) { ++ !vfio_pci_from_vfio_device(vbasedev_iter)) { + continue; + } + tmp = container_of(vbasedev_iter, VFIOPCIDevice, vbasedev); +@@ -1186,7 +1186,7 @@ out: + + QLIST_FOREACH(vbasedev_iter, &group->device_list, next) { + if (!vbasedev_iter->dev->realized || +- vbasedev_iter->type != VFIO_DEVICE_TYPE_PCI) { ++ !vfio_pci_from_vfio_device(vbasedev_iter)) { + continue; + } + tmp = container_of(vbasedev_iter, VFIOPCIDevice, vbasedev); +diff --git a/hw/vfio/device.c b/hw/vfio/device.c +index 7ebf41c95e..412678a1f6 100644 +--- a/hw/vfio/device.c ++++ b/hw/vfio/device.c +@@ -129,7 +129,7 @@ static inline const char *action_to_str(int action) + + static const char *index_to_str(VFIODevice *vbasedev, int index) + { +- if (vbasedev->type != VFIO_DEVICE_TYPE_PCI) { ++ if (!vfio_pci_from_vfio_device(vbasedev)) { + return NULL; + } + +diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c +index dbcd861b27..65b94aaa00 100644 +--- a/hw/vfio/iommufd.c ++++ b/hw/vfio/iommufd.c +@@ -738,8 +738,8 @@ iommufd_cdev_dep_get_realized_vpdev(struct vfio_pci_dependent_device *dep_dev, + } + + vbasedev_tmp = iommufd_cdev_pci_find_by_devid(dep_dev->devid); +- if (!vbasedev_tmp || !vbasedev_tmp->dev->realized || +- vbasedev_tmp->type != VFIO_DEVICE_TYPE_PCI) { ++ if (!vfio_pci_from_vfio_device(vbasedev_tmp) || ++ !vbasedev_tmp->dev->realized) { + return NULL; + } + +diff --git a/hw/vfio/listener.c b/hw/vfio/listener.c +index c244be5e21..e093833165 100644 +--- a/hw/vfio/listener.c ++++ b/hw/vfio/listener.c +@@ -453,7 +453,7 @@ static void vfio_device_error_append(VFIODevice *vbasedev, Error **errp) + * MMIO region mapping failures are not fatal but in this case PCI + * peer-to-peer transactions are broken. + */ +- if (vbasedev && vbasedev->type == VFIO_DEVICE_TYPE_PCI) { ++ if (vfio_pci_from_vfio_device(vbasedev)) { + error_append_hint(errp, "%s: PCI peer-to-peer transactions " + "on BARs are not supported.\n", vbasedev->name); + } +@@ -759,7 +759,7 @@ static bool vfio_section_is_vfio_pci(MemoryRegionSection *section, + owner = memory_region_owner(section->mr); + + QLIST_FOREACH(vbasedev, &bcontainer->device_list, container_next) { +- if (vbasedev->type != VFIO_DEVICE_TYPE_PCI) { ++ if (!vfio_pci_from_vfio_device(vbasedev)) { + continue; + } + pcidev = container_of(vbasedev, VFIOPCIDevice, vbasedev); +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 7c057ee2f9..58ab1116d8 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -2836,6 +2836,15 @@ static int vfio_pci_load_config(VFIODevice *vbasedev, QEMUFile *f) + return ret; + } + ++/* Transform from VFIODevice to VFIOPCIDevice. Return NULL if fails. */ ++VFIOPCIDevice *vfio_pci_from_vfio_device(VFIODevice *vbasedev) ++{ ++ if (vbasedev && vbasedev->type == VFIO_DEVICE_TYPE_PCI) { ++ return container_of(vbasedev, VFIOPCIDevice, vbasedev); ++ } ++ return NULL; ++} ++ + void vfio_sub_page_bar_update_mappings(VFIOPCIDevice *vdev) + { + PCIDevice *pdev = &vdev->pdev; +diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h +index 056f5e12cf..e3ab3fe1f7 100644 +--- a/hw/vfio/pci.h ++++ b/hw/vfio/pci.h +@@ -227,6 +227,18 @@ void vfio_pci_write_config(PCIDevice *pdev, + uint64_t vfio_vga_read(void *opaque, hwaddr addr, unsigned size); + void vfio_vga_write(void *opaque, hwaddr addr, uint64_t data, unsigned size); + ++/** ++ * vfio_pci_from_vfio_device: Transform from VFIODevice to ++ * VFIOPCIDevice ++ * ++ * This function checks if the given @vbasedev is a VFIO PCI device. ++ * If it is, it returns the containing VFIOPCIDevice. ++ * ++ * @vbasedev: The VFIODevice to transform ++ * ++ * Return: The VFIOPCIDevice on success, NULL on failure. ++ */ ++VFIOPCIDevice *vfio_pci_from_vfio_device(VFIODevice *vbasedev); + void vfio_sub_page_bar_update_mappings(VFIOPCIDevice *vdev); + bool vfio_opt_rom_in_denylist(VFIOPCIDevice *vdev); + bool vfio_config_quirk_setup(VFIOPCIDevice *vdev, Error **errp); diff --git a/0130-vfio-vfio-container-base.h-update-VFIOContainerBase-.patch b/0130-vfio-vfio-container-base.h-update-VFIOContainerBase-.patch new file mode 100644 index 0000000..43124dc --- /dev/null +++ b/0130-vfio-vfio-container-base.h-update-VFIOContainerBase-.patch @@ -0,0 +1,74 @@ +From cd3c2f39c1b511114e3e8b49e7582f1dd1e3fca0 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:41 +0100 +Subject: [PATCH] vfio/vfio-container-base.h: update VFIOContainerBase + declaration +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 248cce48b0 (clegoate/qemu-kvm-centos) + +Update the VFIOContainerBase declaration to match our current coding +guidelines: remove the explicit typedef (this is already handled by the +OBJECT_DECLARE_TYPE() macro), add a blank line after the parent object, +rename parent to parent_obj, and move the macro declaration next to the +VFIOContainerBase struct declaration. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-2-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 42875d256d204e69b608f2bd265f85fae32dd4bd) +Signed-off-by: Eric Auger +--- + include/hw/vfio/vfio-container-base.h | 13 +++++++------ + 1 file changed, 7 insertions(+), 6 deletions(-) + +diff --git a/include/hw/vfio/vfio-container-base.h b/include/hw/vfio/vfio-container-base.h +index bded6e993f..acbd48a18a 100644 +--- a/include/hw/vfio/vfio-container-base.h ++++ b/include/hw/vfio/vfio-container-base.h +@@ -33,8 +33,9 @@ typedef struct VFIOAddressSpace { + /* + * This is the base object for vfio container backends + */ +-typedef struct VFIOContainerBase { +- Object parent; ++struct VFIOContainerBase { ++ Object parent_obj; ++ + VFIOAddressSpace *space; + MemoryListener listener; + Error *error; +@@ -51,7 +52,10 @@ typedef struct VFIOContainerBase { + QLIST_HEAD(, VFIODevice) device_list; + GList *iova_ranges; + NotifierWithReturn cpr_reboot_notifier; +-} VFIOContainerBase; ++}; ++ ++#define TYPE_VFIO_IOMMU "vfio-iommu" ++OBJECT_DECLARE_TYPE(VFIOContainerBase, VFIOIOMMUClass, VFIO_IOMMU) + + typedef struct VFIOGuestIOMMU { + VFIOContainerBase *bcontainer; +@@ -105,14 +109,11 @@ vfio_container_get_page_size_mask(const VFIOContainerBase *bcontainer) + return bcontainer->pgsizes; + } + +-#define TYPE_VFIO_IOMMU "vfio-iommu" + #define TYPE_VFIO_IOMMU_LEGACY TYPE_VFIO_IOMMU "-legacy" + #define TYPE_VFIO_IOMMU_SPAPR TYPE_VFIO_IOMMU "-spapr" + #define TYPE_VFIO_IOMMU_IOMMUFD TYPE_VFIO_IOMMU "-iommufd" + #define TYPE_VFIO_IOMMU_USER TYPE_VFIO_IOMMU "-user" + +-OBJECT_DECLARE_TYPE(VFIOContainerBase, VFIOIOMMUClass, VFIO_IOMMU) +- + struct VFIOIOMMUClass { + ObjectClass parent_class; + diff --git a/0131-vfio-vfio-container.h-update-VFIOContainer-declarati.patch b/0131-vfio-vfio-container.h-update-VFIOContainer-declarati.patch new file mode 100644 index 0000000..1ebd2b8 --- /dev/null +++ b/0131-vfio-vfio-container.h-update-VFIOContainer-declarati.patch @@ -0,0 +1,50 @@ +From 7b876f377702f6ab17191cabce49e8024e8456e7 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:42 +0100 +Subject: [PATCH] vfio/vfio-container.h: update VFIOContainer declaration +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] fd4406eb1b (clegoate/qemu-kvm-centos) + +Update the VFIOContainer declaration so that it is closer to our coding +guidelines: emove the explicit typedef (this is already handled by the +OBJECT_DECLARE_TYPE() macro) and add a blank line after the parent object. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Reviewed-by: Philippe Mathieu-Daudé +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-3-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 98c12de5aeb1cb464a9cde13cd7a53dd6520d3aa) +Signed-off-by: Eric Auger +--- + include/hw/vfio/vfio-container.h | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/include/hw/vfio/vfio-container.h b/include/hw/vfio/vfio-container.h +index 21e5807e48..50c91788d5 100644 +--- a/include/hw/vfio/vfio-container.h ++++ b/include/hw/vfio/vfio-container.h +@@ -25,13 +25,14 @@ typedef struct VFIOGroup { + bool ram_block_discard_allowed; + } VFIOGroup; + +-typedef struct VFIOContainer { ++struct VFIOContainer { + VFIOContainerBase bcontainer; ++ + int fd; /* /dev/vfio/vfio, empowered by the attached groups */ + unsigned iommu_type; + QLIST_HEAD(, VFIOGroup) group_list; + VFIOContainerCPR cpr; +-} VFIOContainer; ++}; + + OBJECT_DECLARE_SIMPLE_TYPE(VFIOContainer, VFIO_IOMMU_LEGACY); + diff --git a/0132-hw-vfio-cpr-legacy.c-use-QOM-casts-where-appropriate.patch b/0132-hw-vfio-cpr-legacy.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..a97856f --- /dev/null +++ b/0132-hw-vfio-cpr-legacy.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,88 @@ +From d0dee1b29dbea3939e44b7e51a4581d155a8ac39 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:43 +0100 +Subject: [PATCH] hw/vfio/cpr-legacy.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] e5ed8b26af (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOContainer and VFIOContainerBase instead +of accessing bcontainer directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Reviewed-by: Steve Sistare +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-4-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 5255ba39b16539bd4b28a961d196812af1684c02) +Signed-off-by: Eric Auger +--- + hw/vfio/cpr-legacy.c | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +diff --git a/hw/vfio/cpr-legacy.c b/hw/vfio/cpr-legacy.c +index 553b203e9b..8f437194fa 100644 +--- a/hw/vfio/cpr-legacy.c ++++ b/hw/vfio/cpr-legacy.c +@@ -41,8 +41,8 @@ static int vfio_legacy_cpr_dma_map(const VFIOContainerBase *bcontainer, + hwaddr iova, ram_addr_t size, void *vaddr, + bool readonly, MemoryRegion *mr) + { +- const VFIOContainer *container = container_of(bcontainer, VFIOContainer, +- bcontainer); ++ const VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ + struct vfio_iommu_type1_dma_map map = { + .argsz = sizeof(map), + .flags = VFIO_DMA_MAP_FLAG_VADDR, +@@ -65,7 +65,7 @@ static void vfio_region_remap(MemoryListener *listener, + { + VFIOContainer *container = container_of(listener, VFIOContainer, + cpr.remap_listener); +- vfio_container_region_add(&container->bcontainer, section, true); ++ vfio_container_region_add(VFIO_IOMMU(container), section, true); + } + + static bool vfio_cpr_supported(VFIOContainer *container, Error **errp) +@@ -98,7 +98,7 @@ static int vfio_container_pre_save(void *opaque) + static int vfio_container_post_load(void *opaque, int version_id) + { + VFIOContainer *container = opaque; +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); + dma_map_fn saved_dma_map = vioc->dma_map; + Error *local_err = NULL; +@@ -135,7 +135,7 @@ static int vfio_cpr_fail_notifier(NotifierWithReturn *notifier, + { + VFIOContainer *container = + container_of(notifier, VFIOContainer, cpr.transfer_notifier); +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + + if (e->type != MIG_EVENT_PRECOPY_FAILED) { + return 0; +@@ -167,7 +167,7 @@ static int vfio_cpr_fail_notifier(NotifierWithReturn *notifier, + + bool vfio_legacy_cpr_register_container(VFIOContainer *container, Error **errp) + { +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + Error **cpr_blocker = &container->cpr.blocker; + + migration_add_notifier_mode(&bcontainer->cpr_reboot_notifier, +@@ -191,7 +191,7 @@ bool vfio_legacy_cpr_register_container(VFIOContainer *container, Error **errp) + + void vfio_legacy_cpr_unregister_container(VFIOContainer *container) + { +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + + migration_remove_notifier(&bcontainer->cpr_reboot_notifier); + migrate_del_blocker(&container->cpr.blocker); diff --git a/0133-hw-vfio-container.c-use-QOM-casts-where-appropriate.patch b/0133-hw-vfio-container.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..335e07f --- /dev/null +++ b/0133-hw-vfio-container.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,153 @@ +From 9c7e8b35c2b7509103c7d13544572262db0d8dd0 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:44 +0100 +Subject: [PATCH] hw/vfio/container.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 42bb7a375a (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOContainer and VFIOContainerBase instead +of accessing bcontainer directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-5-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 5947f69b63639b54f02db1727c559f8aae32d849) +Signed-off-by: Eric Auger +--- + hw/vfio/container.c | 31 +++++++++++++------------------ + 1 file changed, 13 insertions(+), 18 deletions(-) + +diff --git a/hw/vfio/container.c b/hw/vfio/container.c +index c1554c1fd1..860d1aebda 100644 +--- a/hw/vfio/container.c ++++ b/hw/vfio/container.c +@@ -85,7 +85,7 @@ static int vfio_dma_unmap_bitmap(const VFIOContainer *container, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb) + { +- const VFIOContainerBase *bcontainer = &container->bcontainer; ++ const VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + struct vfio_iommu_type1_dma_unmap *unmap; + struct vfio_bitmap *bitmap; + VFIOBitmap vbmap; +@@ -138,8 +138,7 @@ static int vfio_legacy_dma_unmap_one(const VFIOContainerBase *bcontainer, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb) + { +- const VFIOContainer *container = container_of(bcontainer, VFIOContainer, +- bcontainer); ++ const VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + struct vfio_iommu_type1_dma_unmap unmap = { + .argsz = sizeof(unmap), + .flags = 0, +@@ -227,8 +226,7 @@ static int vfio_legacy_dma_map(const VFIOContainerBase *bcontainer, hwaddr iova, + ram_addr_t size, void *vaddr, bool readonly, + MemoryRegion *mr) + { +- const VFIOContainer *container = container_of(bcontainer, VFIOContainer, +- bcontainer); ++ const VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + struct vfio_iommu_type1_dma_map map = { + .argsz = sizeof(map), + .flags = VFIO_DMA_MAP_FLAG_READ, +@@ -260,8 +258,7 @@ static int + vfio_legacy_set_dirty_page_tracking(const VFIOContainerBase *bcontainer, + bool start, Error **errp) + { +- const VFIOContainer *container = container_of(bcontainer, VFIOContainer, +- bcontainer); ++ const VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + int ret; + struct vfio_iommu_type1_dirty_bitmap dirty = { + .argsz = sizeof(dirty), +@@ -286,8 +283,7 @@ vfio_legacy_set_dirty_page_tracking(const VFIOContainerBase *bcontainer, + static int vfio_legacy_query_dirty_bitmap(const VFIOContainerBase *bcontainer, + VFIOBitmap *vbmap, hwaddr iova, hwaddr size, Error **errp) + { +- const VFIOContainer *container = container_of(bcontainer, VFIOContainer, +- bcontainer); ++ const VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + struct vfio_iommu_type1_dirty_bitmap *dbitmap; + struct vfio_iommu_type1_dirty_bitmap_get *range; + int ret; +@@ -509,7 +505,7 @@ static void vfio_get_iommu_info_migration(VFIOContainer *container, + { + struct vfio_info_cap_header *hdr; + struct vfio_iommu_type1_info_cap_migration *cap_mig; +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + + hdr = vfio_get_iommu_info_cap(info, VFIO_IOMMU_TYPE1_INFO_CAP_MIGRATION); + if (!hdr) { +@@ -532,8 +528,7 @@ static void vfio_get_iommu_info_migration(VFIOContainer *container, + + static bool vfio_legacy_setup(VFIOContainerBase *bcontainer, Error **errp) + { +- VFIOContainer *container = container_of(bcontainer, VFIOContainer, +- bcontainer); ++ VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + g_autofree struct vfio_iommu_type1_info *info = NULL; + int ret; + +@@ -648,7 +643,7 @@ static bool vfio_container_connect(VFIOGroup *group, AddressSpace *as, + + if (!cpr_is_incoming()) { + QLIST_FOREACH(bcontainer, &space->containers, next) { +- container = container_of(bcontainer, VFIOContainer, bcontainer); ++ container = VFIO_IOMMU_LEGACY(bcontainer); + if (!ioctl(group->fd, VFIO_GROUP_SET_CONTAINER, &container->fd)) { + return vfio_container_group_add(container, group, errp); + } +@@ -666,7 +661,7 @@ static bool vfio_container_connect(VFIOGroup *group, AddressSpace *as, + * create the container struct and group list. + */ + QLIST_FOREACH(bcontainer, &space->containers, next) { +- container = container_of(bcontainer, VFIOContainer, bcontainer); ++ container = VFIO_IOMMU_LEGACY(bcontainer); + + if (vfio_cpr_container_match(container, group, fd)) { + return vfio_container_group_add(container, group, errp); +@@ -686,7 +681,7 @@ static bool vfio_container_connect(VFIOGroup *group, AddressSpace *as, + goto fail; + } + new_container = true; +- bcontainer = &container->bcontainer; ++ bcontainer = VFIO_IOMMU(container); + + if (!vfio_legacy_cpr_register_container(container, errp)) { + goto fail; +@@ -749,7 +744,7 @@ fail: + static void vfio_container_disconnect(VFIOGroup *group) + { + VFIOContainer *container = group->container; +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); + + QLIST_REMOVE(group, container_next); +@@ -795,7 +790,7 @@ static VFIOGroup *vfio_group_get(int groupid, AddressSpace *as, Error **errp) + QLIST_FOREACH(group, &vfio_group_list, next) { + if (group->groupid == groupid) { + /* Found it. Now is it already in the right context? */ +- if (group->container->bcontainer.space->as == as) { ++ if (VFIO_IOMMU(group->container)->space->as == as) { + return group; + } else { + error_setg(errp, "group %d used in multiple address spaces", +@@ -909,7 +904,7 @@ static bool vfio_device_get(VFIOGroup *group, const char *name, + } + } + +- vfio_device_prepare(vbasedev, &group->container->bcontainer, info); ++ vfio_device_prepare(vbasedev, VFIO_IOMMU(group->container), info); + + vbasedev->fd = fd; + vbasedev->group = group; diff --git a/0134-vfio-spapr.c-use-QOM-casts-where-appropriate.patch b/0134-vfio-spapr.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..4ad2f85 --- /dev/null +++ b/0134-vfio-spapr.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,90 @@ +From 516b331afe358cf753cdecdccf823d3f421be9d5 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:46 +0100 +Subject: [PATCH] vfio/spapr.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] c0e0065187 (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOContainer and VFIOContainerBase instead +of accessing bcontainer directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Reviewed-by: Harsh Prateek Bora +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-7-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 1ea79b4b9a1477dca3ff53358fc9ebdd73d55938) +Signed-off-by: Eric Auger +--- + hw/vfio/spapr.c | 16 ++++++---------- + 1 file changed, 6 insertions(+), 10 deletions(-) + +diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c +index 564b70ef97..c41e4588d6 100644 +--- a/hw/vfio/spapr.c ++++ b/hw/vfio/spapr.c +@@ -62,7 +62,7 @@ static void vfio_prereg_listener_region_add(MemoryListener *listener, + VFIOSpaprContainer *scontainer = container_of(listener, VFIOSpaprContainer, + prereg_listener); + VFIOContainer *container = &scontainer->container; +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + const hwaddr gpa = section->offset_within_address_space; + hwaddr end; + int ret; +@@ -244,7 +244,7 @@ static bool vfio_spapr_create_window(VFIOContainer *container, + hwaddr *pgsize, Error **errp) + { + int ret = 0; +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, + container); + IOMMUMemoryRegion *iommu_mr = IOMMU_MEMORY_REGION(section->mr); +@@ -352,8 +352,7 @@ vfio_spapr_container_add_section_window(VFIOContainerBase *bcontainer, + MemoryRegionSection *section, + Error **errp) + { +- VFIOContainer *container = container_of(bcontainer, VFIOContainer, +- bcontainer); ++ VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, + container); + VFIOHostDMAWindow *hostwin; +@@ -443,8 +442,7 @@ static void + vfio_spapr_container_del_section_window(VFIOContainerBase *bcontainer, + MemoryRegionSection *section) + { +- VFIOContainer *container = container_of(bcontainer, VFIOContainer, +- bcontainer); ++ VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, + container); + +@@ -465,8 +463,7 @@ vfio_spapr_container_del_section_window(VFIOContainerBase *bcontainer, + + static void vfio_spapr_container_release(VFIOContainerBase *bcontainer) + { +- VFIOContainer *container = container_of(bcontainer, VFIOContainer, +- bcontainer); ++ VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, + container); + VFIOHostDMAWindow *hostwin, *next; +@@ -484,8 +481,7 @@ static void vfio_spapr_container_release(VFIOContainerBase *bcontainer) + static bool vfio_spapr_container_setup(VFIOContainerBase *bcontainer, + Error **errp) + { +- VFIOContainer *container = container_of(bcontainer, VFIOContainer, +- bcontainer); ++ VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, + container); + struct vfio_iommu_spapr_tce_info info; diff --git a/0135-vfio-vfio-container.h-rename-VFIOContainer-bcontaine.patch b/0135-vfio-vfio-container.h-rename-VFIOContainer-bcontaine.patch new file mode 100644 index 0000000..03a494f --- /dev/null +++ b/0135-vfio-vfio-container.h-rename-VFIOContainer-bcontaine.patch @@ -0,0 +1,42 @@ +From 6e09d6a0cabe4a0fdc632e09e68358a8808ba1bd Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:47 +0100 +Subject: [PATCH] vfio/vfio-container.h: rename VFIOContainer bcontainer field + to parent_obj +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 90f348cdfe (clegoate/qemu-kvm-centos) + +Now that nothing accesses the bcontainer field directly, rename bcontainer to +parent_obj as per our current coding guidelines. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Reviewed-by: Philippe Mathieu-Daudé +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-8-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 507a118e9f8cc328c55adc531336e075fa8ee2d7) +Signed-off-by: Eric Auger +--- + include/hw/vfio/vfio-container.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/hw/vfio/vfio-container.h b/include/hw/vfio/vfio-container.h +index 50c91788d5..240f566993 100644 +--- a/include/hw/vfio/vfio-container.h ++++ b/include/hw/vfio/vfio-container.h +@@ -26,7 +26,7 @@ typedef struct VFIOGroup { + } VFIOGroup; + + struct VFIOContainer { +- VFIOContainerBase bcontainer; ++ VFIOContainerBase parent_obj; + + int fd; /* /dev/vfio/vfio, empowered by the attached groups */ + unsigned iommu_type; diff --git a/0136-vfio-user-container.h-update-VFIOUserContainer-decla.patch b/0136-vfio-user-container.h-update-VFIOUserContainer-decla.patch new file mode 100644 index 0000000..b83f66a --- /dev/null +++ b/0136-vfio-user-container.h-update-VFIOUserContainer-decla.patch @@ -0,0 +1,48 @@ +From 6782499ad2b5a12ee289ddf2e78328bf8f964389 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:48 +0100 +Subject: [PATCH] vfio-user/container.h: update VFIOUserContainer declaration +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 8ed62e6bda (clegoate/qemu-kvm-centos) + +Update the VFIOUserContainer declaration so that it is closer to our coding +guidelines: remove the explicit typedef (this is already handled by the +OBJECT_DECLARE_TYPE() macro) and add a blank line after the parent object. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Reviewed-by: John Levon +Reviewed-by: Philippe Mathieu-Daudé +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-9-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 52a1cc3dc00f09779aeb9aa9c6fcdc0284a40d4c) +Signed-off-by: Eric Auger +--- + hw/vfio-user/container.h | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio-user/container.h b/hw/vfio-user/container.h +index 2bb1fa1343..d5d2275af7 100644 +--- a/hw/vfio-user/container.h ++++ b/hw/vfio-user/container.h +@@ -13,10 +13,11 @@ + #include "hw/vfio-user/proxy.h" + + /* MMU container sub-class for vfio-user. */ +-typedef struct VFIOUserContainer { ++struct VFIOUserContainer { + VFIOContainerBase bcontainer; ++ + VFIOUserProxy *proxy; +-} VFIOUserContainer; ++}; + + OBJECT_DECLARE_SIMPLE_TYPE(VFIOUserContainer, VFIO_IOMMU_USER); + diff --git a/0137-vfio-container.c-use-QOM-casts-where-appropriate.patch b/0137-vfio-container.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..160bea0 --- /dev/null +++ b/0137-vfio-container.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,120 @@ +From 711f145e0ecae8b0f3471c34e76b7be55d974650 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:49 +0100 +Subject: [PATCH] vfio/container.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 47d46cd190 (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOUserContainer and VFIOContainerBase instead +of accessing bcontainer directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Reviewed-by: John Levon +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-10-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 06229592fa7e6173b979158e9759f0d40a183861) +Signed-off-by: Eric Auger +--- + hw/vfio-user/container.c | 26 +++++++++++--------------- + 1 file changed, 11 insertions(+), 15 deletions(-) + +diff --git a/hw/vfio-user/container.c b/hw/vfio-user/container.c +index d589dd90f5..3cdbd44c1a 100644 +--- a/hw/vfio-user/container.c ++++ b/hw/vfio-user/container.c +@@ -24,16 +24,14 @@ + */ + static void vfio_user_listener_begin(VFIOContainerBase *bcontainer) + { +- VFIOUserContainer *container = container_of(bcontainer, VFIOUserContainer, +- bcontainer); ++ VFIOUserContainer *container = VFIO_IOMMU_USER(bcontainer); + + container->proxy->async_ops = true; + } + + static void vfio_user_listener_commit(VFIOContainerBase *bcontainer) + { +- VFIOUserContainer *container = container_of(bcontainer, VFIOUserContainer, +- bcontainer); ++ VFIOUserContainer *container = VFIO_IOMMU_USER(bcontainer); + + /* wait here for any async requests sent during the transaction */ + container->proxy->async_ops = false; +@@ -44,8 +42,8 @@ static int vfio_user_dma_unmap(const VFIOContainerBase *bcontainer, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb, bool unmap_all) + { +- VFIOUserContainer *container = container_of(bcontainer, VFIOUserContainer, +- bcontainer); ++ VFIOUserContainer *container = VFIO_IOMMU_USER(bcontainer); ++ + Error *local_err = NULL; + int ret = 0; + +@@ -86,8 +84,8 @@ static int vfio_user_dma_map(const VFIOContainerBase *bcontainer, hwaddr iova, + ram_addr_t size, void *vaddr, bool readonly, + MemoryRegion *mrp) + { +- VFIOUserContainer *container = container_of(bcontainer, VFIOUserContainer, +- bcontainer); ++ VFIOUserContainer *container = VFIO_IOMMU_USER(bcontainer); ++ + int fd = memory_region_get_fd(mrp); + Error *local_err = NULL; + int ret = 0; +@@ -173,8 +171,7 @@ static int vfio_user_query_dirty_bitmap(const VFIOContainerBase *bcontainer, + + static bool vfio_user_setup(VFIOContainerBase *bcontainer, Error **errp) + { +- VFIOUserContainer *container = container_of(bcontainer, VFIOUserContainer, +- bcontainer); ++ VFIOUserContainer *container = VFIO_IOMMU_USER(bcontainer); + + assert(container->proxy->dma_pgsizes != 0); + bcontainer->pgsizes = container->proxy->dma_pgsizes; +@@ -218,7 +215,7 @@ vfio_user_container_connect(AddressSpace *as, VFIODevice *vbasedev, + goto put_space_exit; + } + +- bcontainer = &container->bcontainer; ++ bcontainer = VFIO_IOMMU(container); + + ret = ram_block_uncoordinated_discard_disable(true); + if (ret) { +@@ -263,7 +260,7 @@ put_space_exit: + + static void vfio_user_container_disconnect(VFIOUserContainer *container) + { +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); + VFIOAddressSpace *space = bcontainer->space; + +@@ -291,7 +288,7 @@ static bool vfio_user_device_get(VFIOUserContainer *container, + + vbasedev->fd = -1; + +- vfio_device_prepare(vbasedev, &container->bcontainer, &info); ++ vfio_device_prepare(vbasedev, VFIO_IOMMU(container), &info); + + return true; + } +@@ -315,8 +312,7 @@ static bool vfio_user_device_attach(const char *name, VFIODevice *vbasedev, + + static void vfio_user_device_detach(VFIODevice *vbasedev) + { +- VFIOUserContainer *container = container_of(vbasedev->bcontainer, +- VFIOUserContainer, bcontainer); ++ VFIOUserContainer *container = VFIO_IOMMU_USER(vbasedev->bcontainer); + + vfio_device_unprepare(vbasedev); + diff --git a/0138-vfio-user-container.h-rename-VFIOUserContainer-bcont.patch b/0138-vfio-user-container.h-rename-VFIOUserContainer-bcont.patch new file mode 100644 index 0000000..2b543c5 --- /dev/null +++ b/0138-vfio-user-container.h-rename-VFIOUserContainer-bcont.patch @@ -0,0 +1,43 @@ +From 77bc1c2ad5e71cf09f766be7a0bf16083a17179b Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:50 +0100 +Subject: [PATCH] vfio-user/container.h: rename VFIOUserContainer bcontainer + field to parent_obj +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] e2c8838771 (clegoate/qemu-kvm-centos) + +Now that nothing accesses the bcontainer field directly, rename bcontainer to +parent_obj as per our current coding guidelines. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Reviewed-by: John Levon +Reviewed-by: Philippe Mathieu-Daudé +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-11-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 81b53891ca52288540e6e4f34bb924284feebc58) +Signed-off-by: Eric Auger +--- + hw/vfio-user/container.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/hw/vfio-user/container.h b/hw/vfio-user/container.h +index d5d2275af7..96aa6785d9 100644 +--- a/hw/vfio-user/container.h ++++ b/hw/vfio-user/container.h +@@ -14,7 +14,7 @@ + + /* MMU container sub-class for vfio-user. */ + struct VFIOUserContainer { +- VFIOContainerBase bcontainer; ++ VFIOContainerBase parent_obj; + + VFIOUserProxy *proxy; + }; diff --git a/0139-vfio-user-pci.c-update-VFIOUserPCIDevice-declaration.patch b/0139-vfio-user-pci.c-update-VFIOUserPCIDevice-declaration.patch new file mode 100644 index 0000000..6fcc186 --- /dev/null +++ b/0139-vfio-user-pci.c-update-VFIOUserPCIDevice-declaration.patch @@ -0,0 +1,41 @@ +From 6139f8bd7b379c32a194f90a6a5e98e5f85f58e7 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:51 +0100 +Subject: [PATCH] vfio-user/pci.c: update VFIOUserPCIDevice declaration +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] fcba93aaeb (clegoate/qemu-kvm-centos) + +Update the VFIOUserPCIDevice declaration so that it is closer to our coding +guidelines: add a blank line after the parent object. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Reviewed-by: John Levon +Reviewed-by: Philippe Mathieu-Daudé +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-12-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit b458e9e9e4c171622f19df18f5363c7ef4e8697f) +Signed-off-by: Eric Auger +--- + hw/vfio-user/pci.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index dfaa89498d..29cb592e9c 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -21,6 +21,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(VFIOUserPCIDevice, VFIO_USER_PCI) + + struct VFIOUserPCIDevice { + VFIOPCIDevice device; ++ + SocketAddress *socket; + bool send_queued; /* all sends are queued */ + uint32_t wait_time; /* timeout for message replies */ diff --git a/0140-vfio-user-pci.c-use-QOM-casts-where-appropriate.patch b/0140-vfio-user-pci.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..d3bc14b --- /dev/null +++ b/0140-vfio-user-pci.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,52 @@ +From 02dbbcecbc3032007ea15c79e0dce2c23b9faf3e Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:52 +0100 +Subject: [PATCH] vfio-user/pci.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 62515370ef (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOUserPCIDevice and VFIOPCIDevice instead +of accessing device directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: John Levon +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-13-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 5d1219e358a559680fdc34b112e2b04806f5ff62) +Signed-off-by: Eric Auger +--- + hw/vfio-user/pci.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index 29cb592e9c..7b6a6514f6 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -214,8 +214,9 @@ static void vfio_user_compute_needs_reset(VFIODevice *vbasedev) + + static Object *vfio_user_pci_get_object(VFIODevice *vbasedev) + { +- VFIOUserPCIDevice *vdev = container_of(vbasedev, VFIOUserPCIDevice, +- device.vbasedev); ++ VFIOUserPCIDevice *vdev = VFIO_USER_PCI(container_of(vbasedev, ++ VFIOPCIDevice, ++ vbasedev)); + + return OBJECT(vdev); + } +@@ -420,7 +421,7 @@ static void vfio_user_pci_set_socket(Object *obj, Visitor *v, const char *name, + VFIOUserPCIDevice *udev = VFIO_USER_PCI(obj); + bool success; + +- if (udev->device.vbasedev.proxy) { ++ if (VFIO_PCI_BASE(udev)->vbasedev.proxy) { + error_setg(errp, "Proxy is connected"); + return; + } diff --git a/0141-vfio-user-pci.c-rename-VFIOUserPCIDevice-device-fiel.patch b/0141-vfio-user-pci.c-rename-VFIOUserPCIDevice-device-fiel.patch new file mode 100644 index 0000000..e08d507 --- /dev/null +++ b/0141-vfio-user-pci.c-rename-VFIOUserPCIDevice-device-fiel.patch @@ -0,0 +1,37 @@ +From 58675704aa79e63572db4a15a384a2f7d938ab80 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:53 +0100 +Subject: [PATCH] vfio-user/pci.c: rename VFIOUserPCIDevice device field to + parent_obj +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Now that nothing accesses the device field directly, rename device to +parent_obj as per our current coding guidelines. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Reviewed-by: John Levon +Reviewed-by: Philippe Mathieu-Daudé +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-14-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 5fc421b8cd4813fa8ca9131905f12c4eedf55051) +Signed-off-by: Eric Auger +--- + hw/vfio-user/pci.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index 7b6a6514f6..c3947a8f2e 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -20,7 +20,7 @@ + OBJECT_DECLARE_SIMPLE_TYPE(VFIOUserPCIDevice, VFIO_USER_PCI) + + struct VFIOUserPCIDevice { +- VFIOPCIDevice device; ++ VFIOPCIDevice parent_obj; + + SocketAddress *socket; + bool send_queued; /* all sends are queued */ diff --git a/0142-vfio-pci.h-update-VFIOPCIDevice-declaration.patch b/0142-vfio-pci.h-update-VFIOPCIDevice-declaration.patch new file mode 100644 index 0000000..52fdf45 --- /dev/null +++ b/0142-vfio-pci.h-update-VFIOPCIDevice-declaration.patch @@ -0,0 +1,40 @@ +From b2492b575d702d5957452d49d43459191c8f81e7 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:54 +0100 +Subject: [PATCH] vfio/pci.h: update VFIOPCIDevice declaration +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 952f34181e (clegoate/qemu-kvm-centos) + +Update the VFIOPCIDevice declaration so that it is closer to our coding +guidelines: add a blank line after the parent object. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Reviewed-by: Philippe Mathieu-Daudé +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-15-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 750e424fd04311aaeeb85536744c4cd3e460404d) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h +index e3ab3fe1f7..08bab970cb 100644 +--- a/hw/vfio/pci.h ++++ b/hw/vfio/pci.h +@@ -124,6 +124,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI_BASE) + + struct VFIOPCIDevice { + PCIDevice pdev; ++ + VFIODevice vbasedev; + VFIOINTx intx; + unsigned int config_size; diff --git a/0143-vfio-pci.c-use-QOM-casts-where-appropriate.patch b/0143-vfio-pci.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..a7a8c4a --- /dev/null +++ b/0143-vfio-pci.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,822 @@ +From 9f50fa44bfa95859e4e7dd93cdbab618359767f0 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:56 +0100 +Subject: [PATCH] vfio/pci.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 0cfbae9927 (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOPCIDevice and PCIDevice instead of +accessing pdev directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-17-mark.caveayland@nutanix.com +[ clg: Updated vfio_sub_page_bar_update_mappings() ] +Signed-off-by: Cédric Le Goater +(cherry picked from commit 77f143cc418121fb30ad9e26dd90334dcf5851fc) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 204 ++++++++++++++++++++++++++++++-------------------- + 1 file changed, 121 insertions(+), 83 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 58ab1116d8..8525a8640e 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -120,6 +120,7 @@ static void vfio_intx_mmap_enable(void *opaque) + static void vfio_intx_interrupt(void *opaque) + { + VFIOPCIDevice *vdev = opaque; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + + if (!event_notifier_test_and_clear(&vdev->intx.interrupt)) { + return; +@@ -128,7 +129,7 @@ static void vfio_intx_interrupt(void *opaque) + trace_vfio_intx_interrupt(vdev->vbasedev.name, 'A' + vdev->intx.pin); + + vdev->intx.pending = true; +- pci_irq_assert(&vdev->pdev); ++ pci_irq_assert(pdev); + vfio_mmap_set_enabled(vdev, false); + if (vdev->intx.mmap_timeout) { + timer_mod(vdev->intx.mmap_timer, +@@ -139,6 +140,7 @@ static void vfio_intx_interrupt(void *opaque) + void vfio_pci_intx_eoi(VFIODevice *vbasedev) + { + VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev); ++ PCIDevice *pdev = PCI_DEVICE(vdev); + + if (!vdev->intx.pending) { + return; +@@ -147,13 +149,14 @@ void vfio_pci_intx_eoi(VFIODevice *vbasedev) + trace_vfio_pci_intx_eoi(vbasedev->name); + + vdev->intx.pending = false; +- pci_irq_deassert(&vdev->pdev); ++ pci_irq_deassert(pdev); + vfio_device_irq_unmask(vbasedev, VFIO_PCI_INTX_IRQ_INDEX); + } + + static bool vfio_intx_enable_kvm(VFIOPCIDevice *vdev, Error **errp) + { + #ifdef CONFIG_KVM ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int irq_fd = event_notifier_get_fd(&vdev->intx.interrupt); + + if (vdev->no_kvm_intx || !kvm_irqfds_enabled() || +@@ -166,7 +169,7 @@ static bool vfio_intx_enable_kvm(VFIOPCIDevice *vdev, Error **errp) + qemu_set_fd_handler(irq_fd, NULL, NULL, vdev); + vfio_device_irq_mask(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX); + vdev->intx.pending = false; +- pci_irq_deassert(&vdev->pdev); ++ pci_irq_deassert(pdev); + + /* Get an eventfd for resample/unmask */ + if (!vfio_notifier_init(vdev, &vdev->intx.unmask, "intx-unmask", 0, errp)) { +@@ -244,6 +247,8 @@ static bool vfio_cpr_intx_enable_kvm(VFIOPCIDevice *vdev, Error **errp) + static void vfio_intx_disable_kvm(VFIOPCIDevice *vdev) + { + #ifdef CONFIG_KVM ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ + if (!vdev->intx.kvm_accel) { + return; + } +@@ -254,7 +259,7 @@ static void vfio_intx_disable_kvm(VFIOPCIDevice *vdev) + */ + vfio_device_irq_mask(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX); + vdev->intx.pending = false; +- pci_irq_deassert(&vdev->pdev); ++ pci_irq_deassert(pdev); + + /* Tell KVM to stop listening for an INTx irqfd */ + if (kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, &vdev->intx.interrupt, +@@ -310,7 +315,7 @@ static void vfio_intx_routing_notifier(PCIDevice *pdev) + return; + } + +- route = pci_device_route_intx_to_irq(&vdev->pdev, vdev->intx.pin); ++ route = pci_device_route_intx_to_irq(pdev, vdev->intx.pin); + + if (pci_intx_route_changed(&vdev->intx.route, &route)) { + vfio_intx_update(vdev, &route); +@@ -327,7 +332,8 @@ static void vfio_irqchip_change(Notifier *notify, void *data) + + static bool vfio_intx_enable(VFIOPCIDevice *vdev, Error **errp) + { +- uint8_t pin = vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1); ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ uint8_t pin = vfio_pci_read_config(pdev, PCI_INTERRUPT_PIN, 1); + Error *err = NULL; + int32_t fd; + +@@ -345,7 +351,7 @@ static bool vfio_intx_enable(VFIOPCIDevice *vdev, Error **errp) + } + + vdev->intx.pin = pin - 1; /* Pin A (1) -> irq[0] */ +- pci_config_set_interrupt_pin(vdev->pdev.config, pin); ++ pci_config_set_interrupt_pin(pdev->config, pin); + + #ifdef CONFIG_KVM + /* +@@ -353,7 +359,7 @@ static bool vfio_intx_enable(VFIOPCIDevice *vdev, Error **errp) + * where we won't actually use the result anyway. + */ + if (kvm_irqfds_enabled() && kvm_resamplefds_enabled()) { +- vdev->intx.route = pci_device_route_intx_to_irq(&vdev->pdev, ++ vdev->intx.route = pci_device_route_intx_to_irq(pdev, + vdev->intx.pin); + } + #endif +@@ -393,13 +399,14 @@ skip_signaling: + + static void vfio_intx_disable(VFIOPCIDevice *vdev) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int fd; + + timer_del(vdev->intx.mmap_timer); + vfio_intx_disable_kvm(vdev); + vfio_device_irq_disable(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX); + vdev->intx.pending = false; +- pci_irq_deassert(&vdev->pdev); ++ pci_irq_deassert(pdev); + vfio_mmap_set_enabled(vdev, true); + + fd = event_notifier_get_fd(&vdev->intx.interrupt); +@@ -431,6 +438,7 @@ static void vfio_msi_interrupt(void *opaque) + { + VFIOMSIVector *vector = opaque; + VFIOPCIDevice *vdev = vector->vdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + MSIMessage (*get_msg)(PCIDevice *dev, unsigned vector); + void (*notify)(PCIDevice *dev, unsigned vector); + MSIMessage msg; +@@ -445,9 +453,9 @@ static void vfio_msi_interrupt(void *opaque) + notify = msix_notify; + + /* A masked vector firing needs to use the PBA, enable it */ +- if (msix_is_masked(&vdev->pdev, nr)) { ++ if (msix_is_masked(pdev, nr)) { + set_bit(nr, vdev->msix->pending); +- memory_region_set_enabled(&vdev->pdev.msix_pba_mmio, true); ++ memory_region_set_enabled(&pdev->msix_pba_mmio, true); + trace_vfio_msix_pba_enable(vdev->vbasedev.name); + } + } else if (vdev->interrupt == VFIO_INT_MSI) { +@@ -457,9 +465,9 @@ static void vfio_msi_interrupt(void *opaque) + abort(); + } + +- msg = get_msg(&vdev->pdev, nr); ++ msg = get_msg(pdev, nr); + trace_vfio_msi_interrupt(vdev->vbasedev.name, nr, msg.address, msg.data); +- notify(&vdev->pdev, nr); ++ notify(pdev, nr); + } + + void vfio_pci_msi_set_handler(VFIOPCIDevice *vdev, int nr, bool enable) +@@ -498,6 +506,7 @@ static int vfio_enable_msix_no_vec(VFIOPCIDevice *vdev) + + static int vfio_enable_vectors(VFIOPCIDevice *vdev, bool msix) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + struct vfio_irq_set *irq_set; + int ret = 0, i, argsz; + int32_t *fds; +@@ -540,7 +549,7 @@ static int vfio_enable_vectors(VFIOPCIDevice *vdev, bool msix) + */ + if (vdev->msi_vectors[i].use) { + if (vdev->msi_vectors[i].virq < 0 || +- (msix && msix_is_masked(&vdev->pdev, i))) { ++ (msix && msix_is_masked(pdev, i))) { + fd = event_notifier_get_fd(&vdev->msi_vectors[i].interrupt); + } else { + fd = event_notifier_get_fd(&vdev->msi_vectors[i].kvm_interrupt); +@@ -560,12 +569,14 @@ static int vfio_enable_vectors(VFIOPCIDevice *vdev, bool msix) + void vfio_pci_add_kvm_msi_virq(VFIOPCIDevice *vdev, VFIOMSIVector *vector, + int vector_n, bool msix) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ + if ((msix && vdev->no_kvm_msix) || (!msix && vdev->no_kvm_msi)) { + return; + } + + vector->virq = kvm_irqchip_add_msi_route(&vfio_route_change, +- vector_n, &vdev->pdev); ++ vector_n, pdev); + } + + static void vfio_connect_kvm_msi_virq(VFIOMSIVector *vector, int nr) +@@ -634,7 +645,7 @@ static void set_irq_signalling(VFIODevice *vbasedev, VFIOMSIVector *vector, + void vfio_pci_vector_init(VFIOPCIDevice *vdev, int nr) + { + VFIOMSIVector *vector = &vdev->msi_vectors[nr]; +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + Error *local_err = NULL; + + vector->vdev = vdev; +@@ -723,7 +734,7 @@ static int vfio_msix_vector_do_use(PCIDevice *pdev, unsigned int nr, + clear_bit(nr, vdev->msix->pending); + if (find_first_bit(vdev->msix->pending, + vdev->nr_vectors) == vdev->nr_vectors) { +- memory_region_set_enabled(&vdev->pdev.msix_pba_mmio, false); ++ memory_region_set_enabled(&pdev->msix_pba_mmio, false); + trace_vfio_msix_pba_disable(vdev->vbasedev.name); + } + +@@ -774,7 +785,9 @@ static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr) + + void vfio_pci_msix_set_notifiers(VFIOPCIDevice *vdev) + { +- msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use, ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ ++ msix_set_vector_notifiers(pdev, vfio_msix_vector_use, + vfio_msix_vector_release, NULL); + } + +@@ -801,6 +814,7 @@ void vfio_pci_commit_kvm_msi_virq_batch(VFIOPCIDevice *vdev) + + static void vfio_msix_enable(VFIOPCIDevice *vdev) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int ret; + + vfio_disable_interrupts(vdev); +@@ -817,7 +831,7 @@ static void vfio_msix_enable(VFIOPCIDevice *vdev) + */ + vfio_pci_prepare_kvm_msi_virq_batch(vdev); + +- if (msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use, ++ if (msix_set_vector_notifiers(pdev, vfio_msix_vector_use, + vfio_msix_vector_release, NULL)) { + error_report("vfio: msix_set_vector_notifiers failed"); + } +@@ -855,11 +869,12 @@ static void vfio_msix_enable(VFIOPCIDevice *vdev) + + static void vfio_msi_enable(VFIOPCIDevice *vdev) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int ret, i; + + vfio_disable_interrupts(vdev); + +- vdev->nr_vectors = msi_nr_vectors_allocated(&vdev->pdev); ++ vdev->nr_vectors = msi_nr_vectors_allocated(pdev); + retry: + /* + * Setting vector notifiers needs to enable route for each vector. +@@ -952,10 +967,11 @@ static void vfio_msi_disable_common(VFIOPCIDevice *vdev) + + static void vfio_msix_disable(VFIOPCIDevice *vdev) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + Error *err = NULL; + int i; + +- msix_unset_vector_notifiers(&vdev->pdev); ++ msix_unset_vector_notifiers(pdev); + + /* + * MSI-X will only release vectors if MSI-X is still enabled on the +@@ -963,8 +979,8 @@ static void vfio_msix_disable(VFIOPCIDevice *vdev) + */ + for (i = 0; i < vdev->nr_vectors; i++) { + if (vdev->msi_vectors[i].use) { +- vfio_msix_vector_release(&vdev->pdev, i); +- msix_vector_unuse(&vdev->pdev, i); ++ vfio_msix_vector_release(pdev, i); ++ msix_vector_unuse(pdev, i); + } + } + +@@ -1001,6 +1017,7 @@ static void vfio_msi_disable(VFIOPCIDevice *vdev) + + static void vfio_update_msi(VFIOPCIDevice *vdev) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int i; + + for (i = 0; i < vdev->nr_vectors; i++) { +@@ -1011,8 +1028,8 @@ static void vfio_update_msi(VFIOPCIDevice *vdev) + continue; + } + +- msg = msi_get_message(&vdev->pdev, i); +- vfio_update_kvm_msi_virq(vector, msg, &vdev->pdev); ++ msg = msi_get_message(pdev, i); ++ vfio_update_kvm_msi_virq(vector, msg, pdev); + } + } + +@@ -1174,13 +1191,14 @@ static const MemoryRegionOps vfio_rom_ops = { + + static void vfio_pci_size_rom(VFIOPCIDevice *vdev) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + VFIODevice *vbasedev = &vdev->vbasedev; + uint32_t orig, size = cpu_to_le32((uint32_t)PCI_ROM_ADDRESS_MASK); + char *name; + +- if (vdev->pdev.romfile || !vdev->pdev.rom_bar) { ++ if (pdev->romfile || !pdev->rom_bar) { + /* Since pci handles romfile, just print a message and return */ +- if (vfio_opt_rom_in_denylist(vdev) && vdev->pdev.romfile) { ++ if (vfio_opt_rom_in_denylist(vdev) && pdev->romfile) { + warn_report("Device at %s is known to cause system instability" + " issues during option rom execution", + vdev->vbasedev.name); +@@ -1209,7 +1227,7 @@ static void vfio_pci_size_rom(VFIOPCIDevice *vdev) + } + + if (vfio_opt_rom_in_denylist(vdev)) { +- if (vdev->pdev.rom_bar > 0) { ++ if (pdev->rom_bar > 0) { + warn_report("Device at %s is known to cause system instability" + " issues during option rom execution", + vdev->vbasedev.name); +@@ -1228,12 +1246,12 @@ static void vfio_pci_size_rom(VFIOPCIDevice *vdev) + + name = g_strdup_printf("vfio[%s].rom", vdev->vbasedev.name); + +- memory_region_init_io(&vdev->pdev.rom, OBJECT(vdev), ++ memory_region_init_io(&pdev->rom, OBJECT(vdev), + &vfio_rom_ops, vdev, name, size); + g_free(name); + +- pci_register_bar(&vdev->pdev, PCI_ROM_SLOT, +- PCI_BASE_ADDRESS_SPACE_MEMORY, &vdev->pdev.rom); ++ pci_register_bar(pdev, PCI_ROM_SLOT, ++ PCI_BASE_ADDRESS_SPACE_MEMORY, &pdev->rom); + + vdev->rom_read_failed = false; + } +@@ -1506,6 +1524,7 @@ static void vfio_disable_interrupts(VFIOPCIDevice *vdev) + + static bool vfio_msi_setup(VFIOPCIDevice *vdev, int pos, Error **errp) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + uint16_t ctrl; + bool msi_64bit, msi_maskbit; + int ret, entries; +@@ -1526,7 +1545,7 @@ static bool vfio_msi_setup(VFIOPCIDevice *vdev, int pos, Error **errp) + + trace_vfio_msi_setup(vdev->vbasedev.name, pos); + +- ret = msi_init(&vdev->pdev, pos, entries, msi_64bit, msi_maskbit, &err); ++ ret = msi_init(pdev, pos, entries, msi_64bit, msi_maskbit, &err); + if (ret < 0) { + if (ret == -ENOTSUP) { + return true; +@@ -1719,6 +1738,7 @@ static bool vfio_pci_relocate_msix(VFIOPCIDevice *vdev, Error **errp) + */ + static bool vfio_msix_early_setup(VFIOPCIDevice *vdev, Error **errp) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + uint8_t pos; + uint16_t ctrl; + uint32_t table, pba; +@@ -1726,7 +1746,7 @@ static bool vfio_msix_early_setup(VFIOPCIDevice *vdev, Error **errp) + VFIOMSIXInfo *msix; + int ret; + +- pos = pci_find_capability(&vdev->pdev, PCI_CAP_ID_MSIX); ++ pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX); + if (!pos) { + return true; + } +@@ -1818,12 +1838,13 @@ static bool vfio_msix_early_setup(VFIOPCIDevice *vdev, Error **errp) + + static bool vfio_msix_setup(VFIOPCIDevice *vdev, int pos, Error **errp) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int ret; + Error *err = NULL; + + vdev->msix->pending = g_new0(unsigned long, + BITS_TO_LONGS(vdev->msix->entries)); +- ret = msix_init(&vdev->pdev, vdev->msix->entries, ++ ret = msix_init(pdev, vdev->msix->entries, + vdev->bars[vdev->msix->table_bar].mr, + vdev->msix->table_bar, vdev->msix->table_offset, + vdev->bars[vdev->msix->pba_bar].mr, +@@ -1855,7 +1876,7 @@ static bool vfio_msix_setup(VFIOPCIDevice *vdev, int pos, Error **errp) + * vector-use notifier is called, which occurs on unmask, we test whether + * PBA emulation is needed and again disable if not. + */ +- memory_region_set_enabled(&vdev->pdev.msix_pba_mmio, false); ++ memory_region_set_enabled(&pdev->msix_pba_mmio, false); + + /* + * The emulated machine may provide a paravirt interface for MSIX setup +@@ -1867,7 +1888,7 @@ static bool vfio_msix_setup(VFIOPCIDevice *vdev, int pos, Error **errp) + */ + if (object_property_get_bool(OBJECT(qdev_get_machine()), + "vfio-no-msix-emulation", NULL)) { +- memory_region_set_enabled(&vdev->pdev.msix_table_mmio, false); ++ memory_region_set_enabled(&pdev->msix_table_mmio, false); + } + + return true; +@@ -1875,10 +1896,12 @@ static bool vfio_msix_setup(VFIOPCIDevice *vdev, int pos, Error **errp) + + void vfio_pci_teardown_msi(VFIOPCIDevice *vdev) + { +- msi_uninit(&vdev->pdev); ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ ++ msi_uninit(pdev); + + if (vdev->msix) { +- msix_uninit(&vdev->pdev, ++ msix_uninit(pdev, + vdev->bars[vdev->msix->table_bar].mr, + vdev->bars[vdev->msix->pba_bar].mr); + g_free(vdev->msix->pending); +@@ -1939,6 +1962,7 @@ static void vfio_bars_prepare(VFIOPCIDevice *vdev) + + static void vfio_bar_register(VFIOPCIDevice *vdev, int nr) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + VFIOBAR *bar = &vdev->bars[nr]; + char *name; + +@@ -1960,7 +1984,7 @@ static void vfio_bar_register(VFIOPCIDevice *vdev, int nr) + } + } + +- pci_register_bar(&vdev->pdev, nr, bar->type, bar->mr); ++ pci_register_bar(pdev, nr, bar->type, bar->mr); + } + + static void vfio_bars_register(VFIOPCIDevice *vdev) +@@ -1974,6 +1998,7 @@ static void vfio_bars_register(VFIOPCIDevice *vdev) + + void vfio_pci_bars_exit(VFIOPCIDevice *vdev) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int i; + + for (i = 0; i < PCI_ROM_SLOT; i++) { +@@ -1987,7 +2012,7 @@ void vfio_pci_bars_exit(VFIOPCIDevice *vdev) + } + + if (vdev->vga) { +- pci_unregister_vga(&vdev->pdev); ++ pci_unregister_vga(pdev); + vfio_vga_quirk_exit(vdev); + } + } +@@ -2059,8 +2084,10 @@ static void vfio_set_word_bits(uint8_t *buf, uint16_t val, uint16_t mask) + static void vfio_add_emulated_word(VFIOPCIDevice *vdev, int pos, + uint16_t val, uint16_t mask) + { +- vfio_set_word_bits(vdev->pdev.config + pos, val, mask); +- vfio_set_word_bits(vdev->pdev.wmask + pos, ~mask, mask); ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ ++ vfio_set_word_bits(pdev->config + pos, val, mask); ++ vfio_set_word_bits(pdev->wmask + pos, ~mask, mask); + vfio_set_word_bits(vdev->emulated_config_bits + pos, mask, mask); + } + +@@ -2072,8 +2099,10 @@ static void vfio_set_long_bits(uint8_t *buf, uint32_t val, uint32_t mask) + static void vfio_add_emulated_long(VFIOPCIDevice *vdev, int pos, + uint32_t val, uint32_t mask) + { +- vfio_set_long_bits(vdev->pdev.config + pos, val, mask); +- vfio_set_long_bits(vdev->pdev.wmask + pos, ~mask, mask); ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ ++ vfio_set_long_bits(pdev->config + pos, val, mask); ++ vfio_set_long_bits(pdev->wmask + pos, ~mask, mask); + vfio_set_long_bits(vdev->emulated_config_bits + pos, mask, mask); + } + +@@ -2081,7 +2110,8 @@ static void vfio_pci_enable_rp_atomics(VFIOPCIDevice *vdev) + { + struct vfio_device_info_cap_pci_atomic_comp *cap; + g_autofree struct vfio_device_info *info = NULL; +- PCIBus *bus = pci_get_bus(&vdev->pdev); ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ PCIBus *bus = pci_get_bus(pdev); + PCIDevice *parent = bus->parent_dev; + struct vfio_info_cap_header *hdr; + uint32_t mask = 0; +@@ -2097,8 +2127,8 @@ static void vfio_pci_enable_rp_atomics(VFIOPCIDevice *vdev) + if (pci_bus_is_root(bus) || !parent || !parent->exp.exp_cap || + pcie_cap_get_type(parent) != PCI_EXP_TYPE_ROOT_PORT || + pcie_cap_get_version(parent) != PCI_EXP_FLAGS_VER2 || +- vdev->pdev.devfn || +- vdev->pdev.cap_present & QEMU_PCI_CAP_MULTIFUNCTION) { ++ pdev->devfn || ++ pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) { + return; + } + +@@ -2142,8 +2172,10 @@ static void vfio_pci_enable_rp_atomics(VFIOPCIDevice *vdev) + + static void vfio_pci_disable_rp_atomics(VFIOPCIDevice *vdev) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ + if (vdev->clear_parent_atomics_on_exit) { +- PCIDevice *parent = pci_get_bus(&vdev->pdev)->parent_dev; ++ PCIDevice *parent = pci_get_bus(pdev)->parent_dev; + uint8_t *pos = parent->config + parent->exp.exp_cap + PCI_EXP_DEVCAP2; + + pci_long_test_and_clear_mask(pos, PCI_EXP_DEVCAP2_ATOMIC_COMP32 | +@@ -2155,10 +2187,11 @@ static void vfio_pci_disable_rp_atomics(VFIOPCIDevice *vdev) + static bool vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size, + Error **errp) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + uint16_t flags; + uint8_t type; + +- flags = pci_get_word(vdev->pdev.config + pos + PCI_CAP_FLAGS); ++ flags = pci_get_word(pdev->config + pos + PCI_CAP_FLAGS); + type = (flags & PCI_EXP_FLAGS_TYPE) >> 4; + + if (type != PCI_EXP_TYPE_ENDPOINT && +@@ -2170,8 +2203,8 @@ static bool vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size, + return false; + } + +- if (!pci_bus_is_express(pci_get_bus(&vdev->pdev))) { +- PCIBus *bus = pci_get_bus(&vdev->pdev); ++ if (!pci_bus_is_express(pci_get_bus(pdev))) { ++ PCIBus *bus = pci_get_bus(pdev); + PCIDevice *bridge; + + /* +@@ -2203,7 +2236,7 @@ static bool vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size, + return true; + } + +- } else if (pci_bus_is_root(pci_get_bus(&vdev->pdev))) { ++ } else if (pci_bus_is_root(pci_get_bus(pdev))) { + /* + * On a Root Complex bus Endpoints become Root Complex Integrated + * Endpoints, which changes the type and clears the LNK & LNK2 fields. +@@ -2271,20 +2304,20 @@ static bool vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size, + 1, PCI_EXP_FLAGS_VERS); + } + +- pos = pci_add_capability(&vdev->pdev, PCI_CAP_ID_EXP, pos, size, +- errp); ++ pos = pci_add_capability(pdev, PCI_CAP_ID_EXP, pos, size, errp); + if (pos < 0) { + return false; + } + +- vdev->pdev.exp.exp_cap = pos; ++ pdev->exp.exp_cap = pos; + + return true; + } + + static void vfio_check_pcie_flr(VFIOPCIDevice *vdev, uint8_t pos) + { +- uint32_t cap = pci_get_long(vdev->pdev.config + pos + PCI_EXP_DEVCAP); ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ uint32_t cap = pci_get_long(pdev->config + pos + PCI_EXP_DEVCAP); + + if (cap & PCI_EXP_DEVCAP_FLR) { + trace_vfio_check_pcie_flr(vdev->vbasedev.name); +@@ -2294,7 +2327,8 @@ static void vfio_check_pcie_flr(VFIOPCIDevice *vdev, uint8_t pos) + + static void vfio_check_pm_reset(VFIOPCIDevice *vdev, uint8_t pos) + { +- uint16_t csr = pci_get_word(vdev->pdev.config + pos + PCI_PM_CTRL); ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ uint16_t csr = pci_get_word(pdev->config + pos + PCI_PM_CTRL); + + if (!(csr & PCI_PM_CTRL_NO_SOFT_RESET)) { + trace_vfio_check_pm_reset(vdev->vbasedev.name); +@@ -2304,7 +2338,8 @@ static void vfio_check_pm_reset(VFIOPCIDevice *vdev, uint8_t pos) + + static void vfio_check_af_flr(VFIOPCIDevice *vdev, uint8_t pos) + { +- uint8_t cap = pci_get_byte(vdev->pdev.config + pos + PCI_AF_CAP); ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ uint8_t cap = pci_get_byte(pdev->config + pos + PCI_AF_CAP); + + if ((cap & PCI_AF_CAP_TP) && (cap & PCI_AF_CAP_FLR)) { + trace_vfio_check_af_flr(vdev->vbasedev.name); +@@ -2315,7 +2350,7 @@ static void vfio_check_af_flr(VFIOPCIDevice *vdev, uint8_t pos) + static bool vfio_add_vendor_specific_cap(VFIOPCIDevice *vdev, int pos, + uint8_t size, Error **errp) + { +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + + pos = pci_add_capability(pdev, PCI_CAP_ID_VNDR, pos, size, errp); + if (pos < 0) { +@@ -2337,7 +2372,7 @@ static bool vfio_add_vendor_specific_cap(VFIOPCIDevice *vdev, int pos, + static bool vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos, Error **errp) + { + ERRP_GUARD(); +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + uint8_t cap_id, next, size; + bool ret; + +@@ -2423,17 +2458,18 @@ static bool vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos, Error **errp) + + static int vfio_setup_rebar_ecap(VFIOPCIDevice *vdev, uint16_t pos) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + uint32_t ctrl; + int i, nbar; + +- ctrl = pci_get_long(vdev->pdev.config + pos + PCI_REBAR_CTRL); ++ ctrl = pci_get_long(pdev->config + pos + PCI_REBAR_CTRL); + nbar = (ctrl & PCI_REBAR_CTRL_NBAR_MASK) >> PCI_REBAR_CTRL_NBAR_SHIFT; + + for (i = 0; i < nbar; i++) { + uint32_t cap; + int size; + +- ctrl = pci_get_long(vdev->pdev.config + pos + PCI_REBAR_CTRL + (i * 8)); ++ ctrl = pci_get_long(pdev->config + pos + PCI_REBAR_CTRL + (i * 8)); + size = (ctrl & PCI_REBAR_CTRL_BAR_SIZE) >> PCI_REBAR_CTRL_BAR_SHIFT; + + /* The cap register reports sizes 1MB to 128TB, with 4 reserved bits */ +@@ -2471,7 +2507,7 @@ static int vfio_setup_rebar_ecap(VFIOPCIDevice *vdev, uint16_t pos) + + static void vfio_add_ext_cap(VFIOPCIDevice *vdev) + { +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + uint32_t header; + uint16_t cap_id, next, size; + uint8_t cap_ver; +@@ -2565,7 +2601,7 @@ static void vfio_add_ext_cap(VFIOPCIDevice *vdev) + + bool vfio_pci_add_capabilities(VFIOPCIDevice *vdev, Error **errp) + { +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + + if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST) || + !pdev->config[PCI_CAPABILITY_LIST]) { +@@ -2582,7 +2618,7 @@ bool vfio_pci_add_capabilities(VFIOPCIDevice *vdev, Error **errp) + + void vfio_pci_pre_reset(VFIOPCIDevice *vdev) + { +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + uint16_t cmd; + + vfio_disable_interrupts(vdev); +@@ -2799,7 +2835,7 @@ static int vfio_pci_save_config(VFIODevice *vbasedev, QEMUFile *f, Error **errp) + static int vfio_pci_load_config(VFIODevice *vbasedev, QEMUFile *f) + { + VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev); +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + pcibus_t old_addr[PCI_NUM_REGIONS - 1]; + int bar, ret; + +@@ -2847,7 +2883,7 @@ VFIOPCIDevice *vfio_pci_from_vfio_device(VFIODevice *vbasedev) + + void vfio_sub_page_bar_update_mappings(VFIOPCIDevice *vdev) + { +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int page_size = qemu_real_host_page_size(); + int bar; + +@@ -2931,6 +2967,7 @@ bool vfio_populate_vga(VFIOPCIDevice *vdev, Error **errp) + + bool vfio_pci_populate_device(VFIOPCIDevice *vdev, Error **errp) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + VFIODevice *vbasedev = &vdev->vbasedev; + struct vfio_region_info *reg_info = NULL; + struct vfio_irq_info irq_info; +@@ -2982,7 +3019,7 @@ bool vfio_pci_populate_device(VFIOPCIDevice *vdev, Error **errp) + + vdev->config_size = reg_info->size; + if (vdev->config_size == PCI_CONFIG_SPACE_SIZE) { +- vdev->pdev.cap_present &= ~QEMU_PCI_CAP_EXPRESS; ++ pdev->cap_present &= ~QEMU_PCI_CAP_EXPRESS; + } + vdev->config_offset = reg_info->offset; + +@@ -3186,25 +3223,26 @@ static void vfio_unregister_req_notifier(VFIOPCIDevice *vdev) + + void vfio_pci_config_register_vga(VFIOPCIDevice *vdev) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + assert(vdev->vga != NULL); + +- pci_register_vga(&vdev->pdev, &vdev->vga->region[QEMU_PCI_VGA_MEM].mem, ++ pci_register_vga(pdev, &vdev->vga->region[QEMU_PCI_VGA_MEM].mem, + &vdev->vga->region[QEMU_PCI_VGA_IO_LO].mem, + &vdev->vga->region[QEMU_PCI_VGA_IO_HI].mem); + } + + bool vfio_pci_config_setup(VFIOPCIDevice *vdev, Error **errp) + { +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + VFIODevice *vbasedev = &vdev->vbasedev; + uint32_t config_space_size; + int ret; + +- config_space_size = MIN(pci_config_size(&vdev->pdev), vdev->config_size); ++ config_space_size = MIN(pci_config_size(pdev), vdev->config_size); + + /* Get a copy of config space */ + ret = vfio_pci_config_space_read(vdev, 0, config_space_size, +- vdev->pdev.config); ++ pdev->config); + if (ret < (int)config_space_size) { + ret = ret < 0 ? -ret : EFAULT; + error_setg_errno(errp, ret, "failed to read device config space"); +@@ -3289,10 +3327,10 @@ bool vfio_pci_config_setup(VFIOPCIDevice *vdev, Error **errp) + PCI_HEADER_TYPE_MULTI_FUNCTION; + + /* Restore or clear multifunction, this is always controlled by QEMU */ +- if (vdev->pdev.cap_present & QEMU_PCI_CAP_MULTIFUNCTION) { +- vdev->pdev.config[PCI_HEADER_TYPE] |= PCI_HEADER_TYPE_MULTI_FUNCTION; ++ if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) { ++ pdev->config[PCI_HEADER_TYPE] |= PCI_HEADER_TYPE_MULTI_FUNCTION; + } else { +- vdev->pdev.config[PCI_HEADER_TYPE] &= ~PCI_HEADER_TYPE_MULTI_FUNCTION; ++ pdev->config[PCI_HEADER_TYPE] &= ~PCI_HEADER_TYPE_MULTI_FUNCTION; + } + + /* +@@ -3300,8 +3338,8 @@ bool vfio_pci_config_setup(VFIOPCIDevice *vdev, Error **errp) + * BAR, such as might be the case with the option ROM, we can get + * confusing, unwritable, residual addresses from the host here. + */ +- memset(&vdev->pdev.config[PCI_BASE_ADDRESS_0], 0, 24); +- memset(&vdev->pdev.config[PCI_ROM_ADDRESS], 0, 4); ++ memset(&pdev->config[PCI_BASE_ADDRESS_0], 0, 24); ++ memset(&pdev->config[PCI_ROM_ADDRESS], 0, 4); + + vfio_pci_size_rom(vdev); + +@@ -3322,7 +3360,7 @@ bool vfio_pci_config_setup(VFIOPCIDevice *vdev, Error **errp) + + bool vfio_pci_interrupt_setup(VFIOPCIDevice *vdev, Error **errp) + { +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + + /* QEMU emulates all of MSI & MSIX */ + if (pdev->cap_present & QEMU_PCI_CAP_MSIX) { +@@ -3335,10 +3373,10 @@ bool vfio_pci_interrupt_setup(VFIOPCIDevice *vdev, Error **errp) + vdev->msi_cap_size); + } + +- if (vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1)) { ++ if (vfio_pci_read_config(pdev, PCI_INTERRUPT_PIN, 1)) { + vdev->intx.mmap_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, + vfio_intx_mmap_enable, vdev); +- pci_device_set_intx_routing_notifier(&vdev->pdev, ++ pci_device_set_intx_routing_notifier(pdev, + vfio_intx_routing_notifier); + vdev->irqchip_change_notifier.notify = vfio_irqchip_change; + kvm_irqchip_add_change_notifier(&vdev->irqchip_change_notifier); +@@ -3350,7 +3388,7 @@ bool vfio_pci_interrupt_setup(VFIOPCIDevice *vdev, Error **errp) + */ + if (!cpr_is_incoming() && !vfio_intx_enable(vdev, errp)) { + timer_free(vdev->intx.mmap_timer); +- pci_device_set_intx_routing_notifier(&vdev->pdev, NULL); ++ pci_device_set_intx_routing_notifier(pdev, NULL); + kvm_irqchip_remove_change_notifier(&vdev->irqchip_change_notifier); + return false; + } +@@ -3516,7 +3554,7 @@ out_deregister: + if (vdev->interrupt == VFIO_INT_INTx) { + vfio_intx_disable(vdev); + } +- pci_device_set_intx_routing_notifier(&vdev->pdev, NULL); ++ pci_device_set_intx_routing_notifier(pdev, NULL); + if (vdev->irqchip_change_notifier.notify) { + kvm_irqchip_remove_change_notifier(&vdev->irqchip_change_notifier); + } +@@ -3548,7 +3586,7 @@ static void vfio_exitfn(PCIDevice *pdev) + + vfio_unregister_req_notifier(vdev); + vfio_unregister_err_notifier(vdev); +- pci_device_set_intx_routing_notifier(&vdev->pdev, NULL); ++ pci_device_set_intx_routing_notifier(pdev, NULL); + if (vdev->irqchip_change_notifier.notify) { + kvm_irqchip_remove_change_notifier(&vdev->irqchip_change_notifier); + } diff --git a/0144-vfio-pci-quirks.c-use-QOM-casts-where-appropriate.patch b/0144-vfio-pci-quirks.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..82e3abc --- /dev/null +++ b/0144-vfio-pci-quirks.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,233 @@ +From 9a61cbfdd422a2c2722eaf7c4f6143df09131c76 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:57 +0100 +Subject: [PATCH] vfio/pci-quirks.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] f9dfb0c170 (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOPCIDevice and PCIDevice instead of +accessing pdev directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-18-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 31bfd70ef02045692d04bf53461399d3b81c0ea3) +Signed-off-by: Eric Auger +--- + hw/vfio/pci-quirks.c | 48 ++++++++++++++++++++++++++------------------ + 1 file changed, 29 insertions(+), 19 deletions(-) + +diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c +index 3f002252ac..c97606dbf1 100644 +--- a/hw/vfio/pci-quirks.c ++++ b/hw/vfio/pci-quirks.c +@@ -113,6 +113,7 @@ static uint64_t vfio_generic_window_quirk_data_read(void *opaque, + { + VFIOConfigWindowQuirk *window = opaque; + VFIOPCIDevice *vdev = window->vdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + uint64_t data; + + /* Always read data reg, discard if window enabled */ +@@ -120,7 +121,7 @@ static uint64_t vfio_generic_window_quirk_data_read(void *opaque, + addr + window->data_offset, size); + + if (window->window_enabled) { +- data = vfio_pci_read_config(&vdev->pdev, window->address_val, size); ++ data = vfio_pci_read_config(pdev, window->address_val, size); + trace_vfio_quirk_generic_window_data_read(vdev->vbasedev.name, + memory_region_name(window->data_mem), data); + } +@@ -133,9 +134,10 @@ static void vfio_generic_window_quirk_data_write(void *opaque, hwaddr addr, + { + VFIOConfigWindowQuirk *window = opaque; + VFIOPCIDevice *vdev = window->vdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + + if (window->window_enabled) { +- vfio_pci_write_config(&vdev->pdev, window->address_val, data, size); ++ vfio_pci_write_config(pdev, window->address_val, data, size); + trace_vfio_quirk_generic_window_data_write(vdev->vbasedev.name, + memory_region_name(window->data_mem), data); + return; +@@ -156,6 +158,7 @@ static uint64_t vfio_generic_quirk_mirror_read(void *opaque, + { + VFIOConfigMirrorQuirk *mirror = opaque; + VFIOPCIDevice *vdev = mirror->vdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + uint64_t data; + + /* Read and discard in case the hardware cares */ +@@ -163,7 +166,7 @@ static uint64_t vfio_generic_quirk_mirror_read(void *opaque, + addr + mirror->offset, size); + + addr += mirror->config_offset; +- data = vfio_pci_read_config(&vdev->pdev, addr, size); ++ data = vfio_pci_read_config(pdev, addr, size); + trace_vfio_quirk_generic_mirror_read(vdev->vbasedev.name, + memory_region_name(mirror->mem), + addr, data); +@@ -175,9 +178,10 @@ static void vfio_generic_quirk_mirror_write(void *opaque, hwaddr addr, + { + VFIOConfigMirrorQuirk *mirror = opaque; + VFIOPCIDevice *vdev = mirror->vdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + + addr += mirror->config_offset; +- vfio_pci_write_config(&vdev->pdev, addr, data, size); ++ vfio_pci_write_config(pdev, addr, data, size); + trace_vfio_quirk_generic_mirror_write(vdev->vbasedev.name, + memory_region_name(mirror->mem), + addr, data); +@@ -211,7 +215,8 @@ static uint64_t vfio_ati_3c3_quirk_read(void *opaque, + hwaddr addr, unsigned size) + { + VFIOPCIDevice *vdev = opaque; +- uint64_t data = vfio_pci_read_config(&vdev->pdev, ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ uint64_t data = vfio_pci_read_config(pdev, + PCI_BASE_ADDRESS_4 + 1, size); + + trace_vfio_quirk_ati_3c3_read(vdev->vbasedev.name, data); +@@ -563,6 +568,7 @@ static uint64_t vfio_nvidia_3d0_quirk_read(void *opaque, + { + VFIONvidia3d0Quirk *quirk = opaque; + VFIOPCIDevice *vdev = quirk->vdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + VFIONvidia3d0State old_state = quirk->state; + uint64_t data = vfio_vga_read(&vdev->vga->region[QEMU_PCI_VGA_IO_HI], + addr + 0x10, size); +@@ -573,7 +579,7 @@ static uint64_t vfio_nvidia_3d0_quirk_read(void *opaque, + (quirk->offset & ~(PCI_CONFIG_SPACE_SIZE - 1)) == 0x1800) { + uint8_t offset = quirk->offset & (PCI_CONFIG_SPACE_SIZE - 1); + +- data = vfio_pci_read_config(&vdev->pdev, offset, size); ++ data = vfio_pci_read_config(pdev, offset, size); + trace_vfio_quirk_nvidia_3d0_read(vdev->vbasedev.name, + offset, size, data); + } +@@ -586,6 +592,7 @@ static void vfio_nvidia_3d0_quirk_write(void *opaque, hwaddr addr, + { + VFIONvidia3d0Quirk *quirk = opaque; + VFIOPCIDevice *vdev = quirk->vdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + VFIONvidia3d0State old_state = quirk->state; + + quirk->state = NONE; +@@ -599,7 +606,7 @@ static void vfio_nvidia_3d0_quirk_write(void *opaque, hwaddr addr, + if ((quirk->offset & ~(PCI_CONFIG_SPACE_SIZE - 1)) == 0x1800) { + uint8_t offset = quirk->offset & (PCI_CONFIG_SPACE_SIZE - 1); + +- vfio_pci_write_config(&vdev->pdev, offset, data, size); ++ vfio_pci_write_config(pdev, offset, data, size); + trace_vfio_quirk_nvidia_3d0_write(vdev->vbasedev.name, + offset, data, size); + return; +@@ -815,7 +822,7 @@ static void vfio_nvidia_quirk_mirror_write(void *opaque, hwaddr addr, + { + VFIOConfigMirrorQuirk *mirror = opaque; + VFIOPCIDevice *vdev = mirror->vdev; +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + LastDataSet *last = (LastDataSet *)&mirror->data; + + vfio_generic_quirk_mirror_write(opaque, addr, data, size); +@@ -1005,6 +1012,7 @@ static void vfio_rtl8168_quirk_address_write(void *opaque, hwaddr addr, + { + VFIOrtl8168Quirk *rtl = opaque; + VFIOPCIDevice *vdev = rtl->vdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + + rtl->enabled = false; + +@@ -1013,7 +1021,7 @@ static void vfio_rtl8168_quirk_address_write(void *opaque, hwaddr addr, + rtl->addr = (uint32_t)data; + + if (data & 0x80000000U) { /* Do write */ +- if (vdev->pdev.cap_present & QEMU_PCI_CAP_MSIX) { ++ if (pdev->cap_present & QEMU_PCI_CAP_MSIX) { + hwaddr offset = data & 0xfff; + uint64_t val = rtl->data; + +@@ -1021,7 +1029,7 @@ static void vfio_rtl8168_quirk_address_write(void *opaque, hwaddr addr, + (uint16_t)offset, val); + + /* Write to the proper guest MSI-X table instead */ +- memory_region_dispatch_write(&vdev->pdev.msix_table_mmio, ++ memory_region_dispatch_write(&pdev->msix_table_mmio, + offset, val, + size_memop(size) | MO_LE, + MEMTXATTRS_UNSPECIFIED); +@@ -1049,11 +1057,12 @@ static uint64_t vfio_rtl8168_quirk_data_read(void *opaque, + { + VFIOrtl8168Quirk *rtl = opaque; + VFIOPCIDevice *vdev = rtl->vdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + uint64_t data = vfio_region_read(&vdev->bars[2].region, addr + 0x70, size); + +- if (rtl->enabled && (vdev->pdev.cap_present & QEMU_PCI_CAP_MSIX)) { ++ if (rtl->enabled && (pdev->cap_present & QEMU_PCI_CAP_MSIX)) { + hwaddr offset = rtl->addr & 0xfff; +- memory_region_dispatch_read(&vdev->pdev.msix_table_mmio, offset, ++ memory_region_dispatch_read(&pdev->msix_table_mmio, offset, + &data, size_memop(size) | MO_LE, + MEMTXATTRS_UNSPECIFIED); + trace_vfio_quirk_rtl8168_msix_read(vdev->vbasedev.name, offset, data); +@@ -1297,7 +1306,7 @@ static void vfio_radeon_set_gfx_only_reset(VFIOPCIDevice *vdev) + + static int vfio_radeon_reset(VFIOPCIDevice *vdev) + { +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int i, ret = 0; + uint32_t data; + +@@ -1454,7 +1463,7 @@ static bool is_valid_std_cap_offset(uint8_t pos) + static bool vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp) + { + ERRP_GUARD(); +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int ret, pos; + bool c8_conflict = false, d4_conflict = false; + uint8_t tmp; +@@ -1547,6 +1556,7 @@ static bool vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp) + static bool vfio_add_vmd_shadow_cap(VFIOPCIDevice *vdev, Error **errp) + { + ERRP_GUARD(); ++ PCIDevice *pdev = PCI_DEVICE(vdev); + uint8_t membar_phys[16]; + int ret, pos = 0xE8; + +@@ -1565,7 +1575,7 @@ static bool vfio_add_vmd_shadow_cap(VFIOPCIDevice *vdev, Error **errp) + return false; + } + +- ret = pci_add_capability(&vdev->pdev, PCI_CAP_ID_VNDR, pos, ++ ret = pci_add_capability(pdev, PCI_CAP_ID_VNDR, pos, + VMD_SHADOW_CAP_LEN, errp); + if (ret < 0) { + error_prepend(errp, "Failed to add VMD MEMBAR Shadow cap: "); +@@ -1574,10 +1584,10 @@ static bool vfio_add_vmd_shadow_cap(VFIOPCIDevice *vdev, Error **errp) + + memset(vdev->emulated_config_bits + pos, 0xFF, VMD_SHADOW_CAP_LEN); + pos += PCI_CAP_FLAGS; +- pci_set_byte(vdev->pdev.config + pos++, VMD_SHADOW_CAP_LEN); +- pci_set_byte(vdev->pdev.config + pos++, VMD_SHADOW_CAP_VER); +- pci_set_long(vdev->pdev.config + pos, 0x53484457); /* SHDW */ +- memcpy(vdev->pdev.config + pos + 4, membar_phys, 16); ++ pci_set_byte(pdev->config + pos++, VMD_SHADOW_CAP_LEN); ++ pci_set_byte(pdev->config + pos++, VMD_SHADOW_CAP_VER); ++ pci_set_long(pdev->config + pos, 0x53484457); /* SHDW */ ++ memcpy(pdev->config + pos + 4, membar_phys, 16); + + return true; + } diff --git a/0145-vfio-cpr.c-use-QOM-casts-where-appropriate.patch b/0145-vfio-cpr.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..6b1233d --- /dev/null +++ b/0145-vfio-cpr.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,68 @@ +From dde45670c07ec80e1fe9a5ac4b63876d4b001075 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:58 +0100 +Subject: [PATCH] vfio/cpr.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 115c47ae3f (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOPCIDevice and PCIDevice instead of +accessing pdev directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Steve Sistare +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-19-mark.caveayland@nutanix.com +[ clg: Updated vfio_cpr_set_msi_virq() ] +Signed-off-by: Cédric Le Goater +(cherry picked from commit 54a3eb315023f59db0426d85604f4527bf7b1aaa) +Signed-off-by: Eric Auger +--- + hw/vfio/cpr.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/hw/vfio/cpr.c b/hw/vfio/cpr.c +index a831243e02..f911988add 100644 +--- a/hw/vfio/cpr.c ++++ b/hw/vfio/cpr.c +@@ -56,7 +56,7 @@ static void vfio_cpr_claim_vectors(VFIOPCIDevice *vdev, int nr_vectors, + { + int i, fd; + bool pending = false; +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + + vdev->nr_vectors = nr_vectors; + vdev->msi_vectors = g_new0(VFIOMSIVector, nr_vectors); +@@ -99,7 +99,7 @@ static void vfio_cpr_claim_vectors(VFIOPCIDevice *vdev, int nr_vectors, + static int vfio_cpr_pci_pre_load(void *opaque) + { + VFIOPCIDevice *vdev = opaque; +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int size = MIN(pci_config_size(pdev), vdev->config_size); + int i; + +@@ -113,7 +113,7 @@ static int vfio_cpr_pci_pre_load(void *opaque) + static int vfio_cpr_pci_post_load(void *opaque, int version_id) + { + VFIOPCIDevice *vdev = opaque; +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int nr_vectors; + + vfio_sub_page_bar_update_mappings(vdev); +@@ -214,7 +214,7 @@ static int set_irqfd_notifier_gsi(KVMState *s, EventNotifier *n, + static int vfio_cpr_set_msi_virq(VFIOPCIDevice *vdev, Error **errp, bool enable) + { + const char *op = (enable ? "enable" : "disable"); +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int i, nr_vectors, ret = 0; + + if (msix_enabled(pdev)) { diff --git a/0146-vfio-igd.c-use-QOM-casts-where-appropriate.patch b/0146-vfio-igd.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..4dd1987 --- /dev/null +++ b/0146-vfio-igd.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,170 @@ +From e93712fe7a4756a48d59e460dba36527a62e6d7a Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:25:59 +0100 +Subject: [PATCH] vfio/igd.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 33e5abcc72 (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOPCIDevice and PCIDevice instead of +accessing pdev directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Tomita Moeko +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-20-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 8d3776dd6d8740fb7c91c7c1c25b60fc7edfd19c) +Signed-off-by: Eric Auger +--- + hw/vfio/igd.c | 38 +++++++++++++++++++++----------------- + 1 file changed, 21 insertions(+), 17 deletions(-) + +diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c +index f116c40ccd..4bfa2e0fcd 100644 +--- a/hw/vfio/igd.c ++++ b/hw/vfio/igd.c +@@ -200,7 +200,7 @@ static bool vfio_pci_igd_opregion_detect(VFIOPCIDevice *vdev, + } + + /* Hotplugging is not supported for opregion access */ +- if (vdev->pdev.qdev.hotplugged) { ++ if (DEVICE(vdev)->hotplugged) { + warn_report("IGD device detected, but OpRegion is not supported " + "on hotplugged device."); + return false; +@@ -260,11 +260,12 @@ static int vfio_pci_igd_copy(VFIOPCIDevice *vdev, PCIDevice *pdev, + static int vfio_pci_igd_host_init(VFIOPCIDevice *vdev, + struct vfio_region_info *info) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + PCIBus *bus; + PCIDevice *host_bridge; + int ret; + +- bus = pci_device_root_bus(&vdev->pdev); ++ bus = pci_device_root_bus(pdev); + host_bridge = pci_find_device(bus, 0, PCI_DEVFN(0, 0)); + + if (!host_bridge) { +@@ -327,13 +328,14 @@ type_init(vfio_pci_igd_register_types) + static int vfio_pci_igd_lpc_init(VFIOPCIDevice *vdev, + struct vfio_region_info *info) + { ++ PCIDevice *pdev = PCI_DEVICE(vdev); + PCIDevice *lpc_bridge; + int ret; + +- lpc_bridge = pci_find_device(pci_device_root_bus(&vdev->pdev), ++ lpc_bridge = pci_find_device(pci_device_root_bus(pdev), + 0, PCI_DEVFN(0x1f, 0)); + if (!lpc_bridge) { +- lpc_bridge = pci_create_simple(pci_device_root_bus(&vdev->pdev), ++ lpc_bridge = pci_create_simple(pci_device_root_bus(pdev), + PCI_DEVFN(0x1f, 0), "vfio-pci-igd-lpc-bridge"); + } + +@@ -350,13 +352,14 @@ static bool vfio_pci_igd_setup_lpc_bridge(VFIOPCIDevice *vdev, Error **errp) + { + struct vfio_region_info *host = NULL; + struct vfio_region_info *lpc = NULL; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + PCIDevice *lpc_bridge; + int ret; + + /* + * Copying IDs or creating new devices are not supported on hotplug + */ +- if (vdev->pdev.qdev.hotplugged) { ++ if (DEVICE(vdev)->hotplugged) { + error_setg(errp, "IGD LPC is not supported on hotplugged device"); + return false; + } +@@ -366,7 +369,7 @@ static bool vfio_pci_igd_setup_lpc_bridge(VFIOPCIDevice *vdev, Error **errp) + * can stuff host values into, so if there's already one there and it's not + * one we can hack on, this quirk is no-go. Sorry Q35. + */ +- lpc_bridge = pci_find_device(pci_device_root_bus(&vdev->pdev), ++ lpc_bridge = pci_find_device(pci_device_root_bus(pdev), + 0, PCI_DEVFN(0x1f, 0)); + if (lpc_bridge && !object_dynamic_cast(OBJECT(lpc_bridge), + "vfio-pci-igd-lpc-bridge")) { +@@ -510,6 +513,7 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) + static bool vfio_pci_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp) + { + struct vfio_region_info *opregion = NULL; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + int ret, gen; + uint64_t gms_size = 0; + uint64_t *bdsm_size; +@@ -529,7 +533,7 @@ static bool vfio_pci_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp) + info_report("OpRegion detected on Intel display %x.", vdev->device_id); + + gen = igd_gen(vdev); +- gmch = vfio_pci_read_config(&vdev->pdev, IGD_GMCH, 4); ++ gmch = vfio_pci_read_config(pdev, IGD_GMCH, 4); + + /* + * For backward compatibility, enable legacy mode when +@@ -544,7 +548,7 @@ static bool vfio_pci_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp) + (gen >= 6 && gen <= 9) && + !(gmch & IGD_GMCH_VGA_DISABLE) && + !strcmp(MACHINE_GET_CLASS(qdev_get_machine())->family, "pc_piix") && +- (&vdev->pdev == pci_find_device(pci_device_root_bus(&vdev->pdev), ++ (pdev == pci_find_device(pci_device_root_bus(pdev), + 0, PCI_DEVFN(0x2, 0)))) { + /* + * IGD legacy mode requires: +@@ -566,7 +570,7 @@ static bool vfio_pci_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp) + */ + ret = vfio_device_get_region_info(&vdev->vbasedev, + VFIO_PCI_ROM_REGION_INDEX, &rom); +- if ((ret || !rom->size) && !vdev->pdev.romfile) { ++ if ((ret || !rom->size) && !pdev->romfile) { + error_setg(&err, "Device has no ROM"); + goto error; + } +@@ -611,8 +615,8 @@ static bool vfio_pci_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp) + * ASLS (OpRegion address) is read-only, emulated + * It contains HPA, guest firmware need to reprogram it with GPA. + */ +- pci_set_long(vdev->pdev.config + IGD_ASLS, 0); +- pci_set_long(vdev->pdev.wmask + IGD_ASLS, ~0); ++ pci_set_long(pdev->config + IGD_ASLS, 0); ++ pci_set_long(pdev->wmask + IGD_ASLS, ~0); + pci_set_long(vdev->emulated_config_bits + IGD_ASLS, ~0); + + /* +@@ -626,8 +630,8 @@ static bool vfio_pci_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp) + } + + /* GMCH is read-only, emulated */ +- pci_set_long(vdev->pdev.config + IGD_GMCH, gmch); +- pci_set_long(vdev->pdev.wmask + IGD_GMCH, 0); ++ pci_set_long(pdev->config + IGD_GMCH, gmch); ++ pci_set_long(pdev->wmask + IGD_GMCH, 0); + pci_set_long(vdev->emulated_config_bits + IGD_GMCH, ~0); + } + +@@ -636,12 +640,12 @@ static bool vfio_pci_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp) + + /* BDSM is read-write, emulated. BIOS needs to be able to write it */ + if (gen < 11) { +- pci_set_long(vdev->pdev.config + IGD_BDSM, 0); +- pci_set_long(vdev->pdev.wmask + IGD_BDSM, ~0); ++ pci_set_long(pdev->config + IGD_BDSM, 0); ++ pci_set_long(pdev->wmask + IGD_BDSM, ~0); + pci_set_long(vdev->emulated_config_bits + IGD_BDSM, ~0); + } else { +- pci_set_quad(vdev->pdev.config + IGD_BDSM_GEN11, 0); +- pci_set_quad(vdev->pdev.wmask + IGD_BDSM_GEN11, ~0); ++ pci_set_quad(pdev->config + IGD_BDSM_GEN11, 0); ++ pci_set_quad(pdev->wmask + IGD_BDSM_GEN11, ~0); + pci_set_quad(vdev->emulated_config_bits + IGD_BDSM_GEN11, ~0); + } + } diff --git a/0147-vfio-user-pci.c-use-QOM-casts-where-appropriate.patch b/0147-vfio-user-pci.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..0e143f8 --- /dev/null +++ b/0147-vfio-user-pci.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,58 @@ +From d0d07f16249b9e9fc0583879da32579015480734 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:26:00 +0100 +Subject: [PATCH] vfio-user/pci.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] ce85e7bc4e (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOPCIDevice and PCIDevice instead of +accessing pdev directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: John Levon +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-21-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit a49ef7a467c3ced0be048b02189092031e325d01) +Signed-off-by: Eric Auger +--- + hw/vfio-user/pci.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index c3947a8f2e..e2c309784f 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -65,7 +65,7 @@ static void vfio_user_msix_setup(VFIOPCIDevice *vdev) + vdev->msix->pba_region = pba_reg; + + vfio_reg = vdev->bars[vdev->msix->pba_bar].mr; +- msix_reg = &vdev->pdev.msix_pba_mmio; ++ msix_reg = &PCI_DEVICE(vdev)->msix_pba_mmio; + memory_region_init_io(pba_reg, OBJECT(vdev), &vfio_user_pba_ops, vdev, + "VFIO MSIX PBA", int128_get64(msix_reg->size)); + memory_region_add_subregion_overlap(vfio_reg, vdev->msix->pba_offset, +@@ -86,7 +86,7 @@ static void vfio_user_msix_teardown(VFIOPCIDevice *vdev) + + static void vfio_user_dma_read(VFIOPCIDevice *vdev, VFIOUserDMARW *msg) + { +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + VFIOUserProxy *proxy = vdev->vbasedev.proxy; + VFIOUserDMARW *res; + MemTxResult r; +@@ -134,7 +134,7 @@ static void vfio_user_dma_read(VFIOPCIDevice *vdev, VFIOUserDMARW *msg) + + static void vfio_user_dma_write(VFIOPCIDevice *vdev, VFIOUserDMARW *msg) + { +- PCIDevice *pdev = &vdev->pdev; ++ PCIDevice *pdev = PCI_DEVICE(vdev); + VFIOUserProxy *proxy = vdev->vbasedev.proxy; + MemTxResult r; + diff --git a/0148-vfio-pci.h-rename-VFIOPCIDevice-pdev-field-to-parent.patch b/0148-vfio-pci.h-rename-VFIOPCIDevice-pdev-field-to-parent.patch new file mode 100644 index 0000000..38d67ab --- /dev/null +++ b/0148-vfio-pci.h-rename-VFIOPCIDevice-pdev-field-to-parent.patch @@ -0,0 +1,74 @@ +From 13d4a874e211f4498302f9bb74a7c0e5e97d28cc Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:26:02 +0100 +Subject: [PATCH] vfio/pci.h: rename VFIOPCIDevice pdev field to parent_obj +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 807eeb46bf (clegoate/qemu-kvm-centos) + +Now that nothing accesses the pdev field directly, rename pdev to +parent_obj as per our current coding guidelines. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Reviewed-by: Steve Sistare +Reviewed-by: Philippe Mathieu-Daudé +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-23-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit bb986792a968ee51cda72cd4cc05822198495375) +Signed-off-by: Eric Auger +--- + hw/vfio/cpr.c | 4 ++-- + hw/vfio/pci.c | 4 ++-- + hw/vfio/pci.h | 2 +- + 3 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/hw/vfio/cpr.c b/hw/vfio/cpr.c +index f911988add..2c71fc1e8e 100644 +--- a/hw/vfio/cpr.c ++++ b/hw/vfio/cpr.c +@@ -173,8 +173,8 @@ const VMStateDescription vfio_cpr_pci_vmstate = { + .post_load = vfio_cpr_pci_post_load, + .needed = cpr_incoming_needed, + .fields = (VMStateField[]) { +- VMSTATE_PCI_DEVICE(pdev, VFIOPCIDevice), +- VMSTATE_MSIX_TEST(pdev, VFIOPCIDevice, pci_msix_present), ++ VMSTATE_PCI_DEVICE(parent_obj, VFIOPCIDevice), ++ VMSTATE_MSIX_TEST(parent_obj, VFIOPCIDevice, pci_msix_present), + VMSTATE_VFIO_INTX(intx, VFIOPCIDevice), + VMSTATE_END_OF_LIST() + } +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 8525a8640e..d9cdd90ea5 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -2814,8 +2814,8 @@ static const VMStateDescription vmstate_vfio_pci_config = { + .version_id = 1, + .minimum_version_id = 1, + .fields = (const VMStateField[]) { +- VMSTATE_PCI_DEVICE(pdev, VFIOPCIDevice), +- VMSTATE_MSIX_TEST(pdev, VFIOPCIDevice, vfio_msix_present), ++ VMSTATE_PCI_DEVICE(parent_obj, VFIOPCIDevice), ++ VMSTATE_MSIX_TEST(parent_obj, VFIOPCIDevice, vfio_msix_present), + VMSTATE_END_OF_LIST() + }, + .subsections = (const VMStateDescription * const []) { +diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h +index 08bab970cb..dd419f9147 100644 +--- a/hw/vfio/pci.h ++++ b/hw/vfio/pci.h +@@ -123,7 +123,7 @@ typedef struct VFIOMSIXInfo { + OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI_BASE) + + struct VFIOPCIDevice { +- PCIDevice pdev; ++ PCIDevice parent_obj; + + VFIODevice vbasedev; + VFIOINTx intx; diff --git a/0149-treewide-handle-result-of-qio_channel_set_blocking.patch b/0149-treewide-handle-result-of-qio_channel_set_blocking.patch new file mode 100644 index 0000000..824157c --- /dev/null +++ b/0149-treewide-handle-result-of-qio_channel_set_blocking.patch @@ -0,0 +1,397 @@ +From 890dbe7bb6d6076f3b8f4146f4936729412df8e8 Mon Sep 17 00:00:00 2001 +From: Vladimir Sementsov-Ogievskiy +Date: Tue, 16 Sep 2025 16:13:53 +0300 +Subject: [PATCH] treewide: handle result of qio_channel_set_blocking() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] bc7ebda7bd (clegoate/qemu-kvm-centos) + +Currently, we just always pass NULL as errp argument. That doesn't +look good. + +Some realizations of interface may actually report errors. +Channel-socket realization actually either ignore or crash on +errors, but we are going to straighten it out to always reporting +an errp in further commits. + +So, convert all callers to either handle the error (where environment +allows) or explicitly use &error_abort. + +Take also a chance to change the return value to more convenient +bool (keeping also in mind, that underlying realizations may +return -1 on failure, not -errno). + +Suggested-by: Daniel P. Berrangé +Reviewed-by: Daniel P. Berrangé +Signed-off-by: Vladimir Sementsov-Ogievskiy +[DB: fix return type mismatch in TLS/websocket channel + impls for qio_channel_set_blocking] +Signed-off-by: Daniel P. Berrangé +(cherry picked from commit 1ed8903916394fca2347c700da974ca3856274b2) +Signed-off-by: Eric Auger +--- + block/nbd.c | 4 +++- + chardev/char-socket.c | 20 ++++++++++++++++---- + hw/remote/proxy.c | 6 +++++- + hw/remote/remote-obj.c | 6 +++++- + hw/vfio-user/proxy.c | 11 ++++++++--- + include/io/channel.h | 6 +++--- + io/channel-tls.c | 2 +- + io/channel-websock.c | 3 +-- + io/channel.c | 4 ++-- + nbd/server.c | 4 +++- + scsi/qemu-pr-helper.c | 9 ++++++--- + tests/unit/io-channel-helpers.c | 5 +++-- + tests/unit/test-io-channel-tls.c | 4 ++-- + tools/i386/qemu-vmsr-helper.c | 6 ++++-- + ui/vnc.c | 2 +- + util/vhost-user-server.c | 7 ++++++- + 16 files changed, 69 insertions(+), 30 deletions(-) + +diff --git a/block/nbd.c b/block/nbd.c +index d5a2b21c6d..5d231d5c4e 100644 +--- a/block/nbd.c ++++ b/block/nbd.c +@@ -351,7 +351,9 @@ int coroutine_fn nbd_co_do_establish_connection(BlockDriverState *bs, + return ret; + } + +- qio_channel_set_blocking(s->ioc, false, NULL); ++ if (!qio_channel_set_blocking(s->ioc, false, errp)) { ++ return -EINVAL; ++ } + qio_channel_set_follow_coroutine_ctx(s->ioc, true); + + /* successfully connected */ +diff --git a/chardev/char-socket.c b/chardev/char-socket.c +index 1e8313915b..f155269890 100644 +--- a/chardev/char-socket.c ++++ b/chardev/char-socket.c +@@ -539,16 +539,24 @@ static int tcp_chr_sync_read(Chardev *chr, const uint8_t *buf, int len) + SocketChardev *s = SOCKET_CHARDEV(chr); + int size; + int saved_errno; ++ Error *local_err = NULL; + + if (s->state != TCP_CHARDEV_STATE_CONNECTED) { + return 0; + } + +- qio_channel_set_blocking(s->ioc, true, NULL); ++ if (!qio_channel_set_blocking(s->ioc, true, &local_err)) { ++ error_report_err(local_err); ++ return -1; ++ } + size = tcp_chr_recv(chr, (void *) buf, len); + saved_errno = errno; + if (s->state != TCP_CHARDEV_STATE_DISCONNECTED) { +- qio_channel_set_blocking(s->ioc, false, NULL); ++ if (!qio_channel_set_blocking(s->ioc, false, &local_err)) { ++ error_report_err(local_err); ++ /* failed to recover non-blocking state */ ++ tcp_chr_disconnect(chr); ++ } + } + if (size == 0) { + /* connection closed */ +@@ -893,18 +901,22 @@ static void tcp_chr_set_client_ioc_name(Chardev *chr, + static int tcp_chr_new_client(Chardev *chr, QIOChannelSocket *sioc) + { + SocketChardev *s = SOCKET_CHARDEV(chr); ++ Error *local_err = NULL; + + if (s->state != TCP_CHARDEV_STATE_CONNECTING) { + return -1; + } + ++ if (!qio_channel_set_blocking(QIO_CHANNEL(sioc), false, &local_err)) { ++ error_report_err(local_err); ++ return -1; ++ } ++ + s->ioc = QIO_CHANNEL(sioc); + object_ref(OBJECT(sioc)); + s->sioc = sioc; + object_ref(OBJECT(sioc)); + +- qio_channel_set_blocking(s->ioc, false, NULL); +- + if (s->do_nodelay) { + qio_channel_set_delay(s->ioc, false); + } +diff --git a/hw/remote/proxy.c b/hw/remote/proxy.c +index b0165aa2a1..18e0f7a064 100644 +--- a/hw/remote/proxy.c ++++ b/hw/remote/proxy.c +@@ -112,8 +112,12 @@ static void pci_proxy_dev_realize(PCIDevice *device, Error **errp) + return; + } + ++ if (!qio_channel_set_blocking(dev->ioc, true, errp)) { ++ object_unref(dev->ioc); ++ return; ++ } ++ + qemu_mutex_init(&dev->io_mutex); +- qio_channel_set_blocking(dev->ioc, true, NULL); + + pci_conf[PCI_LATENCY_TIMER] = 0xff; + pci_conf[PCI_INTERRUPT_PIN] = 0x01; +diff --git a/hw/remote/remote-obj.c b/hw/remote/remote-obj.c +index 85882902d7..3402068ab9 100644 +--- a/hw/remote/remote-obj.c ++++ b/hw/remote/remote-obj.c +@@ -107,7 +107,11 @@ static void remote_object_machine_done(Notifier *notifier, void *data) + error_report_err(err); + return; + } +- qio_channel_set_blocking(ioc, false, NULL); ++ if (!qio_channel_set_blocking(ioc, false, &err)) { ++ error_report_err(err); ++ object_unref(OBJECT(ioc)); ++ return; ++ } + + o->dev = dev; + +diff --git a/hw/vfio-user/proxy.c b/hw/vfio-user/proxy.c +index 2c03d49f97..bbd7ec243d 100644 +--- a/hw/vfio-user/proxy.c ++++ b/hw/vfio-user/proxy.c +@@ -886,10 +886,11 @@ VFIOUserProxy *vfio_user_connect_dev(SocketAddress *addr, Error **errp) + sioc = qio_channel_socket_new(); + ioc = QIO_CHANNEL(sioc); + if (qio_channel_socket_connect_sync(sioc, addr, errp) < 0) { +- object_unref(OBJECT(ioc)); +- return NULL; ++ goto fail; ++ } ++ if (!qio_channel_set_blocking(ioc, false, errp)) { ++ goto fail; + } +- qio_channel_set_blocking(ioc, false, NULL); + + proxy = g_malloc0(sizeof(VFIOUserProxy)); + proxy->sockname = g_strdup_printf("unix:%s", sockname); +@@ -923,6 +924,10 @@ VFIOUserProxy *vfio_user_connect_dev(SocketAddress *addr, Error **errp) + QLIST_INSERT_HEAD(&vfio_user_sockets, proxy, next); + + return proxy; ++ ++fail: ++ object_unref(OBJECT(ioc)); ++ return NULL; + } + + void vfio_user_set_handler(VFIODevice *vbasedev, +diff --git a/include/io/channel.h b/include/io/channel.h +index 234e5db70d..6770d2ce35 100644 +--- a/include/io/channel.h ++++ b/include/io/channel.h +@@ -513,9 +513,9 @@ int coroutine_mixed_fn qio_channel_write_all(QIOChannel *ioc, + * return QIO_CHANNEL_ERR_BLOCK if they would otherwise + * block on I/O + */ +-int qio_channel_set_blocking(QIOChannel *ioc, +- bool enabled, +- Error **errp); ++bool qio_channel_set_blocking(QIOChannel *ioc, ++ bool enabled, ++ Error **errp); + + /** + * qio_channel_set_follow_coroutine_ctx: +diff --git a/io/channel-tls.c b/io/channel-tls.c +index a8248a9216..7135896f79 100644 +--- a/io/channel-tls.c ++++ b/io/channel-tls.c +@@ -425,7 +425,7 @@ static int qio_channel_tls_set_blocking(QIOChannel *ioc, + { + QIOChannelTLS *tioc = QIO_CHANNEL_TLS(ioc); + +- return qio_channel_set_blocking(tioc->master, enabled, errp); ++ return qio_channel_set_blocking(tioc->master, enabled, errp) ? 0 : -1; + } + + static void qio_channel_tls_set_delay(QIOChannel *ioc, +diff --git a/io/channel-websock.c b/io/channel-websock.c +index ec5e09f9ab..cb4dafdebb 100644 +--- a/io/channel-websock.c ++++ b/io/channel-websock.c +@@ -1191,8 +1191,7 @@ static int qio_channel_websock_set_blocking(QIOChannel *ioc, + { + QIOChannelWebsock *wioc = QIO_CHANNEL_WEBSOCK(ioc); + +- qio_channel_set_blocking(wioc->master, enabled, errp); +- return 0; ++ return qio_channel_set_blocking(wioc->master, enabled, errp) ? 0 : -1; + } + + static void qio_channel_websock_set_delay(QIOChannel *ioc, +diff --git a/io/channel.c b/io/channel.c +index ebd9322765..852e684938 100644 +--- a/io/channel.c ++++ b/io/channel.c +@@ -359,12 +359,12 @@ int coroutine_mixed_fn qio_channel_write_all(QIOChannel *ioc, + } + + +-int qio_channel_set_blocking(QIOChannel *ioc, ++bool qio_channel_set_blocking(QIOChannel *ioc, + bool enabled, + Error **errp) + { + QIOChannelClass *klass = QIO_CHANNEL_GET_CLASS(ioc); +- return klass->io_set_blocking(ioc, enabled, errp); ++ return klass->io_set_blocking(ioc, enabled, errp) == 0; + } + + +diff --git a/nbd/server.c b/nbd/server.c +index d242be9811..acec0487a8 100644 +--- a/nbd/server.c ++++ b/nbd/server.c +@@ -1411,7 +1411,9 @@ static coroutine_fn int nbd_negotiate(NBDClient *client, Error **errp) + ....options sent, ending in NBD_OPT_EXPORT_NAME or NBD_OPT_GO.... + */ + +- qio_channel_set_blocking(client->ioc, false, NULL); ++ if (!qio_channel_set_blocking(client->ioc, false, errp)) { ++ return -EINVAL; ++ } + qio_channel_set_follow_coroutine_ctx(client->ioc, true); + + trace_nbd_negotiate_begin(); +diff --git a/scsi/qemu-pr-helper.c b/scsi/qemu-pr-helper.c +index b69dd982d6..074b4db472 100644 +--- a/scsi/qemu-pr-helper.c ++++ b/scsi/qemu-pr-helper.c +@@ -733,8 +733,11 @@ static void coroutine_fn prh_co_entry(void *opaque) + uint32_t flags; + int r; + +- qio_channel_set_blocking(QIO_CHANNEL(client->ioc), +- false, NULL); ++ if (!qio_channel_set_blocking(QIO_CHANNEL(client->ioc), ++ false, &local_err)) { ++ goto out; ++ } ++ + qio_channel_set_follow_coroutine_ctx(QIO_CHANNEL(client->ioc), true); + + /* A very simple negotiation for future extensibility. No features +@@ -786,6 +789,7 @@ static void coroutine_fn prh_co_entry(void *opaque) + } + } + ++out: + if (local_err) { + if (verbose == 0) { + error_free(local_err); +@@ -794,7 +798,6 @@ static void coroutine_fn prh_co_entry(void *opaque) + } + } + +-out: + object_unref(OBJECT(client->ioc)); + g_free(client); + } +diff --git a/tests/unit/io-channel-helpers.c b/tests/unit/io-channel-helpers.c +index c0799c21c2..22b42d14cd 100644 +--- a/tests/unit/io-channel-helpers.c ++++ b/tests/unit/io-channel-helpers.c +@@ -20,6 +20,7 @@ + + #include "qemu/osdep.h" + #include "io-channel-helpers.h" ++#include "qapi/error.h" + #include "qemu/iov.h" + + struct QIOChannelTest { +@@ -109,8 +110,8 @@ void qio_channel_test_run_threads(QIOChannelTest *test, + test->src = src; + test->dst = dst; + +- qio_channel_set_blocking(test->dst, blocking, NULL); +- qio_channel_set_blocking(test->src, blocking, NULL); ++ qio_channel_set_blocking(test->dst, blocking, &error_abort); ++ qio_channel_set_blocking(test->src, blocking, &error_abort); + + reader = g_thread_new("reader", + test_io_thread_reader, +diff --git a/tests/unit/test-io-channel-tls.c b/tests/unit/test-io-channel-tls.c +index e036ac5df4..6f282ad45d 100644 +--- a/tests/unit/test-io-channel-tls.c ++++ b/tests/unit/test-io-channel-tls.c +@@ -184,8 +184,8 @@ static void test_io_channel_tls(const void *opaque) + * thread, so we need these non-blocking to avoid deadlock + * of ourselves + */ +- qio_channel_set_blocking(QIO_CHANNEL(clientChanSock), false, NULL); +- qio_channel_set_blocking(QIO_CHANNEL(serverChanSock), false, NULL); ++ qio_channel_set_blocking(QIO_CHANNEL(clientChanSock), false, &error_abort); ++ qio_channel_set_blocking(QIO_CHANNEL(serverChanSock), false, &error_abort); + + /* Now the real part of the test, setup the sessions */ + clientChanTLS = qio_channel_tls_new_client( +diff --git a/tools/i386/qemu-vmsr-helper.c b/tools/i386/qemu-vmsr-helper.c +index 5f19a48cbd..6c0f4fe870 100644 +--- a/tools/i386/qemu-vmsr-helper.c ++++ b/tools/i386/qemu-vmsr-helper.c +@@ -213,8 +213,10 @@ static void coroutine_fn vh_co_entry(void *opaque) + uint64_t vmsr; + int r; + +- qio_channel_set_blocking(QIO_CHANNEL(client->ioc), +- false, NULL); ++ if (!qio_channel_set_blocking(QIO_CHANNEL(client->ioc), ++ false, &local_err)) { ++ goto out; ++ } + + qio_channel_set_follow_coroutine_ctx(QIO_CHANNEL(client->ioc), true); + +diff --git a/ui/vnc.c b/ui/vnc.c +index 68ca4a68e7..8ca77b2971 100644 +--- a/ui/vnc.c ++++ b/ui/vnc.c +@@ -3337,7 +3337,7 @@ static void vnc_connect(VncDisplay *vd, QIOChannelSocket *sioc, + + VNC_DEBUG("New client on socket %p\n", vs->sioc); + update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); +- qio_channel_set_blocking(vs->ioc, false, NULL); ++ qio_channel_set_blocking(vs->ioc, false, &error_abort); + if (vs->ioc_tag) { + g_source_remove(vs->ioc_tag); + } +diff --git a/util/vhost-user-server.c b/util/vhost-user-server.c +index b19229074a..d805a92394 100644 +--- a/util/vhost-user-server.c ++++ b/util/vhost-user-server.c +@@ -336,6 +336,7 @@ static void vu_accept(QIONetListener *listener, QIOChannelSocket *sioc, + gpointer opaque) + { + VuServer *server = opaque; ++ Error *local_err = NULL; + + if (server->sioc) { + warn_report("Only one vhost-user client is allowed to " +@@ -368,7 +369,11 @@ static void vu_accept(QIONetListener *listener, QIOChannelSocket *sioc, + object_ref(OBJECT(server->ioc)); + + /* TODO vu_message_write() spins if non-blocking! */ +- qio_channel_set_blocking(server->ioc, false, NULL); ++ if (!qio_channel_set_blocking(server->ioc, false, &local_err)) { ++ error_report_err(local_err); ++ vu_deinit(&server->vu_dev); ++ return; ++ } + + qio_channel_set_follow_coroutine_ctx(server->ioc, true); + diff --git a/0150-vfio-pci-Do-not-unparent-in-instance_finalize.patch b/0150-vfio-pci-Do-not-unparent-in-instance_finalize.patch new file mode 100644 index 0000000..66fb72f --- /dev/null +++ b/0150-vfio-pci-Do-not-unparent-in-instance_finalize.patch @@ -0,0 +1,54 @@ +From 1339557f725d65b44f2ce8f27319e6e865cb03bb Mon Sep 17 00:00:00 2001 +From: Akihiko Odaki +Date: Wed, 24 Sep 2025 13:37:21 +0900 +Subject: [PATCH] vfio/pci: Do not unparent in instance_finalize() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 837a56420e (clegoate/qemu-kvm-centos) + +Children are automatically unparented so manually unparenting is +unnecessary. + +Worse, automatic unparenting happens before the insntance_finalize() +callback of the parent gets called, so object_unparent() calls in +the callback will refer to objects that are already unparented, which +is semantically incorrect. + +Signed-off-by: Akihiko Odaki +Reviewed-by: Daniel P. Berrangé +Link: https://lore.kernel.org/r/20250924-use-v4-2-07c6c598f53d@rsg.ci.i.u-tokyo.ac.jp +Signed-off-by: Paolo Bonzini +(cherry picked from commit e3ed862cabce6d8a12300b941243cb44e9cd40d1) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 4 ---- + 1 file changed, 4 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index d9cdd90ea5..38ea58020d 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -2028,7 +2028,6 @@ static void vfio_bars_finalize(VFIOPCIDevice *vdev) + vfio_region_finalize(&bar->region); + if (bar->mr) { + assert(bar->size); +- object_unparent(OBJECT(bar->mr)); + g_free(bar->mr); + bar->mr = NULL; + } +@@ -2036,9 +2035,6 @@ static void vfio_bars_finalize(VFIOPCIDevice *vdev) + + if (vdev->vga) { + vfio_vga_quirk_finalize(vdev); +- for (i = 0; i < ARRAY_SIZE(vdev->vga->region); i++) { +- object_unparent(OBJECT(&vdev->vga->region[i].mem)); +- } + g_free(vdev->vga); + } + } diff --git a/0151-vfio-Do-not-unparent-in-instance_finalize.patch b/0151-vfio-Do-not-unparent-in-instance_finalize.patch new file mode 100644 index 0000000..f91ebab --- /dev/null +++ b/0151-vfio-Do-not-unparent-in-instance_finalize.patch @@ -0,0 +1,86 @@ +From 945ea9b75fd590c19a752693eb9e7130083f924f Mon Sep 17 00:00:00 2001 +From: Akihiko Odaki +Date: Wed, 24 Sep 2025 13:37:25 +0900 +Subject: [PATCH] vfio: Do not unparent in instance_finalize() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] e44d0d6e98 (clegoate/qemu-kvm-centos) + +Children are automatically unparented so manually unparenting is +unnecessary. + +Worse, automatic unparenting happens before the instance_finalize() +callback of the parent gets called, so object_unparent() calls in +the callback will refer to objects that are already unparented, which +is semantically incorrect. + +Signed-off-by: Akihiko Odaki +Reviewed-by: Daniel P. Berrangé +Link: https://lore.kernel.org/r/20250924-use-v4-6-07c6c598f53d@rsg.ci.i.u-tokyo.ac.jp +Signed-off-by: Paolo Bonzini +(cherry picked from commit 9b80f8a8e758b427501e6bcbcb114ae45ff68387) +Signed-off-by: Eric Auger +--- + hw/vfio/pci-quirks.c | 9 +-------- + hw/vfio/region.c | 3 --- + 2 files changed, 1 insertion(+), 11 deletions(-) + +diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c +index c97606dbf1..b5da6afbf5 100644 +--- a/hw/vfio/pci-quirks.c ++++ b/hw/vfio/pci-quirks.c +@@ -1159,15 +1159,12 @@ void vfio_vga_quirk_exit(VFIOPCIDevice *vdev) + + void vfio_vga_quirk_finalize(VFIOPCIDevice *vdev) + { +- int i, j; ++ int i; + + for (i = 0; i < ARRAY_SIZE(vdev->vga->region); i++) { + while (!QLIST_EMPTY(&vdev->vga->region[i].quirks)) { + VFIOQuirk *quirk = QLIST_FIRST(&vdev->vga->region[i].quirks); + QLIST_REMOVE(quirk, next); +- for (j = 0; j < quirk->nr_mem; j++) { +- object_unparent(OBJECT(&quirk->mem[j])); +- } + g_free(quirk->mem); + g_free(quirk->data); + g_free(quirk); +@@ -1207,14 +1204,10 @@ void vfio_bar_quirk_exit(VFIOPCIDevice *vdev, int nr) + void vfio_bar_quirk_finalize(VFIOPCIDevice *vdev, int nr) + { + VFIOBAR *bar = &vdev->bars[nr]; +- int i; + + while (!QLIST_EMPTY(&bar->quirks)) { + VFIOQuirk *quirk = QLIST_FIRST(&bar->quirks); + QLIST_REMOVE(quirk, next); +- for (i = 0; i < quirk->nr_mem; i++) { +- object_unparent(OBJECT(&quirk->mem[i])); +- } + g_free(quirk->mem); + g_free(quirk->data); + g_free(quirk); +diff --git a/hw/vfio/region.c b/hw/vfio/region.c +index d04c57db63..b165ab0b93 100644 +--- a/hw/vfio/region.c ++++ b/hw/vfio/region.c +@@ -365,12 +365,9 @@ void vfio_region_finalize(VFIORegion *region) + for (i = 0; i < region->nr_mmaps; i++) { + if (region->mmaps[i].mmap) { + munmap(region->mmaps[i].mmap, region->mmaps[i].size); +- object_unparent(OBJECT(®ion->mmaps[i].mem)); + } + } + +- object_unparent(OBJECT(region->mem)); +- + g_free(region->mem); + g_free(region->mmaps); + diff --git a/0152-include-hw-vfio-vfio-container.h-rename-VFIOContaine.patch b/0152-include-hw-vfio-vfio-container.h-rename-VFIOContaine.patch new file mode 100644 index 0000000..2478f6e --- /dev/null +++ b/0152-include-hw-vfio-vfio-container.h-rename-VFIOContaine.patch @@ -0,0 +1,509 @@ +From 3b245121737e82d5491ef5fb4b1454bbb89f0dfe Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:09 +0100 +Subject: [PATCH] include/hw/vfio/vfio-container.h: rename VFIOContainer to + VFIOLegacyContainer +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] d408746f7f (clegoate/qemu-kvm-centos) + +Conflicts: + hw/vfio/container.c: contextual conflict: downstream we + have vfio_device_count + +The VFIOContainer struct represents the legacy VFIO container even though the +name suggests it may be the common superclass of all VFIO containers. Rename it +to VFIOLegacyContainer to make this clearer, which is also a better match for +its VFIO_IOMMU_LEGACY QOM type name. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-2-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit da9211f28e280bc9809b116fc186727a01b0f267) +Signed-off-by: Eric Auger +--- + hw/ppc/spapr_pci_vfio.c | 10 ++++---- + hw/vfio/container.c | 42 +++++++++++++++++--------------- + hw/vfio/cpr-legacy.c | 27 +++++++++++--------- + hw/vfio/spapr.c | 18 +++++++------- + include/hw/vfio/vfio-container.h | 8 +++--- + include/hw/vfio/vfio-cpr.h | 9 ++++--- + 6 files changed, 60 insertions(+), 54 deletions(-) + +diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c +index e318d0d912..b658eb372c 100644 +--- a/hw/ppc/spapr_pci_vfio.c ++++ b/hw/ppc/spapr_pci_vfio.c +@@ -32,7 +32,7 @@ + * Interfaces for IBM EEH (Enhanced Error Handling) + */ + #ifdef CONFIG_VFIO_PCI +-static bool vfio_eeh_container_ok(VFIOContainer *container) ++static bool vfio_eeh_container_ok(VFIOLegacyContainer *container) + { + /* + * As of 2016-03-04 (linux-4.5) the host kernel EEH/VFIO +@@ -60,7 +60,7 @@ static bool vfio_eeh_container_ok(VFIOContainer *container) + return true; + } + +-static int vfio_eeh_container_op(VFIOContainer *container, uint32_t op) ++static int vfio_eeh_container_op(VFIOLegacyContainer *container, uint32_t op) + { + struct vfio_eeh_pe_op pe_op = { + .argsz = sizeof(pe_op), +@@ -83,7 +83,7 @@ static int vfio_eeh_container_op(VFIOContainer *container, uint32_t op) + return ret; + } + +-static VFIOContainer *vfio_eeh_as_container(AddressSpace *as) ++static VFIOLegacyContainer *vfio_eeh_as_container(AddressSpace *as) + { + VFIOAddressSpace *space = vfio_address_space_get(as); + VFIOContainerBase *bcontainer = NULL; +@@ -111,14 +111,14 @@ out: + + static bool vfio_eeh_as_ok(AddressSpace *as) + { +- VFIOContainer *container = vfio_eeh_as_container(as); ++ VFIOLegacyContainer *container = vfio_eeh_as_container(as); + + return (container != NULL) && vfio_eeh_container_ok(container); + } + + static int vfio_eeh_as_op(AddressSpace *as, uint32_t op) + { +- VFIOContainer *container = vfio_eeh_as_container(as); ++ VFIOLegacyContainer *container = vfio_eeh_as_container(as); + + if (!container) { + return -ENODEV; +diff --git a/hw/vfio/container.c b/hw/vfio/container.c +index 860d1aebda..76a09be941 100644 +--- a/hw/vfio/container.c ++++ b/hw/vfio/container.c +@@ -58,7 +58,8 @@ int vfio_device_count(void) + return i; + } + +-static int vfio_ram_block_discard_disable(VFIOContainer *container, bool state) ++static int vfio_ram_block_discard_disable(VFIOLegacyContainer *container, ++ bool state) + { + switch (container->iommu_type) { + case VFIO_TYPE1v2_IOMMU: +@@ -81,7 +82,7 @@ static int vfio_ram_block_discard_disable(VFIOContainer *container, bool state) + } + } + +-static int vfio_dma_unmap_bitmap(const VFIOContainer *container, ++static int vfio_dma_unmap_bitmap(const VFIOLegacyContainer *container, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb) + { +@@ -138,7 +139,7 @@ static int vfio_legacy_dma_unmap_one(const VFIOContainerBase *bcontainer, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb) + { +- const VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + struct vfio_iommu_type1_dma_unmap unmap = { + .argsz = sizeof(unmap), + .flags = 0, +@@ -226,7 +227,7 @@ static int vfio_legacy_dma_map(const VFIOContainerBase *bcontainer, hwaddr iova, + ram_addr_t size, void *vaddr, bool readonly, + MemoryRegion *mr) + { +- const VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + struct vfio_iommu_type1_dma_map map = { + .argsz = sizeof(map), + .flags = VFIO_DMA_MAP_FLAG_READ, +@@ -258,7 +259,7 @@ static int + vfio_legacy_set_dirty_page_tracking(const VFIOContainerBase *bcontainer, + bool start, Error **errp) + { +- const VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + int ret; + struct vfio_iommu_type1_dirty_bitmap dirty = { + .argsz = sizeof(dirty), +@@ -283,7 +284,7 @@ vfio_legacy_set_dirty_page_tracking(const VFIOContainerBase *bcontainer, + static int vfio_legacy_query_dirty_bitmap(const VFIOContainerBase *bcontainer, + VFIOBitmap *vbmap, hwaddr iova, hwaddr size, Error **errp) + { +- const VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + struct vfio_iommu_type1_dirty_bitmap *dbitmap; + struct vfio_iommu_type1_dirty_bitmap_get *range; + int ret; +@@ -427,12 +428,12 @@ static bool vfio_set_iommu(int container_fd, int group_fd, + return true; + } + +-static VFIOContainer *vfio_create_container(int fd, VFIOGroup *group, ++static VFIOLegacyContainer *vfio_create_container(int fd, VFIOGroup *group, + Error **errp) + { + int iommu_type; + const char *vioc_name; +- VFIOContainer *container; ++ VFIOLegacyContainer *container; + + iommu_type = vfio_get_iommu_type(fd, errp); + if (iommu_type < 0) { +@@ -456,7 +457,7 @@ static VFIOContainer *vfio_create_container(int fd, VFIOGroup *group, + return container; + } + +-static int vfio_get_iommu_info(VFIOContainer *container, ++static int vfio_get_iommu_info(VFIOLegacyContainer *container, + struct vfio_iommu_type1_info **info) + { + +@@ -500,7 +501,7 @@ vfio_get_iommu_info_cap(struct vfio_iommu_type1_info *info, uint16_t id) + return NULL; + } + +-static void vfio_get_iommu_info_migration(VFIOContainer *container, ++static void vfio_get_iommu_info_migration(VFIOLegacyContainer *container, + struct vfio_iommu_type1_info *info) + { + struct vfio_info_cap_header *hdr; +@@ -528,7 +529,7 @@ static void vfio_get_iommu_info_migration(VFIOContainer *container, + + static bool vfio_legacy_setup(VFIOContainerBase *bcontainer, Error **errp) + { +- VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + g_autofree struct vfio_iommu_type1_info *info = NULL; + int ret; + +@@ -554,8 +555,8 @@ static bool vfio_legacy_setup(VFIOContainerBase *bcontainer, Error **errp) + return true; + } + +-static bool vfio_container_attach_discard_disable(VFIOContainer *container, +- VFIOGroup *group, Error **errp) ++static bool vfio_container_attach_discard_disable( ++ VFIOLegacyContainer *container, VFIOGroup *group, Error **errp) + { + int ret; + +@@ -601,8 +602,8 @@ static bool vfio_container_attach_discard_disable(VFIOContainer *container, + return !ret; + } + +-static bool vfio_container_group_add(VFIOContainer *container, VFIOGroup *group, +- Error **errp) ++static bool vfio_container_group_add(VFIOLegacyContainer *container, ++ VFIOGroup *group, Error **errp) + { + if (!vfio_container_attach_discard_disable(container, group, errp)) { + return false; +@@ -618,7 +619,8 @@ static bool vfio_container_group_add(VFIOContainer *container, VFIOGroup *group, + return true; + } + +-static void vfio_container_group_del(VFIOContainer *container, VFIOGroup *group) ++static void vfio_container_group_del(VFIOLegacyContainer *container, ++ VFIOGroup *group) + { + QLIST_REMOVE(group, container_next); + group->container = NULL; +@@ -630,7 +632,7 @@ static void vfio_container_group_del(VFIOContainer *container, VFIOGroup *group) + static bool vfio_container_connect(VFIOGroup *group, AddressSpace *as, + Error **errp) + { +- VFIOContainer *container; ++ VFIOLegacyContainer *container; + VFIOContainerBase *bcontainer; + int ret, fd = -1; + VFIOAddressSpace *space; +@@ -743,7 +745,7 @@ fail: + + static void vfio_container_disconnect(VFIOGroup *group) + { +- VFIOContainer *container = group->container; ++ VFIOLegacyContainer *container = group->container; + VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); + +@@ -1257,7 +1259,7 @@ hiod_legacy_vfio_get_page_size_mask(HostIOMMUDevice *hiod) + + static void vfio_iommu_legacy_instance_init(Object *obj) + { +- VFIOContainer *container = VFIO_IOMMU_LEGACY(obj); ++ VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(obj); + + QLIST_INIT(&container->group_list); + } +@@ -1277,7 +1279,7 @@ static const TypeInfo types[] = { + .name = TYPE_VFIO_IOMMU_LEGACY, + .parent = TYPE_VFIO_IOMMU, + .instance_init = vfio_iommu_legacy_instance_init, +- .instance_size = sizeof(VFIOContainer), ++ .instance_size = sizeof(VFIOLegacyContainer), + .class_init = vfio_iommu_legacy_class_init, + }, { + .name = TYPE_HOST_IOMMU_DEVICE_LEGACY_VFIO, +diff --git a/hw/vfio/cpr-legacy.c b/hw/vfio/cpr-legacy.c +index 8f437194fa..12bf920a7d 100644 +--- a/hw/vfio/cpr-legacy.c ++++ b/hw/vfio/cpr-legacy.c +@@ -17,7 +17,8 @@ + #include "qapi/error.h" + #include "qemu/error-report.h" + +-static bool vfio_dma_unmap_vaddr_all(VFIOContainer *container, Error **errp) ++static bool vfio_dma_unmap_vaddr_all(VFIOLegacyContainer *container, ++ Error **errp) + { + struct vfio_iommu_type1_dma_unmap unmap = { + .argsz = sizeof(unmap), +@@ -41,7 +42,7 @@ static int vfio_legacy_cpr_dma_map(const VFIOContainerBase *bcontainer, + hwaddr iova, ram_addr_t size, void *vaddr, + bool readonly, MemoryRegion *mr) + { +- const VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + + struct vfio_iommu_type1_dma_map map = { + .argsz = sizeof(map), +@@ -63,12 +64,13 @@ static int vfio_legacy_cpr_dma_map(const VFIOContainerBase *bcontainer, + static void vfio_region_remap(MemoryListener *listener, + MemoryRegionSection *section) + { +- VFIOContainer *container = container_of(listener, VFIOContainer, +- cpr.remap_listener); ++ VFIOLegacyContainer *container = container_of(listener, ++ VFIOLegacyContainer, ++ cpr.remap_listener); + vfio_container_region_add(VFIO_IOMMU(container), section, true); + } + +-static bool vfio_cpr_supported(VFIOContainer *container, Error **errp) ++static bool vfio_cpr_supported(VFIOLegacyContainer *container, Error **errp) + { + if (!ioctl(container->fd, VFIO_CHECK_EXTENSION, VFIO_UPDATE_VADDR)) { + error_setg(errp, "VFIO container does not support VFIO_UPDATE_VADDR"); +@@ -85,7 +87,7 @@ static bool vfio_cpr_supported(VFIOContainer *container, Error **errp) + + static int vfio_container_pre_save(void *opaque) + { +- VFIOContainer *container = opaque; ++ VFIOLegacyContainer *container = opaque; + Error *local_err = NULL; + + if (!vfio_dma_unmap_vaddr_all(container, &local_err)) { +@@ -97,7 +99,7 @@ static int vfio_container_pre_save(void *opaque) + + static int vfio_container_post_load(void *opaque, int version_id) + { +- VFIOContainer *container = opaque; ++ VFIOLegacyContainer *container = opaque; + VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); + dma_map_fn saved_dma_map = vioc->dma_map; +@@ -133,8 +135,8 @@ static const VMStateDescription vfio_container_vmstate = { + static int vfio_cpr_fail_notifier(NotifierWithReturn *notifier, + MigrationEvent *e, Error **errp) + { +- VFIOContainer *container = +- container_of(notifier, VFIOContainer, cpr.transfer_notifier); ++ VFIOLegacyContainer *container = ++ container_of(notifier, VFIOLegacyContainer, cpr.transfer_notifier); + VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + + if (e->type != MIG_EVENT_PRECOPY_FAILED) { +@@ -165,7 +167,8 @@ static int vfio_cpr_fail_notifier(NotifierWithReturn *notifier, + return 0; + } + +-bool vfio_legacy_cpr_register_container(VFIOContainer *container, Error **errp) ++bool vfio_legacy_cpr_register_container(VFIOLegacyContainer *container, ++ Error **errp) + { + VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + Error **cpr_blocker = &container->cpr.blocker; +@@ -189,7 +192,7 @@ bool vfio_legacy_cpr_register_container(VFIOContainer *container, Error **errp) + return true; + } + +-void vfio_legacy_cpr_unregister_container(VFIOContainer *container) ++void vfio_legacy_cpr_unregister_container(VFIOLegacyContainer *container) + { + VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + +@@ -263,7 +266,7 @@ static bool same_device(int fd1, int fd2) + return !fstat(fd1, &st1) && !fstat(fd2, &st2) && st1.st_dev == st2.st_dev; + } + +-bool vfio_cpr_container_match(VFIOContainer *container, VFIOGroup *group, ++bool vfio_cpr_container_match(VFIOLegacyContainer *container, VFIOGroup *group, + int fd) + { + if (container->fd == fd) { +diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c +index c41e4588d6..b8bade90d7 100644 +--- a/hw/vfio/spapr.c ++++ b/hw/vfio/spapr.c +@@ -31,7 +31,7 @@ typedef struct VFIOHostDMAWindow { + } VFIOHostDMAWindow; + + typedef struct VFIOSpaprContainer { +- VFIOContainer container; ++ VFIOLegacyContainer container; + MemoryListener prereg_listener; + QLIST_HEAD(, VFIOHostDMAWindow) hostwin_list; + unsigned int levels; +@@ -61,7 +61,7 @@ static void vfio_prereg_listener_region_add(MemoryListener *listener, + { + VFIOSpaprContainer *scontainer = container_of(listener, VFIOSpaprContainer, + prereg_listener); +- VFIOContainer *container = &scontainer->container; ++ VFIOLegacyContainer *container = &scontainer->container; + VFIOContainerBase *bcontainer = VFIO_IOMMU(container); + const hwaddr gpa = section->offset_within_address_space; + hwaddr end; +@@ -121,7 +121,7 @@ static void vfio_prereg_listener_region_del(MemoryListener *listener, + { + VFIOSpaprContainer *scontainer = container_of(listener, VFIOSpaprContainer, + prereg_listener); +- VFIOContainer *container = &scontainer->container; ++ VFIOLegacyContainer *container = &scontainer->container; + const hwaddr gpa = section->offset_within_address_space; + hwaddr end; + int ret; +@@ -218,7 +218,7 @@ static VFIOHostDMAWindow *vfio_find_hostwin(VFIOSpaprContainer *container, + return hostwin_found ? hostwin : NULL; + } + +-static int vfio_spapr_remove_window(VFIOContainer *container, ++static int vfio_spapr_remove_window(VFIOLegacyContainer *container, + hwaddr offset_within_address_space) + { + struct vfio_iommu_spapr_tce_remove remove = { +@@ -239,7 +239,7 @@ static int vfio_spapr_remove_window(VFIOContainer *container, + return 0; + } + +-static bool vfio_spapr_create_window(VFIOContainer *container, ++static bool vfio_spapr_create_window(VFIOLegacyContainer *container, + MemoryRegionSection *section, + hwaddr *pgsize, Error **errp) + { +@@ -352,7 +352,7 @@ vfio_spapr_container_add_section_window(VFIOContainerBase *bcontainer, + MemoryRegionSection *section, + Error **errp) + { +- VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, + container); + VFIOHostDMAWindow *hostwin; +@@ -442,7 +442,7 @@ static void + vfio_spapr_container_del_section_window(VFIOContainerBase *bcontainer, + MemoryRegionSection *section) + { +- VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, + container); + +@@ -463,7 +463,7 @@ vfio_spapr_container_del_section_window(VFIOContainerBase *bcontainer, + + static void vfio_spapr_container_release(VFIOContainerBase *bcontainer) + { +- VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, + container); + VFIOHostDMAWindow *hostwin, *next; +@@ -481,7 +481,7 @@ static void vfio_spapr_container_release(VFIOContainerBase *bcontainer) + static bool vfio_spapr_container_setup(VFIOContainerBase *bcontainer, + Error **errp) + { +- VFIOContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, + container); + struct vfio_iommu_spapr_tce_info info; +diff --git a/include/hw/vfio/vfio-container.h b/include/hw/vfio/vfio-container.h +index 240f566993..712a691400 100644 +--- a/include/hw/vfio/vfio-container.h ++++ b/include/hw/vfio/vfio-container.h +@@ -12,20 +12,20 @@ + #include "hw/vfio/vfio-container-base.h" + #include "hw/vfio/vfio-cpr.h" + +-typedef struct VFIOContainer VFIOContainer; ++typedef struct VFIOLegacyContainer VFIOLegacyContainer; + typedef struct VFIODevice VFIODevice; + + typedef struct VFIOGroup { + int fd; + int groupid; +- VFIOContainer *container; ++ VFIOLegacyContainer *container; + QLIST_HEAD(, VFIODevice) device_list; + QLIST_ENTRY(VFIOGroup) next; + QLIST_ENTRY(VFIOGroup) container_next; + bool ram_block_discard_allowed; + } VFIOGroup; + +-struct VFIOContainer { ++struct VFIOLegacyContainer { + VFIOContainerBase parent_obj; + + int fd; /* /dev/vfio/vfio, empowered by the attached groups */ +@@ -34,6 +34,6 @@ struct VFIOContainer { + VFIOContainerCPR cpr; + }; + +-OBJECT_DECLARE_SIMPLE_TYPE(VFIOContainer, VFIO_IOMMU_LEGACY); ++OBJECT_DECLARE_SIMPLE_TYPE(VFIOLegacyContainer, VFIO_IOMMU_LEGACY); + + #endif /* HW_VFIO_CONTAINER_H */ +diff --git a/include/hw/vfio/vfio-cpr.h b/include/hw/vfio/vfio-cpr.h +index d37daffbc5..04e9872587 100644 +--- a/include/hw/vfio/vfio-cpr.h ++++ b/include/hw/vfio/vfio-cpr.h +@@ -12,7 +12,7 @@ + #include "migration/misc.h" + #include "system/memory.h" + +-struct VFIOContainer; ++struct VFIOLegacyContainer; + struct VFIOContainerBase; + struct VFIOGroup; + struct VFIODevice; +@@ -42,9 +42,10 @@ typedef struct VFIOPCICPR { + NotifierWithReturn transfer_notifier; + } VFIOPCICPR; + +-bool vfio_legacy_cpr_register_container(struct VFIOContainer *container, ++bool vfio_legacy_cpr_register_container(struct VFIOLegacyContainer *container, + Error **errp); +-void vfio_legacy_cpr_unregister_container(struct VFIOContainer *container); ++void vfio_legacy_cpr_unregister_container( ++ struct VFIOLegacyContainer *container); + + int vfio_cpr_reboot_notifier(NotifierWithReturn *notifier, MigrationEvent *e, + Error **errp); +@@ -61,7 +62,7 @@ void vfio_cpr_load_device(struct VFIODevice *vbasedev); + + int vfio_cpr_group_get_device_fd(int d, const char *name); + +-bool vfio_cpr_container_match(struct VFIOContainer *container, ++bool vfio_cpr_container_match(struct VFIOLegacyContainer *container, + struct VFIOGroup *group, int fd); + + void vfio_cpr_giommu_remap(struct VFIOContainerBase *bcontainer, diff --git a/0153-include-hw-vfio-vfio-container-base.h-rename-VFIOCon.patch b/0153-include-hw-vfio-vfio-container-base.h-rename-VFIOCon.patch new file mode 100644 index 0000000..5afded7 --- /dev/null +++ b/0153-include-hw-vfio-vfio-container-base.h-rename-VFIOCon.patch @@ -0,0 +1,1264 @@ +From 3f7c865e32cb6e2f1918768647c36c4854b1cebc Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:10 +0100 +Subject: [PATCH] include/hw/vfio/vfio-container-base.h: rename + VFIOContainerBase to VFIOContainer +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] b0c8068c65 (clegoate/qemu-kvm-centos) + +Now that the VFIOContainer struct name is available, rename VFIOContainerBase +to VFIOContainer to better indicate that it is the superclass of other +VFIOFooContainer structs. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-3-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit e2e269d580947fe9b1b5735c8cb659277ac67996) +Signed-off-by: Eric Auger +--- + hw/ppc/spapr_pci_vfio.c | 2 +- + hw/vfio-user/container.c | 18 +++---- + hw/vfio-user/container.h | 2 +- + hw/vfio/container-base.c | 41 ++++++++------- + hw/vfio/container.c | 22 ++++---- + hw/vfio/cpr-iommufd.c | 4 +- + hw/vfio/cpr-legacy.c | 14 ++--- + hw/vfio/device.c | 2 +- + hw/vfio/iommufd.c | 18 +++---- + hw/vfio/listener.c | 74 +++++++++++++------------- + hw/vfio/spapr.c | 12 ++--- + hw/vfio/vfio-iommufd.h | 2 +- + hw/vfio/vfio-listener.h | 4 +- + include/hw/vfio/vfio-container-base.h | 76 +++++++++++++-------------- + include/hw/vfio/vfio-container.h | 2 +- + include/hw/vfio/vfio-cpr.h | 8 +-- + include/hw/vfio/vfio-device.h | 4 +- + 17 files changed, 154 insertions(+), 151 deletions(-) + +diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c +index b658eb372c..48fa98c199 100644 +--- a/hw/ppc/spapr_pci_vfio.c ++++ b/hw/ppc/spapr_pci_vfio.c +@@ -86,7 +86,7 @@ static int vfio_eeh_container_op(VFIOLegacyContainer *container, uint32_t op) + static VFIOLegacyContainer *vfio_eeh_as_container(AddressSpace *as) + { + VFIOAddressSpace *space = vfio_address_space_get(as); +- VFIOContainerBase *bcontainer = NULL; ++ VFIOContainer *bcontainer = NULL; + + if (QLIST_EMPTY(&space->containers)) { + /* No containers to act on */ +diff --git a/hw/vfio-user/container.c b/hw/vfio-user/container.c +index 3cdbd44c1a..411eb7b28b 100644 +--- a/hw/vfio-user/container.c ++++ b/hw/vfio-user/container.c +@@ -22,14 +22,14 @@ + * will fire during memory update transactions. These depend on BQL being held, + * so do any resulting map/demap ops async while keeping BQL. + */ +-static void vfio_user_listener_begin(VFIOContainerBase *bcontainer) ++static void vfio_user_listener_begin(VFIOContainer *bcontainer) + { + VFIOUserContainer *container = VFIO_IOMMU_USER(bcontainer); + + container->proxy->async_ops = true; + } + +-static void vfio_user_listener_commit(VFIOContainerBase *bcontainer) ++static void vfio_user_listener_commit(VFIOContainer *bcontainer) + { + VFIOUserContainer *container = VFIO_IOMMU_USER(bcontainer); + +@@ -38,7 +38,7 @@ static void vfio_user_listener_commit(VFIOContainerBase *bcontainer) + vfio_user_wait_reqs(container->proxy); + } + +-static int vfio_user_dma_unmap(const VFIOContainerBase *bcontainer, ++static int vfio_user_dma_unmap(const VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb, bool unmap_all) + { +@@ -80,7 +80,7 @@ static int vfio_user_dma_unmap(const VFIOContainerBase *bcontainer, + return ret; + } + +-static int vfio_user_dma_map(const VFIOContainerBase *bcontainer, hwaddr iova, ++static int vfio_user_dma_map(const VFIOContainer *bcontainer, hwaddr iova, + ram_addr_t size, void *vaddr, bool readonly, + MemoryRegion *mrp) + { +@@ -154,14 +154,14 @@ static int vfio_user_dma_map(const VFIOContainerBase *bcontainer, hwaddr iova, + } + + static int +-vfio_user_set_dirty_page_tracking(const VFIOContainerBase *bcontainer, ++vfio_user_set_dirty_page_tracking(const VFIOContainer *bcontainer, + bool start, Error **errp) + { + error_setg_errno(errp, ENOTSUP, "Not supported"); + return -ENOTSUP; + } + +-static int vfio_user_query_dirty_bitmap(const VFIOContainerBase *bcontainer, ++static int vfio_user_query_dirty_bitmap(const VFIOContainer *bcontainer, + VFIOBitmap *vbmap, hwaddr iova, + hwaddr size, Error **errp) + { +@@ -169,7 +169,7 @@ static int vfio_user_query_dirty_bitmap(const VFIOContainerBase *bcontainer, + return -ENOTSUP; + } + +-static bool vfio_user_setup(VFIOContainerBase *bcontainer, Error **errp) ++static bool vfio_user_setup(VFIOContainer *bcontainer, Error **errp) + { + VFIOUserContainer *container = VFIO_IOMMU_USER(bcontainer); + +@@ -202,7 +202,7 @@ static VFIOUserContainer * + vfio_user_container_connect(AddressSpace *as, VFIODevice *vbasedev, + Error **errp) + { +- VFIOContainerBase *bcontainer; ++ VFIOContainer *bcontainer; + VFIOUserContainer *container; + VFIOAddressSpace *space; + VFIOIOMMUClass *vioc; +@@ -260,7 +260,7 @@ put_space_exit: + + static void vfio_user_container_disconnect(VFIOUserContainer *container) + { +- VFIOContainerBase *bcontainer = VFIO_IOMMU(container); ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); + VFIOAddressSpace *space = bcontainer->space; + +diff --git a/hw/vfio-user/container.h b/hw/vfio-user/container.h +index 96aa6785d9..241863ef97 100644 +--- a/hw/vfio-user/container.h ++++ b/hw/vfio-user/container.h +@@ -14,7 +14,7 @@ + + /* MMU container sub-class for vfio-user. */ + struct VFIOUserContainer { +- VFIOContainerBase parent_obj; ++ VFIOContainer parent_obj; + + VFIOUserProxy *proxy; + }; +diff --git a/hw/vfio/container-base.c b/hw/vfio/container-base.c +index 56304978e1..98c5198e50 100644 +--- a/hw/vfio/container-base.c ++++ b/hw/vfio/container-base.c +@@ -67,13 +67,13 @@ void vfio_address_space_put(VFIOAddressSpace *space) + } + + void vfio_address_space_insert(VFIOAddressSpace *space, +- VFIOContainerBase *bcontainer) ++ VFIOContainer *bcontainer) + { + QLIST_INSERT_HEAD(&space->containers, bcontainer, next); + bcontainer->space = space; + } + +-int vfio_container_dma_map(VFIOContainerBase *bcontainer, ++int vfio_container_dma_map(VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + void *vaddr, bool readonly, MemoryRegion *mr) + { +@@ -92,7 +92,7 @@ int vfio_container_dma_map(VFIOContainerBase *bcontainer, + return vioc->dma_map(bcontainer, iova, size, vaddr, readonly, mr); + } + +-int vfio_container_dma_unmap(VFIOContainerBase *bcontainer, ++int vfio_container_dma_unmap(VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb, bool unmap_all) + { +@@ -102,7 +102,7 @@ int vfio_container_dma_unmap(VFIOContainerBase *bcontainer, + return vioc->dma_unmap(bcontainer, iova, size, iotlb, unmap_all); + } + +-bool vfio_container_add_section_window(VFIOContainerBase *bcontainer, ++bool vfio_container_add_section_window(VFIOContainer *bcontainer, + MemoryRegionSection *section, + Error **errp) + { +@@ -115,7 +115,7 @@ bool vfio_container_add_section_window(VFIOContainerBase *bcontainer, + return vioc->add_window(bcontainer, section, errp); + } + +-void vfio_container_del_section_window(VFIOContainerBase *bcontainer, ++void vfio_container_del_section_window(VFIOContainer *bcontainer, + MemoryRegionSection *section) + { + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); +@@ -127,7 +127,7 @@ void vfio_container_del_section_window(VFIOContainerBase *bcontainer, + return vioc->del_window(bcontainer, section); + } + +-int vfio_container_set_dirty_page_tracking(VFIOContainerBase *bcontainer, ++int vfio_container_set_dirty_page_tracking(VFIOContainer *bcontainer, + bool start, Error **errp) + { + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); +@@ -151,7 +151,7 @@ int vfio_container_set_dirty_page_tracking(VFIOContainerBase *bcontainer, + } + + static bool vfio_container_devices_dirty_tracking_is_started( +- const VFIOContainerBase *bcontainer) ++ const VFIOContainer *bcontainer) + { + VFIODevice *vbasedev; + +@@ -165,14 +165,14 @@ static bool vfio_container_devices_dirty_tracking_is_started( + } + + bool vfio_container_dirty_tracking_is_started( +- const VFIOContainerBase *bcontainer) ++ const VFIOContainer *bcontainer) + { + return vfio_container_devices_dirty_tracking_is_started(bcontainer) || + bcontainer->dirty_pages_started; + } + + bool vfio_container_devices_dirty_tracking_is_supported( +- const VFIOContainerBase *bcontainer) ++ const VFIOContainer *bcontainer) + { + VFIODevice *vbasedev; + +@@ -210,8 +210,9 @@ static int vfio_device_dma_logging_report(VFIODevice *vbasedev, hwaddr iova, + return vbasedev->io_ops->device_feature(vbasedev, feature); + } + +-static int vfio_container_iommu_query_dirty_bitmap(const VFIOContainerBase *bcontainer, +- VFIOBitmap *vbmap, hwaddr iova, hwaddr size, Error **errp) ++static int vfio_container_iommu_query_dirty_bitmap( ++ const VFIOContainer *bcontainer, VFIOBitmap *vbmap, hwaddr iova, ++ hwaddr size, Error **errp) + { + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); + +@@ -220,8 +221,9 @@ static int vfio_container_iommu_query_dirty_bitmap(const VFIOContainerBase *bcon + errp); + } + +-static int vfio_container_devices_query_dirty_bitmap(const VFIOContainerBase *bcontainer, +- VFIOBitmap *vbmap, hwaddr iova, hwaddr size, Error **errp) ++static int vfio_container_devices_query_dirty_bitmap( ++ const VFIOContainer *bcontainer, VFIOBitmap *vbmap, hwaddr iova, ++ hwaddr size, Error **errp) + { + VFIODevice *vbasedev; + int ret; +@@ -242,8 +244,9 @@ static int vfio_container_devices_query_dirty_bitmap(const VFIOContainerBase *bc + return 0; + } + +-int vfio_container_query_dirty_bitmap(const VFIOContainerBase *bcontainer, uint64_t iova, +- uint64_t size, ram_addr_t ram_addr, Error **errp) ++int vfio_container_query_dirty_bitmap(const VFIOContainer *bcontainer, ++ uint64_t iova, uint64_t size, ++ ram_addr_t ram_addr, Error **errp) + { + bool all_device_dirty_tracking = + vfio_container_devices_dirty_tracking_is_supported(bcontainer); +@@ -297,7 +300,7 @@ static gpointer copy_iova_range(gconstpointer src, gpointer data) + return dest; + } + +-GList *vfio_container_get_iova_ranges(const VFIOContainerBase *bcontainer) ++GList *vfio_container_get_iova_ranges(const VFIOContainer *bcontainer) + { + assert(bcontainer); + return g_list_copy_deep(bcontainer->iova_ranges, copy_iova_range, NULL); +@@ -305,7 +308,7 @@ GList *vfio_container_get_iova_ranges(const VFIOContainerBase *bcontainer) + + static void vfio_container_instance_finalize(Object *obj) + { +- VFIOContainerBase *bcontainer = VFIO_IOMMU(obj); ++ VFIOContainer *bcontainer = VFIO_IOMMU(obj); + VFIOGuestIOMMU *giommu, *tmp; + + QLIST_SAFE_REMOVE(bcontainer, next); +@@ -322,7 +325,7 @@ static void vfio_container_instance_finalize(Object *obj) + + static void vfio_container_instance_init(Object *obj) + { +- VFIOContainerBase *bcontainer = VFIO_IOMMU(obj); ++ VFIOContainer *bcontainer = VFIO_IOMMU(obj); + + bcontainer->error = NULL; + bcontainer->dirty_pages_supported = false; +@@ -338,7 +341,7 @@ static const TypeInfo types[] = { + .parent = TYPE_OBJECT, + .instance_init = vfio_container_instance_init, + .instance_finalize = vfio_container_instance_finalize, +- .instance_size = sizeof(VFIOContainerBase), ++ .instance_size = sizeof(VFIOContainer), + .class_size = sizeof(VFIOIOMMUClass), + .abstract = true, + }, +diff --git a/hw/vfio/container.c b/hw/vfio/container.c +index 76a09be941..84f5a5fdee 100644 +--- a/hw/vfio/container.c ++++ b/hw/vfio/container.c +@@ -86,7 +86,7 @@ static int vfio_dma_unmap_bitmap(const VFIOLegacyContainer *container, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb) + { +- const VFIOContainerBase *bcontainer = VFIO_IOMMU(container); ++ const VFIOContainer *bcontainer = VFIO_IOMMU(container); + struct vfio_iommu_type1_dma_unmap *unmap; + struct vfio_bitmap *bitmap; + VFIOBitmap vbmap; +@@ -135,7 +135,7 @@ unmap_exit: + return ret; + } + +-static int vfio_legacy_dma_unmap_one(const VFIOContainerBase *bcontainer, ++static int vfio_legacy_dma_unmap_one(const VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb) + { +@@ -198,7 +198,7 @@ static int vfio_legacy_dma_unmap_one(const VFIOContainerBase *bcontainer, + /* + * DMA - Mapping and unmapping for the "type1" IOMMU interface used on x86 + */ +-static int vfio_legacy_dma_unmap(const VFIOContainerBase *bcontainer, ++static int vfio_legacy_dma_unmap(const VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb, bool unmap_all) + { +@@ -223,7 +223,7 @@ static int vfio_legacy_dma_unmap(const VFIOContainerBase *bcontainer, + return ret; + } + +-static int vfio_legacy_dma_map(const VFIOContainerBase *bcontainer, hwaddr iova, ++static int vfio_legacy_dma_map(const VFIOContainer *bcontainer, hwaddr iova, + ram_addr_t size, void *vaddr, bool readonly, + MemoryRegion *mr) + { +@@ -256,7 +256,7 @@ static int vfio_legacy_dma_map(const VFIOContainerBase *bcontainer, hwaddr iova, + } + + static int +-vfio_legacy_set_dirty_page_tracking(const VFIOContainerBase *bcontainer, ++vfio_legacy_set_dirty_page_tracking(const VFIOContainer *bcontainer, + bool start, Error **errp) + { + const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); +@@ -281,7 +281,7 @@ vfio_legacy_set_dirty_page_tracking(const VFIOContainerBase *bcontainer, + return ret; + } + +-static int vfio_legacy_query_dirty_bitmap(const VFIOContainerBase *bcontainer, ++static int vfio_legacy_query_dirty_bitmap(const VFIOContainer *bcontainer, + VFIOBitmap *vbmap, hwaddr iova, hwaddr size, Error **errp) + { + const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); +@@ -321,7 +321,7 @@ static int vfio_legacy_query_dirty_bitmap(const VFIOContainerBase *bcontainer, + } + + static bool vfio_get_info_iova_range(struct vfio_iommu_type1_info *info, +- VFIOContainerBase *bcontainer) ++ VFIOContainer *bcontainer) + { + struct vfio_info_cap_header *hdr; + struct vfio_iommu_type1_info_cap_iova_range *cap; +@@ -506,7 +506,7 @@ static void vfio_get_iommu_info_migration(VFIOLegacyContainer *container, + { + struct vfio_info_cap_header *hdr; + struct vfio_iommu_type1_info_cap_migration *cap_mig; +- VFIOContainerBase *bcontainer = VFIO_IOMMU(container); ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + + hdr = vfio_get_iommu_info_cap(info, VFIO_IOMMU_TYPE1_INFO_CAP_MIGRATION); + if (!hdr) { +@@ -527,7 +527,7 @@ static void vfio_get_iommu_info_migration(VFIOLegacyContainer *container, + } + } + +-static bool vfio_legacy_setup(VFIOContainerBase *bcontainer, Error **errp) ++static bool vfio_legacy_setup(VFIOContainer *bcontainer, Error **errp) + { + VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + g_autofree struct vfio_iommu_type1_info *info = NULL; +@@ -633,7 +633,7 @@ static bool vfio_container_connect(VFIOGroup *group, AddressSpace *as, + Error **errp) + { + VFIOLegacyContainer *container; +- VFIOContainerBase *bcontainer; ++ VFIOContainer *bcontainer; + int ret, fd = -1; + VFIOAddressSpace *space; + VFIOIOMMUClass *vioc = NULL; +@@ -746,7 +746,7 @@ fail: + static void vfio_container_disconnect(VFIOGroup *group) + { + VFIOLegacyContainer *container = group->container; +- VFIOContainerBase *bcontainer = VFIO_IOMMU(container); ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); + + QLIST_REMOVE(group, container_next); +diff --git a/hw/vfio/cpr-iommufd.c b/hw/vfio/cpr-iommufd.c +index 148a06d552..6aaf6f77a2 100644 +--- a/hw/vfio/cpr-iommufd.c ++++ b/hw/vfio/cpr-iommufd.c +@@ -176,7 +176,7 @@ void vfio_iommufd_cpr_unregister_iommufd(IOMMUFDBackend *be) + bool vfio_iommufd_cpr_register_container(VFIOIOMMUFDContainer *container, + Error **errp) + { +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainer *bcontainer = &container->bcontainer; + + migration_add_notifier_mode(&bcontainer->cpr_reboot_notifier, + vfio_cpr_reboot_notifier, +@@ -189,7 +189,7 @@ bool vfio_iommufd_cpr_register_container(VFIOIOMMUFDContainer *container, + + void vfio_iommufd_cpr_unregister_container(VFIOIOMMUFDContainer *container) + { +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainer *bcontainer = &container->bcontainer; + + migration_remove_notifier(&bcontainer->cpr_reboot_notifier); + } +diff --git a/hw/vfio/cpr-legacy.c b/hw/vfio/cpr-legacy.c +index 12bf920a7d..bd3f6fc3d3 100644 +--- a/hw/vfio/cpr-legacy.c ++++ b/hw/vfio/cpr-legacy.c +@@ -38,7 +38,7 @@ static bool vfio_dma_unmap_vaddr_all(VFIOLegacyContainer *container, + * Set the new @vaddr for any mappings registered during cpr load. + * The incoming state is cleared thereafter. + */ +-static int vfio_legacy_cpr_dma_map(const VFIOContainerBase *bcontainer, ++static int vfio_legacy_cpr_dma_map(const VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, void *vaddr, + bool readonly, MemoryRegion *mr) + { +@@ -100,7 +100,7 @@ static int vfio_container_pre_save(void *opaque) + static int vfio_container_post_load(void *opaque, int version_id) + { + VFIOLegacyContainer *container = opaque; +- VFIOContainerBase *bcontainer = VFIO_IOMMU(container); ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); + dma_map_fn saved_dma_map = vioc->dma_map; + Error *local_err = NULL; +@@ -137,7 +137,7 @@ static int vfio_cpr_fail_notifier(NotifierWithReturn *notifier, + { + VFIOLegacyContainer *container = + container_of(notifier, VFIOLegacyContainer, cpr.transfer_notifier); +- VFIOContainerBase *bcontainer = VFIO_IOMMU(container); ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + + if (e->type != MIG_EVENT_PRECOPY_FAILED) { + return 0; +@@ -170,7 +170,7 @@ static int vfio_cpr_fail_notifier(NotifierWithReturn *notifier, + bool vfio_legacy_cpr_register_container(VFIOLegacyContainer *container, + Error **errp) + { +- VFIOContainerBase *bcontainer = VFIO_IOMMU(container); ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + Error **cpr_blocker = &container->cpr.blocker; + + migration_add_notifier_mode(&bcontainer->cpr_reboot_notifier, +@@ -194,7 +194,7 @@ bool vfio_legacy_cpr_register_container(VFIOLegacyContainer *container, + + void vfio_legacy_cpr_unregister_container(VFIOLegacyContainer *container) + { +- VFIOContainerBase *bcontainer = VFIO_IOMMU(container); ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + + migration_remove_notifier(&bcontainer->cpr_reboot_notifier); + migrate_del_blocker(&container->cpr.blocker); +@@ -210,7 +210,7 @@ void vfio_legacy_cpr_unregister_container(VFIOLegacyContainer *container) + * The giommu already exists. Find it and replay it, which calls + * vfio_legacy_cpr_dma_map further down the stack. + */ +-void vfio_cpr_giommu_remap(VFIOContainerBase *bcontainer, ++void vfio_cpr_giommu_remap(VFIOContainer *bcontainer, + MemoryRegionSection *section) + { + VFIOGuestIOMMU *giommu = NULL; +@@ -235,7 +235,7 @@ void vfio_cpr_giommu_remap(VFIOContainerBase *bcontainer, + * The ram discard listener already exists. Call its populate function + * directly, which calls vfio_legacy_cpr_dma_map. + */ +-bool vfio_cpr_ram_discard_register_listener(VFIOContainerBase *bcontainer, ++bool vfio_cpr_ram_discard_register_listener(VFIOContainer *bcontainer, + MemoryRegionSection *section) + { + VFIORamDiscardListener *vrdl = +diff --git a/hw/vfio/device.c b/hw/vfio/device.c +index 412678a1f6..931a949c08 100644 +--- a/hw/vfio/device.c ++++ b/hw/vfio/device.c +@@ -471,7 +471,7 @@ void vfio_device_detach(VFIODevice *vbasedev) + VFIO_IOMMU_GET_CLASS(vbasedev->bcontainer)->detach_device(vbasedev); + } + +-void vfio_device_prepare(VFIODevice *vbasedev, VFIOContainerBase *bcontainer, ++void vfio_device_prepare(VFIODevice *vbasedev, VFIOContainer *bcontainer, + struct vfio_device_info *info) + { + int i; +diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c +index 65b94aaa00..2ebd87ec8f 100644 +--- a/hw/vfio/iommufd.c ++++ b/hw/vfio/iommufd.c +@@ -34,7 +34,7 @@ + #define TYPE_HOST_IOMMU_DEVICE_IOMMUFD_VFIO \ + TYPE_HOST_IOMMU_DEVICE_IOMMUFD "-vfio" + +-static int iommufd_cdev_map(const VFIOContainerBase *bcontainer, hwaddr iova, ++static int iommufd_cdev_map(const VFIOContainer *bcontainer, hwaddr iova, + ram_addr_t size, void *vaddr, bool readonly, + MemoryRegion *mr) + { +@@ -46,7 +46,7 @@ static int iommufd_cdev_map(const VFIOContainerBase *bcontainer, hwaddr iova, + iova, size, vaddr, readonly); + } + +-static int iommufd_cdev_map_file(const VFIOContainerBase *bcontainer, ++static int iommufd_cdev_map_file(const VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + int fd, unsigned long start, bool readonly) + { +@@ -58,7 +58,7 @@ static int iommufd_cdev_map_file(const VFIOContainerBase *bcontainer, + iova, size, fd, start, readonly); + } + +-static int iommufd_cdev_unmap(const VFIOContainerBase *bcontainer, ++static int iommufd_cdev_unmap(const VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb, bool unmap_all) + { +@@ -159,7 +159,7 @@ static bool iommufd_hwpt_dirty_tracking(VFIOIOASHwpt *hwpt) + return hwpt && hwpt->hwpt_flags & IOMMU_HWPT_ALLOC_DIRTY_TRACKING; + } + +-static int iommufd_set_dirty_page_tracking(const VFIOContainerBase *bcontainer, ++static int iommufd_set_dirty_page_tracking(const VFIOContainer *bcontainer, + bool start, Error **errp) + { + const VFIOIOMMUFDContainer *container = +@@ -190,7 +190,7 @@ err: + return -EINVAL; + } + +-static int iommufd_query_dirty_bitmap(const VFIOContainerBase *bcontainer, ++static int iommufd_query_dirty_bitmap(const VFIOContainer *bcontainer, + VFIOBitmap *vbmap, hwaddr iova, + hwaddr size, Error **errp) + { +@@ -464,7 +464,7 @@ static void iommufd_cdev_detach_container(VFIODevice *vbasedev, + + static void iommufd_cdev_container_destroy(VFIOIOMMUFDContainer *container) + { +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainer *bcontainer = &container->bcontainer; + + if (!QLIST_EMPTY(&bcontainer->device_list)) { + return; +@@ -486,7 +486,7 @@ static int iommufd_cdev_ram_block_discard_disable(bool state) + static bool iommufd_cdev_get_info_iova_range(VFIOIOMMUFDContainer *container, + uint32_t ioas_id, Error **errp) + { +- VFIOContainerBase *bcontainer = &container->bcontainer; ++ VFIOContainer *bcontainer = &container->bcontainer; + g_autofree struct iommu_ioas_iova_ranges *info = NULL; + struct iommu_iova_range *iova_ranges; + int sz, fd = container->be->fd; +@@ -528,7 +528,7 @@ error: + static bool iommufd_cdev_attach(const char *name, VFIODevice *vbasedev, + AddressSpace *as, Error **errp) + { +- VFIOContainerBase *bcontainer; ++ VFIOContainer *bcontainer; + VFIOIOMMUFDContainer *container; + VFIOAddressSpace *space; + struct vfio_device_info dev_info = { .argsz = sizeof(dev_info) }; +@@ -688,7 +688,7 @@ err_connect_bind: + + static void iommufd_cdev_detach(VFIODevice *vbasedev) + { +- VFIOContainerBase *bcontainer = vbasedev->bcontainer; ++ VFIOContainer *bcontainer = vbasedev->bcontainer; + VFIOAddressSpace *space = bcontainer->space; + VFIOIOMMUFDContainer *container = container_of(bcontainer, + VFIOIOMMUFDContainer, +diff --git a/hw/vfio/listener.c b/hw/vfio/listener.c +index e093833165..3b6f17f0c3 100644 +--- a/hw/vfio/listener.c ++++ b/hw/vfio/listener.c +@@ -52,7 +52,7 @@ + */ + + +-static bool vfio_log_sync_needed(const VFIOContainerBase *bcontainer) ++static bool vfio_log_sync_needed(const VFIOContainer *bcontainer) + { + VFIODevice *vbasedev; + +@@ -125,7 +125,7 @@ static MemoryRegion *vfio_translate_iotlb(IOMMUTLBEntry *iotlb, hwaddr *xlat_p, + static void vfio_iommu_map_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb) + { + VFIOGuestIOMMU *giommu = container_of(n, VFIOGuestIOMMU, n); +- VFIOContainerBase *bcontainer = giommu->bcontainer; ++ VFIOContainer *bcontainer = giommu->bcontainer; + hwaddr iova = iotlb->iova + giommu->iommu_offset; + MemoryRegion *mr; + hwaddr xlat; +@@ -202,7 +202,7 @@ static void vfio_ram_discard_notify_discard(RamDiscardListener *rdl, + { + VFIORamDiscardListener *vrdl = container_of(rdl, VFIORamDiscardListener, + listener); +- VFIOContainerBase *bcontainer = vrdl->bcontainer; ++ VFIOContainer *bcontainer = vrdl->bcontainer; + const hwaddr size = int128_get64(section->size); + const hwaddr iova = section->offset_within_address_space; + int ret; +@@ -220,7 +220,7 @@ static int vfio_ram_discard_notify_populate(RamDiscardListener *rdl, + { + VFIORamDiscardListener *vrdl = container_of(rdl, VFIORamDiscardListener, + listener); +- VFIOContainerBase *bcontainer = vrdl->bcontainer; ++ VFIOContainer *bcontainer = vrdl->bcontainer; + const hwaddr end = section->offset_within_region + + int128_get64(section->size); + hwaddr start, next, iova; +@@ -250,7 +250,7 @@ static int vfio_ram_discard_notify_populate(RamDiscardListener *rdl, + return 0; + } + +-static bool vfio_ram_discard_register_listener(VFIOContainerBase *bcontainer, ++static bool vfio_ram_discard_register_listener(VFIOContainer *bcontainer, + MemoryRegionSection *section, + Error **errp) + { +@@ -328,7 +328,7 @@ static bool vfio_ram_discard_register_listener(VFIOContainerBase *bcontainer, + return true; + } + +-static void vfio_ram_discard_unregister_listener(VFIOContainerBase *bcontainer, ++static void vfio_ram_discard_unregister_listener(VFIOContainer *bcontainer, + MemoryRegionSection *section) + { + RamDiscardManager *rdm = memory_region_get_ram_discard_manager(section->mr); +@@ -396,7 +396,7 @@ static bool vfio_listener_valid_section(MemoryRegionSection *section, + return true; + } + +-static bool vfio_get_section_iova_range(VFIOContainerBase *bcontainer, ++static bool vfio_get_section_iova_range(VFIOContainer *bcontainer, + MemoryRegionSection *section, + hwaddr *out_iova, hwaddr *out_end, + Int128 *out_llend) +@@ -423,9 +423,9 @@ static bool vfio_get_section_iova_range(VFIOContainerBase *bcontainer, + + static void vfio_listener_begin(MemoryListener *listener) + { +- VFIOContainerBase *bcontainer = container_of(listener, VFIOContainerBase, +- listener); +- void (*listener_begin)(VFIOContainerBase *bcontainer); ++ VFIOContainer *bcontainer = container_of(listener, VFIOContainer, ++ listener); ++ void (*listener_begin)(VFIOContainer *bcontainer); + + listener_begin = VFIO_IOMMU_GET_CLASS(bcontainer)->listener_begin; + +@@ -436,9 +436,9 @@ static void vfio_listener_begin(MemoryListener *listener) + + static void vfio_listener_commit(MemoryListener *listener) + { +- VFIOContainerBase *bcontainer = container_of(listener, VFIOContainerBase, +- listener); +- void (*listener_commit)(VFIOContainerBase *bcontainer); ++ VFIOContainer *bcontainer = container_of(listener, VFIOContainer, ++ listener); ++ void (*listener_commit)(VFIOContainer *bcontainer); + + listener_commit = VFIO_IOMMU_GET_CLASS(bcontainer)->listener_commit; + +@@ -460,7 +460,7 @@ static void vfio_device_error_append(VFIODevice *vbasedev, Error **errp) + } + + VFIORamDiscardListener *vfio_find_ram_discard_listener( +- VFIOContainerBase *bcontainer, MemoryRegionSection *section) ++ VFIOContainer *bcontainer, MemoryRegionSection *section) + { + VFIORamDiscardListener *vrdl = NULL; + +@@ -482,12 +482,12 @@ VFIORamDiscardListener *vfio_find_ram_discard_listener( + static void vfio_listener_region_add(MemoryListener *listener, + MemoryRegionSection *section) + { +- VFIOContainerBase *bcontainer = container_of(listener, VFIOContainerBase, +- listener); ++ VFIOContainer *bcontainer = container_of(listener, VFIOContainer, ++ listener); + vfio_container_region_add(bcontainer, section, false); + } + +-void vfio_container_region_add(VFIOContainerBase *bcontainer, ++void vfio_container_region_add(VFIOContainer *bcontainer, + MemoryRegionSection *section, + bool cpr_remap) + { +@@ -656,8 +656,8 @@ fail: + static void vfio_listener_region_del(MemoryListener *listener, + MemoryRegionSection *section) + { +- VFIOContainerBase *bcontainer = container_of(listener, VFIOContainerBase, +- listener); ++ VFIOContainer *bcontainer = container_of(listener, VFIOContainer, ++ listener); + hwaddr iova, end; + Int128 llend, llsize; + int ret; +@@ -744,13 +744,13 @@ typedef struct VFIODirtyRanges { + } VFIODirtyRanges; + + typedef struct VFIODirtyRangesListener { +- VFIOContainerBase *bcontainer; ++ VFIOContainer *bcontainer; + VFIODirtyRanges ranges; + MemoryListener listener; + } VFIODirtyRangesListener; + + static bool vfio_section_is_vfio_pci(MemoryRegionSection *section, +- VFIOContainerBase *bcontainer) ++ VFIOContainer *bcontainer) + { + VFIOPCIDevice *pcidev; + VFIODevice *vbasedev; +@@ -835,7 +835,7 @@ static const MemoryListener vfio_dirty_tracking_listener = { + .region_add = vfio_dirty_tracking_update, + }; + +-static void vfio_dirty_tracking_init(VFIOContainerBase *bcontainer, ++static void vfio_dirty_tracking_init(VFIOContainer *bcontainer, + VFIODirtyRanges *ranges) + { + VFIODirtyRangesListener dirty; +@@ -860,7 +860,7 @@ static void vfio_dirty_tracking_init(VFIOContainerBase *bcontainer, + memory_listener_unregister(&dirty.listener); + } + +-static void vfio_devices_dma_logging_stop(VFIOContainerBase *bcontainer) ++static void vfio_devices_dma_logging_stop(VFIOContainer *bcontainer) + { + uint64_t buf[DIV_ROUND_UP(sizeof(struct vfio_device_feature), + sizeof(uint64_t))] = {}; +@@ -889,7 +889,7 @@ static void vfio_devices_dma_logging_stop(VFIOContainerBase *bcontainer) + } + + static struct vfio_device_feature * +-vfio_device_feature_dma_logging_start_create(VFIOContainerBase *bcontainer, ++vfio_device_feature_dma_logging_start_create(VFIOContainer *bcontainer, + VFIODirtyRanges *tracking) + { + struct vfio_device_feature *feature; +@@ -962,7 +962,7 @@ static void vfio_device_feature_dma_logging_start_destroy( + g_free(feature); + } + +-static bool vfio_devices_dma_logging_start(VFIOContainerBase *bcontainer, ++static bool vfio_devices_dma_logging_start(VFIOContainer *bcontainer, + Error **errp) + { + struct vfio_device_feature *feature; +@@ -1006,8 +1006,8 @@ static bool vfio_listener_log_global_start(MemoryListener *listener, + Error **errp) + { + ERRP_GUARD(); +- VFIOContainerBase *bcontainer = container_of(listener, VFIOContainerBase, +- listener); ++ VFIOContainer *bcontainer = container_of(listener, VFIOContainer, ++ listener); + bool ret; + + if (vfio_container_devices_dirty_tracking_is_supported(bcontainer)) { +@@ -1024,8 +1024,8 @@ static bool vfio_listener_log_global_start(MemoryListener *listener, + + static void vfio_listener_log_global_stop(MemoryListener *listener) + { +- VFIOContainerBase *bcontainer = container_of(listener, VFIOContainerBase, +- listener); ++ VFIOContainer *bcontainer = container_of(listener, VFIOContainer, ++ listener); + Error *local_err = NULL; + int ret = 0; + +@@ -1057,7 +1057,7 @@ static void vfio_iommu_map_dirty_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb) + vfio_giommu_dirty_notifier *gdn = container_of(n, + vfio_giommu_dirty_notifier, n); + VFIOGuestIOMMU *giommu = gdn->giommu; +- VFIOContainerBase *bcontainer = giommu->bcontainer; ++ VFIOContainer *bcontainer = giommu->bcontainer; + hwaddr iova = iotlb->iova + giommu->iommu_offset; + ram_addr_t translated_addr; + Error *local_err = NULL; +@@ -1127,7 +1127,7 @@ static int vfio_ram_discard_query_dirty_bitmap(MemoryRegionSection *section, + } + + static int +-vfio_sync_ram_discard_listener_dirty_bitmap(VFIOContainerBase *bcontainer, ++vfio_sync_ram_discard_listener_dirty_bitmap(VFIOContainer *bcontainer, + MemoryRegionSection *section) + { + RamDiscardManager *rdm = memory_region_get_ram_discard_manager(section->mr); +@@ -1143,7 +1143,7 @@ vfio_sync_ram_discard_listener_dirty_bitmap(VFIOContainerBase *bcontainer, + &vrdl); + } + +-static int vfio_sync_iommu_dirty_bitmap(VFIOContainerBase *bcontainer, ++static int vfio_sync_iommu_dirty_bitmap(VFIOContainer *bcontainer, + MemoryRegionSection *section) + { + VFIOGuestIOMMU *giommu; +@@ -1180,7 +1180,7 @@ static int vfio_sync_iommu_dirty_bitmap(VFIOContainerBase *bcontainer, + return 0; + } + +-static int vfio_sync_dirty_bitmap(VFIOContainerBase *bcontainer, ++static int vfio_sync_dirty_bitmap(VFIOContainer *bcontainer, + MemoryRegionSection *section, Error **errp) + { + ram_addr_t ram_addr; +@@ -1209,8 +1209,8 @@ static int vfio_sync_dirty_bitmap(VFIOContainerBase *bcontainer, + static void vfio_listener_log_sync(MemoryListener *listener, + MemoryRegionSection *section) + { +- VFIOContainerBase *bcontainer = container_of(listener, VFIOContainerBase, +- listener); ++ VFIOContainer *bcontainer = container_of(listener, VFIOContainer, ++ listener); + int ret; + Error *local_err = NULL; + +@@ -1241,7 +1241,7 @@ static const MemoryListener vfio_memory_listener = { + .log_sync = vfio_listener_log_sync, + }; + +-bool vfio_listener_register(VFIOContainerBase *bcontainer, Error **errp) ++bool vfio_listener_register(VFIOContainer *bcontainer, Error **errp) + { + bcontainer->listener = vfio_memory_listener; + memory_listener_register(&bcontainer->listener, bcontainer->space->as); +@@ -1255,7 +1255,7 @@ bool vfio_listener_register(VFIOContainerBase *bcontainer, Error **errp) + return true; + } + +-void vfio_listener_unregister(VFIOContainerBase *bcontainer) ++void vfio_listener_unregister(VFIOContainer *bcontainer) + { + memory_listener_unregister(&bcontainer->listener); + } +diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c +index b8bade90d7..6d462aa13c 100644 +--- a/hw/vfio/spapr.c ++++ b/hw/vfio/spapr.c +@@ -62,7 +62,7 @@ static void vfio_prereg_listener_region_add(MemoryListener *listener, + VFIOSpaprContainer *scontainer = container_of(listener, VFIOSpaprContainer, + prereg_listener); + VFIOLegacyContainer *container = &scontainer->container; +- VFIOContainerBase *bcontainer = VFIO_IOMMU(container); ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + const hwaddr gpa = section->offset_within_address_space; + hwaddr end; + int ret; +@@ -244,7 +244,7 @@ static bool vfio_spapr_create_window(VFIOLegacyContainer *container, + hwaddr *pgsize, Error **errp) + { + int ret = 0; +- VFIOContainerBase *bcontainer = VFIO_IOMMU(container); ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, + container); + IOMMUMemoryRegion *iommu_mr = IOMMU_MEMORY_REGION(section->mr); +@@ -348,7 +348,7 @@ static bool vfio_spapr_create_window(VFIOLegacyContainer *container, + } + + static bool +-vfio_spapr_container_add_section_window(VFIOContainerBase *bcontainer, ++vfio_spapr_container_add_section_window(VFIOContainer *bcontainer, + MemoryRegionSection *section, + Error **errp) + { +@@ -439,7 +439,7 @@ vfio_spapr_container_add_section_window(VFIOContainerBase *bcontainer, + } + + static void +-vfio_spapr_container_del_section_window(VFIOContainerBase *bcontainer, ++vfio_spapr_container_del_section_window(VFIOContainer *bcontainer, + MemoryRegionSection *section) + { + VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); +@@ -461,7 +461,7 @@ vfio_spapr_container_del_section_window(VFIOContainerBase *bcontainer, + } + } + +-static void vfio_spapr_container_release(VFIOContainerBase *bcontainer) ++static void vfio_spapr_container_release(VFIOContainer *bcontainer) + { + VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); + VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, +@@ -478,7 +478,7 @@ static void vfio_spapr_container_release(VFIOContainerBase *bcontainer) + } + } + +-static bool vfio_spapr_container_setup(VFIOContainerBase *bcontainer, ++static bool vfio_spapr_container_setup(VFIOContainer *bcontainer, + Error **errp) + { + VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); +diff --git a/hw/vfio/vfio-iommufd.h b/hw/vfio/vfio-iommufd.h +index 07ea0f4304..6c049d9257 100644 +--- a/hw/vfio/vfio-iommufd.h ++++ b/hw/vfio/vfio-iommufd.h +@@ -23,7 +23,7 @@ typedef struct VFIOIOASHwpt { + typedef struct IOMMUFDBackend IOMMUFDBackend; + + typedef struct VFIOIOMMUFDContainer { +- VFIOContainerBase bcontainer; ++ VFIOContainer bcontainer; + IOMMUFDBackend *be; + uint32_t ioas_id; + QLIST_HEAD(, VFIOIOASHwpt) hwpt_list; +diff --git a/hw/vfio/vfio-listener.h b/hw/vfio/vfio-listener.h +index eb69ddd374..a90674ca96 100644 +--- a/hw/vfio/vfio-listener.h ++++ b/hw/vfio/vfio-listener.h +@@ -9,7 +9,7 @@ + #ifndef HW_VFIO_VFIO_LISTENER_H + #define HW_VFIO_VFIO_LISTENER_H + +-bool vfio_listener_register(VFIOContainerBase *bcontainer, Error **errp); +-void vfio_listener_unregister(VFIOContainerBase *bcontainer); ++bool vfio_listener_register(VFIOContainer *bcontainer, Error **errp); ++void vfio_listener_unregister(VFIOContainer *bcontainer); + + #endif /* HW_VFIO_VFIO_LISTENER_H */ +diff --git a/include/hw/vfio/vfio-container-base.h b/include/hw/vfio/vfio-container-base.h +index acbd48a18a..b580f4a02d 100644 +--- a/include/hw/vfio/vfio-container-base.h ++++ b/include/hw/vfio/vfio-container-base.h +@@ -26,14 +26,14 @@ typedef struct { + + typedef struct VFIOAddressSpace { + AddressSpace *as; +- QLIST_HEAD(, VFIOContainerBase) containers; ++ QLIST_HEAD(, VFIOContainer) containers; + QLIST_ENTRY(VFIOAddressSpace) list; + } VFIOAddressSpace; + + /* + * This is the base object for vfio container backends + */ +-struct VFIOContainerBase { ++struct VFIOContainer { + Object parent_obj; + + VFIOAddressSpace *space; +@@ -48,17 +48,17 @@ struct VFIOContainerBase { + bool dirty_pages_started; /* Protected by BQL */ + QLIST_HEAD(, VFIOGuestIOMMU) giommu_list; + QLIST_HEAD(, VFIORamDiscardListener) vrdl_list; +- QLIST_ENTRY(VFIOContainerBase) next; ++ QLIST_ENTRY(VFIOContainer) next; + QLIST_HEAD(, VFIODevice) device_list; + GList *iova_ranges; + NotifierWithReturn cpr_reboot_notifier; + }; + + #define TYPE_VFIO_IOMMU "vfio-iommu" +-OBJECT_DECLARE_TYPE(VFIOContainerBase, VFIOIOMMUClass, VFIO_IOMMU) ++OBJECT_DECLARE_TYPE(VFIOContainer, VFIOIOMMUClass, VFIO_IOMMU) + + typedef struct VFIOGuestIOMMU { +- VFIOContainerBase *bcontainer; ++ VFIOContainer *bcontainer; + IOMMUMemoryRegion *iommu_mr; + hwaddr iommu_offset; + IOMMUNotifier n; +@@ -66,7 +66,7 @@ typedef struct VFIOGuestIOMMU { + } VFIOGuestIOMMU; + + typedef struct VFIORamDiscardListener { +- VFIOContainerBase *bcontainer; ++ VFIOContainer *bcontainer; + MemoryRegion *mr; + hwaddr offset_within_address_space; + hwaddr size; +@@ -78,32 +78,32 @@ typedef struct VFIORamDiscardListener { + VFIOAddressSpace *vfio_address_space_get(AddressSpace *as); + void vfio_address_space_put(VFIOAddressSpace *space); + void vfio_address_space_insert(VFIOAddressSpace *space, +- VFIOContainerBase *bcontainer); ++ VFIOContainer *bcontainer); + +-int vfio_container_dma_map(VFIOContainerBase *bcontainer, ++int vfio_container_dma_map(VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + void *vaddr, bool readonly, MemoryRegion *mr); +-int vfio_container_dma_unmap(VFIOContainerBase *bcontainer, ++int vfio_container_dma_unmap(VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb, bool unmap_all); +-bool vfio_container_add_section_window(VFIOContainerBase *bcontainer, ++bool vfio_container_add_section_window(VFIOContainer *bcontainer, + MemoryRegionSection *section, + Error **errp); +-void vfio_container_del_section_window(VFIOContainerBase *bcontainer, ++void vfio_container_del_section_window(VFIOContainer *bcontainer, + MemoryRegionSection *section); +-int vfio_container_set_dirty_page_tracking(VFIOContainerBase *bcontainer, ++int vfio_container_set_dirty_page_tracking(VFIOContainer *bcontainer, + bool start, Error **errp); + bool vfio_container_dirty_tracking_is_started( +- const VFIOContainerBase *bcontainer); ++ const VFIOContainer *bcontainer); + bool vfio_container_devices_dirty_tracking_is_supported( +- const VFIOContainerBase *bcontainer); +-int vfio_container_query_dirty_bitmap(const VFIOContainerBase *bcontainer, ++ const VFIOContainer *bcontainer); ++int vfio_container_query_dirty_bitmap(const VFIOContainer *bcontainer, + uint64_t iova, uint64_t size, ram_addr_t ram_addr, Error **errp); + +-GList *vfio_container_get_iova_ranges(const VFIOContainerBase *bcontainer); ++GList *vfio_container_get_iova_ranges(const VFIOContainer *bcontainer); + + static inline uint64_t +-vfio_container_get_page_size_mask(const VFIOContainerBase *bcontainer) ++vfio_container_get_page_size_mask(const VFIOContainer *bcontainer) + { + assert(bcontainer); + return bcontainer->pgsizes; +@@ -123,12 +123,12 @@ struct VFIOIOMMUClass { + * Perform basic setup of the container, including configuring IOMMU + * capabilities, IOVA ranges, supported page sizes, etc. + * +- * @bcontainer: #VFIOContainerBase ++ * @bcontainer: #VFIOContainer + * @errp: pointer to Error*, to store an error if it happens. + * + * Returns true to indicate success and false for error. + */ +- bool (*setup)(VFIOContainerBase *bcontainer, Error **errp); ++ bool (*setup)(VFIOContainer *bcontainer, Error **errp); + + /** + * @listener_begin +@@ -136,9 +136,9 @@ struct VFIOIOMMUClass { + * Called at the beginning of an address space update transaction. + * See #MemoryListener. + * +- * @bcontainer: #VFIOContainerBase ++ * @bcontainer: #VFIOContainer + */ +- void (*listener_begin)(VFIOContainerBase *bcontainer); ++ void (*listener_begin)(VFIOContainer *bcontainer); + + /** + * @listener_commit +@@ -146,9 +146,9 @@ struct VFIOIOMMUClass { + * Called at the end of an address space update transaction, + * See #MemoryListener. + * +- * @bcontainer: #VFIOContainerBase ++ * @bcontainer: #VFIOContainer + */ +- void (*listener_commit)(VFIOContainerBase *bcontainer); ++ void (*listener_commit)(VFIOContainer *bcontainer); + + /** + * @dma_map +@@ -156,7 +156,7 @@ struct VFIOIOMMUClass { + * Map an address range into the container. Note that the memory region is + * referenced within an RCU read lock region across this call. + * +- * @bcontainer: #VFIOContainerBase to use ++ * @bcontainer: #VFIOContainer to use + * @iova: start address to map + * @size: size of the range to map + * @vaddr: process virtual address of mapping +@@ -165,7 +165,7 @@ struct VFIOIOMMUClass { + * + * Returns 0 to indicate success and -errno otherwise. + */ +- int (*dma_map)(const VFIOContainerBase *bcontainer, ++ int (*dma_map)(const VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + void *vaddr, bool readonly, MemoryRegion *mr); + /** +@@ -173,14 +173,14 @@ struct VFIOIOMMUClass { + * + * Map a file range for the container. + * +- * @bcontainer: #VFIOContainerBase to use for map ++ * @bcontainer: #VFIOContainer to use for map + * @iova: start address to map + * @size: size of the range to map + * @fd: descriptor of the file to map + * @start: starting file offset of the range to map + * @readonly: map read only if true + */ +- int (*dma_map_file)(const VFIOContainerBase *bcontainer, ++ int (*dma_map_file)(const VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + int fd, unsigned long start, bool readonly); + /** +@@ -188,7 +188,7 @@ struct VFIOIOMMUClass { + * + * Unmap an address range from the container. + * +- * @bcontainer: #VFIOContainerBase to use for unmap ++ * @bcontainer: #VFIOContainer to use for unmap + * @iova: start address to unmap + * @size: size of the range to unmap + * @iotlb: The IOMMU TLB mapping entry (or NULL) +@@ -196,7 +196,7 @@ struct VFIOIOMMUClass { + * + * Returns 0 to indicate success and -errno otherwise. + */ +- int (*dma_unmap)(const VFIOContainerBase *bcontainer, ++ int (*dma_unmap)(const VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb, bool unmap_all); + +@@ -234,21 +234,21 @@ struct VFIOIOMMUClass { + * + * Start or stop dirty pages tracking on VFIO container + * +- * @bcontainer: #VFIOContainerBase on which to de/activate dirty ++ * @bcontainer: #VFIOContainer on which to de/activate dirty + * page tracking + * @start: indicates whether to start or stop dirty pages tracking + * @errp: pointer to Error*, to store an error if it happens. + * + * Returns zero to indicate success and negative for error. + */ +- int (*set_dirty_page_tracking)(const VFIOContainerBase *bcontainer, ++ int (*set_dirty_page_tracking)(const VFIOContainer *bcontainer, + bool start, Error **errp); + /** + * @query_dirty_bitmap + * + * Get bitmap of dirty pages from container + * +- * @bcontainer: #VFIOContainerBase from which to get dirty pages ++ * @bcontainer: #VFIOContainer from which to get dirty pages + * @vbmap: #VFIOBitmap internal bitmap structure + * @iova: iova base address + * @size: size of iova range +@@ -256,24 +256,24 @@ struct VFIOIOMMUClass { + * + * Returns zero to indicate success and negative for error. + */ +- int (*query_dirty_bitmap)(const VFIOContainerBase *bcontainer, ++ int (*query_dirty_bitmap)(const VFIOContainer *bcontainer, + VFIOBitmap *vbmap, hwaddr iova, hwaddr size, Error **errp); + /* PCI specific */ + int (*pci_hot_reset)(VFIODevice *vbasedev, bool single); + + /* SPAPR specific */ +- bool (*add_window)(VFIOContainerBase *bcontainer, ++ bool (*add_window)(VFIOContainer *bcontainer, + MemoryRegionSection *section, + Error **errp); +- void (*del_window)(VFIOContainerBase *bcontainer, ++ void (*del_window)(VFIOContainer *bcontainer, + MemoryRegionSection *section); +- void (*release)(VFIOContainerBase *bcontainer); ++ void (*release)(VFIOContainer *bcontainer); + }; + + VFIORamDiscardListener *vfio_find_ram_discard_listener( +- VFIOContainerBase *bcontainer, MemoryRegionSection *section); ++ VFIOContainer *bcontainer, MemoryRegionSection *section); + +-void vfio_container_region_add(VFIOContainerBase *bcontainer, ++void vfio_container_region_add(VFIOContainer *bcontainer, + MemoryRegionSection *section, bool cpr_remap); + + #endif /* HW_VFIO_VFIO_CONTAINER_BASE_H */ +diff --git a/include/hw/vfio/vfio-container.h b/include/hw/vfio/vfio-container.h +index 712a691400..a84dfb0dee 100644 +--- a/include/hw/vfio/vfio-container.h ++++ b/include/hw/vfio/vfio-container.h +@@ -26,7 +26,7 @@ typedef struct VFIOGroup { + } VFIOGroup; + + struct VFIOLegacyContainer { +- VFIOContainerBase parent_obj; ++ VFIOContainer parent_obj; + + int fd; /* /dev/vfio/vfio, empowered by the attached groups */ + unsigned iommu_type; +diff --git a/include/hw/vfio/vfio-cpr.h b/include/hw/vfio/vfio-cpr.h +index 04e9872587..26ee0c4fe1 100644 +--- a/include/hw/vfio/vfio-cpr.h ++++ b/include/hw/vfio/vfio-cpr.h +@@ -13,14 +13,14 @@ + #include "system/memory.h" + + struct VFIOLegacyContainer; +-struct VFIOContainerBase; ++struct VFIOContainer; + struct VFIOGroup; + struct VFIODevice; + struct VFIOPCIDevice; + struct VFIOIOMMUFDContainer; + struct IOMMUFDBackend; + +-typedef int (*dma_map_fn)(const struct VFIOContainerBase *bcontainer, ++typedef int (*dma_map_fn)(const struct VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, void *vaddr, + bool readonly, MemoryRegion *mr); + +@@ -65,11 +65,11 @@ int vfio_cpr_group_get_device_fd(int d, const char *name); + bool vfio_cpr_container_match(struct VFIOLegacyContainer *container, + struct VFIOGroup *group, int fd); + +-void vfio_cpr_giommu_remap(struct VFIOContainerBase *bcontainer, ++void vfio_cpr_giommu_remap(struct VFIOContainer *bcontainer, + MemoryRegionSection *section); + + bool vfio_cpr_ram_discard_register_listener( +- struct VFIOContainerBase *bcontainer, MemoryRegionSection *section); ++ struct VFIOContainer *bcontainer, MemoryRegionSection *section); + + void vfio_cpr_save_vector_fd(struct VFIOPCIDevice *vdev, const char *name, + int nr, int fd); +diff --git a/include/hw/vfio/vfio-device.h b/include/hw/vfio/vfio-device.h +index 2bc16a1a2e..d20186327f 100644 +--- a/include/hw/vfio/vfio-device.h ++++ b/include/hw/vfio/vfio-device.h +@@ -54,7 +54,7 @@ typedef struct VFIODevice { + QLIST_ENTRY(VFIODevice) container_next; + QLIST_ENTRY(VFIODevice) global_next; + struct VFIOGroup *group; +- VFIOContainerBase *bcontainer; ++ VFIOContainer *bcontainer; + char *sysfsdev; + char *name; + DeviceState *dev; +@@ -253,7 +253,7 @@ struct VFIODeviceIOOps { + void *data, bool post); + }; + +-void vfio_device_prepare(VFIODevice *vbasedev, VFIOContainerBase *bcontainer, ++void vfio_device_prepare(VFIODevice *vbasedev, VFIOContainer *bcontainer, + struct vfio_device_info *info); + + void vfio_device_unprepare(VFIODevice *vbasedev); diff --git a/0154-include-hw-vfio-vfio-container.h-rename-file-to-vfio.patch b/0154-include-hw-vfio-vfio-container.h-rename-file-to-vfio.patch new file mode 100644 index 0000000..50bec4a --- /dev/null +++ b/0154-include-hw-vfio-vfio-container.h-rename-file-to-vfio.patch @@ -0,0 +1,125 @@ +From a6329b0aaab90956deb4a534b720d30ea0e7a439 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:11 +0100 +Subject: [PATCH] include/hw/vfio/vfio-container.h: rename file to + vfio-container-legacy.h +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] f1af575f03 (clegoate/qemu-kvm-centos) + +With the rename of VFIOContainer to VFIOLegacyContainer, the vfio-container.h +header file containing the struct definition is misleading. Rename it from +vfio-container.h to vfio-container-legacy.h accordingly, fixing up the name +of the include guard at the same time. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-4-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 07cbbfb108586a03059975aa0e093b833cb9bf56) +Signed-off-by: Eric Auger +--- + hw/ppc/spapr_pci_vfio.c | 2 +- + hw/s390x/s390-pci-vfio.c | 2 +- + hw/vfio/container.c | 2 +- + hw/vfio/cpr-legacy.c | 2 +- + hw/vfio/spapr.c | 2 +- + .../hw/vfio/{vfio-container.h => vfio-container-legacy.h} | 6 +++--- + 6 files changed, 8 insertions(+), 8 deletions(-) + rename include/hw/vfio/{vfio-container.h => vfio-container-legacy.h} (88%) + +diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c +index 48fa98c199..18c5059262 100644 +--- a/hw/ppc/spapr_pci_vfio.c ++++ b/hw/ppc/spapr_pci_vfio.c +@@ -24,7 +24,7 @@ + #include "hw/pci-host/spapr.h" + #include "hw/pci/msix.h" + #include "hw/pci/pci_device.h" +-#include "hw/vfio/vfio-container.h" ++#include "hw/vfio/vfio-container-legacy.h" + #include "qemu/error-report.h" + #include CONFIG_DEVICES /* CONFIG_VFIO_PCI */ + +diff --git a/hw/s390x/s390-pci-vfio.c b/hw/s390x/s390-pci-vfio.c +index aaf91319b4..c51bcea5fc 100644 +--- a/hw/s390x/s390-pci-vfio.c ++++ b/hw/s390x/s390-pci-vfio.c +@@ -20,7 +20,7 @@ + #include "hw/s390x/s390-pci-clp.h" + #include "hw/s390x/s390-pci-vfio.h" + #include "hw/vfio/pci.h" +-#include "hw/vfio/vfio-container.h" ++#include "hw/vfio/vfio-container-legacy.h" + #include "hw/vfio/vfio-helpers.h" + + /* +diff --git a/hw/vfio/container.c b/hw/vfio/container.c +index 84f5a5fdee..0101a72f53 100644 +--- a/hw/vfio/container.c ++++ b/hw/vfio/container.c +@@ -34,7 +34,7 @@ + #include "migration/cpr.h" + #include "migration/blocker.h" + #include "pci.h" +-#include "hw/vfio/vfio-container.h" ++#include "hw/vfio/vfio-container-legacy.h" + #include "vfio-helpers.h" + #include "vfio-listener.h" + +diff --git a/hw/vfio/cpr-legacy.c b/hw/vfio/cpr-legacy.c +index bd3f6fc3d3..bbf7a0d35f 100644 +--- a/hw/vfio/cpr-legacy.c ++++ b/hw/vfio/cpr-legacy.c +@@ -7,7 +7,7 @@ + #include + #include + #include "qemu/osdep.h" +-#include "hw/vfio/vfio-container.h" ++#include "hw/vfio/vfio-container-legacy.h" + #include "hw/vfio/vfio-device.h" + #include "hw/vfio/vfio-listener.h" + #include "migration/blocker.h" +diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c +index 6d462aa13c..acaa9c1419 100644 +--- a/hw/vfio/spapr.c ++++ b/hw/vfio/spapr.c +@@ -15,7 +15,7 @@ + #include "system/hostmem.h" + #include "system/address-spaces.h" + +-#include "hw/vfio/vfio-container.h" ++#include "hw/vfio/vfio-container-legacy.h" + #include "hw/hw.h" + #include "system/ram_addr.h" + #include "qemu/error-report.h" +diff --git a/include/hw/vfio/vfio-container.h b/include/hw/vfio/vfio-container-legacy.h +similarity index 88% +rename from include/hw/vfio/vfio-container.h +rename to include/hw/vfio/vfio-container-legacy.h +index a84dfb0dee..ab5130d26e 100644 +--- a/include/hw/vfio/vfio-container.h ++++ b/include/hw/vfio/vfio-container-legacy.h +@@ -6,8 +6,8 @@ + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +-#ifndef HW_VFIO_CONTAINER_H +-#define HW_VFIO_CONTAINER_H ++#ifndef HW_VFIO_CONTAINER_LEGACY_H ++#define HW_VFIO_CONTAINER_LEGACY_H + + #include "hw/vfio/vfio-container-base.h" + #include "hw/vfio/vfio-cpr.h" +@@ -36,4 +36,4 @@ struct VFIOLegacyContainer { + + OBJECT_DECLARE_SIMPLE_TYPE(VFIOLegacyContainer, VFIO_IOMMU_LEGACY); + +-#endif /* HW_VFIO_CONTAINER_H */ ++#endif /* HW_VFIO_CONTAINER_LEGACY_H */ diff --git a/0155-include-hw-vfio-vfio-container-base.h-rename-file-to.patch b/0155-include-hw-vfio-vfio-container-base.h-rename-file-to.patch new file mode 100644 index 0000000..fe56681 --- /dev/null +++ b/0155-include-hw-vfio-vfio-container-base.h-rename-file-to.patch @@ -0,0 +1,125 @@ +From ef62dc6f80f59b0a12c02e5ceacc71ad22240165 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:12 +0100 +Subject: [PATCH] include/hw/vfio/vfio-container-base.h: rename file to + vfio-container.h +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] d6e7e9357d (clegoate/qemu-kvm-centos) + +With the rename of VFIOContainerBase to VFIOContainer, the vfio-container-base.h +header file containing the struct definition is misleading. Rename it from +vfio-container-base.h to vfio-container.h accordingly, fixing up the name +of the include guard at the same time. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-5-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit ef70eb32b8a15abea6af8180ba03e771ae041169) +Signed-off-by: Eric Auger +--- + hw/vfio-user/container.h | 2 +- + hw/vfio/container-base.c | 2 +- + hw/vfio/vfio-iommufd.h | 2 +- + include/hw/vfio/vfio-container-legacy.h | 2 +- + include/hw/vfio/{vfio-container-base.h => vfio-container.h} | 6 +++--- + include/hw/vfio/vfio-device.h | 2 +- + 6 files changed, 8 insertions(+), 8 deletions(-) + rename include/hw/vfio/{vfio-container-base.h => vfio-container.h} (98%) + +diff --git a/hw/vfio-user/container.h b/hw/vfio-user/container.h +index 241863ef97..a2b42e3169 100644 +--- a/hw/vfio-user/container.h ++++ b/hw/vfio-user/container.h +@@ -9,7 +9,7 @@ + + #include "qemu/osdep.h" + +-#include "hw/vfio/vfio-container-base.h" ++#include "hw/vfio/vfio-container.h" + #include "hw/vfio-user/proxy.h" + + /* MMU container sub-class for vfio-user. */ +diff --git a/hw/vfio/container-base.c b/hw/vfio/container-base.c +index 98c5198e50..250b20f424 100644 +--- a/hw/vfio/container-base.c ++++ b/hw/vfio/container-base.c +@@ -18,7 +18,7 @@ + #include "system/ram_addr.h" + #include "qapi/error.h" + #include "qemu/error-report.h" +-#include "hw/vfio/vfio-container-base.h" ++#include "hw/vfio/vfio-container.h" + #include "hw/vfio/vfio-device.h" /* vfio_device_reset_handler */ + #include "system/reset.h" + #include "vfio-helpers.h" +diff --git a/hw/vfio/vfio-iommufd.h b/hw/vfio/vfio-iommufd.h +index 6c049d9257..13f412aad7 100644 +--- a/hw/vfio/vfio-iommufd.h ++++ b/hw/vfio/vfio-iommufd.h +@@ -9,7 +9,7 @@ + #ifndef HW_VFIO_VFIO_IOMMUFD_H + #define HW_VFIO_VFIO_IOMMUFD_H + +-#include "hw/vfio/vfio-container-base.h" ++#include "hw/vfio/vfio-container.h" + + typedef struct VFIODevice VFIODevice; + +diff --git a/include/hw/vfio/vfio-container-legacy.h b/include/hw/vfio/vfio-container-legacy.h +index ab5130d26e..74a72df018 100644 +--- a/include/hw/vfio/vfio-container-legacy.h ++++ b/include/hw/vfio/vfio-container-legacy.h +@@ -9,7 +9,7 @@ + #ifndef HW_VFIO_CONTAINER_LEGACY_H + #define HW_VFIO_CONTAINER_LEGACY_H + +-#include "hw/vfio/vfio-container-base.h" ++#include "hw/vfio/vfio-container.h" + #include "hw/vfio/vfio-cpr.h" + + typedef struct VFIOLegacyContainer VFIOLegacyContainer; +diff --git a/include/hw/vfio/vfio-container-base.h b/include/hw/vfio/vfio-container.h +similarity index 98% +rename from include/hw/vfio/vfio-container-base.h +rename to include/hw/vfio/vfio-container.h +index b580f4a02d..b8fb2b8b5d 100644 +--- a/include/hw/vfio/vfio-container-base.h ++++ b/include/hw/vfio/vfio-container.h +@@ -10,8 +10,8 @@ + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +-#ifndef HW_VFIO_VFIO_CONTAINER_BASE_H +-#define HW_VFIO_VFIO_CONTAINER_BASE_H ++#ifndef HW_VFIO_VFIO_CONTAINER_H ++#define HW_VFIO_VFIO_CONTAINER_H + + #include "system/memory.h" + +@@ -276,4 +276,4 @@ VFIORamDiscardListener *vfio_find_ram_discard_listener( + void vfio_container_region_add(VFIOContainer *bcontainer, + MemoryRegionSection *section, bool cpr_remap); + +-#endif /* HW_VFIO_VFIO_CONTAINER_BASE_H */ ++#endif /* HW_VFIO_VFIO_CONTAINER_H */ +diff --git a/include/hw/vfio/vfio-device.h b/include/hw/vfio/vfio-device.h +index d20186327f..28047a6339 100644 +--- a/include/hw/vfio/vfio-device.h ++++ b/include/hw/vfio/vfio-device.h +@@ -27,7 +27,7 @@ + #include + #endif + #include "system/system.h" +-#include "hw/vfio/vfio-container-base.h" ++#include "hw/vfio/vfio-container.h" + #include "hw/vfio/vfio-cpr.h" + #include "system/host_iommu_device.h" + #include "system/iommufd.h" diff --git a/0156-hw-vfio-container.c-rename-file-to-container-legacy..patch b/0156-hw-vfio-container.c-rename-file-to-container-legacy..patch new file mode 100644 index 0000000..6011093 --- /dev/null +++ b/0156-hw-vfio-container.c-rename-file-to-container-legacy..patch @@ -0,0 +1,47 @@ +From af949c1d671c09bf5c11c6de5b0ea3ac5977808f Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:13 +0100 +Subject: [PATCH] hw/vfio/container.c: rename file to container-legacy.c +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] c9e580c4dd (clegoate/qemu-kvm-centos) + +This file is mostly concerned with the VFIOLegacyContainer implementation so +rename it to reflect the previous rename of VFIOContainer to +VFIOLegacyContainer. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-6-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit a3bcae62b6a161dea4521f254f19c5a8551c28af) +Signed-off-by: Eric Auger +--- + hw/vfio/{container.c => container-legacy.c} | 0 + hw/vfio/meson.build | 2 +- + 2 files changed, 1 insertion(+), 1 deletion(-) + rename hw/vfio/{container.c => container-legacy.c} (100%) + +diff --git a/hw/vfio/container.c b/hw/vfio/container-legacy.c +similarity index 100% +rename from hw/vfio/container.c +rename to hw/vfio/container-legacy.c +diff --git a/hw/vfio/meson.build b/hw/vfio/meson.build +index d3ed3cb7ac..62b7a7eaac 100644 +--- a/hw/vfio/meson.build ++++ b/hw/vfio/meson.build +@@ -4,7 +4,7 @@ vfio_ss = ss.source_set() + vfio_ss.add(files( + 'listener.c', + 'container-base.c', +- 'container.c', ++ 'container-legacy.c', + 'helpers.c', + )) + vfio_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr.c')) diff --git a/0157-hw-vfio-container-base.c-rename-file-to-container.c.patch b/0157-hw-vfio-container-base.c-rename-file-to-container.c.patch new file mode 100644 index 0000000..b2547a7 --- /dev/null +++ b/0157-hw-vfio-container-base.c-rename-file-to-container.c.patch @@ -0,0 +1,46 @@ +From d51c2354fde1192ffbcbe4fd33f031ebf39f88c1 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:14 +0100 +Subject: [PATCH] hw/vfio/container-base.c: rename file to container.c +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] b895d065ab (clegoate/qemu-kvm-centos) + +Rename the file to reflect the previous rename of VFIOContainerBase to +VFIOContainer. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-7-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit dcce51b19385ea65ac6db295204716a9eb311fbf) +Signed-off-by: Eric Auger +--- + hw/vfio/{container-base.c => container.c} | 0 + hw/vfio/meson.build | 2 +- + 2 files changed, 1 insertion(+), 1 deletion(-) + rename hw/vfio/{container-base.c => container.c} (100%) + +diff --git a/hw/vfio/container-base.c b/hw/vfio/container.c +similarity index 100% +rename from hw/vfio/container-base.c +rename to hw/vfio/container.c +diff --git a/hw/vfio/meson.build b/hw/vfio/meson.build +index 62b7a7eaac..82f68698fb 100644 +--- a/hw/vfio/meson.build ++++ b/hw/vfio/meson.build +@@ -3,7 +3,7 @@ + vfio_ss = ss.source_set() + vfio_ss.add(files( + 'listener.c', +- 'container-base.c', ++ 'container.c', + 'container-legacy.c', + 'helpers.c', + )) diff --git a/0158-vfio-iommufd.c-use-QOM-casts-where-appropriate.patch b/0158-vfio-iommufd.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..c55549e --- /dev/null +++ b/0158-vfio-iommufd.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,150 @@ +From 1bb3f29c124ea8a2ebf1a22d376d4cc3272a9508 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:15 +0100 +Subject: [PATCH] vfio/iommufd.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 17b6fb2430 (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOIOMMUFDContainer and VFIOContainer instead +of accessing bcontainer directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-8-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit cc5b394291f428a04ff7a622573c02560b183797) +Signed-off-by: Eric Auger +--- + hw/vfio/iommufd.c | 34 ++++++++++++++-------------------- + 1 file changed, 14 insertions(+), 20 deletions(-) + +diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c +index 2ebd87ec8f..76f0806ec0 100644 +--- a/hw/vfio/iommufd.c ++++ b/hw/vfio/iommufd.c +@@ -38,8 +38,7 @@ static int iommufd_cdev_map(const VFIOContainer *bcontainer, hwaddr iova, + ram_addr_t size, void *vaddr, bool readonly, + MemoryRegion *mr) + { +- const VFIOIOMMUFDContainer *container = +- container_of(bcontainer, VFIOIOMMUFDContainer, bcontainer); ++ const VFIOIOMMUFDContainer *container = VFIO_IOMMU_IOMMUFD(bcontainer); + + return iommufd_backend_map_dma(container->be, + container->ioas_id, +@@ -50,8 +49,7 @@ static int iommufd_cdev_map_file(const VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + int fd, unsigned long start, bool readonly) + { +- const VFIOIOMMUFDContainer *container = +- container_of(bcontainer, VFIOIOMMUFDContainer, bcontainer); ++ const VFIOIOMMUFDContainer *container = VFIO_IOMMU_IOMMUFD(bcontainer); + + return iommufd_backend_map_file_dma(container->be, + container->ioas_id, +@@ -62,8 +60,7 @@ static int iommufd_cdev_unmap(const VFIOContainer *bcontainer, + hwaddr iova, ram_addr_t size, + IOMMUTLBEntry *iotlb, bool unmap_all) + { +- const VFIOIOMMUFDContainer *container = +- container_of(bcontainer, VFIOIOMMUFDContainer, bcontainer); ++ const VFIOIOMMUFDContainer *container = VFIO_IOMMU_IOMMUFD(bcontainer); + + /* unmap in halves */ + if (unmap_all) { +@@ -162,8 +159,7 @@ static bool iommufd_hwpt_dirty_tracking(VFIOIOASHwpt *hwpt) + static int iommufd_set_dirty_page_tracking(const VFIOContainer *bcontainer, + bool start, Error **errp) + { +- const VFIOIOMMUFDContainer *container = +- container_of(bcontainer, VFIOIOMMUFDContainer, bcontainer); ++ const VFIOIOMMUFDContainer *container = VFIO_IOMMU_IOMMUFD(bcontainer); + VFIOIOASHwpt *hwpt; + + QLIST_FOREACH(hwpt, &container->hwpt_list, next) { +@@ -194,9 +190,7 @@ static int iommufd_query_dirty_bitmap(const VFIOContainer *bcontainer, + VFIOBitmap *vbmap, hwaddr iova, + hwaddr size, Error **errp) + { +- VFIOIOMMUFDContainer *container = container_of(bcontainer, +- VFIOIOMMUFDContainer, +- bcontainer); ++ VFIOIOMMUFDContainer *container = VFIO_IOMMU_IOMMUFD(bcontainer); + unsigned long page_size = qemu_real_host_page_size(); + VFIOIOASHwpt *hwpt; + +@@ -324,6 +318,7 @@ static bool iommufd_cdev_autodomains_get(VFIODevice *vbasedev, + { + ERRP_GUARD(); + IOMMUFDBackend *iommufd = vbasedev->iommufd; ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + uint32_t type, flags = 0; + uint64_t hw_caps; + VFIOIOASHwpt *hwpt; +@@ -408,9 +403,9 @@ skip_alloc: + vbasedev->iommu_dirty_tracking = iommufd_hwpt_dirty_tracking(hwpt); + QLIST_INSERT_HEAD(&hwpt->device_list, vbasedev, hwpt_next); + QLIST_INSERT_HEAD(&container->hwpt_list, hwpt, next); +- container->bcontainer.dirty_pages_supported |= ++ bcontainer->dirty_pages_supported |= + vbasedev->iommu_dirty_tracking; +- if (container->bcontainer.dirty_pages_supported && ++ if (bcontainer->dirty_pages_supported && + !vbasedev->iommu_dirty_tracking) { + warn_report("IOMMU instance for device %s doesn't support dirty tracking", + vbasedev->name); +@@ -464,7 +459,7 @@ static void iommufd_cdev_detach_container(VFIODevice *vbasedev, + + static void iommufd_cdev_container_destroy(VFIOIOMMUFDContainer *container) + { +- VFIOContainer *bcontainer = &container->bcontainer; ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + + if (!QLIST_EMPTY(&bcontainer->device_list)) { + return; +@@ -486,7 +481,7 @@ static int iommufd_cdev_ram_block_discard_disable(bool state) + static bool iommufd_cdev_get_info_iova_range(VFIOIOMMUFDContainer *container, + uint32_t ioas_id, Error **errp) + { +- VFIOContainer *bcontainer = &container->bcontainer; ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + g_autofree struct iommu_ioas_iova_ranges *info = NULL; + struct iommu_iova_range *iova_ranges; + int sz, fd = container->be->fd; +@@ -559,7 +554,7 @@ static bool iommufd_cdev_attach(const char *name, VFIODevice *vbasedev, + + /* try to attach to an existing container in this space */ + QLIST_FOREACH(bcontainer, &space->containers, next) { +- container = container_of(bcontainer, VFIOIOMMUFDContainer, bcontainer); ++ container = VFIO_IOMMU_IOMMUFD(bcontainer); + if (VFIO_IOMMU_GET_CLASS(bcontainer) != iommufd_vioc || + vbasedev->iommufd != container->be) { + continue; +@@ -609,7 +604,7 @@ skip_ioas_alloc: + QLIST_INIT(&container->hwpt_list); + vbasedev->cpr.ioas_id = ioas_id; + +- bcontainer = &container->bcontainer; ++ bcontainer = VFIO_IOMMU(container); + vfio_address_space_insert(space, bcontainer); + + if (!iommufd_cdev_attach_container(vbasedev, container, errp)) { +@@ -690,9 +685,8 @@ static void iommufd_cdev_detach(VFIODevice *vbasedev) + { + VFIOContainer *bcontainer = vbasedev->bcontainer; + VFIOAddressSpace *space = bcontainer->space; +- VFIOIOMMUFDContainer *container = container_of(bcontainer, +- VFIOIOMMUFDContainer, +- bcontainer); ++ VFIOIOMMUFDContainer *container = VFIO_IOMMU_IOMMUFD(bcontainer); ++ + vfio_device_unprepare(vbasedev); + + if (!vbasedev->ram_block_discard_allowed) { diff --git a/0159-vfio-cpr-iommufd.c-use-QOM-casts-where-appropriate.patch b/0159-vfio-cpr-iommufd.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..862454c --- /dev/null +++ b/0159-vfio-cpr-iommufd.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,49 @@ +From c07d6d295d9faddd4b7fdef1be857ea76c76dc52 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:16 +0100 +Subject: [PATCH] vfio/cpr-iommufd.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 5043e48dd7 (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOIOMMUFDContainer and VFIOContainer instead +of accessing bcontainer directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-9-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 91bdb2f32902c83490cbafe524c82005a64e1f68) +Signed-off-by: Eric Auger +--- + hw/vfio/cpr-iommufd.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/cpr-iommufd.c b/hw/vfio/cpr-iommufd.c +index 6aaf6f77a2..1d70c87996 100644 +--- a/hw/vfio/cpr-iommufd.c ++++ b/hw/vfio/cpr-iommufd.c +@@ -176,7 +176,7 @@ void vfio_iommufd_cpr_unregister_iommufd(IOMMUFDBackend *be) + bool vfio_iommufd_cpr_register_container(VFIOIOMMUFDContainer *container, + Error **errp) + { +- VFIOContainer *bcontainer = &container->bcontainer; ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + + migration_add_notifier_mode(&bcontainer->cpr_reboot_notifier, + vfio_cpr_reboot_notifier, +@@ -189,7 +189,7 @@ bool vfio_iommufd_cpr_register_container(VFIOIOMMUFDContainer *container, + + void vfio_iommufd_cpr_unregister_container(VFIOIOMMUFDContainer *container) + { +- VFIOContainer *bcontainer = &container->bcontainer; ++ VFIOContainer *bcontainer = VFIO_IOMMU(container); + + migration_remove_notifier(&bcontainer->cpr_reboot_notifier); + } diff --git a/0160-vfio-vfio-iommufd.h-rename-VFIOContainer-bcontainer-.patch b/0160-vfio-vfio-iommufd.h-rename-VFIOContainer-bcontainer-.patch new file mode 100644 index 0000000..989a0f2 --- /dev/null +++ b/0160-vfio-vfio-iommufd.h-rename-VFIOContainer-bcontainer-.patch @@ -0,0 +1,49 @@ +From 40c162ece4d44b9991cf28995cfeade6e9721c13 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:17 +0100 +Subject: [PATCH] vfio/vfio-iommufd.h: rename VFIOContainer bcontainer field to + parent_obj +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 539fd8980a (clegoate/qemu-kvm-centos) + +Now that nothing accesses the bcontainer field directly, rename bcontainer to +parent_obj as per our current coding guidelines. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-10-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit a7f185cbeca75555a7fa7272afbd3a06bc4f7f66) +Signed-off-by: Eric Auger +--- + hw/vfio/vfio-iommufd.h | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/hw/vfio/vfio-iommufd.h b/hw/vfio/vfio-iommufd.h +index 13f412aad7..6b28e1ff7b 100644 +--- a/hw/vfio/vfio-iommufd.h ++++ b/hw/vfio/vfio-iommufd.h +@@ -22,12 +22,13 @@ typedef struct VFIOIOASHwpt { + + typedef struct IOMMUFDBackend IOMMUFDBackend; + +-typedef struct VFIOIOMMUFDContainer { +- VFIOContainer bcontainer; ++struct VFIOIOMMUFDContainer { ++ VFIOContainer parent_obj; ++ + IOMMUFDBackend *be; + uint32_t ioas_id; + QLIST_HEAD(, VFIOIOASHwpt) hwpt_list; +-} VFIOIOMMUFDContainer; ++}; + + OBJECT_DECLARE_SIMPLE_TYPE(VFIOIOMMUFDContainer, VFIO_IOMMU_IOMMUFD); + diff --git a/0161-vfio-spapr.c-use-QOM-casts-where-appropriate.patch b/0161-vfio-spapr.c-use-QOM-casts-where-appropriate.patch new file mode 100644 index 0000000..5a8204d --- /dev/null +++ b/0161-vfio-spapr.c-use-QOM-casts-where-appropriate.patch @@ -0,0 +1,99 @@ +From 626f4d5075e041a7e32f1a50b75b135b1a675ce3 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:18 +0100 +Subject: [PATCH] vfio/spapr.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 6095d8d8c2 (clegoate/qemu-kvm-centos) + +Use QOM casts to convert between VFIOSpaprContainer and VFIOLegacyContainer +instead of accessing bcontainer directly. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-11-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 6c671235636cfb5e825040b4621ff06c77925731) +Signed-off-by: Eric Auger +--- + hw/vfio/spapr.c | 19 +++++++------------ + 1 file changed, 7 insertions(+), 12 deletions(-) + +diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c +index acaa9c1419..c883ba6da9 100644 +--- a/hw/vfio/spapr.c ++++ b/hw/vfio/spapr.c +@@ -61,7 +61,7 @@ static void vfio_prereg_listener_region_add(MemoryListener *listener, + { + VFIOSpaprContainer *scontainer = container_of(listener, VFIOSpaprContainer, + prereg_listener); +- VFIOLegacyContainer *container = &scontainer->container; ++ VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(scontainer); + VFIOContainer *bcontainer = VFIO_IOMMU(container); + const hwaddr gpa = section->offset_within_address_space; + hwaddr end; +@@ -121,7 +121,7 @@ static void vfio_prereg_listener_region_del(MemoryListener *listener, + { + VFIOSpaprContainer *scontainer = container_of(listener, VFIOSpaprContainer, + prereg_listener); +- VFIOLegacyContainer *container = &scontainer->container; ++ VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(scontainer); + const hwaddr gpa = section->offset_within_address_space; + hwaddr end; + int ret; +@@ -245,8 +245,7 @@ static bool vfio_spapr_create_window(VFIOLegacyContainer *container, + { + int ret = 0; + VFIOContainer *bcontainer = VFIO_IOMMU(container); +- VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, +- container); ++ VFIOSpaprContainer *scontainer = VFIO_IOMMU_SPAPR(bcontainer); + IOMMUMemoryRegion *iommu_mr = IOMMU_MEMORY_REGION(section->mr); + uint64_t pagesize = memory_region_iommu_get_min_page_size(iommu_mr), pgmask; + unsigned entries, bits_total, bits_per_level, max_levels, ddw_levels; +@@ -353,8 +352,7 @@ vfio_spapr_container_add_section_window(VFIOContainer *bcontainer, + Error **errp) + { + VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); +- VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, +- container); ++ VFIOSpaprContainer *scontainer = VFIO_IOMMU_SPAPR(container); + VFIOHostDMAWindow *hostwin; + hwaddr pgsize = 0; + int ret; +@@ -443,8 +441,7 @@ vfio_spapr_container_del_section_window(VFIOContainer *bcontainer, + MemoryRegionSection *section) + { + VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); +- VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, +- container); ++ VFIOSpaprContainer *scontainer = VFIO_IOMMU_SPAPR(container); + + if (container->iommu_type != VFIO_SPAPR_TCE_v2_IOMMU) { + return; +@@ -464,8 +461,7 @@ vfio_spapr_container_del_section_window(VFIOContainer *bcontainer, + static void vfio_spapr_container_release(VFIOContainer *bcontainer) + { + VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); +- VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, +- container); ++ VFIOSpaprContainer *scontainer = VFIO_IOMMU_SPAPR(container); + VFIOHostDMAWindow *hostwin, *next; + + if (container->iommu_type == VFIO_SPAPR_TCE_v2_IOMMU) { +@@ -482,8 +478,7 @@ static bool vfio_spapr_container_setup(VFIOContainer *bcontainer, + Error **errp) + { + VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); +- VFIOSpaprContainer *scontainer = container_of(container, VFIOSpaprContainer, +- container); ++ VFIOSpaprContainer *scontainer = VFIO_IOMMU_SPAPR(container); + struct vfio_iommu_spapr_tce_info info; + bool v2 = container->iommu_type == VFIO_SPAPR_TCE_v2_IOMMU; + int ret, fd = container->fd; diff --git a/0162-vfio-spapr.c-rename-VFIOContainer-bcontainer-field-t.patch b/0162-vfio-spapr.c-rename-VFIOContainer-bcontainer-field-t.patch new file mode 100644 index 0000000..9c95adf --- /dev/null +++ b/0162-vfio-spapr.c-rename-VFIOContainer-bcontainer-field-t.patch @@ -0,0 +1,49 @@ +From a64b1ec509211c3b42177b2469058aff977d9926 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:19 +0100 +Subject: [PATCH] vfio/spapr.c: rename VFIOContainer bcontainer field to + parent_obj +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] ae15926032 (clegoate/qemu-kvm-centos) + +Now that nothing accesses the bcontainer field directly, rename bcontainer to +parent_obj as per our current coding guidelines. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-12-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 1bd06d0385eb72bb54aa14af34e8361ec3ae8cee) +Signed-off-by: Eric Auger +--- + hw/vfio/spapr.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c +index c883ba6da9..8d9d68da4e 100644 +--- a/hw/vfio/spapr.c ++++ b/hw/vfio/spapr.c +@@ -30,12 +30,13 @@ typedef struct VFIOHostDMAWindow { + QLIST_ENTRY(VFIOHostDMAWindow) hostwin_next; + } VFIOHostDMAWindow; + +-typedef struct VFIOSpaprContainer { +- VFIOLegacyContainer container; ++struct VFIOSpaprContainer { ++ VFIOLegacyContainer parent_obj; ++ + MemoryListener prereg_listener; + QLIST_HEAD(, VFIOHostDMAWindow) hostwin_list; + unsigned int levels; +-} VFIOSpaprContainer; ++}; + + OBJECT_DECLARE_SIMPLE_TYPE(VFIOSpaprContainer, VFIO_IOMMU_SPAPR); + diff --git a/0163-vfio-pci.c-rename-vfio_instance_init-to-vfio_pci_ini.patch b/0163-vfio-pci.c-rename-vfio_instance_init-to-vfio_pci_ini.patch new file mode 100644 index 0000000..4fb32b4 --- /dev/null +++ b/0163-vfio-pci.c-rename-vfio_instance_init-to-vfio_pci_ini.patch @@ -0,0 +1,49 @@ +From cd6abacafae12e0af965aeaa72b30d96856a27c7 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:20 +0100 +Subject: [PATCH] vfio/pci.c: rename vfio_instance_init() to vfio_pci_init() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] ef54ddd9f9 (clegoate/qemu-kvm-centos) + +This is the more typical naming convention for QOM init() functions, in +particular it changes the prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-13-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit d5db50dd819142748e10e488a2288052ec0235fd) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 38ea58020d..4002af0c54 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -3643,7 +3643,7 @@ post_reset: + vfio_pci_post_reset(vdev); + } + +-static void vfio_instance_init(Object *obj) ++static void vfio_pci_init(Object *obj) + { + PCIDevice *pci_dev = PCI_DEVICE(obj); + VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj); +@@ -3938,7 +3938,7 @@ static const TypeInfo vfio_pci_dev_info = { + .name = TYPE_VFIO_PCI, + .parent = TYPE_VFIO_PCI_BASE, + .class_init = vfio_pci_dev_class_init, +- .instance_init = vfio_instance_init, ++ .instance_init = vfio_pci_init, + .instance_finalize = vfio_instance_finalize, + }; + diff --git a/0164-vfio-pci.c-rename-vfio_instance_finalize-to-vfio_pci.patch b/0164-vfio-pci.c-rename-vfio_instance_finalize-to-vfio_pci.patch new file mode 100644 index 0000000..14da0ac --- /dev/null +++ b/0164-vfio-pci.c-rename-vfio_instance_finalize-to-vfio_pci.patch @@ -0,0 +1,50 @@ +From 558fb7a255befc1cd848dc325bac38bc56cdb1d2 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:21 +0100 +Subject: [PATCH] vfio/pci.c: rename vfio_instance_finalize() to + vfio_pci_finalize() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] b18e4ff961 (clegoate/qemu-kvm-centos) + +This is the more typical naming convention for QOM finalize() functions, in +particular it changes the prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-14-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit e6fd80873a24883dc204d09f11c16e30c8cd1c37) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 4002af0c54..d30f60c21a 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -3568,7 +3568,7 @@ error: + error_prepend(errp, VFIO_MSG_PREFIX, vbasedev->name); + } + +-static void vfio_instance_finalize(Object *obj) ++static void vfio_pci_finalize(Object *obj) + { + VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj); + +@@ -3939,7 +3939,7 @@ static const TypeInfo vfio_pci_dev_info = { + .parent = TYPE_VFIO_PCI_BASE, + .class_init = vfio_pci_dev_class_init, + .instance_init = vfio_pci_init, +- .instance_finalize = vfio_instance_finalize, ++ .instance_finalize = vfio_pci_finalize, + }; + + static const Property vfio_pci_dev_nohotplug_properties[] = { diff --git a/0165-vfio-pci.c-rename-vfio_pci_dev_class_init-to-vfio_pc.patch b/0165-vfio-pci.c-rename-vfio_pci_dev_class_init-to-vfio_pc.patch new file mode 100644 index 0000000..5c008b5 --- /dev/null +++ b/0165-vfio-pci.c-rename-vfio_pci_dev_class_init-to-vfio_pc.patch @@ -0,0 +1,49 @@ +From 1c84a5bcce21293a3cb6e1866273eedcf46e7010 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:22 +0100 +Subject: [PATCH] vfio/pci.c: rename vfio_pci_dev_class_init() to + vfio_pci_class_init() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] b76c7d88c9 (clegoate/qemu-kvm-centos) + +This changes the function prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-15-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 784fa15f02fc0adbf8897f5c3012652174cc7274) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index d30f60c21a..96a0d8b290 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -3785,7 +3785,7 @@ static void vfio_pci_set_fd(Object *obj, const char *str, Error **errp) + } + #endif + +-static void vfio_pci_dev_class_init(ObjectClass *klass, const void *data) ++static void vfio_pci_class_init(ObjectClass *klass, const void *data) + { + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass); +@@ -3937,7 +3937,7 @@ static void vfio_pci_dev_class_init(ObjectClass *klass, const void *data) + static const TypeInfo vfio_pci_dev_info = { + .name = TYPE_VFIO_PCI, + .parent = TYPE_VFIO_PCI_BASE, +- .class_init = vfio_pci_dev_class_init, ++ .class_init = vfio_pci_class_init, + .instance_init = vfio_pci_init, + .instance_finalize = vfio_pci_finalize, + }; diff --git a/0166-vfio-pci.c-rename-vfio_pci_dev_info-to-vfio_pci_info.patch b/0166-vfio-pci.c-rename-vfio_pci_dev_info-to-vfio_pci_info.patch new file mode 100644 index 0000000..1bc9f2e --- /dev/null +++ b/0166-vfio-pci.c-rename-vfio_pci_dev_info-to-vfio_pci_info.patch @@ -0,0 +1,48 @@ +From cc66005cedd2096c2655352be4f8ab58b4fb7481 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:23 +0100 +Subject: [PATCH] vfio/pci.c: rename vfio_pci_dev_info to vfio_pci_info +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 313ecc70b0 (clegoate/qemu-kvm-centos) + +This changes the prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-16-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 25c8376b37948d7608b1a13f43e985fc801295e5) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 96a0d8b290..fd8d8f7e32 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -3934,7 +3934,7 @@ static void vfio_pci_class_init(ObjectClass *klass, const void *data) + "multifd channels"); + } + +-static const TypeInfo vfio_pci_dev_info = { ++static const TypeInfo vfio_pci_info = { + .name = TYPE_VFIO_PCI, + .parent = TYPE_VFIO_PCI_BASE, + .class_init = vfio_pci_class_init, +@@ -3992,7 +3992,7 @@ static void register_vfio_pci_dev_type(void) + vfio_pci_migration_multifd_transfer_prop.realized_set_allowed = true; + + type_register_static(&vfio_pci_base_dev_info); +- type_register_static(&vfio_pci_dev_info); ++ type_register_static(&vfio_pci_info); + type_register_static(&vfio_pci_nohotplug_dev_info); + } + diff --git a/0167-s390x-s390-pci-vfio.c-use-QOM-casts-where-appropriat.patch b/0167-s390x-s390-pci-vfio.c-use-QOM-casts-where-appropriat.patch new file mode 100644 index 0000000..dfc567c --- /dev/null +++ b/0167-s390x-s390-pci-vfio.c-use-QOM-casts-where-appropriat.patch @@ -0,0 +1,94 @@ +From cb2f9c0a8d15606672f9b013c68b32ac3e8a1dd4 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Tue, 15 Jul 2025 10:26:01 +0100 +Subject: [PATCH] s390x/s390-pci-vfio.c: use QOM casts where appropriate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 5fa67bae5f (clegoate/qemu-kvm-centos) + +Use QOM casts to cast to VFIOPCIDevice instead of using container_of(). + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Matthew Rosato +Reviewed-by: Eric Farman +Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-22-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit e2827210d6a9c56c1b14b00b414dfa9eb7843711) +Signed-off-by: Eric Auger +--- + hw/s390x/s390-pci-vfio.c | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +diff --git a/hw/s390x/s390-pci-vfio.c b/hw/s390x/s390-pci-vfio.c +index c51bcea5fc..7760780aff 100644 +--- a/hw/s390x/s390-pci-vfio.c ++++ b/hw/s390x/s390-pci-vfio.c +@@ -62,7 +62,7 @@ S390PCIDMACount *s390_pci_start_dma_count(S390pciState *s, + { + S390PCIDMACount *cnt; + uint32_t avail; +- VFIOPCIDevice *vpdev = container_of(pbdev->pdev, VFIOPCIDevice, pdev); ++ VFIOPCIDevice *vpdev = VFIO_PCI_BASE(pbdev->pdev); + int id; + + assert(vpdev); +@@ -108,7 +108,7 @@ static void s390_pci_read_base(S390PCIBusDevice *pbdev, + { + struct vfio_info_cap_header *hdr; + struct vfio_device_info_cap_zpci_base *cap; +- VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); ++ VFIOPCIDevice *vpci = VFIO_PCI_BASE(pbdev->pdev); + uint64_t vfio_size; + + hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_BASE); +@@ -162,7 +162,7 @@ static bool get_host_fh(S390PCIBusDevice *pbdev, struct vfio_device_info *info, + { + struct vfio_info_cap_header *hdr; + struct vfio_device_info_cap_zpci_base *cap; +- VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); ++ VFIOPCIDevice *vpci = VFIO_PCI_BASE(pbdev->pdev); + + hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_BASE); + +@@ -185,7 +185,7 @@ static void s390_pci_read_group(S390PCIBusDevice *pbdev, + struct vfio_device_info_cap_zpci_group *cap; + S390pciState *s = s390_get_phb(); + ClpRspQueryPciGrp *resgrp; +- VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); ++ VFIOPCIDevice *vpci = VFIO_PCI_BASE(pbdev->pdev); + uint8_t start_gid = pbdev->zpci_fn.pfgid; + + hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_GROUP); +@@ -264,7 +264,7 @@ static void s390_pci_read_util(S390PCIBusDevice *pbdev, + { + struct vfio_info_cap_header *hdr; + struct vfio_device_info_cap_zpci_util *cap; +- VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); ++ VFIOPCIDevice *vpci = VFIO_PCI_BASE(pbdev->pdev); + + hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_UTIL); + +@@ -291,7 +291,7 @@ static void s390_pci_read_pfip(S390PCIBusDevice *pbdev, + { + struct vfio_info_cap_header *hdr; + struct vfio_device_info_cap_zpci_pfip *cap; +- VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); ++ VFIOPCIDevice *vpci = VFIO_PCI_BASE(pbdev->pdev); + + hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_PFIP); + +@@ -314,7 +314,7 @@ static void s390_pci_read_pfip(S390PCIBusDevice *pbdev, + + static struct vfio_device_info *get_device_info(S390PCIBusDevice *pbdev) + { +- VFIOPCIDevice *vfio_pci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); ++ VFIOPCIDevice *vfio_pci = VFIO_PCI_BASE(pbdev->pdev); + + return vfio_get_device_info(vfio_pci->vbasedev.fd); + } diff --git a/0168-hw-vfio-types.h-rename-TYPE_VFIO_PCI_BASE-to-TYPE_VF.patch b/0168-hw-vfio-types.h-rename-TYPE_VFIO_PCI_BASE-to-TYPE_VF.patch new file mode 100644 index 0000000..9e9d88b --- /dev/null +++ b/0168-hw-vfio-types.h-rename-TYPE_VFIO_PCI_BASE-to-TYPE_VF.patch @@ -0,0 +1,333 @@ +From ec90cb18cd535d50f68bc257500d46f5080e3ec5 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:24 +0100 +Subject: [PATCH] hw/vfio/types.h: rename TYPE_VFIO_PCI_BASE to + TYPE_VFIO_PCI_DEVICE +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 8fdb487754 (clegoate/qemu-kvm-centos) + +This brings the QOM type name in line with the underlying VFIOPCIDevice structure. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-17-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit af2a8bfb3cd38cceb39a152ff33c7daa4c81c506) +Signed-off-by: Eric Auger +--- + hw/s390x/s390-pci-vfio.c | 14 +++++++------- + hw/vfio-user/pci.c | 13 +++++++------ + hw/vfio/device.c | 2 +- + hw/vfio/pci.c | 28 ++++++++++++++-------------- + hw/vfio/pci.h | 2 +- + hw/vfio/types.h | 4 ++-- + 6 files changed, 32 insertions(+), 31 deletions(-) + +diff --git a/hw/s390x/s390-pci-vfio.c b/hw/s390x/s390-pci-vfio.c +index 7760780aff..9e31029d7a 100644 +--- a/hw/s390x/s390-pci-vfio.c ++++ b/hw/s390x/s390-pci-vfio.c +@@ -62,7 +62,7 @@ S390PCIDMACount *s390_pci_start_dma_count(S390pciState *s, + { + S390PCIDMACount *cnt; + uint32_t avail; +- VFIOPCIDevice *vpdev = VFIO_PCI_BASE(pbdev->pdev); ++ VFIOPCIDevice *vpdev = VFIO_PCI_DEVICE(pbdev->pdev); + int id; + + assert(vpdev); +@@ -108,7 +108,7 @@ static void s390_pci_read_base(S390PCIBusDevice *pbdev, + { + struct vfio_info_cap_header *hdr; + struct vfio_device_info_cap_zpci_base *cap; +- VFIOPCIDevice *vpci = VFIO_PCI_BASE(pbdev->pdev); ++ VFIOPCIDevice *vpci = VFIO_PCI_DEVICE(pbdev->pdev); + uint64_t vfio_size; + + hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_BASE); +@@ -162,7 +162,7 @@ static bool get_host_fh(S390PCIBusDevice *pbdev, struct vfio_device_info *info, + { + struct vfio_info_cap_header *hdr; + struct vfio_device_info_cap_zpci_base *cap; +- VFIOPCIDevice *vpci = VFIO_PCI_BASE(pbdev->pdev); ++ VFIOPCIDevice *vpci = VFIO_PCI_DEVICE(pbdev->pdev); + + hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_BASE); + +@@ -185,7 +185,7 @@ static void s390_pci_read_group(S390PCIBusDevice *pbdev, + struct vfio_device_info_cap_zpci_group *cap; + S390pciState *s = s390_get_phb(); + ClpRspQueryPciGrp *resgrp; +- VFIOPCIDevice *vpci = VFIO_PCI_BASE(pbdev->pdev); ++ VFIOPCIDevice *vpci = VFIO_PCI_DEVICE(pbdev->pdev); + uint8_t start_gid = pbdev->zpci_fn.pfgid; + + hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_GROUP); +@@ -264,7 +264,7 @@ static void s390_pci_read_util(S390PCIBusDevice *pbdev, + { + struct vfio_info_cap_header *hdr; + struct vfio_device_info_cap_zpci_util *cap; +- VFIOPCIDevice *vpci = VFIO_PCI_BASE(pbdev->pdev); ++ VFIOPCIDevice *vpci = VFIO_PCI_DEVICE(pbdev->pdev); + + hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_UTIL); + +@@ -291,7 +291,7 @@ static void s390_pci_read_pfip(S390PCIBusDevice *pbdev, + { + struct vfio_info_cap_header *hdr; + struct vfio_device_info_cap_zpci_pfip *cap; +- VFIOPCIDevice *vpci = VFIO_PCI_BASE(pbdev->pdev); ++ VFIOPCIDevice *vpci = VFIO_PCI_DEVICE(pbdev->pdev); + + hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_PFIP); + +@@ -314,7 +314,7 @@ static void s390_pci_read_pfip(S390PCIBusDevice *pbdev, + + static struct vfio_device_info *get_device_info(S390PCIBusDevice *pbdev) + { +- VFIOPCIDevice *vfio_pci = VFIO_PCI_BASE(pbdev->pdev); ++ VFIOPCIDevice *vfio_pci = VFIO_PCI_DEVICE(pbdev->pdev); + + return vfio_get_device_info(vfio_pci->vbasedev.fd); + } +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index e2c309784f..efceae69de 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -234,9 +234,10 @@ static void vfio_user_pci_realize(PCIDevice *pdev, Error **errp) + { + ERRP_GUARD(); + VFIOUserPCIDevice *udev = VFIO_USER_PCI(pdev); +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(pdev); + VFIODevice *vbasedev = &vdev->vbasedev; + const char *sock_name; ++ + AddressSpace *as; + SocketAddress addr; + VFIOUserProxy *proxy; +@@ -346,7 +347,7 @@ error: + static void vfio_user_instance_init(Object *obj) + { + PCIDevice *pci_dev = PCI_DEVICE(obj); +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(obj); + VFIODevice *vbasedev = &vdev->vbasedev; + + device_add_bootindex_property(obj, &vdev->bootindex, +@@ -371,7 +372,7 @@ static void vfio_user_instance_init(Object *obj) + + static void vfio_user_instance_finalize(Object *obj) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(obj); + VFIODevice *vbasedev = &vdev->vbasedev; + + if (vdev->msix != NULL) { +@@ -387,7 +388,7 @@ static void vfio_user_instance_finalize(Object *obj) + + static void vfio_user_pci_reset(DeviceState *dev) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(dev); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(dev); + VFIODevice *vbasedev = &vdev->vbasedev; + + vfio_pci_pre_reset(vdev); +@@ -421,7 +422,7 @@ static void vfio_user_pci_set_socket(Object *obj, Visitor *v, const char *name, + VFIOUserPCIDevice *udev = VFIO_USER_PCI(obj); + bool success; + +- if (VFIO_PCI_BASE(udev)->vbasedev.proxy) { ++ if (VFIO_PCI_DEVICE(udev)->vbasedev.proxy) { + error_setg(errp, "Proxy is connected"); + return; + } +@@ -464,7 +465,7 @@ static void vfio_user_pci_dev_class_init(ObjectClass *klass, const void *data) + + static const TypeInfo vfio_user_pci_dev_info = { + .name = TYPE_VFIO_USER_PCI, +- .parent = TYPE_VFIO_PCI_BASE, ++ .parent = TYPE_VFIO_PCI_DEVICE, + .instance_size = sizeof(VFIOUserPCIDevice), + .class_init = vfio_user_pci_dev_class_init, + .instance_init = vfio_user_instance_init, +diff --git a/hw/vfio/device.c b/hw/vfio/device.c +index 931a949c08..8b63e765ac 100644 +--- a/hw/vfio/device.c ++++ b/hw/vfio/device.c +@@ -434,7 +434,7 @@ bool vfio_device_hiod_create_and_realize(VFIODevice *vbasedev, + VFIODevice *vfio_get_vfio_device(Object *obj) + { + if (object_dynamic_cast(obj, TYPE_VFIO_PCI)) { +- return &VFIO_PCI_BASE(obj)->vbasedev; ++ return &VFIO_PCI_DEVICE(obj)->vbasedev; + } else { + return NULL; + } +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index fd8d8f7e32..937283bcc6 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -308,7 +308,7 @@ static void vfio_intx_update(VFIOPCIDevice *vdev, PCIINTxRoute *route) + + static void vfio_intx_routing_notifier(PCIDevice *pdev) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(pdev); + PCIINTxRoute route; + + if (vdev->interrupt != VFIO_INT_INTx) { +@@ -663,7 +663,7 @@ void vfio_pci_vector_init(VFIOPCIDevice *vdev, int nr) + static int vfio_msix_vector_do_use(PCIDevice *pdev, unsigned int nr, + MSIMessage *msg, IOHandler *handler) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(pdev); + VFIOMSIVector *vector; + int ret; + bool resizing = !!(vdev->nr_vectors < nr + 1); +@@ -758,7 +758,7 @@ static int vfio_msix_vector_use(PCIDevice *pdev, + + static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(pdev); + VFIOMSIVector *vector = &vdev->msi_vectors[nr]; + + trace_vfio_msix_vector_release(vdev->vbasedev.name, nr); +@@ -1349,7 +1349,7 @@ static const MemoryRegionOps vfio_vga_ops = { + */ + static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(pdev); + VFIORegion *region = &vdev->bars[bar].region; + MemoryRegion *mmap_mr, *region_mr, *base_mr; + PCIIORegion *r; +@@ -1395,7 +1395,7 @@ static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar) + */ + uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(pdev); + VFIODevice *vbasedev = &vdev->vbasedev; + uint32_t emu_bits = 0, emu_val = 0, phys_val = 0, val; + +@@ -1429,7 +1429,7 @@ uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len) + void vfio_pci_write_config(PCIDevice *pdev, + uint32_t addr, uint32_t val, int len) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(pdev); + VFIODevice *vbasedev = &vdev->vbasedev; + uint32_t val_le = cpu_to_le32(val); + int ret; +@@ -3395,7 +3395,7 @@ bool vfio_pci_interrupt_setup(VFIOPCIDevice *vdev, Error **errp) + static void vfio_pci_realize(PCIDevice *pdev, Error **errp) + { + ERRP_GUARD(); +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(pdev); + VFIODevice *vbasedev = &vdev->vbasedev; + int i; + char uuid[UUID_STR_LEN]; +@@ -3570,14 +3570,14 @@ error: + + static void vfio_pci_finalize(Object *obj) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(obj); + + vfio_pci_put_device(vdev); + } + + static void vfio_exitfn(PCIDevice *pdev) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(pdev); + VFIODevice *vbasedev = &vdev->vbasedev; + + vfio_unregister_req_notifier(vdev); +@@ -3601,7 +3601,7 @@ static void vfio_exitfn(PCIDevice *pdev) + + static void vfio_pci_reset(DeviceState *dev) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(dev); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(dev); + + /* Do not reset the device during qemu_system_reset prior to cpr load */ + if (cpr_is_incoming()) { +@@ -3646,7 +3646,7 @@ post_reset: + static void vfio_pci_init(Object *obj) + { + PCIDevice *pci_dev = PCI_DEVICE(obj); +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(obj); + VFIODevice *vbasedev = &vdev->vbasedev; + + device_add_bootindex_property(obj, &vdev->bootindex, +@@ -3687,7 +3687,7 @@ static void vfio_pci_base_dev_class_init(ObjectClass *klass, const void *data) + } + + static const TypeInfo vfio_pci_base_dev_info = { +- .name = TYPE_VFIO_PCI_BASE, ++ .name = TYPE_VFIO_PCI_DEVICE, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(VFIOPCIDevice), + .abstract = true, +@@ -3780,7 +3780,7 @@ static const Property vfio_pci_dev_properties[] = { + #ifdef CONFIG_IOMMUFD + static void vfio_pci_set_fd(Object *obj, const char *str, Error **errp) + { +- VFIOPCIDevice *vdev = VFIO_PCI_BASE(obj); ++ VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(obj); + vfio_device_set_fd(&vdev->vbasedev, str, errp); + } + #endif +@@ -3936,7 +3936,7 @@ static void vfio_pci_class_init(ObjectClass *klass, const void *data) + + static const TypeInfo vfio_pci_info = { + .name = TYPE_VFIO_PCI, +- .parent = TYPE_VFIO_PCI_BASE, ++ .parent = TYPE_VFIO_PCI_DEVICE, + .class_init = vfio_pci_class_init, + .instance_init = vfio_pci_init, + .instance_finalize = vfio_pci_finalize, +diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h +index dd419f9147..975836945a 100644 +--- a/hw/vfio/pci.h ++++ b/hw/vfio/pci.h +@@ -120,7 +120,7 @@ typedef struct VFIOMSIXInfo { + MemoryRegion *pba_region; + } VFIOMSIXInfo; + +-OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI_BASE) ++OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI_DEVICE) + + struct VFIOPCIDevice { + PCIDevice parent_obj; +diff --git a/hw/vfio/types.h b/hw/vfio/types.h +index c19334ff25..5482d90808 100644 +--- a/hw/vfio/types.h ++++ b/hw/vfio/types.h +@@ -9,11 +9,11 @@ + #define HW_VFIO_VFIO_TYPES_H + + /* +- * TYPE_VFIO_PCI_BASE is an abstract type used to share code ++ * TYPE_VFIO_PCI_DEVICE is an abstract type used to share code + * between VFIO implementations that use a kernel driver + * with those that use user sockets. + */ +-#define TYPE_VFIO_PCI_BASE "vfio-pci-base" ++#define TYPE_VFIO_PCI_DEVICE "vfio-pci-device" + + #define TYPE_VFIO_PCI "vfio-pci" + /* TYPE_VFIO_PCI shares struct VFIOPCIDevice. */ diff --git a/0169-vfio-pci.c-rename-vfio_pci_base_dev_class_init-to-vf.patch b/0169-vfio-pci.c-rename-vfio_pci_base_dev_class_init-to-vf.patch new file mode 100644 index 0000000..d4a52de --- /dev/null +++ b/0169-vfio-pci.c-rename-vfio_pci_base_dev_class_init-to-vf.patch @@ -0,0 +1,49 @@ +From 4ef0ec514a8ec709edb12f95a6cf9c3f40ed38d2 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:25 +0100 +Subject: [PATCH] vfio/pci.c: rename vfio_pci_base_dev_class_init() to + vfio_pci_device_class_init() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] ddafa110b5 (clegoate/qemu-kvm-centos) + +This changes the function prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-18-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 153273f2796a664b08120799f326c6319f640011) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 937283bcc6..5380cf0c53 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -3674,7 +3674,7 @@ static void vfio_pci_init(Object *obj) + pci_dev->cap_present |= QEMU_PCI_SKIP_RESET_ON_CPR; + } + +-static void vfio_pci_base_dev_class_init(ObjectClass *klass, const void *data) ++static void vfio_pci_device_class_init(ObjectClass *klass, const void *data) + { + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass); +@@ -3691,7 +3691,7 @@ static const TypeInfo vfio_pci_base_dev_info = { + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(VFIOPCIDevice), + .abstract = true, +- .class_init = vfio_pci_base_dev_class_init, ++ .class_init = vfio_pci_device_class_init, + .interfaces = (const InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, diff --git a/0170-vfio-pci.c-rename-vfio_pci_base_dev_info-to-vfio_pci.patch b/0170-vfio-pci.c-rename-vfio_pci_base_dev_info-to-vfio_pci.patch new file mode 100644 index 0000000..edc8e06 --- /dev/null +++ b/0170-vfio-pci.c-rename-vfio_pci_base_dev_info-to-vfio_pci.patch @@ -0,0 +1,49 @@ +From d9a8deedb447a8f5c0552a8d60fde9aeae75cf63 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:26 +0100 +Subject: [PATCH] vfio/pci.c: rename vfio_pci_base_dev_info to + vfio_pci_device_info +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 6bc1051a41 (clegoate/qemu-kvm-centos) + +This changes the prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-19-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 596b158ffd727465fbeb9fff9a22b7ea7a341bc3) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 5380cf0c53..9e96f7d306 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -3686,7 +3686,7 @@ static void vfio_pci_device_class_init(ObjectClass *klass, const void *data) + pdc->config_write = vfio_pci_write_config; + } + +-static const TypeInfo vfio_pci_base_dev_info = { ++static const TypeInfo vfio_pci_device_info = { + .name = TYPE_VFIO_PCI_DEVICE, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(VFIOPCIDevice), +@@ -3991,7 +3991,7 @@ static void register_vfio_pci_dev_type(void) + vfio_pci_migration_multifd_transfer_prop = qdev_prop_on_off_auto; + vfio_pci_migration_multifd_transfer_prop.realized_set_allowed = true; + +- type_register_static(&vfio_pci_base_dev_info); ++ type_register_static(&vfio_pci_device_info); + type_register_static(&vfio_pci_info); + type_register_static(&vfio_pci_nohotplug_dev_info); + } diff --git a/0171-vfio-pci.c-rename-vfio_pci_dev_properties-to-vfio_pc.patch b/0171-vfio-pci.c-rename-vfio_pci_dev_properties-to-vfio_pc.patch new file mode 100644 index 0000000..4733727 --- /dev/null +++ b/0171-vfio-pci.c-rename-vfio_pci_dev_properties-to-vfio_pc.patch @@ -0,0 +1,49 @@ +From 4b2c12a0f2fd6174ca02df85fa9dd4a7cd4fc393 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:27 +0100 +Subject: [PATCH] vfio/pci.c: rename vfio_pci_dev_properties[] to + vfio_pci_properties[] +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 3e1e68a665 (clegoate/qemu-kvm-centos) + +This changes the prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-20-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 7c53e1f43ee365ee5061dd30d60c21a55eefbfce) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 9e96f7d306..ae84907aca 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -3701,7 +3701,7 @@ static const TypeInfo vfio_pci_device_info = { + + static PropertyInfo vfio_pci_migration_multifd_transfer_prop; + +-static const Property vfio_pci_dev_properties[] = { ++static const Property vfio_pci_properties[] = { + DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host), + DEFINE_PROP_UUID_NODEFAULT("vf-token", VFIOPCIDevice, vf_token), + DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice, vbasedev.sysfsdev), +@@ -3791,7 +3791,7 @@ static void vfio_pci_class_init(ObjectClass *klass, const void *data) + PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass); + + device_class_set_legacy_reset(dc, vfio_pci_reset); +- device_class_set_props(dc, vfio_pci_dev_properties); ++ device_class_set_props(dc, vfio_pci_properties); + #ifdef CONFIG_IOMMUFD + object_class_property_add_str(klass, "fd", NULL, vfio_pci_set_fd); + #endif diff --git a/0172-vfio-pci.c-rename-vfio_pci_dev_nohotplug_properties-.patch b/0172-vfio-pci.c-rename-vfio_pci_dev_nohotplug_properties-.patch new file mode 100644 index 0000000..ffe6665 --- /dev/null +++ b/0172-vfio-pci.c-rename-vfio_pci_dev_nohotplug_properties-.patch @@ -0,0 +1,49 @@ +From 366776d32100f6195bbb9b78bb3292ae90b93fb4 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:28 +0100 +Subject: [PATCH] vfio/pci.c: rename vfio_pci_dev_nohotplug_properties[] to + vfio_pci_nohotplug_properties[] +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 79600a8c6c (clegoate/qemu-kvm-centos) + +This changes the prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-21-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 05530ba2462f37fd55d72bdab31a7a5c29ab7519) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index ae84907aca..339324987c 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -3942,7 +3942,7 @@ static const TypeInfo vfio_pci_info = { + .instance_finalize = vfio_pci_finalize, + }; + +-static const Property vfio_pci_dev_nohotplug_properties[] = { ++static const Property vfio_pci_nohotplug_properties[] = { + DEFINE_PROP_BOOL("ramfb", VFIOPCIDevice, enable_ramfb, false), + DEFINE_PROP_BOOL("use-legacy-x86-rom", VFIOPCIDevice, + use_legacy_x86_rom, false), +@@ -3955,7 +3955,7 @@ static void vfio_pci_nohotplug_dev_class_init(ObjectClass *klass, + { + DeviceClass *dc = DEVICE_CLASS(klass); + +- device_class_set_props(dc, vfio_pci_dev_nohotplug_properties); ++ device_class_set_props(dc, vfio_pci_nohotplug_properties); + dc->hotpluggable = false; + + object_class_property_set_description(klass, /* 3.1 */ diff --git a/0173-vfio-pci.c-rename-vfio_pci_nohotplug_dev_class_init-.patch b/0173-vfio-pci.c-rename-vfio_pci_nohotplug_dev_class_init-.patch new file mode 100644 index 0000000..ca6d07b --- /dev/null +++ b/0173-vfio-pci.c-rename-vfio_pci_nohotplug_dev_class_init-.patch @@ -0,0 +1,49 @@ +From 58eda339811b0403105bc7b411749308800cb890 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:29 +0100 +Subject: [PATCH] vfio/pci.c: rename vfio_pci_nohotplug_dev_class_init() to + vfio_pci_nohotplug_class_init() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 1d675f3999 (clegoate/qemu-kvm-centos) + +This changes the function prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-22-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit cc44b39c274b35f1510725f60dd95af59d0bd3fb) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 339324987c..2b453fffcd 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -3950,7 +3950,7 @@ static const Property vfio_pci_nohotplug_properties[] = { + ON_OFF_AUTO_AUTO), + }; + +-static void vfio_pci_nohotplug_dev_class_init(ObjectClass *klass, ++static void vfio_pci_nohotplug_class_init(ObjectClass *klass, + const void *data) + { + DeviceClass *dc = DEVICE_CLASS(klass); +@@ -3975,7 +3975,7 @@ static const TypeInfo vfio_pci_nohotplug_dev_info = { + .name = TYPE_VFIO_PCI_NOHOTPLUG, + .parent = TYPE_VFIO_PCI, + .instance_size = sizeof(VFIOPCIDevice), +- .class_init = vfio_pci_nohotplug_dev_class_init, ++ .class_init = vfio_pci_nohotplug_class_init, + }; + + static void register_vfio_pci_dev_type(void) diff --git a/0174-vfio-pci.c-rename-vfio_pci_nohotplug_dev_info-to-vfi.patch b/0174-vfio-pci.c-rename-vfio_pci_nohotplug_dev_info-to-vfi.patch new file mode 100644 index 0000000..47039db --- /dev/null +++ b/0174-vfio-pci.c-rename-vfio_pci_nohotplug_dev_info-to-vfi.patch @@ -0,0 +1,49 @@ +From 500b0e88918a2ee50b853572aa65c8ecf9f86dbd Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:30 +0100 +Subject: [PATCH] vfio/pci.c: rename vfio_pci_nohotplug_dev_info to + vfio_pci_nohotplug_info +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] bea11a6e0c (clegoate/qemu-kvm-centos) + +This changes the prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-23-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 5bdf0db823869a210434b5048d20dce5e686b7aa) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 2b453fffcd..c34ed85d5e 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -3971,7 +3971,7 @@ static void vfio_pci_nohotplug_class_init(ObjectClass *klass, + "Controls loading of a legacy VGA BIOS ROM"); + } + +-static const TypeInfo vfio_pci_nohotplug_dev_info = { ++static const TypeInfo vfio_pci_nohotplug_info = { + .name = TYPE_VFIO_PCI_NOHOTPLUG, + .parent = TYPE_VFIO_PCI, + .instance_size = sizeof(VFIOPCIDevice), +@@ -3993,7 +3993,7 @@ static void register_vfio_pci_dev_type(void) + + type_register_static(&vfio_pci_device_info); + type_register_static(&vfio_pci_info); +- type_register_static(&vfio_pci_nohotplug_dev_info); ++ type_register_static(&vfio_pci_nohotplug_info); + } + + type_init(register_vfio_pci_dev_type) diff --git a/0175-vfio-user-pci.c-rename-vfio_user_pci_dev_class_init-.patch b/0175-vfio-user-pci.c-rename-vfio_user_pci_dev_class_init-.patch new file mode 100644 index 0000000..2a50f46 --- /dev/null +++ b/0175-vfio-user-pci.c-rename-vfio_user_pci_dev_class_init-.patch @@ -0,0 +1,49 @@ +From 8f91d493ced5ce37472395b2e9f315d0f5a598ac Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:31 +0100 +Subject: [PATCH] vfio-user/pci.c: rename vfio_user_pci_dev_class_init() to + vfio_user_pci_class_init() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 579c195342 (clegoate/qemu-kvm-centos) + +This changes the function prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-24-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit c833f7a5c66e1264bfaaa389467c5af8d9c49082) +Signed-off-by: Eric Auger +--- + hw/vfio-user/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index efceae69de..e2c5b5744c 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -446,7 +446,7 @@ static void vfio_user_pci_set_socket(Object *obj, Visitor *v, const char *name, + } + } + +-static void vfio_user_pci_dev_class_init(ObjectClass *klass, const void *data) ++static void vfio_user_pci_class_init(ObjectClass *klass, const void *data) + { + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass); +@@ -467,7 +467,7 @@ static const TypeInfo vfio_user_pci_dev_info = { + .name = TYPE_VFIO_USER_PCI, + .parent = TYPE_VFIO_PCI_DEVICE, + .instance_size = sizeof(VFIOUserPCIDevice), +- .class_init = vfio_user_pci_dev_class_init, ++ .class_init = vfio_user_pci_class_init, + .instance_init = vfio_user_instance_init, + .instance_finalize = vfio_user_instance_finalize, + }; diff --git a/0176-vfio-user-pci.c-rename-vfio_user_pci_dev_properties-.patch b/0176-vfio-user-pci.c-rename-vfio_user_pci_dev_properties-.patch new file mode 100644 index 0000000..39f4dd4 --- /dev/null +++ b/0176-vfio-user-pci.c-rename-vfio_user_pci_dev_properties-.patch @@ -0,0 +1,49 @@ +From 0d4b6b7b8557e48bcdf30b5627aac3d88ff49c0d Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:32 +0100 +Subject: [PATCH] vfio-user/pci.c: rename vfio_user_pci_dev_properties[] to + vfio_user_pci_properties[] +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 5b39336394 (clegoate/qemu-kvm-centos) + +This changes the prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-25-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 78f4b77607b41909c294f15ae4e51d87e36aab4f) +Signed-off-by: Eric Auger +--- + hw/vfio-user/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index e2c5b5744c..30f485fdbb 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -400,7 +400,7 @@ static void vfio_user_pci_reset(DeviceState *dev) + vfio_pci_post_reset(vdev); + } + +-static const Property vfio_user_pci_dev_properties[] = { ++static const Property vfio_user_pci_properties[] = { + DEFINE_PROP_UINT32("x-pci-vendor-id", VFIOPCIDevice, + vendor_id, PCI_ANY_ID), + DEFINE_PROP_UINT32("x-pci-device-id", VFIOPCIDevice, +@@ -452,7 +452,7 @@ static void vfio_user_pci_class_init(ObjectClass *klass, const void *data) + PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass); + + device_class_set_legacy_reset(dc, vfio_user_pci_reset); +- device_class_set_props(dc, vfio_user_pci_dev_properties); ++ device_class_set_props(dc, vfio_user_pci_properties); + + object_class_property_add(klass, "socket", "SocketAddress", NULL, + vfio_user_pci_set_socket, NULL, NULL); diff --git a/0177-vfio-user-pci.c-rename-vfio_user_instance_init-to-vf.patch b/0177-vfio-user-pci.c-rename-vfio_user_instance_init-to-vf.patch new file mode 100644 index 0000000..f6fc4e9 --- /dev/null +++ b/0177-vfio-user-pci.c-rename-vfio_user_instance_init-to-vf.patch @@ -0,0 +1,50 @@ +From 4d663daf7b40ec7404f284808f289e6e626f7cdf Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:33 +0100 +Subject: [PATCH] vfio-user/pci.c: rename vfio_user_instance_init() to + vfio_user_pci_init() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 070534d8db (clegoate/qemu-kvm-centos) + +This is the more typical naming convention for QOM init() functions, in +particular it changes the prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-26-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit de837b5cbd489410aab1eda00b4b50e45a85d5d6) +Signed-off-by: Eric Auger +--- + hw/vfio-user/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index 30f485fdbb..52561900fd 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -344,7 +344,7 @@ error: + vfio_pci_put_device(vdev); + } + +-static void vfio_user_instance_init(Object *obj) ++static void vfio_user_pci_init(Object *obj) + { + PCIDevice *pci_dev = PCI_DEVICE(obj); + VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(obj); +@@ -468,7 +468,7 @@ static const TypeInfo vfio_user_pci_dev_info = { + .parent = TYPE_VFIO_PCI_DEVICE, + .instance_size = sizeof(VFIOUserPCIDevice), + .class_init = vfio_user_pci_class_init, +- .instance_init = vfio_user_instance_init, ++ .instance_init = vfio_user_pci_init, + .instance_finalize = vfio_user_instance_finalize, + }; + diff --git a/0178-vfio-user-pci.c-rename-vfio_user_instance_finalize-t.patch b/0178-vfio-user-pci.c-rename-vfio_user_instance_finalize-t.patch new file mode 100644 index 0000000..17affba --- /dev/null +++ b/0178-vfio-user-pci.c-rename-vfio_user_instance_finalize-t.patch @@ -0,0 +1,50 @@ +From dee9e020c11f4b7b8fc7dc9474ef1d5ce68e9ed6 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:34 +0100 +Subject: [PATCH] vfio-user/pci.c: rename vfio_user_instance_finalize() to + vfio_user_pci_finalize() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 2ea62f09a6 (clegoate/qemu-kvm-centos) + +This is the more typical naming convention for QOM finalize() functions, in +particular it changes the prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-27-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit d5447437aef2d326728e0ad1590a5fa50c0b33a3) +Signed-off-by: Eric Auger +--- + hw/vfio-user/pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index 52561900fd..d4f5c7b9d7 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -370,7 +370,7 @@ static void vfio_user_pci_init(Object *obj) + pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; + } + +-static void vfio_user_instance_finalize(Object *obj) ++static void vfio_user_pci_finalize(Object *obj) + { + VFIOPCIDevice *vdev = VFIO_PCI_DEVICE(obj); + VFIODevice *vbasedev = &vdev->vbasedev; +@@ -469,7 +469,7 @@ static const TypeInfo vfio_user_pci_dev_info = { + .instance_size = sizeof(VFIOUserPCIDevice), + .class_init = vfio_user_pci_class_init, + .instance_init = vfio_user_pci_init, +- .instance_finalize = vfio_user_instance_finalize, ++ .instance_finalize = vfio_user_pci_finalize, + }; + + static void register_vfio_user_dev_type(void) diff --git a/0179-vfio-user-pci.c-rename-vfio_user_pci_dev_info-to-vfi.patch b/0179-vfio-user-pci.c-rename-vfio_user_pci_dev_info-to-vfi.patch new file mode 100644 index 0000000..0be3804 --- /dev/null +++ b/0179-vfio-user-pci.c-rename-vfio_user_pci_dev_info-to-vfi.patch @@ -0,0 +1,50 @@ +From 3a2d3da1c75677ed4839f0589ef656fc7fbe0741 Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:35 +0100 +Subject: [PATCH] vfio-user/pci.c: rename vfio_user_pci_dev_info to + vfio_user_pci_info +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 80e39adf95 (clegoate/qemu-kvm-centos) + +This changes the prefix to match the name of the QOM type. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-28-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit d0776b8c60fcc5833fba1d2ce8e0780c429108bc) +Signed-off-by: Eric Auger +--- + hw/vfio-user/pci.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index d4f5c7b9d7..b53ed3b456 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -463,7 +463,7 @@ static void vfio_user_pci_class_init(ObjectClass *klass, const void *data) + pdc->realize = vfio_user_pci_realize; + } + +-static const TypeInfo vfio_user_pci_dev_info = { ++static const TypeInfo vfio_user_pci_info = { + .name = TYPE_VFIO_USER_PCI, + .parent = TYPE_VFIO_PCI_DEVICE, + .instance_size = sizeof(VFIOUserPCIDevice), +@@ -474,7 +474,7 @@ static const TypeInfo vfio_user_pci_dev_info = { + + static void register_vfio_user_dev_type(void) + { +- type_register_static(&vfio_user_pci_dev_info); ++ type_register_static(&vfio_user_pci_info); + } + +- type_init(register_vfio_user_dev_type) ++type_init(register_vfio_user_dev_type) diff --git a/0180-include-hw-vfio-vfio-device.h-fix-include-header-gua.patch b/0180-include-hw-vfio-vfio-device.h-fix-include-header-gua.patch new file mode 100644 index 0000000..e6de6a4 --- /dev/null +++ b/0180-include-hw-vfio-vfio-device.h-fix-include-header-gua.patch @@ -0,0 +1,48 @@ +From 2222777c37852a5caa48c5bc68c7782fa047d98e Mon Sep 17 00:00:00 2001 +From: Mark Cave-Ayland +Date: Thu, 25 Sep 2025 12:31:36 +0100 +Subject: [PATCH] include/hw/vfio/vfio-device.h: fix include header guard name +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 6ab35046f8 (clegoate/qemu-kvm-centos) + +The header guard was incorrectly called HW_VFIO_VFIO_COMMON_H instead of +HW_VFIO_VFIO_DEVICE_H. + +Signed-off-by: Mark Cave-Ayland +Reviewed-by: Philippe Mathieu-Daudé +Link: https://lore.kernel.org/qemu-devel/20250925113159.1760317-29-mark.caveayland@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 7c773b4267ae10820ed5e3ec6b15219b39dbcebd) +Signed-off-by: Eric Auger +--- + include/hw/vfio/vfio-device.h | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/include/hw/vfio/vfio-device.h b/include/hw/vfio/vfio-device.h +index 28047a6339..dac305fc6f 100644 +--- a/include/hw/vfio/vfio-device.h ++++ b/include/hw/vfio/vfio-device.h +@@ -18,8 +18,8 @@ + * Copyright (C) 2008, IBM, Muli Ben-Yehuda (muli@il.ibm.com) + */ + +-#ifndef HW_VFIO_VFIO_COMMON_H +-#define HW_VFIO_VFIO_COMMON_H ++#ifndef HW_VFIO_VFIO_DEVICE_H ++#define HW_VFIO_VFIO_DEVICE_H + + #include "system/memory.h" + #include "qemu/queue.h" +@@ -289,4 +289,4 @@ void vfio_device_init(VFIODevice *vbasedev, int type, VFIODeviceOps *ops, + int vfio_device_get_aw_bits(VFIODevice *vdev); + + void vfio_kvm_device_close(void); +-#endif /* HW_VFIO_VFIO_COMMON_H */ ++#endif /* HW_VFIO_VFIO_DEVICE_H */ diff --git a/0181-vfio-Remove-workaround-for-kernel-DMA-unmap-overflow.patch b/0181-vfio-Remove-workaround-for-kernel-DMA-unmap-overflow.patch new file mode 100644 index 0000000..6a875b3 --- /dev/null +++ b/0181-vfio-Remove-workaround-for-kernel-DMA-unmap-overflow.patch @@ -0,0 +1,87 @@ +From cfe853e265399906daa96b396056dc04dd715314 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= +Date: Fri, 26 Sep 2025 10:54:23 +0200 +Subject: [PATCH] vfio: Remove workaround for kernel DMA unmap overflow bug +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 894eae8478 (clegoate/qemu-kvm-centos) + +A kernel bug was introduced in Linux v4.15 via commit 71a7d3d78e3c +("vfio/type1: Check for address space wrap-around on unmap"), which +added a test for address space wrap-around in the vfio DMA unmap path. +Unfortunately, due to an integer overflow, the kernel would +incorrectly detect an unmap of the last page in the 64-bit address +space as a wrap-around, causing the unmap to fail with -EINVAL. + +A QEMU workaround was introduced in commit 567d7d3e6be5 ("vfio/common: +Work around kernel overflow bug in DMA unmap") to retry the unmap, +excluding the final page of the range. + +The kernel bug was then fixed in Linux v5.0 via commit 58fec830fc19 +("vfio/type1: Fix dma_unmap wrap-around check"). Since the oldest +supported LTS kernel is now v5.4, kernels affected by this bug are +considered deprecated, and the workaround is no longer necessary. + +This change reverts 567d7d3e6be5, removing the workaround. + +Link: https://bugzilla.redhat.com/show_bug.cgi?id=1662291 +Reviewed-by: Alex Williamson +Reviewed-by: Zhenzhong Duan +Link: https://lore.kernel.org/qemu-devel/20250926085423.375547-1-clg@redhat.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 1d9a832b58be63e53ef0d2342c271a34ecb349db) +Signed-off-by: Eric Auger +--- + hw/vfio/container-legacy.c | 20 +------------------- + hw/vfio/trace-events | 1 - + 2 files changed, 1 insertion(+), 20 deletions(-) + +diff --git a/hw/vfio/container-legacy.c b/hw/vfio/container-legacy.c +index 0101a72f53..2d19d97e2d 100644 +--- a/hw/vfio/container-legacy.c ++++ b/hw/vfio/container-legacy.c +@@ -161,25 +161,7 @@ static int vfio_legacy_dma_unmap_one(const VFIOContainer *bcontainer, + need_dirty_sync = true; + } + +- while (ioctl(container->fd, VFIO_IOMMU_UNMAP_DMA, &unmap)) { +- /* +- * The type1 backend has an off-by-one bug in the kernel (71a7d3d78e3c +- * v4.15) where an overflow in its wrap-around check prevents us from +- * unmapping the last page of the address space. Test for the error +- * condition and re-try the unmap excluding the last page. The +- * expectation is that we've never mapped the last page anyway and this +- * unmap request comes via vIOMMU support which also makes it unlikely +- * that this page is used. This bug was introduced well after type1 v2 +- * support was introduced, so we shouldn't need to test for v1. A fix +- * is queued for kernel v5.0 so this workaround can be removed once +- * affected kernels are sufficiently deprecated. +- */ +- if (errno == EINVAL && unmap.size && !(unmap.iova + unmap.size) && +- container->iommu_type == VFIO_TYPE1v2_IOMMU) { +- trace_vfio_legacy_dma_unmap_overflow_workaround(); +- unmap.size -= 1ULL << ctz64(bcontainer->pgsizes); +- continue; +- } ++ if (ioctl(container->fd, VFIO_IOMMU_UNMAP_DMA, &unmap)) { + return -errno; + } + +diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events +index e3d571f8c8..7496e1b64b 100644 +--- a/hw/vfio/trace-events ++++ b/hw/vfio/trace-events +@@ -112,7 +112,6 @@ vfio_container_disconnect(int fd) "close container->fd=%d" + vfio_group_put(int fd) "close group->fd=%d" + vfio_device_get(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u" + vfio_device_put(int fd) "close vdev->fd=%d" +-vfio_legacy_dma_unmap_overflow_workaround(void) "" + + # region.c + vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)" diff --git a/0182-system-iommufd-Use-uint64_t-type-for-IOVA-mapping-si.patch b/0182-system-iommufd-Use-uint64_t-type-for-IOVA-mapping-si.patch new file mode 100644 index 0000000..127f7b7 --- /dev/null +++ b/0182-system-iommufd-Use-uint64_t-type-for-IOVA-mapping-si.patch @@ -0,0 +1,85 @@ +From ce1917ade7b2815d4b4eed49aef0e9aeb55745cb Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= +Date: Tue, 30 Sep 2025 14:35:25 +0200 +Subject: [PATCH] system/iommufd: Use uint64_t type for IOVA mapping size +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 84ed6b92c9 (clegoate/qemu-kvm-centos) + +The 'ram_addr_t' type is described as: + + a QEMU internal address space that maps guest RAM physical + addresses into an intermediate address space that can map + to host virtual address spaces. + +This doesn't represent well an IOVA mapping size. Simply use +the uint64_t type. + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250930123528.42878-2-philmd@linaro.org +Signed-off-by: Cédric Le Goater +(cherry picked from commit 70a7e33ddb7f2ca7caacf286222bd80fd330c454) +Signed-off-by: Eric Auger +--- + backends/iommufd.c | 6 +++--- + include/system/iommufd.h | 6 +++--- + 2 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/backends/iommufd.c b/backends/iommufd.c +index 2a33c7ab0b..fdfb7c9d67 100644 +--- a/backends/iommufd.c ++++ b/backends/iommufd.c +@@ -197,7 +197,7 @@ void iommufd_backend_free_id(IOMMUFDBackend *be, uint32_t id) + } + + int iommufd_backend_map_dma(IOMMUFDBackend *be, uint32_t ioas_id, hwaddr iova, +- ram_addr_t size, void *vaddr, bool readonly) ++ uint64_t size, void *vaddr, bool readonly) + { + int ret, fd = be->fd; + struct iommu_ioas_map map = { +@@ -230,7 +230,7 @@ int iommufd_backend_map_dma(IOMMUFDBackend *be, uint32_t ioas_id, hwaddr iova, + } + + int iommufd_backend_map_file_dma(IOMMUFDBackend *be, uint32_t ioas_id, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + int mfd, unsigned long start, bool readonly) + { + int ret, fd = be->fd; +@@ -268,7 +268,7 @@ int iommufd_backend_map_file_dma(IOMMUFDBackend *be, uint32_t ioas_id, + } + + int iommufd_backend_unmap_dma(IOMMUFDBackend *be, uint32_t ioas_id, +- hwaddr iova, ram_addr_t size) ++ hwaddr iova, uint64_t size) + { + int ret, fd = be->fd; + struct iommu_ioas_unmap unmap = { +diff --git a/include/system/iommufd.h b/include/system/iommufd.h +index c9c72ffc45..a659f36a20 100644 +--- a/include/system/iommufd.h ++++ b/include/system/iommufd.h +@@ -45,12 +45,12 @@ bool iommufd_backend_alloc_ioas(IOMMUFDBackend *be, uint32_t *ioas_id, + Error **errp); + void iommufd_backend_free_id(IOMMUFDBackend *be, uint32_t id); + int iommufd_backend_map_file_dma(IOMMUFDBackend *be, uint32_t ioas_id, +- hwaddr iova, ram_addr_t size, int fd, ++ hwaddr iova, uint64_t size, int fd, + unsigned long start, bool readonly); + int iommufd_backend_map_dma(IOMMUFDBackend *be, uint32_t ioas_id, hwaddr iova, +- ram_addr_t size, void *vaddr, bool readonly); ++ uint64_t size, void *vaddr, bool readonly); + int iommufd_backend_unmap_dma(IOMMUFDBackend *be, uint32_t ioas_id, +- hwaddr iova, ram_addr_t size); ++ hwaddr iova, uint64_t size); + bool iommufd_backend_get_device_info(IOMMUFDBackend *be, uint32_t devid, + uint32_t *type, void *data, uint32_t len, + uint64_t *caps, Error **errp); diff --git a/0183-hw-vfio-Reorder-vfio_container_query_dirty_bitmap-tr.patch b/0183-hw-vfio-Reorder-vfio_container_query_dirty_bitmap-tr.patch new file mode 100644 index 0000000..c19fb72 --- /dev/null +++ b/0183-hw-vfio-Reorder-vfio_container_query_dirty_bitmap-tr.patch @@ -0,0 +1,47 @@ +From b9fe5756dd7d8204ff06d0c527dbb78152aca0e2 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= +Date: Tue, 30 Sep 2025 14:35:26 +0200 +Subject: [PATCH] hw/vfio: Reorder vfio_container_query_dirty_bitmap() trace + format +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] aae3b6df8b (clegoate/qemu-kvm-centos) + +Update the trace-events comments after the changes from +commit dcce51b1938 ("hw/vfio/container-base.c: rename file +to container.c") and commit a3bcae62b6a ("hw/vfio/container.c: +rename file to container-legacy.c"). + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250930123528.42878-3-philmd@linaro.org +Signed-off-by: Cédric Le Goater +(cherry picked from commit 5764a715277afc4d6076fbf2bae1697dbd2fa182) +Signed-off-by: Eric Auger +--- + hw/vfio/trace-events | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events +index 7496e1b64b..b1b470cc29 100644 +--- a/hw/vfio/trace-events ++++ b/hw/vfio/trace-events +@@ -104,10 +104,10 @@ vfio_device_dirty_tracking_update(uint64_t start, uint64_t end, uint64_t min, ui + vfio_device_dirty_tracking_start(int nr_ranges, uint64_t min32, uint64_t max32, uint64_t min64, uint64_t max64, uint64_t minpci, uint64_t maxpci) "nr_ranges %d 32:[0x%"PRIx64" - 0x%"PRIx64"], 64:[0x%"PRIx64" - 0x%"PRIx64"], pci64:[0x%"PRIx64" - 0x%"PRIx64"]" + vfio_iommu_map_dirty_notify(uint64_t iova_start, uint64_t iova_end) "iommu dirty @ 0x%"PRIx64" - 0x%"PRIx64 + +-# container-base.c ++# container.c + vfio_container_query_dirty_bitmap(uint64_t iova, uint64_t size, uint64_t bitmap_size, uint64_t start, uint64_t dirty_pages) "iova=0x%"PRIx64" size= 0x%"PRIx64" bitmap_size=0x%"PRIx64" start=0x%"PRIx64" dirty_pages=%"PRIu64 + +-# container.c ++# container-legacy.c + vfio_container_disconnect(int fd) "close container->fd=%d" + vfio_group_put(int fd) "close group->fd=%d" + vfio_device_get(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u" diff --git a/0184-hw-vfio-Avoid-ram_addr_t-in-vfio_container_query_dir.patch b/0184-hw-vfio-Avoid-ram_addr_t-in-vfio_container_query_dir.patch new file mode 100644 index 0000000..f8abfc3 --- /dev/null +++ b/0184-hw-vfio-Avoid-ram_addr_t-in-vfio_container_query_dir.patch @@ -0,0 +1,164 @@ +From d3fb6628415ada645e6662f5dc42e2973224772e Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= +Date: Tue, 30 Sep 2025 14:35:27 +0200 +Subject: [PATCH] hw/vfio: Avoid ram_addr_t in + vfio_container_query_dirty_bitmap() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] f9bdeb93c2 (clegoate/qemu-kvm-centos) + +The 'ram_addr_t' type is described as: + + a QEMU internal address space that maps guest RAM physical + addresses into an intermediate address space that can map + to host virtual address spaces. + +vfio_container_query_dirty_bitmap() doesn't expect such QEMU +intermediate address, but a guest physical addresses. Use the +appropriate 'hwaddr' type, rename as @translated_addr for +clarity. + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250930123528.42878-4-philmd@linaro.org +Signed-off-by: Cédric Le Goater +(cherry picked from commit 0ca70d3bf722a94c53f254670e6a642e77aa077c) +Signed-off-by: Eric Auger +--- + hw/vfio/container.c | 11 ++++++----- + hw/vfio/listener.c | 18 +++++++++--------- + hw/vfio/trace-events | 2 +- + include/hw/vfio/vfio-container.h | 3 ++- + 4 files changed, 18 insertions(+), 16 deletions(-) + +diff --git a/hw/vfio/container.c b/hw/vfio/container.c +index 250b20f424..9d69439371 100644 +--- a/hw/vfio/container.c ++++ b/hw/vfio/container.c +@@ -246,7 +246,7 @@ static int vfio_container_devices_query_dirty_bitmap( + + int vfio_container_query_dirty_bitmap(const VFIOContainer *bcontainer, + uint64_t iova, uint64_t size, +- ram_addr_t ram_addr, Error **errp) ++ hwaddr translated_addr, Error **errp) + { + bool all_device_dirty_tracking = + vfio_container_devices_dirty_tracking_is_supported(bcontainer); +@@ -255,7 +255,7 @@ int vfio_container_query_dirty_bitmap(const VFIOContainer *bcontainer, + int ret; + + if (!bcontainer->dirty_pages_supported && !all_device_dirty_tracking) { +- cpu_physical_memory_set_dirty_range(ram_addr, size, ++ cpu_physical_memory_set_dirty_range(translated_addr, size, + tcg_enabled() ? DIRTY_CLIENTS_ALL : + DIRTY_CLIENTS_NOCODE); + return 0; +@@ -280,11 +280,12 @@ int vfio_container_query_dirty_bitmap(const VFIOContainer *bcontainer, + goto out; + } + +- dirty_pages = cpu_physical_memory_set_dirty_lebitmap(vbmap.bitmap, ram_addr, ++ dirty_pages = cpu_physical_memory_set_dirty_lebitmap(vbmap.bitmap, ++ translated_addr, + vbmap.pages); + +- trace_vfio_container_query_dirty_bitmap(iova, size, vbmap.size, ram_addr, +- dirty_pages); ++ trace_vfio_container_query_dirty_bitmap(iova, size, vbmap.size, ++ translated_addr, dirty_pages); + out: + g_free(vbmap.bitmap); + +diff --git a/hw/vfio/listener.c b/hw/vfio/listener.c +index 3b6f17f0c3..a2c19a3cec 100644 +--- a/hw/vfio/listener.c ++++ b/hw/vfio/listener.c +@@ -1059,7 +1059,7 @@ static void vfio_iommu_map_dirty_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb) + VFIOGuestIOMMU *giommu = gdn->giommu; + VFIOContainer *bcontainer = giommu->bcontainer; + hwaddr iova = iotlb->iova + giommu->iommu_offset; +- ram_addr_t translated_addr; ++ hwaddr translated_addr; + Error *local_err = NULL; + int ret = -EINVAL; + MemoryRegion *mr; +@@ -1108,8 +1108,8 @@ static int vfio_ram_discard_query_dirty_bitmap(MemoryRegionSection *section, + { + const hwaddr size = int128_get64(section->size); + const hwaddr iova = section->offset_within_address_space; +- const ram_addr_t ram_addr = memory_region_get_ram_addr(section->mr) + +- section->offset_within_region; ++ const hwaddr translated_addr = memory_region_get_ram_addr(section->mr) + ++ section->offset_within_region; + VFIORamDiscardListener *vrdl = opaque; + Error *local_err = NULL; + int ret; +@@ -1118,8 +1118,8 @@ static int vfio_ram_discard_query_dirty_bitmap(MemoryRegionSection *section, + * Sync the whole mapped region (spanning multiple individual mappings) + * in one go. + */ +- ret = vfio_container_query_dirty_bitmap(vrdl->bcontainer, iova, size, ram_addr, +- &local_err); ++ ret = vfio_container_query_dirty_bitmap(vrdl->bcontainer, iova, size, ++ translated_addr, &local_err); + if (ret) { + error_report_err(local_err); + } +@@ -1183,7 +1183,7 @@ static int vfio_sync_iommu_dirty_bitmap(VFIOContainer *bcontainer, + static int vfio_sync_dirty_bitmap(VFIOContainer *bcontainer, + MemoryRegionSection *section, Error **errp) + { +- ram_addr_t ram_addr; ++ hwaddr translated_addr; + + if (memory_region_is_iommu(section->mr)) { + return vfio_sync_iommu_dirty_bitmap(bcontainer, section); +@@ -1198,12 +1198,12 @@ static int vfio_sync_dirty_bitmap(VFIOContainer *bcontainer, + return ret; + } + +- ram_addr = memory_region_get_ram_addr(section->mr) + +- section->offset_within_region; ++ translated_addr = memory_region_get_ram_addr(section->mr) + ++ section->offset_within_region; + + return vfio_container_query_dirty_bitmap(bcontainer, + REAL_HOST_PAGE_ALIGN(section->offset_within_address_space), +- int128_get64(section->size), ram_addr, errp); ++ int128_get64(section->size), translated_addr, errp); + } + + static void vfio_listener_log_sync(MemoryListener *listener, +diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events +index b1b470cc29..1e895448cd 100644 +--- a/hw/vfio/trace-events ++++ b/hw/vfio/trace-events +@@ -105,7 +105,7 @@ vfio_device_dirty_tracking_start(int nr_ranges, uint64_t min32, uint64_t max32, + vfio_iommu_map_dirty_notify(uint64_t iova_start, uint64_t iova_end) "iommu dirty @ 0x%"PRIx64" - 0x%"PRIx64 + + # container.c +-vfio_container_query_dirty_bitmap(uint64_t iova, uint64_t size, uint64_t bitmap_size, uint64_t start, uint64_t dirty_pages) "iova=0x%"PRIx64" size= 0x%"PRIx64" bitmap_size=0x%"PRIx64" start=0x%"PRIx64" dirty_pages=%"PRIu64 ++vfio_container_query_dirty_bitmap(uint64_t iova, uint64_t size, uint64_t bitmap_size, uint64_t translated_addr, uint64_t dirty_pages) "iova=0x%"PRIx64" size= 0x%"PRIx64" bitmap_size=0x%"PRIx64" gpa=0x%"PRIx64" dirty_pages=%"PRIu64 + + # container-legacy.c + vfio_container_disconnect(int fd) "close container->fd=%d" +diff --git a/include/hw/vfio/vfio-container.h b/include/hw/vfio/vfio-container.h +index b8fb2b8b5d..093c360f0e 100644 +--- a/include/hw/vfio/vfio-container.h ++++ b/include/hw/vfio/vfio-container.h +@@ -98,7 +98,8 @@ bool vfio_container_dirty_tracking_is_started( + bool vfio_container_devices_dirty_tracking_is_supported( + const VFIOContainer *bcontainer); + int vfio_container_query_dirty_bitmap(const VFIOContainer *bcontainer, +- uint64_t iova, uint64_t size, ram_addr_t ram_addr, Error **errp); ++ uint64_t iova, uint64_t size, ++ hwaddr translated_addr, Error **errp); + + GList *vfio_container_get_iova_ranges(const VFIOContainer *bcontainer); + diff --git a/0185-hw-vfio-Use-uint64_t-for-IOVA-mapping-size-in-vfio_c.patch b/0185-hw-vfio-Use-uint64_t-for-IOVA-mapping-size-in-vfio_c.patch new file mode 100644 index 0000000..ae4ba33 --- /dev/null +++ b/0185-hw-vfio-Use-uint64_t-for-IOVA-mapping-size-in-vfio_c.patch @@ -0,0 +1,225 @@ +From f9b6e1e2ad4b86c43062afb6ad7e16032cf4f6d8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= +Date: Tue, 30 Sep 2025 14:35:28 +0200 +Subject: [PATCH] hw/vfio: Use uint64_t for IOVA mapping size in + vfio_container_dma_*map +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 0868e1cbc3 (clegoate/qemu-kvm-centos) + +The 'ram_addr_t' type is described as: + + a QEMU internal address space that maps guest RAM physical + addresses into an intermediate address space that can map + to host virtual address spaces. + +This doesn't represent well an IOVA mapping size. Simply use +the uint64_t type. + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20250930123528.42878-5-philmd@linaro.org +Signed-off-by: Cédric Le Goater +(cherry picked from commit f0b52aa08ab0868c18d881381a8fda4b59b37517) +Signed-off-by: Eric Auger +--- + hw/vfio-user/container.c | 4 ++-- + hw/vfio/container-legacy.c | 8 ++++---- + hw/vfio/container.c | 4 ++-- + hw/vfio/cpr-legacy.c | 2 +- + hw/vfio/iommufd.c | 6 +++--- + include/hw/vfio/vfio-container.h | 10 +++++----- + include/hw/vfio/vfio-cpr.h | 2 +- + 7 files changed, 18 insertions(+), 18 deletions(-) + +diff --git a/hw/vfio-user/container.c b/hw/vfio-user/container.c +index 411eb7b28b..e45192fef6 100644 +--- a/hw/vfio-user/container.c ++++ b/hw/vfio-user/container.c +@@ -39,7 +39,7 @@ static void vfio_user_listener_commit(VFIOContainer *bcontainer) + } + + static int vfio_user_dma_unmap(const VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + IOMMUTLBEntry *iotlb, bool unmap_all) + { + VFIOUserContainer *container = VFIO_IOMMU_USER(bcontainer); +@@ -81,7 +81,7 @@ static int vfio_user_dma_unmap(const VFIOContainer *bcontainer, + } + + static int vfio_user_dma_map(const VFIOContainer *bcontainer, hwaddr iova, +- ram_addr_t size, void *vaddr, bool readonly, ++ uint64_t size, void *vaddr, bool readonly, + MemoryRegion *mrp) + { + VFIOUserContainer *container = VFIO_IOMMU_USER(bcontainer); +diff --git a/hw/vfio/container-legacy.c b/hw/vfio/container-legacy.c +index 2d19d97e2d..1394dd6fe8 100644 +--- a/hw/vfio/container-legacy.c ++++ b/hw/vfio/container-legacy.c +@@ -83,7 +83,7 @@ static int vfio_ram_block_discard_disable(VFIOLegacyContainer *container, + } + + static int vfio_dma_unmap_bitmap(const VFIOLegacyContainer *container, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + IOMMUTLBEntry *iotlb) + { + const VFIOContainer *bcontainer = VFIO_IOMMU(container); +@@ -136,7 +136,7 @@ unmap_exit: + } + + static int vfio_legacy_dma_unmap_one(const VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + IOMMUTLBEntry *iotlb) + { + const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); +@@ -181,7 +181,7 @@ static int vfio_legacy_dma_unmap_one(const VFIOContainer *bcontainer, + * DMA - Mapping and unmapping for the "type1" IOMMU interface used on x86 + */ + static int vfio_legacy_dma_unmap(const VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + IOMMUTLBEntry *iotlb, bool unmap_all) + { + int ret; +@@ -206,7 +206,7 @@ static int vfio_legacy_dma_unmap(const VFIOContainer *bcontainer, + } + + static int vfio_legacy_dma_map(const VFIOContainer *bcontainer, hwaddr iova, +- ram_addr_t size, void *vaddr, bool readonly, ++ uint64_t size, void *vaddr, bool readonly, + MemoryRegion *mr) + { + const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); +diff --git a/hw/vfio/container.c b/hw/vfio/container.c +index 9d69439371..41de343924 100644 +--- a/hw/vfio/container.c ++++ b/hw/vfio/container.c +@@ -74,7 +74,7 @@ void vfio_address_space_insert(VFIOAddressSpace *space, + } + + int vfio_container_dma_map(VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + void *vaddr, bool readonly, MemoryRegion *mr) + { + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); +@@ -93,7 +93,7 @@ int vfio_container_dma_map(VFIOContainer *bcontainer, + } + + int vfio_container_dma_unmap(VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + IOMMUTLBEntry *iotlb, bool unmap_all) + { + VFIOIOMMUClass *vioc = VFIO_IOMMU_GET_CLASS(bcontainer); +diff --git a/hw/vfio/cpr-legacy.c b/hw/vfio/cpr-legacy.c +index bbf7a0d35f..3a1d126556 100644 +--- a/hw/vfio/cpr-legacy.c ++++ b/hw/vfio/cpr-legacy.c +@@ -39,7 +39,7 @@ static bool vfio_dma_unmap_vaddr_all(VFIOLegacyContainer *container, + * The incoming state is cleared thereafter. + */ + static int vfio_legacy_cpr_dma_map(const VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, void *vaddr, ++ hwaddr iova, uint64_t size, void *vaddr, + bool readonly, MemoryRegion *mr) + { + const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); +diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c +index 76f0806ec0..10fc065d20 100644 +--- a/hw/vfio/iommufd.c ++++ b/hw/vfio/iommufd.c +@@ -35,7 +35,7 @@ + TYPE_HOST_IOMMU_DEVICE_IOMMUFD "-vfio" + + static int iommufd_cdev_map(const VFIOContainer *bcontainer, hwaddr iova, +- ram_addr_t size, void *vaddr, bool readonly, ++ uint64_t size, void *vaddr, bool readonly, + MemoryRegion *mr) + { + const VFIOIOMMUFDContainer *container = VFIO_IOMMU_IOMMUFD(bcontainer); +@@ -46,7 +46,7 @@ static int iommufd_cdev_map(const VFIOContainer *bcontainer, hwaddr iova, + } + + static int iommufd_cdev_map_file(const VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + int fd, unsigned long start, bool readonly) + { + const VFIOIOMMUFDContainer *container = VFIO_IOMMU_IOMMUFD(bcontainer); +@@ -57,7 +57,7 @@ static int iommufd_cdev_map_file(const VFIOContainer *bcontainer, + } + + static int iommufd_cdev_unmap(const VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + IOMMUTLBEntry *iotlb, bool unmap_all) + { + const VFIOIOMMUFDContainer *container = VFIO_IOMMU_IOMMUFD(bcontainer); +diff --git a/include/hw/vfio/vfio-container.h b/include/hw/vfio/vfio-container.h +index 093c360f0e..c4b58d664b 100644 +--- a/include/hw/vfio/vfio-container.h ++++ b/include/hw/vfio/vfio-container.h +@@ -81,10 +81,10 @@ void vfio_address_space_insert(VFIOAddressSpace *space, + VFIOContainer *bcontainer); + + int vfio_container_dma_map(VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + void *vaddr, bool readonly, MemoryRegion *mr); + int vfio_container_dma_unmap(VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + IOMMUTLBEntry *iotlb, bool unmap_all); + bool vfio_container_add_section_window(VFIOContainer *bcontainer, + MemoryRegionSection *section, +@@ -167,7 +167,7 @@ struct VFIOIOMMUClass { + * Returns 0 to indicate success and -errno otherwise. + */ + int (*dma_map)(const VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + void *vaddr, bool readonly, MemoryRegion *mr); + /** + * @dma_map_file +@@ -182,7 +182,7 @@ struct VFIOIOMMUClass { + * @readonly: map read only if true + */ + int (*dma_map_file)(const VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + int fd, unsigned long start, bool readonly); + /** + * @dma_unmap +@@ -198,7 +198,7 @@ struct VFIOIOMMUClass { + * Returns 0 to indicate success and -errno otherwise. + */ + int (*dma_unmap)(const VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, ++ hwaddr iova, uint64_t size, + IOMMUTLBEntry *iotlb, bool unmap_all); + + +diff --git a/include/hw/vfio/vfio-cpr.h b/include/hw/vfio/vfio-cpr.h +index 26ee0c4fe1..81f4e24e22 100644 +--- a/include/hw/vfio/vfio-cpr.h ++++ b/include/hw/vfio/vfio-cpr.h +@@ -21,7 +21,7 @@ struct VFIOIOMMUFDContainer; + struct IOMMUFDBackend; + + typedef int (*dma_map_fn)(const struct VFIOContainer *bcontainer, +- hwaddr iova, ram_addr_t size, void *vaddr, ++ hwaddr iova, uint64_t size, void *vaddr, + bool readonly, MemoryRegion *mr); + + typedef struct VFIOContainerCPR { diff --git a/0186-migration-push-Error-errp-into-vmstate_subsection_lo.patch b/0186-migration-push-Error-errp-into-vmstate_subsection_lo.patch new file mode 100644 index 0000000..d626c04 --- /dev/null +++ b/0186-migration-push-Error-errp-into-vmstate_subsection_lo.patch @@ -0,0 +1,99 @@ +From 9773fa079d53f9589850df09d18245561a8fe578 Mon Sep 17 00:00:00 2001 +From: Arun Menon +Date: Thu, 18 Sep 2025 20:53:18 +0530 +Subject: [PATCH] migration: push Error **errp into vmstate_subsection_load() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 83aa355457 (clegoate/qemu-kvm-centos) + +This is an incremental step in converting vmstate loading +code to report error via Error objects instead of directly +printing it to console/monitor. +It is ensured that vmstate_subsection_load() must report an error +in errp, in case of failure. + +The errors are temporarily reported using error_report_err(). +This is removed in the subsequent patches in this series, +when we are actually able to propagate the error to the calling +function using errp. + +Reviewed-by: Marc-André Lureau +Reviewed-by: Fabiano Rosas +Signed-off-by: Arun Menon +Tested-by: Fabiano Rosas +Reviewed-by: Akihiko Odaki +Link: https://lore.kernel.org/r/20250918-propagate_tpm_error-v14-1-36f11a6fb9d3@redhat.com +Signed-off-by: Peter Xu +(cherry picked from commit 73b42fc58d035cb2fcfe90083d6b33aeb4fa1b2a) +Signed-off-by: Eric Auger +--- + migration/vmstate.c | 13 ++++++++++--- + 1 file changed, 10 insertions(+), 3 deletions(-) + +diff --git a/migration/vmstate.c b/migration/vmstate.c +index 5feaa3244d..08f2b562e3 100644 +--- a/migration/vmstate.c ++++ b/migration/vmstate.c +@@ -25,7 +25,7 @@ static int vmstate_subsection_save(QEMUFile *f, const VMStateDescription *vmsd, + void *opaque, JSONWriter *vmdesc, + Error **errp); + static int vmstate_subsection_load(QEMUFile *f, const VMStateDescription *vmsd, +- void *opaque); ++ void *opaque, Error **errp); + + /* Whether this field should exist for either save or load the VM? */ + static bool +@@ -136,6 +136,7 @@ int vmstate_load_state(QEMUFile *f, const VMStateDescription *vmsd, + { + const VMStateField *field = vmsd->fields; + int ret = 0; ++ Error *local_err = NULL; + + trace_vmstate_load_state(vmsd->name, version_id); + if (version_id > vmsd->version_id) { +@@ -225,9 +226,10 @@ int vmstate_load_state(QEMUFile *f, const VMStateDescription *vmsd, + field++; + } + assert(field->flags == VMS_END); +- ret = vmstate_subsection_load(f, vmsd, opaque); ++ ret = vmstate_subsection_load(f, vmsd, opaque, &local_err); + if (ret != 0) { + qemu_file_set_error(f, ret); ++ error_report_err(local_err); + return ret; + } + if (vmsd->post_load) { +@@ -566,7 +568,7 @@ vmstate_get_subsection(const VMStateDescription * const *sub, + } + + static int vmstate_subsection_load(QEMUFile *f, const VMStateDescription *vmsd, +- void *opaque) ++ void *opaque, Error **errp) + { + trace_vmstate_subsection_load(vmsd->name); + +@@ -598,6 +600,8 @@ static int vmstate_subsection_load(QEMUFile *f, const VMStateDescription *vmsd, + sub_vmsd = vmstate_get_subsection(vmsd->subsections, idstr); + if (sub_vmsd == NULL) { + trace_vmstate_subsection_load_bad(vmsd->name, idstr, "(lookup)"); ++ error_setg(errp, "VM subsection '%s' in '%s' does not exist", ++ idstr, vmsd->name); + return -ENOENT; + } + qemu_file_skip(f, 1); /* subsection */ +@@ -608,6 +612,9 @@ static int vmstate_subsection_load(QEMUFile *f, const VMStateDescription *vmsd, + ret = vmstate_load_state(f, sub_vmsd, opaque, version_id); + if (ret) { + trace_vmstate_subsection_load_bad(vmsd->name, idstr, "(child)"); ++ error_setg(errp, ++ "Loading VM subsection '%s' in '%s' failed: %d", ++ idstr, vmsd->name, ret); + return ret; + } + } diff --git a/0187-migration-push-Error-errp-into-vmstate_load_state.patch b/0187-migration-push-Error-errp-into-vmstate_load_state.patch new file mode 100644 index 0000000..d167ae6 --- /dev/null +++ b/0187-migration-push-Error-errp-into-vmstate_load_state.patch @@ -0,0 +1,735 @@ +From 604a4abb2ea227150e6f290c66f9f39014703c85 Mon Sep 17 00:00:00 2001 +From: Arun Menon +Date: Thu, 18 Sep 2025 20:53:19 +0530 +Subject: [PATCH] migration: push Error **errp into vmstate_load_state() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] ca00f9939b (clegoate/qemu-kvm-centos) + +This is an incremental step in converting vmstate loading +code to report error via Error objects instead of directly +printing it to console/monitor. +It is ensured that vmstate_load_state() must report an error +in errp, in case of failure. + +The errors are temporarily reported using error_report_err(). +This is removed in the subsequent patches in this series, +when we are actually able to propagate the error to the calling +function using errp. Whereas, if we want the function to exit on +error, then error_fatal is passed. + +Reviewed-by: Marc-André Lureau +Reviewed-by: Fabiano Rosas +Signed-off-by: Arun Menon +Tested-by: Fabiano Rosas +Reviewed-by: Akihiko Odaki +Link: https://lore.kernel.org/r/20250918-propagate_tpm_error-v14-2-36f11a6fb9d3@redhat.com +Signed-off-by: Peter Xu +(cherry picked from commit c632ffbd74a497e88bbb4e4d55a357055eae6f47) +Signed-off-by: Eric Auger +--- + hw/display/virtio-gpu.c | 2 +- + hw/pci/pci.c | 3 +- + hw/s390x/virtio-ccw.c | 2 +- + hw/scsi/spapr_vscsi.c | 4 ++- + hw/vfio/pci.c | 5 ++- + hw/virtio/virtio-mmio.c | 3 +- + hw/virtio/virtio-pci.c | 2 +- + hw/virtio/virtio.c | 7 +++-- + include/migration/vmstate.h | 2 +- + migration/cpr.c | 3 +- + migration/savevm.c | 8 +++-- + migration/vmstate-types.c | 28 ++++++++++------- + migration/vmstate.c | 61 +++++++++++++++++++++++------------ + tests/unit/test-vmstate.c | 63 +++++++++++++++++++++++++++++++------ + ui/vdagent.c | 5 ++- + 15 files changed, 143 insertions(+), 55 deletions(-) + +diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c +index 0a1a625b0e..5dc31bc6bf 100644 +--- a/hw/display/virtio-gpu.c ++++ b/hw/display/virtio-gpu.c +@@ -1343,7 +1343,7 @@ static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size, + } + + /* load & apply scanout state */ +- vmstate_load_state(f, &vmstate_virtio_gpu_scanouts, g, 1); ++ vmstate_load_state(f, &vmstate_virtio_gpu_scanouts, g, 1, &error_fatal); + + return 0; + } +diff --git a/hw/pci/pci.c b/hw/pci/pci.c +index d2ebb066e1..5b37b70815 100644 +--- a/hw/pci/pci.c ++++ b/hw/pci/pci.c +@@ -934,7 +934,8 @@ void pci_device_save(PCIDevice *s, QEMUFile *f) + int pci_device_load(PCIDevice *s, QEMUFile *f) + { + int ret; +- ret = vmstate_load_state(f, &vmstate_pci_device, s, s->version_id); ++ ret = vmstate_load_state(f, &vmstate_pci_device, s, s->version_id, ++ &error_fatal); + /* Restore the interrupt status bit. */ + pci_update_irq_status(s); + return ret; +diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c +index d2f85b39f3..6a9641a03d 100644 +--- a/hw/s390x/virtio-ccw.c ++++ b/hw/s390x/virtio-ccw.c +@@ -1136,7 +1136,7 @@ static void virtio_ccw_save_config(DeviceState *d, QEMUFile *f) + static int virtio_ccw_load_config(DeviceState *d, QEMUFile *f) + { + VirtioCcwDevice *dev = VIRTIO_CCW_DEVICE(d); +- return vmstate_load_state(f, &vmstate_virtio_ccw_dev, dev, 1); ++ return vmstate_load_state(f, &vmstate_virtio_ccw_dev, dev, 1, &error_fatal); + } + + static void virtio_ccw_pre_plugged(DeviceState *d, Error **errp) +diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c +index 20f70fb272..da173f4867 100644 +--- a/hw/scsi/spapr_vscsi.c ++++ b/hw/scsi/spapr_vscsi.c +@@ -642,15 +642,17 @@ static void *vscsi_load_request(QEMUFile *f, SCSIRequest *sreq) + VSCSIState *s = VIO_SPAPR_VSCSI_DEVICE(bus->qbus.parent); + vscsi_req *req; + int rc; ++ Error *local_err = NULL; + + assert(sreq->tag < VSCSI_REQ_LIMIT); + req = &s->reqs[sreq->tag]; + assert(!req->active); + + memset(req, 0, sizeof(*req)); +- rc = vmstate_load_state(f, &vmstate_spapr_vscsi_req, req, 1); ++ rc = vmstate_load_state(f, &vmstate_spapr_vscsi_req, req, 1, &local_err); + if (rc) { + fprintf(stderr, "VSCSI: failed loading request tag#%u\n", sreq->tag); ++ error_report_err(local_err); + return NULL; + } + assert(req->active); +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index c34ed85d5e..f696e8116f 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -2834,13 +2834,16 @@ static int vfio_pci_load_config(VFIODevice *vbasedev, QEMUFile *f) + PCIDevice *pdev = PCI_DEVICE(vdev); + pcibus_t old_addr[PCI_NUM_REGIONS - 1]; + int bar, ret; ++ Error *local_err = NULL; + + for (bar = 0; bar < PCI_ROM_SLOT; bar++) { + old_addr[bar] = pdev->io_regions[bar].addr; + } + +- ret = vmstate_load_state(f, &vmstate_vfio_pci_config, vdev, 1); ++ ret = vmstate_load_state(f, &vmstate_vfio_pci_config, vdev, 1, ++ &local_err); + if (ret) { ++ error_report_err(local_err); + return ret; + } + +diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c +index 532c67107b..0a688909fc 100644 +--- a/hw/virtio/virtio-mmio.c ++++ b/hw/virtio/virtio-mmio.c +@@ -34,6 +34,7 @@ + #include "qemu/error-report.h" + #include "qemu/log.h" + #include "trace.h" ++#include "qapi/error.h" + + static bool virtio_mmio_ioeventfd_enabled(DeviceState *d) + { +@@ -619,7 +620,7 @@ static int virtio_mmio_load_extra_state(DeviceState *opaque, QEMUFile *f) + { + VirtIOMMIOProxy *proxy = VIRTIO_MMIO(opaque); + +- return vmstate_load_state(f, &vmstate_virtio_mmio, proxy, 1); ++ return vmstate_load_state(f, &vmstate_virtio_mmio, proxy, 1, &error_fatal); + } + + static bool virtio_mmio_has_extra_state(DeviceState *opaque) +diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c +index d38d0a5e9a..ae875bd108 100644 +--- a/hw/virtio/virtio-pci.c ++++ b/hw/virtio/virtio-pci.c +@@ -195,7 +195,7 @@ static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f) + { + VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); + +- return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1); ++ return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1, &error_fatal); + } + + static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f) +diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c +index 34f977a3c9..e6cbbc8624 100644 +--- a/hw/virtio/virtio.c ++++ b/hw/virtio/virtio.c +@@ -3278,6 +3278,7 @@ virtio_load(VirtIODevice *vdev, QEMUFile *f, int version_id) + BusState *qbus = qdev_get_parent_bus(DEVICE(vdev)); + VirtioBusClass *k = VIRTIO_BUS_GET_CLASS(qbus); + VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); ++ Error *local_err = NULL; + + /* + * We poison the endianness to ensure it does not get used before +@@ -3370,15 +3371,17 @@ virtio_load(VirtIODevice *vdev, QEMUFile *f, int version_id) + } + + if (vdc->vmsd) { +- ret = vmstate_load_state(f, vdc->vmsd, vdev, version_id); ++ ret = vmstate_load_state(f, vdc->vmsd, vdev, version_id, &local_err); + if (ret) { ++ error_report_err(local_err); + return ret; + } + } + + /* Subsections */ +- ret = vmstate_load_state(f, &vmstate_virtio, vdev, 1); ++ ret = vmstate_load_state(f, &vmstate_virtio, vdev, 1, &local_err); + if (ret) { ++ error_report_err(local_err); + return ret; + } + +diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h +index 1ff7bd9ac4..056781b1c2 100644 +--- a/include/migration/vmstate.h ++++ b/include/migration/vmstate.h +@@ -1196,7 +1196,7 @@ extern const VMStateInfo vmstate_info_qlist; + } + + int vmstate_load_state(QEMUFile *f, const VMStateDescription *vmsd, +- void *opaque, int version_id); ++ void *opaque, int version_id, Error **errp); + int vmstate_save_state(QEMUFile *f, const VMStateDescription *vmsd, + void *opaque, JSONWriter *vmdesc); + int vmstate_save_state_with_err(QEMUFile *f, const VMStateDescription *vmsd, +diff --git a/migration/cpr.c b/migration/cpr.c +index 42ad0b0d50..8abb6db76d 100644 +--- a/migration/cpr.c ++++ b/migration/cpr.c +@@ -233,9 +233,8 @@ int cpr_state_load(MigrationChannel *channel, Error **errp) + return -ENOTSUP; + } + +- ret = vmstate_load_state(f, &vmstate_cpr_state, &cpr_state, 1); ++ ret = vmstate_load_state(f, &vmstate_cpr_state, &cpr_state, 1, errp); + if (ret) { +- error_setg(errp, "vmstate_load_state error %d", ret); + qemu_fclose(f); + return ret; + } +diff --git a/migration/savevm.c b/migration/savevm.c +index fabbeb296a..f5a1ab9101 100644 +--- a/migration/savevm.c ++++ b/migration/savevm.c +@@ -969,7 +969,8 @@ static int vmstate_load(QEMUFile *f, SaveStateEntry *se) + if (!se->vmsd) { /* Old style */ + return se->ops->load_state(f, se->opaque, se->load_version_id); + } +- return vmstate_load_state(f, se->vmsd, se->opaque, se->load_version_id); ++ return vmstate_load_state(f, se->vmsd, se->opaque, se->load_version_id, ++ &error_fatal); + } + + static void vmstate_save_old_style(QEMUFile *f, SaveStateEntry *se, +@@ -2817,6 +2818,7 @@ static int qemu_loadvm_state_header(QEMUFile *f) + { + unsigned int v; + int ret; ++ Error *local_err = NULL; + + v = qemu_get_be32(f); + if (v != QEMU_VM_FILE_MAGIC) { +@@ -2839,9 +2841,11 @@ static int qemu_loadvm_state_header(QEMUFile *f) + error_report("Configuration section missing"); + return -EINVAL; + } +- ret = vmstate_load_state(f, &vmstate_configuration, &savevm_state, 0); ++ ret = vmstate_load_state(f, &vmstate_configuration, &savevm_state, 0, ++ &local_err); + + if (ret) { ++ error_report_err(local_err); + return ret; + } + } +diff --git a/migration/vmstate-types.c b/migration/vmstate-types.c +index 741a588b7e..c5cfd861e3 100644 +--- a/migration/vmstate-types.c ++++ b/migration/vmstate-types.c +@@ -19,6 +19,7 @@ + #include "qemu/error-report.h" + #include "qemu/queue.h" + #include "trace.h" ++#include "qapi/error.h" + + /* bool */ + +@@ -543,13 +544,17 @@ static int get_tmp(QEMUFile *f, void *pv, size_t size, + const VMStateField *field) + { + int ret; ++ Error *local_err = NULL; + const VMStateDescription *vmsd = field->vmsd; + int version_id = field->version_id; + void *tmp = g_malloc(size); + + /* Writes the parent field which is at the start of the tmp */ + *(void **)tmp = pv; +- ret = vmstate_load_state(f, vmsd, tmp, version_id); ++ ret = vmstate_load_state(f, vmsd, tmp, version_id, &local_err); ++ if (ret < 0) { ++ error_report_err(local_err); ++ } + g_free(tmp); + return ret; + } +@@ -626,6 +631,7 @@ static int get_qtailq(QEMUFile *f, void *pv, size_t unused_size, + const VMStateField *field) + { + int ret = 0; ++ Error *local_err = NULL; + const VMStateDescription *vmsd = field->vmsd; + /* size of a QTAILQ element */ + size_t size = field->size; +@@ -649,8 +655,9 @@ static int get_qtailq(QEMUFile *f, void *pv, size_t unused_size, + + while (qemu_get_byte(f)) { + elm = g_malloc(size); +- ret = vmstate_load_state(f, vmsd, elm, version_id); ++ ret = vmstate_load_state(f, vmsd, elm, version_id, &local_err); + if (ret) { ++ error_report_err(local_err); + return ret; + } + QTAILQ_RAW_INSERT_TAIL(pv, elm, entry_offset); +@@ -772,6 +779,7 @@ static int get_gtree(QEMUFile *f, void *pv, size_t unused_size, + GTree *tree = *pval; + void *key, *val; + int ret = 0; ++ Error *local_err = NULL; + + /* in case of direct key, the key vmsd can be {}, ie. check fields */ + if (!direct_key && version_id > key_vmsd->version_id) { +@@ -803,18 +811,16 @@ static int get_gtree(QEMUFile *f, void *pv, size_t unused_size, + key = (void *)(uintptr_t)qemu_get_be64(f); + } else { + key = g_malloc0(key_size); +- ret = vmstate_load_state(f, key_vmsd, key, version_id); ++ ret = vmstate_load_state(f, key_vmsd, key, version_id, &local_err); + if (ret) { +- error_report("%s : failed to load %s (%d)", +- field->name, key_vmsd->name, ret); ++ error_report_err(local_err); + goto key_error; + } + } + val = g_malloc0(val_size); +- ret = vmstate_load_state(f, val_vmsd, val, version_id); ++ ret = vmstate_load_state(f, val_vmsd, val, version_id, &local_err); + if (ret) { +- error_report("%s : failed to load %s (%d)", +- field->name, val_vmsd->name, ret); ++ error_report_err(local_err); + goto val_error; + } + g_tree_insert(tree, key, val); +@@ -872,6 +878,7 @@ static int get_qlist(QEMUFile *f, void *pv, size_t unused_size, + const VMStateField *field) + { + int ret = 0; ++ Error *local_err = NULL; + const VMStateDescription *vmsd = field->vmsd; + /* size of a QLIST element */ + size_t size = field->size; +@@ -892,10 +899,9 @@ static int get_qlist(QEMUFile *f, void *pv, size_t unused_size, + + while (qemu_get_byte(f)) { + elm = g_malloc(size); +- ret = vmstate_load_state(f, vmsd, elm, version_id); ++ ret = vmstate_load_state(f, vmsd, elm, version_id, &local_err); + if (ret) { +- error_report("%s: failed to load %s (%d)", field->name, +- vmsd->name, ret); ++ error_report_err(local_err); + g_free(elm); + return ret; + } +diff --git a/migration/vmstate.c b/migration/vmstate.c +index 08f2b562e3..8d1e9eb62b 100644 +--- a/migration/vmstate.c ++++ b/migration/vmstate.c +@@ -132,30 +132,33 @@ static void vmstate_handle_alloc(void *ptr, const VMStateField *field, + } + + int vmstate_load_state(QEMUFile *f, const VMStateDescription *vmsd, +- void *opaque, int version_id) ++ void *opaque, int version_id, Error **errp) + { + const VMStateField *field = vmsd->fields; + int ret = 0; +- Error *local_err = NULL; + + trace_vmstate_load_state(vmsd->name, version_id); + if (version_id > vmsd->version_id) { +- error_report("%s: incoming version_id %d is too new " +- "for local version_id %d", +- vmsd->name, version_id, vmsd->version_id); ++ error_setg(errp, "%s: incoming version_id %d is too new " ++ "for local version_id %d", ++ vmsd->name, version_id, vmsd->version_id); + trace_vmstate_load_state_end(vmsd->name, "too new", -EINVAL); + return -EINVAL; + } + if (version_id < vmsd->minimum_version_id) { +- error_report("%s: incoming version_id %d is too old " +- "for local minimum version_id %d", +- vmsd->name, version_id, vmsd->minimum_version_id); ++ error_setg(errp, "%s: incoming version_id %d is too old " ++ "for local minimum version_id %d", ++ vmsd->name, version_id, vmsd->minimum_version_id); + trace_vmstate_load_state_end(vmsd->name, "too old", -EINVAL); + return -EINVAL; + } + if (vmsd->pre_load) { + ret = vmsd->pre_load(opaque); + if (ret) { ++ error_setg(errp, "pre load hook failed for: '%s', " ++ "version_id: %d, minimum version_id: %d, ret: %d", ++ vmsd->name, vmsd->version_id, vmsd->minimum_version_id, ++ ret); + return ret; + } + } +@@ -193,13 +196,21 @@ int vmstate_load_state(QEMUFile *f, const VMStateDescription *vmsd, + + if (inner_field->flags & VMS_STRUCT) { + ret = vmstate_load_state(f, inner_field->vmsd, curr_elem, +- inner_field->vmsd->version_id); ++ inner_field->vmsd->version_id, ++ errp); + } else if (inner_field->flags & VMS_VSTRUCT) { + ret = vmstate_load_state(f, inner_field->vmsd, curr_elem, +- inner_field->struct_version_id); ++ inner_field->struct_version_id, ++ errp); + } else { + ret = inner_field->info->get(f, curr_elem, size, + inner_field); ++ if (ret < 0) { ++ error_setg(errp, ++ "Failed to load element of type %s for %s: " ++ "%d", inner_field->info->name, ++ inner_field->name, ret); ++ } + } + + /* If we used a fake temp field.. free it now */ +@@ -209,31 +220,40 @@ int vmstate_load_state(QEMUFile *f, const VMStateDescription *vmsd, + + if (ret >= 0) { + ret = qemu_file_get_error(f); ++ if (ret < 0) { ++ error_setg(errp, ++ "Failed to load %s state: stream error: %d", ++ vmsd->name, ret); ++ } + } + if (ret < 0) { + qemu_file_set_error(f, ret); +- error_report("Failed to load %s:%s", vmsd->name, +- field->name); + trace_vmstate_load_field_error(field->name, ret); + return ret; + } + } + } else if (field->flags & VMS_MUST_EXIST) { +- error_report("Input validation failed: %s/%s", +- vmsd->name, field->name); ++ error_setg(errp, "Input validation failed: %s/%s version_id: %d", ++ vmsd->name, field->name, vmsd->version_id); + return -1; + } + field++; + } + assert(field->flags == VMS_END); +- ret = vmstate_subsection_load(f, vmsd, opaque, &local_err); ++ ret = vmstate_subsection_load(f, vmsd, opaque, errp); + if (ret != 0) { + qemu_file_set_error(f, ret); +- error_report_err(local_err); + return ret; + } + if (vmsd->post_load) { + ret = vmsd->post_load(opaque, version_id); ++ if (ret < 0) { ++ error_setg(errp, ++ "post load hook failed for: %s, version_id: %d, " ++ "minimum_version: %d, ret: %d", ++ vmsd->name, vmsd->version_id, vmsd->minimum_version_id, ++ ret); ++ } + } + trace_vmstate_load_state_end(vmsd->name, "end", ret); + return ret; +@@ -570,6 +590,7 @@ vmstate_get_subsection(const VMStateDescription * const *sub, + static int vmstate_subsection_load(QEMUFile *f, const VMStateDescription *vmsd, + void *opaque, Error **errp) + { ++ ERRP_GUARD(); + trace_vmstate_subsection_load(vmsd->name); + + while (qemu_peek_byte(f, 0) == QEMU_VM_SUBSECTION) { +@@ -609,12 +630,12 @@ static int vmstate_subsection_load(QEMUFile *f, const VMStateDescription *vmsd, + qemu_file_skip(f, len); /* idstr */ + version_id = qemu_get_be32(f); + +- ret = vmstate_load_state(f, sub_vmsd, opaque, version_id); ++ ret = vmstate_load_state(f, sub_vmsd, opaque, version_id, errp); + if (ret) { + trace_vmstate_subsection_load_bad(vmsd->name, idstr, "(child)"); +- error_setg(errp, +- "Loading VM subsection '%s' in '%s' failed: %d", +- idstr, vmsd->name, ret); ++ error_prepend(errp, ++ "Loading VM subsection '%s' in '%s' failed: %d: ", ++ idstr, vmsd->name, ret); + return ret; + } + } +diff --git a/tests/unit/test-vmstate.c b/tests/unit/test-vmstate.c +index 63f28f26f4..4ff0ab632f 100644 +--- a/tests/unit/test-vmstate.c ++++ b/tests/unit/test-vmstate.c +@@ -30,6 +30,7 @@ + #include "../migration/savevm.h" + #include "qemu/module.h" + #include "io/channel-file.h" ++#include "qapi/error.h" + + static int temp_fd; + +@@ -108,14 +109,16 @@ static int load_vmstate_one(const VMStateDescription *desc, void *obj, + { + QEMUFile *f; + int ret; ++ Error *local_err = NULL; + + f = open_test_file(true); + qemu_put_buffer(f, wire, size); + qemu_fclose(f); + + f = open_test_file(false); +- ret = vmstate_load_state(f, desc, obj, version); ++ ret = vmstate_load_state(f, desc, obj, version, &local_err); + if (ret) { ++ error_report_err(local_err); + g_assert(qemu_file_get_error(f)); + } else{ + g_assert(!qemu_file_get_error(f)); +@@ -355,6 +358,8 @@ static const VMStateDescription vmstate_versioned = { + + static void test_load_v1(void) + { ++ Error *local_err = NULL; ++ int ret; + uint8_t buf[] = { + 0, 0, 0, 10, /* a */ + 0, 0, 0, 30, /* c */ +@@ -365,7 +370,10 @@ static void test_load_v1(void) + + QEMUFile *loading = open_test_file(false); + TestStruct obj = { .b = 200, .e = 500, .f = 600 }; +- vmstate_load_state(loading, &vmstate_versioned, &obj, 1); ++ ret = vmstate_load_state(loading, &vmstate_versioned, &obj, 1, &local_err); ++ if (ret < 0) { ++ error_report_err(local_err); ++ } + g_assert(!qemu_file_get_error(loading)); + g_assert_cmpint(obj.a, ==, 10); + g_assert_cmpint(obj.b, ==, 200); +@@ -378,6 +386,8 @@ static void test_load_v1(void) + + static void test_load_v2(void) + { ++ Error *local_err = NULL; ++ int ret; + uint8_t buf[] = { + 0, 0, 0, 10, /* a */ + 0, 0, 0, 20, /* b */ +@@ -391,7 +401,10 @@ static void test_load_v2(void) + + QEMUFile *loading = open_test_file(false); + TestStruct obj; +- vmstate_load_state(loading, &vmstate_versioned, &obj, 2); ++ ret = vmstate_load_state(loading, &vmstate_versioned, &obj, 2, &local_err); ++ if (ret < 0) { ++ error_report_err(local_err); ++ } + g_assert_cmpint(obj.a, ==, 10); + g_assert_cmpint(obj.b, ==, 20); + g_assert_cmpint(obj.c, ==, 30); +@@ -467,6 +480,8 @@ static void test_save_skip(void) + + static void test_load_noskip(void) + { ++ Error *local_err = NULL; ++ int ret; + uint8_t buf[] = { + 0, 0, 0, 10, /* a */ + 0, 0, 0, 20, /* b */ +@@ -480,7 +495,10 @@ static void test_load_noskip(void) + + QEMUFile *loading = open_test_file(false); + TestStruct obj = { .skip_c_e = false }; +- vmstate_load_state(loading, &vmstate_skipping, &obj, 2); ++ ret = vmstate_load_state(loading, &vmstate_skipping, &obj, 2, &local_err); ++ if (ret < 0) { ++ error_report_err(local_err); ++ } + g_assert(!qemu_file_get_error(loading)); + g_assert_cmpint(obj.a, ==, 10); + g_assert_cmpint(obj.b, ==, 20); +@@ -493,6 +511,8 @@ static void test_load_noskip(void) + + static void test_load_skip(void) + { ++ Error *local_err = NULL; ++ int ret; + uint8_t buf[] = { + 0, 0, 0, 10, /* a */ + 0, 0, 0, 20, /* b */ +@@ -504,7 +524,10 @@ static void test_load_skip(void) + + QEMUFile *loading = open_test_file(false); + TestStruct obj = { .skip_c_e = true, .c = 300, .e = 500 }; +- vmstate_load_state(loading, &vmstate_skipping, &obj, 2); ++ ret = vmstate_load_state(loading, &vmstate_skipping, &obj, 2, &local_err); ++ if (ret < 0) { ++ error_report_err(local_err); ++ } + g_assert(!qemu_file_get_error(loading)); + g_assert_cmpint(obj.a, ==, 10); + g_assert_cmpint(obj.b, ==, 20); +@@ -744,6 +767,8 @@ static void test_save_q(void) + + static void test_load_q(void) + { ++ int ret; ++ Error *local_err = NULL; + TestQtailq obj_q = { + .i16 = -512, + .i32 = 70000, +@@ -773,7 +798,10 @@ static void test_load_q(void) + TestQtailq tgt; + + QTAILQ_INIT(&tgt.q); +- vmstate_load_state(fload, &vmstate_q, &tgt, 1); ++ ret = vmstate_load_state(fload, &vmstate_q, &tgt, 1, &local_err); ++ if (ret < 0) { ++ error_report_err(local_err); ++ } + char eof = qemu_get_byte(fload); + g_assert(!qemu_file_get_error(fload)); + g_assert_cmpint(tgt.i16, ==, obj_q.i16); +@@ -1115,6 +1143,8 @@ static void diff_iommu(TestGTreeIOMMU *iommu1, TestGTreeIOMMU *iommu2) + + static void test_gtree_load_domain(void) + { ++ Error *local_err = NULL; ++ int ret; + TestGTreeDomain *dest_domain = g_new0(TestGTreeDomain, 1); + TestGTreeDomain *orig_domain = create_first_domain(); + QEMUFile *fload, *fsave; +@@ -1127,7 +1157,11 @@ static void test_gtree_load_domain(void) + + fload = open_test_file(false); + +- vmstate_load_state(fload, &vmstate_domain, dest_domain, 1); ++ ret = vmstate_load_state(fload, &vmstate_domain, dest_domain, 1, ++ &local_err); ++ if (ret < 0) { ++ error_report_err(local_err); ++ } + eof = qemu_get_byte(fload); + g_assert(!qemu_file_get_error(fload)); + g_assert_cmpint(orig_domain->id, ==, dest_domain->id); +@@ -1230,6 +1264,8 @@ static void test_gtree_save_iommu(void) + + static void test_gtree_load_iommu(void) + { ++ Error *local_err = NULL; ++ int ret; + TestGTreeIOMMU *dest_iommu = g_new0(TestGTreeIOMMU, 1); + TestGTreeIOMMU *orig_iommu = create_iommu(); + QEMUFile *fsave, *fload; +@@ -1241,7 +1277,10 @@ static void test_gtree_load_iommu(void) + qemu_fclose(fsave); + + fload = open_test_file(false); +- vmstate_load_state(fload, &vmstate_iommu, dest_iommu, 1); ++ ret = vmstate_load_state(fload, &vmstate_iommu, dest_iommu, 1, &local_err); ++ if (ret < 0) { ++ error_report_err(local_err); ++ } + eof = qemu_get_byte(fload); + g_assert(!qemu_file_get_error(fload)); + g_assert_cmpint(orig_iommu->id, ==, dest_iommu->id); +@@ -1363,6 +1402,8 @@ static void test_save_qlist(void) + + static void test_load_qlist(void) + { ++ Error *local_err = NULL; ++ int ret; + QEMUFile *fsave, *fload; + TestQListContainer *orig_container = alloc_container(); + TestQListContainer *dest_container = g_new0(TestQListContainer, 1); +@@ -1376,7 +1417,11 @@ static void test_load_qlist(void) + qemu_fclose(fsave); + + fload = open_test_file(false); +- vmstate_load_state(fload, &vmstate_container, dest_container, 1); ++ ret = vmstate_load_state(fload, &vmstate_container, dest_container, 1, ++ &local_err); ++ if (ret < 0) { ++ error_report_err(local_err); ++ } + eof = qemu_get_byte(fload); + g_assert(!qemu_file_get_error(fload)); + g_assert_cmpint(eof, ==, QEMU_VM_EOF); +diff --git a/ui/vdagent.c b/ui/vdagent.c +index c0746fe5b1..bc3c77f013 100644 +--- a/ui/vdagent.c ++++ b/ui/vdagent.c +@@ -1001,6 +1001,7 @@ static int get_cbinfo(QEMUFile *f, void *pv, size_t size, + VDAgentChardev *vd = QEMU_VDAGENT_CHARDEV(pv); + struct CBInfoArray cbinfo = {}; + int i, ret; ++ Error *local_err = NULL; + + if (!have_clipboard(vd)) { + return 0; +@@ -1008,8 +1009,10 @@ static int get_cbinfo(QEMUFile *f, void *pv, size_t size, + + vdagent_clipboard_peer_register(vd); + +- ret = vmstate_load_state(f, &vmstate_cbinfo_array, &cbinfo, 0); ++ ret = vmstate_load_state(f, &vmstate_cbinfo_array, &cbinfo, 0, ++ &local_err); + if (ret) { ++ error_report_err(local_err); + return ret; + } + diff --git a/0188-migration-Remove-error-variant-of-vmstate_save_state.patch b/0188-migration-Remove-error-variant-of-vmstate_save_state.patch new file mode 100644 index 0000000..0e92b78 --- /dev/null +++ b/0188-migration-Remove-error-variant-of-vmstate_save_state.patch @@ -0,0 +1,442 @@ +From 39f024b273f6478d9e92b014064107b28935d12a Mon Sep 17 00:00:00 2001 +From: Arun Menon +Date: Thu, 18 Sep 2025 20:53:41 +0530 +Subject: [PATCH] migration: Remove error variant of vmstate_save_state() + function +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 28eb2fc772 (clegoate/qemu-kvm-centos) + +This commit removes the redundant vmstate_save_state_with_err() +function. + +Previously, commit 969298f9d7 introduced vmstate_save_state_with_err() +to handle error propagation, while vmstate_save_state() existed for +non-error scenarios. +This is because there were code paths where vmstate_save_state_v() +(called internally by vmstate_save_state) did not explicitly set +errors on failure. + +This change unifies error handling by + - updating vmstate_save_state() to accept an Error **errp argument. + - vmstate_save_state_v() ensures errors are set directly within the errp + object, eliminating the need for two separate functions. + +All calls to vmstate_save_state_with_err() are replaced with +vmstate_save_state(). This simplifies the API and improves code +maintainability. + +vmstate_save_state() that only calls vmstate_save_state_v(), +by inference, also has errors set in errp in case of failure. +The errors are reported using error_report_err(). +If we want the function to exit on error, then &error_fatal is +passed. + +Reviewed-by: Fabiano Rosas +Signed-off-by: Arun Menon +Tested-by: Fabiano Rosas +Reviewed-by: Akihiko Odaki +Link: https://lore.kernel.org/r/20250918-propagate_tpm_error-v14-24-36f11a6fb9d3@redhat.com +Signed-off-by: Peter Xu +(cherry picked from commit 6f9fc6f5012344292f7014e079e5225b8988383d) +Signed-off-by: Eric Auger +--- + hw/display/virtio-gpu.c | 3 ++- + hw/pci/pci.c | 2 +- + hw/s390x/virtio-ccw.c | 2 +- + hw/scsi/spapr_vscsi.c | 2 +- + hw/vfio/pci.c | 4 ++-- + hw/virtio/virtio-mmio.c | 2 +- + hw/virtio/virtio-pci.c | 2 +- + hw/virtio/virtio.c | 6 ++++-- + include/migration/vmstate.h | 2 -- + migration/cpr.c | 3 +-- + migration/savevm.c | 11 ++++++++--- + migration/vmstate-types.c | 25 ++++++++++++++++++------- + migration/vmstate.c | 10 ++-------- + tests/unit/test-vmstate.c | 20 +++++++++++++++++--- + ui/vdagent.c | 3 ++- + 15 files changed, 61 insertions(+), 36 deletions(-) + +diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c +index 5dc31bc6bf..477ec700a1 100644 +--- a/hw/display/virtio-gpu.c ++++ b/hw/display/virtio-gpu.c +@@ -1246,7 +1246,8 @@ static int virtio_gpu_save(QEMUFile *f, void *opaque, size_t size, + } + qemu_put_be32(f, 0); /* end of list */ + +- return vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL); ++ return vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL, ++ &error_fatal); + } + + static bool virtio_gpu_load_restore_mapping(VirtIOGPU *g, +diff --git a/hw/pci/pci.c b/hw/pci/pci.c +index 5b37b70815..d1c22999b9 100644 +--- a/hw/pci/pci.c ++++ b/hw/pci/pci.c +@@ -926,7 +926,7 @@ void pci_device_save(PCIDevice *s, QEMUFile *f) + * This makes us compatible with old devices + * which never set or clear this bit. */ + s->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT; +- vmstate_save_state(f, &vmstate_pci_device, s, NULL); ++ vmstate_save_state(f, &vmstate_pci_device, s, NULL, &error_fatal); + /* Restore the interrupt status bit. */ + pci_update_irq_status(s); + } +diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c +index 6a9641a03d..4cb1ced001 100644 +--- a/hw/s390x/virtio-ccw.c ++++ b/hw/s390x/virtio-ccw.c +@@ -1130,7 +1130,7 @@ static int virtio_ccw_load_queue(DeviceState *d, int n, QEMUFile *f) + static void virtio_ccw_save_config(DeviceState *d, QEMUFile *f) + { + VirtioCcwDevice *dev = VIRTIO_CCW_DEVICE(d); +- vmstate_save_state(f, &vmstate_virtio_ccw_dev, dev, NULL); ++ vmstate_save_state(f, &vmstate_virtio_ccw_dev, dev, NULL, &error_fatal); + } + + static int virtio_ccw_load_config(DeviceState *d, QEMUFile *f) +diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c +index da173f4867..f0a7dd2b88 100644 +--- a/hw/scsi/spapr_vscsi.c ++++ b/hw/scsi/spapr_vscsi.c +@@ -630,7 +630,7 @@ static void vscsi_save_request(QEMUFile *f, SCSIRequest *sreq) + vscsi_req *req = sreq->hba_private; + assert(req->active); + +- vmstate_save_state(f, &vmstate_spapr_vscsi_req, req, NULL); ++ vmstate_save_state(f, &vmstate_spapr_vscsi_req, req, NULL, &error_fatal); + + trace_spapr_vscsi_save_request(req->qtag, req->cur_desc_num, + req->cur_desc_offset); +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index f696e8116f..378b475b2c 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -2824,8 +2824,8 @@ static int vfio_pci_save_config(VFIODevice *vbasedev, QEMUFile *f, Error **errp) + { + VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev); + +- return vmstate_save_state_with_err(f, &vmstate_vfio_pci_config, vdev, NULL, +- errp); ++ return vmstate_save_state(f, &vmstate_vfio_pci_config, vdev, NULL, ++ errp); + } + + static int vfio_pci_load_config(VFIODevice *vbasedev, QEMUFile *f) +diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c +index 0a688909fc..fb58c36452 100644 +--- a/hw/virtio/virtio-mmio.c ++++ b/hw/virtio/virtio-mmio.c +@@ -613,7 +613,7 @@ static void virtio_mmio_save_extra_state(DeviceState *opaque, QEMUFile *f) + { + VirtIOMMIOProxy *proxy = VIRTIO_MMIO(opaque); + +- vmstate_save_state(f, &vmstate_virtio_mmio, proxy, NULL); ++ vmstate_save_state(f, &vmstate_virtio_mmio, proxy, NULL, &error_fatal); + } + + static int virtio_mmio_load_extra_state(DeviceState *opaque, QEMUFile *f) +diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c +index ae875bd108..937e22f08a 100644 +--- a/hw/virtio/virtio-pci.c ++++ b/hw/virtio/virtio-pci.c +@@ -188,7 +188,7 @@ static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f) + { + VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); + +- vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL); ++ vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL, &error_fatal); + } + + static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f) +diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c +index e6cbbc8624..a7063d5555 100644 +--- a/hw/virtio/virtio.c ++++ b/hw/virtio/virtio.c +@@ -3017,6 +3017,7 @@ int virtio_save(VirtIODevice *vdev, QEMUFile *f) + VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); + uint32_t guest_features_lo = (vdev->guest_features & 0xffffffff); + int i; ++ Error *local_err = NULL; + + if (k->save_config) { + k->save_config(qbus->parent, f); +@@ -3060,14 +3061,15 @@ int virtio_save(VirtIODevice *vdev, QEMUFile *f) + } + + if (vdc->vmsd) { +- int ret = vmstate_save_state(f, vdc->vmsd, vdev, NULL); ++ int ret = vmstate_save_state(f, vdc->vmsd, vdev, NULL, &local_err); + if (ret) { ++ error_report_err(local_err); + return ret; + } + } + + /* Subsections */ +- return vmstate_save_state(f, &vmstate_virtio, vdev, NULL); ++ return vmstate_save_state(f, &vmstate_virtio, vdev, NULL, &error_fatal); + } + + /* A wrapper for use as a VMState .put function */ +diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h +index 056781b1c2..5fe9bbf390 100644 +--- a/include/migration/vmstate.h ++++ b/include/migration/vmstate.h +@@ -1198,8 +1198,6 @@ extern const VMStateInfo vmstate_info_qlist; + int vmstate_load_state(QEMUFile *f, const VMStateDescription *vmsd, + void *opaque, int version_id, Error **errp); + int vmstate_save_state(QEMUFile *f, const VMStateDescription *vmsd, +- void *opaque, JSONWriter *vmdesc); +-int vmstate_save_state_with_err(QEMUFile *f, const VMStateDescription *vmsd, + void *opaque, JSONWriter *vmdesc, Error **errp); + int vmstate_save_state_v(QEMUFile *f, const VMStateDescription *vmsd, + void *opaque, JSONWriter *vmdesc, +diff --git a/migration/cpr.c b/migration/cpr.c +index 8abb6db76d..038f48f810 100644 +--- a/migration/cpr.c ++++ b/migration/cpr.c +@@ -182,9 +182,8 @@ int cpr_state_save(MigrationChannel *channel, Error **errp) + qemu_put_be32(f, QEMU_CPR_FILE_MAGIC); + qemu_put_be32(f, QEMU_CPR_FILE_VERSION); + +- ret = vmstate_save_state(f, &vmstate_cpr_state, &cpr_state, 0); ++ ret = vmstate_save_state(f, &vmstate_cpr_state, &cpr_state, 0, errp); + if (ret) { +- error_setg(errp, "vmstate_save_state error %d", ret); + qemu_fclose(f); + return ret; + } +diff --git a/migration/savevm.c b/migration/savevm.c +index f5a1ab9101..1eab91d3ad 100644 +--- a/migration/savevm.c ++++ b/migration/savevm.c +@@ -1050,8 +1050,8 @@ static int vmstate_save(QEMUFile *f, SaveStateEntry *se, JSONWriter *vmdesc, + if (!se->vmsd) { + vmstate_save_old_style(f, se, vmdesc); + } else { +- ret = vmstate_save_state_with_err(f, se->vmsd, se->opaque, vmdesc, +- errp); ++ ret = vmstate_save_state(f, se->vmsd, se->opaque, vmdesc, ++ errp); + if (ret) { + return ret; + } +@@ -1279,6 +1279,7 @@ void qemu_savevm_state_header(QEMUFile *f) + { + MigrationState *s = migrate_get_current(); + JSONWriter *vmdesc = s->vmdesc; ++ Error *local_err = NULL; + + trace_savevm_state_header(); + qemu_put_be32(f, QEMU_VM_FILE_MAGIC); +@@ -1297,7 +1298,11 @@ void qemu_savevm_state_header(QEMUFile *f) + json_writer_start_object(vmdesc, "configuration"); + } + +- vmstate_save_state(f, &vmstate_configuration, &savevm_state, vmdesc); ++ vmstate_save_state(f, &vmstate_configuration, &savevm_state, ++ vmdesc, &local_err); ++ if (local_err) { ++ error_report_err(local_err); ++ } + + if (vmdesc) { + json_writer_end_object(vmdesc); +diff --git a/migration/vmstate-types.c b/migration/vmstate-types.c +index c5cfd861e3..a1cd7a95fa 100644 +--- a/migration/vmstate-types.c ++++ b/migration/vmstate-types.c +@@ -565,10 +565,14 @@ static int put_tmp(QEMUFile *f, void *pv, size_t size, + const VMStateDescription *vmsd = field->vmsd; + void *tmp = g_malloc(size); + int ret; ++ Error *local_err = NULL; + + /* Writes the parent field which is at the start of the tmp */ + *(void **)tmp = pv; +- ret = vmstate_save_state(f, vmsd, tmp, vmdesc); ++ ret = vmstate_save_state(f, vmsd, tmp, vmdesc, &local_err); ++ if (ret) { ++ error_report_err(local_err); ++ } + g_free(tmp); + + return ret; +@@ -676,13 +680,15 @@ static int put_qtailq(QEMUFile *f, void *pv, size_t unused_size, + size_t entry_offset = field->start; + void *elm; + int ret; ++ Error *local_err = NULL; + + trace_put_qtailq(vmsd->name, vmsd->version_id); + + QTAILQ_RAW_FOREACH(elm, pv, entry_offset) { + qemu_put_byte(f, true); +- ret = vmstate_save_state(f, vmsd, elm, vmdesc); ++ ret = vmstate_save_state(f, vmsd, elm, vmdesc, &local_err); + if (ret) { ++ error_report_err(local_err); + return ret; + } + } +@@ -711,6 +717,7 @@ static gboolean put_gtree_elem(gpointer key, gpointer value, gpointer data) + struct put_gtree_data *capsule = (struct put_gtree_data *)data; + QEMUFile *f = capsule->f; + int ret; ++ Error *local_err = NULL; + + qemu_put_byte(f, true); + +@@ -718,16 +725,20 @@ static gboolean put_gtree_elem(gpointer key, gpointer value, gpointer data) + if (!capsule->key_vmsd) { + qemu_put_be64(f, (uint64_t)(uintptr_t)(key)); /* direct key */ + } else { +- ret = vmstate_save_state(f, capsule->key_vmsd, key, capsule->vmdesc); ++ ret = vmstate_save_state(f, capsule->key_vmsd, key, capsule->vmdesc, ++ &local_err); + if (ret) { ++ error_report_err(local_err); + capsule->ret = ret; + return true; + } + } + + /* put the data */ +- ret = vmstate_save_state(f, capsule->val_vmsd, value, capsule->vmdesc); ++ ret = vmstate_save_state(f, capsule->val_vmsd, value, capsule->vmdesc, ++ &local_err); + if (ret) { ++ error_report_err(local_err); + capsule->ret = ret; + return true; + } +@@ -857,14 +868,14 @@ static int put_qlist(QEMUFile *f, void *pv, size_t unused_size, + size_t entry_offset = field->start; + void *elm; + int ret; ++ Error *local_err = NULL; + + trace_put_qlist(field->name, vmsd->name, vmsd->version_id); + QLIST_RAW_FOREACH(elm, pv, entry_offset) { + qemu_put_byte(f, true); +- ret = vmstate_save_state(f, vmsd, elm, vmdesc); ++ ret = vmstate_save_state(f, vmsd, elm, vmdesc, &local_err); + if (ret) { +- error_report("%s: failed to save %s (%d)", field->name, +- vmsd->name, ret); ++ error_report_err(local_err); + return ret; + } + } +diff --git a/migration/vmstate.c b/migration/vmstate.c +index 8d1e9eb62b..ad8e5b71ae 100644 +--- a/migration/vmstate.c ++++ b/migration/vmstate.c +@@ -406,12 +406,6 @@ bool vmstate_section_needed(const VMStateDescription *vmsd, void *opaque) + + + int vmstate_save_state(QEMUFile *f, const VMStateDescription *vmsd, +- void *opaque, JSONWriter *vmdesc_id) +-{ +- return vmstate_save_state_v(f, vmsd, opaque, vmdesc_id, vmsd->version_id, NULL); +-} +- +-int vmstate_save_state_with_err(QEMUFile *f, const VMStateDescription *vmsd, + void *opaque, JSONWriter *vmdesc_id, Error **errp) + { + return vmstate_save_state_v(f, vmsd, opaque, vmdesc_id, vmsd->version_id, errp); +@@ -512,7 +506,7 @@ int vmstate_save_state_v(QEMUFile *f, const VMStateDescription *vmsd, + + if (inner_field->flags & VMS_STRUCT) { + ret = vmstate_save_state(f, inner_field->vmsd, +- curr_elem, vmdesc_loop); ++ curr_elem, vmdesc_loop, errp); + } else if (inner_field->flags & VMS_VSTRUCT) { + ret = vmstate_save_state_v(f, inner_field->vmsd, + curr_elem, vmdesc_loop, +@@ -674,7 +668,7 @@ static int vmstate_subsection_save(QEMUFile *f, const VMStateDescription *vmsd, + qemu_put_byte(f, len); + qemu_put_buffer(f, (uint8_t *)vmsdsub->name, len); + qemu_put_be32(f, vmsdsub->version_id); +- ret = vmstate_save_state_with_err(f, vmsdsub, opaque, vmdesc, errp); ++ ret = vmstate_save_state(f, vmsdsub, opaque, vmdesc, errp); + if (ret) { + return ret; + } +diff --git a/tests/unit/test-vmstate.c b/tests/unit/test-vmstate.c +index 4ff0ab632f..cadbab3c5e 100644 +--- a/tests/unit/test-vmstate.c ++++ b/tests/unit/test-vmstate.c +@@ -67,9 +67,13 @@ static QEMUFile *open_test_file(bool write) + static void save_vmstate(const VMStateDescription *desc, void *obj) + { + QEMUFile *f = open_test_file(true); ++ Error *local_err = NULL; + + /* Save file with vmstate */ +- int ret = vmstate_save_state(f, desc, obj, NULL); ++ int ret = vmstate_save_state(f, desc, obj, NULL, &local_err); ++ if (ret) { ++ error_report_err(local_err); ++ } + g_assert(!ret); + qemu_put_byte(f, QEMU_VM_EOF); + g_assert(!qemu_file_get_error(f)); +@@ -438,10 +442,15 @@ static const VMStateDescription vmstate_skipping = { + + static void test_save_noskip(void) + { ++ Error *local_err = NULL; + QEMUFile *fsave = open_test_file(true); + TestStruct obj = { .a = 1, .b = 2, .c = 3, .d = 4, .e = 5, .f = 6, + .skip_c_e = false }; +- int ret = vmstate_save_state(fsave, &vmstate_skipping, &obj, NULL); ++ int ret = vmstate_save_state(fsave, &vmstate_skipping, &obj, NULL, ++ &local_err); ++ if (ret) { ++ error_report_err(local_err); ++ } + g_assert(!ret); + g_assert(!qemu_file_get_error(fsave)); + +@@ -460,10 +469,15 @@ static void test_save_noskip(void) + + static void test_save_skip(void) + { ++ Error *local_err = NULL; + QEMUFile *fsave = open_test_file(true); + TestStruct obj = { .a = 1, .b = 2, .c = 3, .d = 4, .e = 5, .f = 6, + .skip_c_e = true }; +- int ret = vmstate_save_state(fsave, &vmstate_skipping, &obj, NULL); ++ int ret = vmstate_save_state(fsave, &vmstate_skipping, &obj, NULL, ++ &local_err); ++ if (ret) { ++ error_report_err(local_err); ++ } + g_assert(!ret); + g_assert(!qemu_file_get_error(fsave)); + +diff --git a/ui/vdagent.c b/ui/vdagent.c +index bc3c77f013..ddb91e75c6 100644 +--- a/ui/vdagent.c ++++ b/ui/vdagent.c +@@ -992,7 +992,8 @@ static int put_cbinfo(QEMUFile *f, void *pv, size_t size, + } + } + +- return vmstate_save_state(f, &vmstate_cbinfo_array, &cbinfo, vmdesc); ++ return vmstate_save_state(f, &vmstate_cbinfo_array, &cbinfo, vmdesc, ++ &error_fatal); + } + + static int get_cbinfo(QEMUFile *f, void *pv, size_t size, diff --git a/0189-migration-multi-mode-notifier.patch b/0189-migration-multi-mode-notifier.patch new file mode 100644 index 0000000..9cb0cda --- /dev/null +++ b/0189-migration-multi-mode-notifier.patch @@ -0,0 +1,153 @@ +From 32046d2031796e9856328b8fb8c45a2b837dcb95 Mon Sep 17 00:00:00 2001 +From: Steve Sistare +Date: Wed, 1 Oct 2025 08:33:53 -0700 +Subject: [PATCH] migration: multi-mode notifier +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 17b0d6ee96 (clegoate/qemu-kvm-centos) + +Allow a notifier to be added for multiple migration modes. +To allow a notifier to appear on multiple per-node lists, use +a generic list type. We can no longer use NotifierWithReturnList, +because it shoe horns the notifier onto a single list. + +Signed-off-by: Steve Sistare +Reviewed-by: Fabiano Rosas +Link: https://lore.kernel.org/r/1759332851-370353-2-git-send-email-steven.sistare@oracle.com +Signed-off-by: Peter Xu +--- + include/migration/misc.h | 12 ++++++++ + migration/migration.c | 60 +++++++++++++++++++++++++++++++--------- + 2 files changed, 59 insertions(+), 13 deletions(-) + +diff --git a/include/migration/misc.h b/include/migration/misc.h +index a261f99d89..592b93021e 100644 +--- a/include/migration/misc.h ++++ b/include/migration/misc.h +@@ -95,7 +95,19 @@ void migration_add_notifier(NotifierWithReturn *notify, + void migration_add_notifier_mode(NotifierWithReturn *notify, + MigrationNotifyFunc func, MigMode mode); + ++/* ++ * Same as migration_add_notifier, but applies to all @mode in the argument ++ * list. The list is terminated by -1 or MIG_MODE_ALL. For the latter, ++ * the notifier is added for all modes. ++ */ ++void migration_add_notifier_modes(NotifierWithReturn *notify, ++ MigrationNotifyFunc func, MigMode mode, ...); ++ ++/* ++ * Remove a notifier from all modes. ++ */ + void migration_remove_notifier(NotifierWithReturn *notify); ++ + void migration_file_set_error(int ret, Error *err); + + /* True if incoming migration entered POSTCOPY_INCOMING_DISCARD */ +diff --git a/migration/migration.c b/migration/migration.c +index 10c216d25d..08a98f74ef 100644 +--- a/migration/migration.c ++++ b/migration/migration.c +@@ -74,11 +74,7 @@ + + #define INMIGRATE_DEFAULT_EXIT_ON_ERROR true + +-static NotifierWithReturnList migration_state_notifiers[] = { +- NOTIFIER_ELEM_INIT(migration_state_notifiers, MIG_MODE_NORMAL), +- NOTIFIER_ELEM_INIT(migration_state_notifiers, MIG_MODE_CPR_REBOOT), +- NOTIFIER_ELEM_INIT(migration_state_notifiers, MIG_MODE_CPR_TRANSFER), +-}; ++static GSList *migration_state_notifiers[MIG_MODE__MAX]; + + /* Messages sent on the return path from destination to source */ + enum mig_rp_message_type { +@@ -1665,23 +1661,51 @@ void migration_cancel(void) + } + } + ++static int get_modes(MigMode mode, va_list ap); ++ ++static void add_notifiers(NotifierWithReturn *notify, int modes) ++{ ++ for (MigMode mode = 0; mode < MIG_MODE__MAX; mode++) { ++ if (modes & BIT(mode)) { ++ migration_state_notifiers[mode] = ++ g_slist_prepend(migration_state_notifiers[mode], notify); ++ } ++ } ++} ++ ++void migration_add_notifier_modes(NotifierWithReturn *notify, ++ MigrationNotifyFunc func, MigMode mode, ...) ++{ ++ int modes; ++ va_list ap; ++ ++ va_start(ap, mode); ++ modes = get_modes(mode, ap); ++ va_end(ap); ++ ++ notify->notify = (NotifierWithReturnFunc)func; ++ add_notifiers(notify, modes); ++} ++ + void migration_add_notifier_mode(NotifierWithReturn *notify, + MigrationNotifyFunc func, MigMode mode) + { +- notify->notify = (NotifierWithReturnFunc)func; +- notifier_with_return_list_add(&migration_state_notifiers[mode], notify); ++ migration_add_notifier_modes(notify, func, mode, -1); + } + + void migration_add_notifier(NotifierWithReturn *notify, + MigrationNotifyFunc func) + { +- migration_add_notifier_mode(notify, func, MIG_MODE_NORMAL); ++ migration_add_notifier_modes(notify, func, MIG_MODE_NORMAL, -1); + } + + void migration_remove_notifier(NotifierWithReturn *notify) + { + if (notify->notify) { +- notifier_with_return_remove(notify); ++ for (MigMode mode = 0; mode < MIG_MODE__MAX; mode++) { ++ migration_blockers[mode] = ++ g_slist_remove(migration_state_notifiers[mode], notify); ++ } + notify->notify = NULL; + } + } +@@ -1691,13 +1715,23 @@ int migration_call_notifiers(MigrationState *s, MigrationEventType type, + { + MigMode mode = s->parameters.mode; + MigrationEvent e; ++ NotifierWithReturn *notifier; ++ GSList *elem, *next; + int ret; + + e.type = type; +- ret = notifier_with_return_list_notify(&migration_state_notifiers[mode], +- &e, errp); +- assert(!ret || type == MIG_EVENT_PRECOPY_SETUP); +- return ret; ++ ++ for (elem = migration_state_notifiers[mode]; elem; elem = next) { ++ next = elem->next; ++ notifier = (NotifierWithReturn *)elem->data; ++ ret = notifier->notify(notifier, &e, errp); ++ if (ret) { ++ assert(type == MIG_EVENT_PRECOPY_SETUP); ++ return ret; ++ } ++ } ++ ++ return 0; + } + + bool migration_has_failed(MigrationState *s) diff --git a/0190-migration-add-cpr_walk_fd.patch b/0190-migration-add-cpr_walk_fd.patch new file mode 100644 index 0000000..5b3f9b5 --- /dev/null +++ b/0190-migration-add-cpr_walk_fd.patch @@ -0,0 +1,63 @@ +From 1d7464b1c657209a65e81bf219c2781a997c3024 Mon Sep 17 00:00:00 2001 +From: Steve Sistare +Date: Wed, 1 Oct 2025 08:33:54 -0700 +Subject: [PATCH] migration: add cpr_walk_fd +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 3b5fe9c6e3 (clegoate/qemu-kvm-centos) + +Add a helper to walk all CPR fd's and run a callback for each. + +Signed-off-by: Steve Sistare +Reviewed-by: Peter Xu +Link: https://lore.kernel.org/r/1759332851-370353-3-git-send-email-steven.sistare@oracle.com +Signed-off-by: Peter Xu +--- + include/migration/cpr.h | 3 +++ + migration/cpr.c | 13 +++++++++++++ + 2 files changed, 16 insertions(+) + +diff --git a/include/migration/cpr.h b/include/migration/cpr.h +index 3fc19a74ef..2b074d7a65 100644 +--- a/include/migration/cpr.h ++++ b/include/migration/cpr.h +@@ -34,6 +34,9 @@ void cpr_resave_fd(const char *name, int id, int fd); + int cpr_open_fd(const char *path, int flags, const char *name, int id, + Error **errp); + ++typedef bool (*cpr_walk_fd_cb)(int fd); ++bool cpr_walk_fd(cpr_walk_fd_cb cb); ++ + MigMode cpr_get_incoming_mode(void); + void cpr_set_incoming_mode(MigMode mode); + bool cpr_is_incoming(void); +diff --git a/migration/cpr.c b/migration/cpr.c +index 038f48f810..a995b349d9 100644 +--- a/migration/cpr.c ++++ b/migration/cpr.c +@@ -121,6 +121,19 @@ int cpr_open_fd(const char *path, int flags, const char *name, int id, + return fd; + } + ++bool cpr_walk_fd(cpr_walk_fd_cb cb) ++{ ++ CprFd *elem; ++ ++ QLIST_FOREACH(elem, &cpr_state.fds, next) { ++ g_assert(elem->fd >= 0); ++ if (!cb(elem->fd)) { ++ return false; ++ } ++ } ++ return true; ++} ++ + /*************************************************************************/ + static const VMStateDescription vmstate_cpr_state = { + .name = CPR_STATE, diff --git a/0191-oslib-qemu_clear_cloexec.patch b/0191-oslib-qemu_clear_cloexec.patch new file mode 100644 index 0000000..d08860e --- /dev/null +++ b/0191-oslib-qemu_clear_cloexec.patch @@ -0,0 +1,83 @@ +From 6b442cfd4d6ebc517b79a6fe79207ae7b48d2c4d Mon Sep 17 00:00:00 2001 +From: Steve Sistare +Date: Wed, 1 Oct 2025 08:33:55 -0700 +Subject: [PATCH] oslib: qemu_clear_cloexec +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] ecd3db6557 (clegoate/qemu-kvm-centos) + +Define qemu_clear_cloexec, analogous to qemu_set_cloexec. + +Signed-off-by: Steve Sistare +Reviewed-by: Dr. David Alan Gilbert +Reviewed-by: Marc-André Lureau +Reviewed-by: Fabiano Rosas +Link: https://lore.kernel.org/r/1759332851-370353-4-git-send-email-steven.sistare@oracle.com +Signed-off-by: Peter Xu +--- + include/qemu/osdep.h | 9 +++++++++ + util/oslib-posix.c | 9 +++++++++ + util/oslib-win32.c | 4 ++++ + 3 files changed, 22 insertions(+) + +diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h +index 96fe51bc39..30136ead7f 100644 +--- a/include/qemu/osdep.h ++++ b/include/qemu/osdep.h +@@ -680,6 +680,15 @@ ssize_t qemu_write_full(int fd, const void *buf, size_t count) + + void qemu_set_cloexec(int fd); + ++/* ++ * Clear FD_CLOEXEC for a descriptor. ++ * ++ * The caller must guarantee that no other fork+exec's occur before the ++ * exec that is intended to inherit this descriptor, eg by suspending CPUs ++ * and blocking monitor commands. ++ */ ++void qemu_clear_cloexec(int fd); ++ + /* Return a dynamically allocated directory path that is appropriate for storing + * local state. + * +diff --git a/util/oslib-posix.c b/util/oslib-posix.c +index 4ff577e5de..4c04658fc8 100644 +--- a/util/oslib-posix.c ++++ b/util/oslib-posix.c +@@ -307,6 +307,15 @@ int qemu_socketpair(int domain, int type, int protocol, int sv[2]) + return ret; + } + ++void qemu_clear_cloexec(int fd) ++{ ++ int f; ++ f = fcntl(fd, F_GETFD); ++ assert(f != -1); ++ f = fcntl(fd, F_SETFD, f & ~FD_CLOEXEC); ++ assert(f != -1); ++} ++ + char * + qemu_get_local_state_dir(void) + { +diff --git a/util/oslib-win32.c b/util/oslib-win32.c +index b7351634ec..843a901fd3 100644 +--- a/util/oslib-win32.c ++++ b/util/oslib-win32.c +@@ -222,6 +222,10 @@ void qemu_set_cloexec(int fd) + { + } + ++void qemu_clear_cloexec(int fd) ++{ ++} ++ + int qemu_get_thread_id(void) + { + return GetCurrentThreadId(); diff --git a/0192-migration-cpr-exec-command-parameter.patch b/0192-migration-cpr-exec-command-parameter.patch new file mode 100644 index 0000000..20fb076 --- /dev/null +++ b/0192-migration-cpr-exec-command-parameter.patch @@ -0,0 +1,214 @@ +From 4af27eddb3a6d9e97dbf5dbb2fbd49b32ced6f28 Mon Sep 17 00:00:00 2001 +From: Steve Sistare +Date: Wed, 1 Oct 2025 08:33:56 -0700 +Subject: [PATCH] migration: cpr-exec-command parameter +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 03c1cc487f (clegoate/qemu-kvm-centos) + +Create the cpr-exec-command migration parameter, defined as a list of +strings. It will be used for cpr-exec migration mode in a subsequent +patch, and contains forward references to cpr-exec mode in the qapi +doc. + +No functional change, except that cpr-exec-command is shown by the +'info migrate' command. + +Signed-off-by: Steve Sistare +Acked-by: Markus Armbruster +Link: https://lore.kernel.org/r/1759332851-370353-5-git-send-email-steven.sistare@oracle.com +Signed-off-by: Peter Xu +--- + hmp-commands.hx | 2 +- + migration/migration-hmp-cmds.c | 30 ++++++++++++++++++++++++++++++ + migration/options.c | 14 ++++++++++++++ + qapi/migration.json | 21 ++++++++++++++++++--- + 4 files changed, 63 insertions(+), 4 deletions(-) + +diff --git a/hmp-commands.hx b/hmp-commands.hx +index d0e4f35a30..3cace8f1f7 100644 +--- a/hmp-commands.hx ++++ b/hmp-commands.hx +@@ -1009,7 +1009,7 @@ ERST + + { + .name = "migrate_set_parameter", +- .args_type = "parameter:s,value:s", ++ .args_type = "parameter:s,value:S", + .params = "parameter value", + .help = "Set the parameter for migration", + .cmd = hmp_migrate_set_parameter, +diff --git a/migration/migration-hmp-cmds.c b/migration/migration-hmp-cmds.c +index 0fc21f0647..54df615753 100644 +--- a/migration/migration-hmp-cmds.c ++++ b/migration/migration-hmp-cmds.c +@@ -306,6 +306,18 @@ void hmp_info_migrate_capabilities(Monitor *mon, const QDict *qdict) + qapi_free_MigrationCapabilityStatusList(caps); + } + ++static void monitor_print_cpr_exec_command(Monitor *mon, strList *args) ++{ ++ monitor_printf(mon, "%s:", ++ MigrationParameter_str(MIGRATION_PARAMETER_CPR_EXEC_COMMAND)); ++ ++ while (args) { ++ monitor_printf(mon, " %s", args->value); ++ args = args->next; ++ } ++ monitor_printf(mon, "\n"); ++} ++ + void hmp_info_migrate_parameters(Monitor *mon, const QDict *qdict) + { + MigrationParameters *params; +@@ -435,6 +447,9 @@ void hmp_info_migrate_parameters(Monitor *mon, const QDict *qdict) + MIGRATION_PARAMETER_DIRECT_IO), + params->direct_io ? "on" : "off"); + } ++ ++ assert(params->has_cpr_exec_command); ++ monitor_print_cpr_exec_command(mon, params->cpr_exec_command); + } + + qapi_free_MigrationParameters(params); +@@ -716,6 +731,21 @@ void hmp_migrate_set_parameter(Monitor *mon, const QDict *qdict) + p->has_direct_io = true; + visit_type_bool(v, param, &p->direct_io, &err); + break; ++ case MIGRATION_PARAMETER_CPR_EXEC_COMMAND: { ++ g_autofree char **strv = NULL; ++ g_autoptr(GError) gerr = NULL; ++ strList **tail = &p->cpr_exec_command; ++ ++ if (!g_shell_parse_argv(valuestr, NULL, &strv, &gerr)) { ++ error_setg(&err, "%s", gerr->message); ++ break; ++ } ++ for (int i = 0; strv[i]; i++) { ++ QAPI_LIST_APPEND(tail, strv[i]); ++ } ++ p->has_cpr_exec_command = true; ++ break; ++ } + default: + g_assert_not_reached(); + } +diff --git a/migration/options.c b/migration/options.c +index 4e923a2e07..5183112775 100644 +--- a/migration/options.c ++++ b/migration/options.c +@@ -959,6 +959,9 @@ MigrationParameters *qmp_query_migrate_parameters(Error **errp) + params->zero_page_detection = s->parameters.zero_page_detection; + params->has_direct_io = true; + params->direct_io = s->parameters.direct_io; ++ params->has_cpr_exec_command = true; ++ params->cpr_exec_command = QAPI_CLONE(strList, ++ s->parameters.cpr_exec_command); + + return params; + } +@@ -993,6 +996,7 @@ void migrate_params_init(MigrationParameters *params) + params->has_mode = true; + params->has_zero_page_detection = true; + params->has_direct_io = true; ++ params->has_cpr_exec_command = true; + } + + /* +@@ -1297,6 +1301,10 @@ static void migrate_params_test_apply(MigrateSetParameters *params, + if (params->has_direct_io) { + dest->direct_io = params->direct_io; + } ++ ++ if (params->has_cpr_exec_command) { ++ dest->cpr_exec_command = params->cpr_exec_command; ++ } + } + + static void migrate_params_apply(MigrateSetParameters *params, Error **errp) +@@ -1429,6 +1437,12 @@ static void migrate_params_apply(MigrateSetParameters *params, Error **errp) + if (params->has_direct_io) { + s->parameters.direct_io = params->direct_io; + } ++ ++ if (params->has_cpr_exec_command) { ++ qapi_free_strList(s->parameters.cpr_exec_command); ++ s->parameters.cpr_exec_command = ++ QAPI_CLONE(strList, params->cpr_exec_command); ++ } + } + + void qmp_migrate_set_parameters(MigrateSetParameters *params, Error **errp) +diff --git a/qapi/migration.json b/qapi/migration.json +index 2387c21e9c..2be8fa1d16 100644 +--- a/qapi/migration.json ++++ b/qapi/migration.json +@@ -924,6 +924,10 @@ + # only has effect if the @mapped-ram capability is enabled. + # (Since 9.1) + # ++# @cpr-exec-command: Command to start the new QEMU process when @mode ++# is @cpr-exec. The first list element is the program's filename, ++# the remainder its arguments. (Since 10.2) ++# + # Features: + # + # @unstable: Members @x-checkpoint-delay and +@@ -950,7 +954,8 @@ + 'vcpu-dirty-limit', + 'mode', + 'zero-page-detection', +- 'direct-io'] } ++ 'direct-io', ++ 'cpr-exec-command'] } + + ## + # @MigrateSetParameters: +@@ -1105,6 +1110,10 @@ + # only has effect if the @mapped-ram capability is enabled. + # (Since 9.1) + # ++# @cpr-exec-command: Command to start the new QEMU process when @mode ++# is @cpr-exec. The first list element is the program's filename, ++# the remainder its arguments. (Since 10.2) ++# + # Features: + # + # @unstable: Members @x-checkpoint-delay and +@@ -1146,7 +1155,8 @@ + '*vcpu-dirty-limit': 'uint64', + '*mode': 'MigMode', + '*zero-page-detection': 'ZeroPageDetection', +- '*direct-io': 'bool' } } ++ '*direct-io': 'bool', ++ '*cpr-exec-command': [ 'str' ]} } + + ## + # @migrate-set-parameters: +@@ -1315,6 +1325,10 @@ + # only has effect if the @mapped-ram capability is enabled. + # (Since 9.1) + # ++# @cpr-exec-command: Command to start the new QEMU process when @mode ++# is @cpr-exec. The first list element is the program's filename, ++# the remainder its arguments. (Since 10.2) ++# + # Features: + # + # @unstable: Members @x-checkpoint-delay and +@@ -1353,7 +1367,8 @@ + '*vcpu-dirty-limit': 'uint64', + '*mode': 'MigMode', + '*zero-page-detection': 'ZeroPageDetection', +- '*direct-io': 'bool' } } ++ '*direct-io': 'bool', ++ '*cpr-exec-command': [ 'str' ]} } + + ## + # @query-migrate-parameters: diff --git a/0193-migration-cpr-exec-save-and-load.patch b/0193-migration-cpr-exec-save-and-load.patch new file mode 100644 index 0000000..a3c41d8 --- /dev/null +++ b/0193-migration-cpr-exec-save-and-load.patch @@ -0,0 +1,162 @@ +From 10ba960542e7360ce97da486ad915baeb7330a7c Mon Sep 17 00:00:00 2001 +From: Steve Sistare +Date: Wed, 1 Oct 2025 08:33:57 -0700 +Subject: [PATCH] migration: cpr-exec save and load +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 2f3056687d (clegoate/qemu-kvm-centos) + +To preserve CPR state across exec, create a QEMUFile based on a memfd, and +keep the memfd open across exec. Save the value of the memfd in an +environment variable so post-exec QEMU can find it. + +These new functions are called in a subsequent patch. + +Signed-off-by: Steve Sistare +Link: https://lore.kernel.org/r/1759332851-370353-6-git-send-email-steven.sistare@oracle.com +[peterx: fix build for Windows] +Signed-off-by: Peter Xu +--- + include/migration/cpr.h | 5 +++ + migration/cpr-exec.c | 99 +++++++++++++++++++++++++++++++++++++++++ + migration/meson.build | 1 + + 3 files changed, 105 insertions(+) + create mode 100644 migration/cpr-exec.c + +diff --git a/include/migration/cpr.h b/include/migration/cpr.h +index 2b074d7a65..b84389ff04 100644 +--- a/include/migration/cpr.h ++++ b/include/migration/cpr.h +@@ -53,4 +53,9 @@ int cpr_get_fd_param(const char *name, const char *fdname, int index, + QEMUFile *cpr_transfer_output(MigrationChannel *channel, Error **errp); + QEMUFile *cpr_transfer_input(MigrationChannel *channel, Error **errp); + ++QEMUFile *cpr_exec_output(Error **errp); ++QEMUFile *cpr_exec_input(Error **errp); ++void cpr_exec_persist_state(QEMUFile *f); ++bool cpr_exec_has_state(void); ++void cpr_exec_unpersist_state(void); + #endif +diff --git a/migration/cpr-exec.c b/migration/cpr-exec.c +new file mode 100644 +index 0000000000..81d84425e1 +--- /dev/null ++++ b/migration/cpr-exec.c +@@ -0,0 +1,99 @@ ++/* ++ * Copyright (c) 2021-2025 Oracle and/or its affiliates. ++ * ++ * SPDX-License-Identifier: GPL-2.0-or-later ++ */ ++ ++#include "qemu/osdep.h" ++#include "qemu/cutils.h" ++#include "qemu/memfd.h" ++#include "qapi/error.h" ++#include "io/channel-file.h" ++#include "io/channel-socket.h" ++#include "migration/cpr.h" ++#include "migration/qemu-file.h" ++#include "migration/misc.h" ++#include "migration/vmstate.h" ++#include "system/runstate.h" ++ ++#define CPR_EXEC_STATE_NAME "QEMU_CPR_EXEC_STATE" ++ ++static QEMUFile *qemu_file_new_fd_input(int fd, const char *name) ++{ ++ g_autoptr(QIOChannelFile) fioc = qio_channel_file_new_fd(fd); ++ QIOChannel *ioc = QIO_CHANNEL(fioc); ++ qio_channel_set_name(ioc, name); ++ return qemu_file_new_input(ioc); ++} ++ ++static QEMUFile *qemu_file_new_fd_output(int fd, const char *name) ++{ ++ g_autoptr(QIOChannelFile) fioc = qio_channel_file_new_fd(fd); ++ QIOChannel *ioc = QIO_CHANNEL(fioc); ++ qio_channel_set_name(ioc, name); ++ return qemu_file_new_output(ioc); ++} ++ ++void cpr_exec_persist_state(QEMUFile *f) ++{ ++ QIOChannelFile *fioc = QIO_CHANNEL_FILE(qemu_file_get_ioc(f)); ++ int mfd = dup(fioc->fd); ++ char val[16]; ++ ++ /* Remember mfd in environment for post-exec load */ ++ qemu_clear_cloexec(mfd); ++ snprintf(val, sizeof(val), "%d", mfd); ++ g_setenv(CPR_EXEC_STATE_NAME, val, 1); ++} ++ ++static int cpr_exec_find_state(void) ++{ ++ const char *val = g_getenv(CPR_EXEC_STATE_NAME); ++ int mfd; ++ ++ assert(val); ++ g_unsetenv(CPR_EXEC_STATE_NAME); ++ assert(!qemu_strtoi(val, NULL, 10, &mfd)); ++ return mfd; ++} ++ ++bool cpr_exec_has_state(void) ++{ ++ return g_getenv(CPR_EXEC_STATE_NAME) != NULL; ++} ++ ++void cpr_exec_unpersist_state(void) ++{ ++ int mfd; ++ const char *val = g_getenv(CPR_EXEC_STATE_NAME); ++ ++ g_unsetenv(CPR_EXEC_STATE_NAME); ++ assert(val); ++ assert(!qemu_strtoi(val, NULL, 10, &mfd)); ++ close(mfd); ++} ++ ++QEMUFile *cpr_exec_output(Error **errp) ++{ ++ int mfd; ++ ++#ifdef CONFIG_LINUX ++ mfd = qemu_memfd_create(CPR_EXEC_STATE_NAME, 0, false, 0, 0, errp); ++#else ++ mfd = -1; ++#endif ++ ++ if (mfd < 0) { ++ return NULL; ++ } ++ ++ return qemu_file_new_fd_output(mfd, CPR_EXEC_STATE_NAME); ++} ++ ++QEMUFile *cpr_exec_input(Error **errp) ++{ ++ int mfd = cpr_exec_find_state(); ++ ++ lseek(mfd, 0, SEEK_SET); ++ return qemu_file_new_fd_input(mfd, CPR_EXEC_STATE_NAME); ++} +diff --git a/migration/meson.build b/migration/meson.build +index 276da3be5a..6087ccc733 100644 +--- a/migration/meson.build ++++ b/migration/meson.build +@@ -16,6 +16,7 @@ system_ss.add(files( + 'channel-block.c', + 'cpr.c', + 'cpr-transfer.c', ++ 'cpr-exec.c', + 'cpu-throttle.c', + 'dirtyrate.c', + 'exec.c', diff --git a/0194-migration-cpr-exec-mode.patch b/0194-migration-cpr-exec-mode.patch new file mode 100644 index 0000000..9934639 --- /dev/null +++ b/0194-migration-cpr-exec-mode.patch @@ -0,0 +1,415 @@ +From fe3b723b9ed23f89e86af5f0bc227a5535a09681 Mon Sep 17 00:00:00 2001 +From: Steve Sistare +Date: Wed, 1 Oct 2025 08:33:58 -0700 +Subject: [PATCH] migration: cpr-exec mode +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 7aeb2d01b3 (clegoate/qemu-kvm-centos) + +Add the cpr-exec migration mode. Usage: + qemu-system-$arch -machine aux-ram-share=on ... + migrate_set_parameter mode cpr-exec + migrate_set_parameter cpr-exec-command \ + ... -incoming \ + migrate -d + +The migrate command stops the VM, saves state to uri-1, +directly exec's a new version of QEMU on the same host, +replacing the original process while retaining its PID, and +loads state from uri-1. Guest RAM is preserved in place, +albeit with new virtual addresses. + +The new QEMU process is started by exec'ing the command +specified by the @cpr-exec-command parameter. The first word of +the command is the binary, and the remaining words are its +arguments. The command may be a direct invocation of new QEMU, +or may be a non-QEMU command that exec's the new QEMU binary. + +This mode creates a second migration channel that is not visible +to the user. At the start of migration, old QEMU saves CPR state +to the second channel, and at the end of migration, it tells the +main loop to call cpr_exec. New QEMU loads CPR state early, before +objects are created. + +Because old QEMU terminates when new QEMU starts, one cannot +stream data between the two, so uri-1 must be a type, +such as a file, that accepts all data before old QEMU exits. +Otherwise, old QEMU may quietly block writing to the channel. + +Memory-backend objects must have the share=on attribute, but +memory-backend-epc is not supported. The VM must be started with +the '-machine aux-ram-share=on' option, which allows anonymous +memory to be transferred in place to the new process. The memfds +are kept open across exec by clearing the close-on-exec flag, their +values are saved in CPR state, and they are mmap'd in new QEMU. + +Signed-off-by: Steve Sistare +Acked-by: Markus Armbruster +Link: https://lore.kernel.org/r/1759332851-370353-7-git-send-email-steven.sistare@oracle.com +Signed-off-by: Peter Xu +--- + include/migration/cpr.h | 2 + + migration/cpr-exec.c | 95 +++++++++++++++++++++++++++++++++++++++ + migration/cpr.c | 23 +++++++++- + migration/migration.c | 10 ++++- + migration/ram.c | 1 + + migration/trace-events | 1 + + migration/vmstate-types.c | 8 ++++ + qapi/migration.json | 25 ++++++++++- + system/vl.c | 4 +- + 9 files changed, 164 insertions(+), 5 deletions(-) + +diff --git a/include/migration/cpr.h b/include/migration/cpr.h +index b84389ff04..a412d6663c 100644 +--- a/include/migration/cpr.h ++++ b/include/migration/cpr.h +@@ -53,9 +53,11 @@ int cpr_get_fd_param(const char *name, const char *fdname, int index, + QEMUFile *cpr_transfer_output(MigrationChannel *channel, Error **errp); + QEMUFile *cpr_transfer_input(MigrationChannel *channel, Error **errp); + ++void cpr_exec_init(void); + QEMUFile *cpr_exec_output(Error **errp); + QEMUFile *cpr_exec_input(Error **errp); + void cpr_exec_persist_state(QEMUFile *f); + bool cpr_exec_has_state(void); + void cpr_exec_unpersist_state(void); ++void cpr_exec_unpreserve_fds(void); + #endif +diff --git a/migration/cpr-exec.c b/migration/cpr-exec.c +index 81d84425e1..d57714bc5d 100644 +--- a/migration/cpr-exec.c ++++ b/migration/cpr-exec.c +@@ -6,15 +6,21 @@ + + #include "qemu/osdep.h" + #include "qemu/cutils.h" ++#include "qemu/error-report.h" + #include "qemu/memfd.h" + #include "qapi/error.h" ++#include "qapi/type-helpers.h" + #include "io/channel-file.h" + #include "io/channel-socket.h" ++#include "block/block-global-state.h" ++#include "qemu/main-loop.h" + #include "migration/cpr.h" + #include "migration/qemu-file.h" ++#include "migration/migration.h" + #include "migration/misc.h" + #include "migration/vmstate.h" + #include "system/runstate.h" ++#include "trace.h" + + #define CPR_EXEC_STATE_NAME "QEMU_CPR_EXEC_STATE" + +@@ -97,3 +103,92 @@ QEMUFile *cpr_exec_input(Error **errp) + lseek(mfd, 0, SEEK_SET); + return qemu_file_new_fd_input(mfd, CPR_EXEC_STATE_NAME); + } ++ ++static bool preserve_fd(int fd) ++{ ++ qemu_clear_cloexec(fd); ++ return true; ++} ++ ++static bool unpreserve_fd(int fd) ++{ ++ qemu_set_cloexec(fd); ++ return true; ++} ++ ++static void cpr_exec_preserve_fds(void) ++{ ++ cpr_walk_fd(preserve_fd); ++} ++ ++void cpr_exec_unpreserve_fds(void) ++{ ++ cpr_walk_fd(unpreserve_fd); ++} ++ ++static void cpr_exec_cb(void *opaque) ++{ ++ MigrationState *s = migrate_get_current(); ++ char **argv = strv_from_str_list(s->parameters.cpr_exec_command); ++ Error *err = NULL; ++ ++ /* ++ * Clear the close-on-exec flag for all preserved fd's. We cannot do so ++ * earlier because they should not persist across miscellaneous fork and ++ * exec calls that are performed during normal operation. ++ */ ++ cpr_exec_preserve_fds(); ++ ++ trace_cpr_exec(); ++ execvp(argv[0], argv); ++ ++ /* ++ * exec should only fail if argv[0] is bogus, or has a permissions problem, ++ * or the system is very short on resources. ++ */ ++ g_strfreev(argv); ++ cpr_exec_unpreserve_fds(); ++ ++ error_setg_errno(&err, errno, "execvp %s failed", argv[0]); ++ error_report_err(error_copy(err)); ++ migrate_set_state(&s->state, s->state, MIGRATION_STATUS_FAILED); ++ migrate_set_error(s, err); ++ ++ /* Note, we can go from state COMPLETED to FAILED */ ++ migration_call_notifiers(s, MIG_EVENT_PRECOPY_FAILED, NULL); ++ ++ err = NULL; ++ if (!migration_block_activate(&err)) { ++ /* error was already reported */ ++ error_free(err); ++ return; ++ } ++ ++ if (runstate_is_live(s->vm_old_state)) { ++ vm_start(); ++ } ++} ++ ++static int cpr_exec_notifier(NotifierWithReturn *notifier, MigrationEvent *e, ++ Error **errp) ++{ ++ MigrationState *s = migrate_get_current(); ++ ++ if (e->type == MIG_EVENT_PRECOPY_DONE) { ++ QEMUBH *cpr_exec_bh = qemu_bh_new(cpr_exec_cb, NULL); ++ assert(s->state == MIGRATION_STATUS_COMPLETED); ++ qemu_bh_schedule(cpr_exec_bh); ++ qemu_notify_event(); ++ } else if (e->type == MIG_EVENT_PRECOPY_FAILED) { ++ cpr_exec_unpersist_state(); ++ } ++ return 0; ++} ++ ++void cpr_exec_init(void) ++{ ++ static NotifierWithReturn exec_notifier; ++ ++ migration_add_notifier_mode(&exec_notifier, cpr_exec_notifier, ++ MIG_MODE_CPR_EXEC); ++} +diff --git a/migration/cpr.c b/migration/cpr.c +index a995b349d9..0b87c2343f 100644 +--- a/migration/cpr.c ++++ b/migration/cpr.c +@@ -6,6 +6,7 @@ + */ + + #include "qemu/osdep.h" ++#include "qemu/error-report.h" + #include "qapi/error.h" + #include "hw/vfio/vfio-device.h" + #include "migration/cpr.h" +@@ -185,6 +186,8 @@ int cpr_state_save(MigrationChannel *channel, Error **errp) + if (mode == MIG_MODE_CPR_TRANSFER) { + g_assert(channel); + f = cpr_transfer_output(channel, errp); ++ } else if (mode == MIG_MODE_CPR_EXEC) { ++ f = cpr_exec_output(errp); + } else { + return 0; + } +@@ -201,6 +204,10 @@ int cpr_state_save(MigrationChannel *channel, Error **errp) + return ret; + } + ++ if (migrate_mode() == MIG_MODE_CPR_EXEC) { ++ cpr_exec_persist_state(f); ++ } ++ + /* + * Close the socket only partially so we can later detect when the other + * end closes by getting a HUP event. +@@ -219,7 +226,13 @@ int cpr_state_load(MigrationChannel *channel, Error **errp) + QEMUFile *f; + MigMode mode = 0; + +- if (channel) { ++ if (cpr_exec_has_state()) { ++ mode = MIG_MODE_CPR_EXEC; ++ f = cpr_exec_input(errp); ++ if (channel) { ++ warn_report("ignoring cpr channel for migration mode cpr-exec"); ++ } ++ } else if (channel) { + mode = MIG_MODE_CPR_TRANSFER; + cpr_set_incoming_mode(mode); + f = cpr_transfer_input(channel, errp); +@@ -231,6 +244,7 @@ int cpr_state_load(MigrationChannel *channel, Error **errp) + } + + trace_cpr_state_load(MigMode_str(mode)); ++ cpr_set_incoming_mode(mode); + + v = qemu_get_be32(f); + if (v != QEMU_CPR_FILE_MAGIC) { +@@ -251,6 +265,11 @@ int cpr_state_load(MigrationChannel *channel, Error **errp) + return ret; + } + ++ if (migrate_mode() == MIG_MODE_CPR_EXEC) { ++ /* Set cloexec to prevent fd leaks from fork until the next cpr-exec */ ++ cpr_exec_unpreserve_fds(); ++ } ++ + /* + * Let the caller decide when to close the socket (and generate a HUP event + * for the sending side). +@@ -271,7 +290,7 @@ void cpr_state_close(void) + bool cpr_incoming_needed(void *opaque) + { + MigMode mode = migrate_mode(); +- return mode == MIG_MODE_CPR_TRANSFER; ++ return mode == MIG_MODE_CPR_TRANSFER || mode == MIG_MODE_CPR_EXEC; + } + + /* +diff --git a/migration/migration.c b/migration/migration.c +index 08a98f74ef..2515bec48f 100644 +--- a/migration/migration.c ++++ b/migration/migration.c +@@ -333,6 +333,7 @@ void migration_object_init(void) + + ram_mig_init(); + dirty_bitmap_mig_init(); ++ cpr_exec_init(); + + /* Initialize cpu throttle timers */ + cpu_throttle_init(); +@@ -1796,7 +1797,8 @@ bool migrate_mode_is_cpr(MigrationState *s) + { + MigMode mode = s->parameters.mode; + return mode == MIG_MODE_CPR_REBOOT || +- mode == MIG_MODE_CPR_TRANSFER; ++ mode == MIG_MODE_CPR_TRANSFER || ++ mode == MIG_MODE_CPR_EXEC; + } + + int migrate_init(MigrationState *s, Error **errp) +@@ -2145,6 +2147,12 @@ static bool migrate_prepare(MigrationState *s, bool resume, Error **errp) + return false; + } + ++ if (migrate_mode() == MIG_MODE_CPR_EXEC && ++ !s->parameters.has_cpr_exec_command) { ++ error_setg(errp, "cpr-exec mode requires setting cpr-exec-command"); ++ return false; ++ } ++ + if (migration_is_blocked(errp)) { + return false; + } +diff --git a/migration/ram.c b/migration/ram.c +index 7208bc114f..6730a41ff5 100644 +--- a/migration/ram.c ++++ b/migration/ram.c +@@ -228,6 +228,7 @@ bool migrate_ram_is_ignored(RAMBlock *block) + MigMode mode = migrate_mode(); + return !qemu_ram_is_migratable(block) || + mode == MIG_MODE_CPR_TRANSFER || ++ mode == MIG_MODE_CPR_EXEC || + (migrate_ignore_shared() && qemu_ram_is_shared(block) + && qemu_ram_is_named_file(block)); + } +diff --git a/migration/trace-events b/migration/trace-events +index 706db97def..e8edd1fbba 100644 +--- a/migration/trace-events ++++ b/migration/trace-events +@@ -354,6 +354,7 @@ cpr_state_save(const char *mode) "%s mode" + cpr_state_load(const char *mode) "%s mode" + cpr_transfer_input(const char *path) "%s" + cpr_transfer_output(const char *path) "%s" ++cpr_exec(void) "" + + # block-dirty-bitmap.c + send_bitmap_header_enter(void) "" +diff --git a/migration/vmstate-types.c b/migration/vmstate-types.c +index a1cd7a95fa..4b01dc19c2 100644 +--- a/migration/vmstate-types.c ++++ b/migration/vmstate-types.c +@@ -322,6 +322,10 @@ static int get_fd(QEMUFile *f, void *pv, size_t size, + const VMStateField *field) + { + int32_t *v = pv; ++ if (migrate_mode() == MIG_MODE_CPR_EXEC) { ++ qemu_get_sbe32s(f, v); ++ return 0; ++ } + *v = qemu_file_get_fd(f); + return 0; + } +@@ -330,6 +334,10 @@ static int put_fd(QEMUFile *f, void *pv, size_t size, + const VMStateField *field, JSONWriter *vmdesc) + { + int32_t *v = pv; ++ if (migrate_mode() == MIG_MODE_CPR_EXEC) { ++ qemu_put_sbe32s(f, v); ++ return 0; ++ } + return qemu_file_put_fd(f, *v); + } + +diff --git a/qapi/migration.json b/qapi/migration.json +index 2be8fa1d16..be0f3fcc12 100644 +--- a/qapi/migration.json ++++ b/qapi/migration.json +@@ -694,9 +694,32 @@ + # until you issue the `migrate-incoming` command. + # + # (since 10.0) ++# ++# @cpr-exec: The migrate command stops the VM, saves state to the ++# migration channel, directly exec's a new version of QEMU on the ++# same host, replacing the original process while retaining its ++# PID, and loads state from the channel. Guest RAM is preserved ++# in place. Devices and their pinned pages are also preserved for ++# VFIO and IOMMUFD. ++# ++# Old QEMU starts new QEMU by exec'ing the command specified by ++# the @cpr-exec-command parameter. The command may be a direct ++# invocation of new QEMU, or may be a wrapper that exec's the new ++# QEMU binary. ++# ++# Because old QEMU terminates when new QEMU starts, one cannot ++# stream data between the two, so the channel must be a type, ++# such as a file, that accepts all data before old QEMU exits. ++# Otherwise, old QEMU may quietly block writing to the channel. ++# ++# Memory-backend objects must have the share=on attribute, but ++# memory-backend-epc is not supported. The VM must be started ++# with the '-machine aux-ram-share=on' option. ++# ++# (since 10.2) + ## + { 'enum': 'MigMode', +- 'data': [ 'normal', 'cpr-reboot', 'cpr-transfer' ] } ++ 'data': [ 'normal', 'cpr-reboot', 'cpr-transfer', 'cpr-exec' ] } + + ## + # @ZeroPageDetection: +diff --git a/system/vl.c b/system/vl.c +index d3e6158753..7a32043625 100644 +--- a/system/vl.c ++++ b/system/vl.c +@@ -3850,6 +3850,8 @@ void qemu_init(int argc, char **argv) + } + qemu_init_displays(); + accel_setup_post(current_machine); +- os_setup_post(); ++ if (migrate_mode() != MIG_MODE_CPR_EXEC) { ++ os_setup_post(); ++ } + resume_mux_open(); + } diff --git a/0195-migration-cpr-exec-docs.patch b/0195-migration-cpr-exec-docs.patch new file mode 100644 index 0000000..a2145ee --- /dev/null +++ b/0195-migration-cpr-exec-docs.patch @@ -0,0 +1,151 @@ +From 1e87a05f4a9a52b9f265059918ba0fd10c71000a Mon Sep 17 00:00:00 2001 +From: Steve Sistare +Date: Wed, 1 Oct 2025 08:33:59 -0700 +Subject: [PATCH] migration: cpr-exec docs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 188b93fdb7 (clegoate/qemu-kvm-centos) + +Update developer documentation for cpr-exec mode. + +Signed-off-by: Steve Sistare +Reviewed-by: Fabiano Rosas +Link: https://lore.kernel.org/r/1759332851-370353-8-git-send-email-steven.sistare@oracle.com +Signed-off-by: Peter Xu +--- + docs/devel/migration/CPR.rst | 112 ++++++++++++++++++++++++++++++++++- + 1 file changed, 111 insertions(+), 1 deletion(-) + +diff --git a/docs/devel/migration/CPR.rst b/docs/devel/migration/CPR.rst +index 0a0fd4f6dc..b6178568a8 100644 +--- a/docs/devel/migration/CPR.rst ++++ b/docs/devel/migration/CPR.rst +@@ -5,7 +5,7 @@ CPR is the umbrella name for a set of migration modes in which the + VM is migrated to a new QEMU instance on the same host. It is + intended for use when the goal is to update host software components + that run the VM, such as QEMU or even the host kernel. At this time, +-the cpr-reboot and cpr-transfer modes are available. ++the cpr-reboot, cpr-transfer, and cpr-exec modes are available. + + Because QEMU is restarted on the same host, with access to the same + local devices, CPR is allowed in certain cases where normal migration +@@ -324,3 +324,113 @@ descriptors from old to new QEMU. In the future, descriptors for + vhost, and char devices could be transferred, + preserving those devices and their kernel state without interruption, + even if they do not explicitly support live migration. ++ ++cpr-exec mode ++------------- ++ ++In this mode, QEMU stops the VM, writes VM state to the migration ++URI, and directly exec's a new version of QEMU on the same host, ++replacing the original process while retaining its PID. Guest RAM is ++preserved in place, albeit with new virtual addresses. The user ++completes the migration by specifying the ``-incoming`` option, and ++by issuing the ``migrate-incoming`` command if necessary; see details ++below. ++ ++This mode supports VFIO/IOMMUFD devices by preserving device ++descriptors and hence kernel state across the exec, even for devices ++that do not support live migration. ++ ++Because the old and new QEMU instances are not active concurrently, ++the URI cannot be a type that streams data from one instance to the ++other. ++ ++This mode does not require a channel of type ``cpr``. The information ++that is passed over that channel for cpr-transfer mode is instead ++serialized to a memfd, the number of the fd is saved in the ++QEMU_CPR_EXEC_STATE environment variable during the exec of new QEMU. ++and new QEMU mmaps the memfd. ++ ++Usage ++^^^^^ ++ ++Arguments for the new QEMU process are taken from the ++@cpr-exec-command parameter. The first argument should be the ++path of a new QEMU binary, or a prefix command that exec's the ++new QEMU binary, and the arguments should include the ''-incoming'' ++option. ++ ++Memory backend objects must have the ``share=on`` attribute. ++The VM must be started with the ``-machine aux-ram-share=on`` option. ++ ++Outgoing: ++ * Set the migration mode parameter to ``cpr-exec``. ++ * Set the ``cpr-exec-command`` parameter. ++ * Issue the ``migrate`` command. It is recommended that the URI be ++ a ``file`` type, but one can use other types such as ``exec``, ++ provided the command captures all the data from the outgoing side, ++ and provides all the data to the incoming side. ++ ++Incoming: ++ * You do not need to explicitly start new QEMU. It is started as ++ a side effect of the migrate command above. ++ * If the VM was running when the outgoing ``migrate`` command was ++ issued, then QEMU automatically resumes VM execution. ++ ++Example 1: incoming URI ++^^^^^^^^^^^^^^^^^^^^^^^ ++ ++In these examples, we simply restart the same version of QEMU, but in ++a real scenario one would set a new QEMU binary path in ++cpr-exec-command. ++ ++:: ++ ++ # qemu-kvm -monitor stdio ++ -object memory-backend-memfd,id=ram0,size=4G ++ -machine memory-backend=ram0 ++ -machine aux-ram-share=on ++ ... ++ ++ QEMU 10.2.50 monitor - type 'help' for more information ++ (qemu) info status ++ VM status: running ++ (qemu) migrate_set_parameter mode cpr-exec ++ (qemu) migrate_set_parameter cpr-exec-command qemu-kvm ... -incoming file:vm.state ++ (qemu) migrate -d file:vm.state ++ (qemu) QEMU 10.2.50 monitor - type 'help' for more information ++ (qemu) info status ++ VM status: running ++ ++Example 2: incoming defer ++^^^^^^^^^^^^^^^^^^^^^^^^^ ++:: ++ ++ # qemu-kvm -monitor stdio ++ -object memory-backend-memfd,id=ram0,size=4G ++ -machine memory-backend=ram0 ++ -machine aux-ram-share=on ++ ... ++ ++ QEMU 10.2.50 monitor - type 'help' for more information ++ (qemu) info status ++ VM status: running ++ (qemu) migrate_set_parameter mode cpr-exec ++ (qemu) migrate_set_parameter cpr-exec-command qemu-kvm ... -incoming defer ++ (qemu) migrate -d file:vm.state ++ (qemu) QEMU 10.2.50 monitor - type 'help' for more information ++ (qemu) info status ++ status: paused (inmigrate) ++ (qemu) migrate_incoming file:vm.state ++ (qemu) info status ++ VM status: running ++ ++Caveats ++^^^^^^^ ++ ++cpr-exec mode may not be used with postcopy, background-snapshot, ++or COLO. ++ ++cpr-exec mode requires permission to use the exec system call, which ++is denied by certain sandbox options, such as spawn. ++ ++The guest pause time increases for large guest RAM backed by small pages. diff --git a/0196-vfio-cpr-exec-mode.patch b/0196-vfio-cpr-exec-mode.patch new file mode 100644 index 0000000..d496a5c --- /dev/null +++ b/0196-vfio-cpr-exec-mode.patch @@ -0,0 +1,112 @@ +From c07cd16a5e1b69603da9cb2eea37d7558008f38c Mon Sep 17 00:00:00 2001 +From: Steve Sistare +Date: Mon, 30 Sep 2024 09:31:52 -0700 +Subject: [PATCH] vfio: cpr-exec mode +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 39abdaec2f (clegoate/qemu-kvm-centos) + +All blockers and notifiers for cpr-transfer mode also apply to cpr-exec. + +Signed-off-by: Steve Sistare +Acked-by: Cédric Le Goater +Link: https://lore.kernel.org/r/30750362-d4a1-4392-8dd6-016624d01be1@oracle.com +Signed-off-by: Peter Xu +--- + hw/vfio/container-legacy.c | 3 ++- + hw/vfio/cpr-iommufd.c | 3 ++- + hw/vfio/cpr-legacy.c | 9 +++++---- + hw/vfio/cpr.c | 13 +++++++------ + 4 files changed, 16 insertions(+), 12 deletions(-) + +diff --git a/hw/vfio/container-legacy.c b/hw/vfio/container-legacy.c +index 1394dd6fe8..fad0226f7d 100644 +--- a/hw/vfio/container-legacy.c ++++ b/hw/vfio/container-legacy.c +@@ -986,7 +986,8 @@ static bool vfio_legacy_attach_device(const char *name, VFIODevice *vbasedev, + error_setg(&vbasedev->cpr.mdev_blocker, + "CPR does not support vfio mdev %s", vbasedev->name); + if (migrate_add_blocker_modes(&vbasedev->cpr.mdev_blocker, errp, +- MIG_MODE_CPR_TRANSFER, -1) < 0) { ++ MIG_MODE_CPR_TRANSFER, MIG_MODE_CPR_EXEC, ++ -1) < 0) { + goto hiod_unref_exit; + } + } +diff --git a/hw/vfio/cpr-iommufd.c b/hw/vfio/cpr-iommufd.c +index 1d70c87996..8a4d65de5e 100644 +--- a/hw/vfio/cpr-iommufd.c ++++ b/hw/vfio/cpr-iommufd.c +@@ -159,7 +159,8 @@ bool vfio_iommufd_cpr_register_iommufd(IOMMUFDBackend *be, Error **errp) + + if (!vfio_cpr_supported(be, cpr_blocker)) { + return migrate_add_blocker_modes(cpr_blocker, errp, +- MIG_MODE_CPR_TRANSFER, -1) == 0; ++ MIG_MODE_CPR_TRANSFER, ++ MIG_MODE_CPR_EXEC, -1) == 0; + } + + vmstate_register(NULL, -1, &iommufd_cpr_vmstate, be); +diff --git a/hw/vfio/cpr-legacy.c b/hw/vfio/cpr-legacy.c +index 3a1d126556..80af7469d0 100644 +--- a/hw/vfio/cpr-legacy.c ++++ b/hw/vfio/cpr-legacy.c +@@ -179,16 +179,17 @@ bool vfio_legacy_cpr_register_container(VFIOLegacyContainer *container, + + if (!vfio_cpr_supported(container, cpr_blocker)) { + return migrate_add_blocker_modes(cpr_blocker, errp, +- MIG_MODE_CPR_TRANSFER, -1) == 0; ++ MIG_MODE_CPR_TRANSFER, ++ MIG_MODE_CPR_EXEC, -1) == 0; + } + + vfio_cpr_add_kvm_notifier(); + + vmstate_register(NULL, -1, &vfio_container_vmstate, container); + +- migration_add_notifier_mode(&container->cpr.transfer_notifier, +- vfio_cpr_fail_notifier, +- MIG_MODE_CPR_TRANSFER); ++ migration_add_notifier_modes(&container->cpr.transfer_notifier, ++ vfio_cpr_fail_notifier, ++ MIG_MODE_CPR_TRANSFER, MIG_MODE_CPR_EXEC, -1); + return true; + } + +diff --git a/hw/vfio/cpr.c b/hw/vfio/cpr.c +index 2c71fc1e8e..db462aabcb 100644 +--- a/hw/vfio/cpr.c ++++ b/hw/vfio/cpr.c +@@ -195,9 +195,10 @@ static int vfio_cpr_kvm_close_notifier(NotifierWithReturn *notifier, + void vfio_cpr_add_kvm_notifier(void) + { + if (!kvm_close_notifier.notify) { +- migration_add_notifier_mode(&kvm_close_notifier, +- vfio_cpr_kvm_close_notifier, +- MIG_MODE_CPR_TRANSFER); ++ migration_add_notifier_modes(&kvm_close_notifier, ++ vfio_cpr_kvm_close_notifier, ++ MIG_MODE_CPR_TRANSFER, MIG_MODE_CPR_EXEC, ++ -1); + } + } + +@@ -282,9 +283,9 @@ static int vfio_cpr_pci_notifier(NotifierWithReturn *notifier, + + void vfio_cpr_pci_register_device(VFIOPCIDevice *vdev) + { +- migration_add_notifier_mode(&vdev->cpr.transfer_notifier, +- vfio_cpr_pci_notifier, +- MIG_MODE_CPR_TRANSFER); ++ migration_add_notifier_modes(&vdev->cpr.transfer_notifier, ++ vfio_cpr_pci_notifier, ++ MIG_MODE_CPR_TRANSFER, MIG_MODE_CPR_EXEC, -1); + } + + void vfio_cpr_pci_unregister_device(VFIOPCIDevice *vdev) diff --git a/0197-hw-vfio-listener-Include-missing-exec-target_page.h-.patch b/0197-hw-vfio-listener-Include-missing-exec-target_page.h-.patch new file mode 100644 index 0000000..697af09 --- /dev/null +++ b/0197-hw-vfio-listener-Include-missing-exec-target_page.h-.patch @@ -0,0 +1,45 @@ +From 46b60184cba3637cef9fdc3de869aaaa3b32adcb Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= +Date: Wed, 1 Oct 2025 09:56:41 +0200 +Subject: [PATCH] hw/vfio/listener: Include missing 'exec/target_page.h' header +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] c355727399 (clegoate/qemu-kvm-centos) + +The "exec/target_page.h" header is indirectly pulled from +"system/ram_addr.h". Include it explicitly, in order to +avoid unrelated issues when refactoring "system/ram_addr.h": + + hw/vfio/listener.c: In function ‘vfio_ram_discard_register_listener’: + hw/vfio/listener.c:258:28: error: implicit declaration of function ‘qemu_target_page_size’; did you mean ‘qemu_ram_pagesize’? + 258 | int target_page_size = qemu_target_page_size(); + | ^~~~~~~~~~~~~~~~~~~~~ + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Richard Henderson +Reviewed-by: Cédric Le Goater +Message-Id: <20251001175448.18933-5-philmd@linaro.org> +(cherry picked from commit edd1f91d38dfc341cac02529fcd315609e959763) +Signed-off-by: Eric Auger +--- + hw/vfio/listener.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/hw/vfio/listener.c b/hw/vfio/listener.c +index a2c19a3cec..b5cefc9395 100644 +--- a/hw/vfio/listener.c ++++ b/hw/vfio/listener.c +@@ -25,6 +25,7 @@ + #endif + #include + ++#include "exec/target_page.h" + #include "hw/vfio/vfio-device.h" + #include "hw/vfio/pci.h" + #include "system/address-spaces.h" diff --git a/0198-hw-Remove-unnecessary-system-ram_addr.h-header.patch b/0198-hw-Remove-unnecessary-system-ram_addr.h-header.patch new file mode 100644 index 0000000..6ffe7da --- /dev/null +++ b/0198-hw-Remove-unnecessary-system-ram_addr.h-header.patch @@ -0,0 +1,134 @@ +From a22b9ee56b46fdfa9593325fb347a3837d00e94f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= +Date: Tue, 30 Sep 2025 09:20:38 +0200 +Subject: [PATCH] hw: Remove unnecessary 'system/ram_addr.h' header +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] d76c04f8d1 (clegoate/qemu-kvm-centos) + +None of these files require definition exposed by "system/ram_addr.h", +remove its inclusion. + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Richard Henderson +Reviewed-by: Jagannathan Raman +Reviewed-by: Cédric Le Goater +Reviewed-by: Eric Farman +Reviewed-by: Thomas Huth +Acked-by: Michael S. Tsirkin +Message-Id: <20251001175448.18933-7-philmd@linaro.org> +(cherry picked from commit 97480ca692e94bb790190a43bb122bd0752b8f62) +Signed-off-by: Eric Auger +--- + hw/ppc/spapr.c | 1 - + hw/ppc/spapr_caps.c | 1 - + hw/ppc/spapr_pci.c | 1 - + hw/remote/memory.c | 1 - + hw/remote/proxy-memory-listener.c | 1 - + hw/s390x/s390-virtio-ccw.c | 1 - + hw/vfio/spapr.c | 1 - + hw/virtio/virtio-mem.c | 1 - + 8 files changed, 8 deletions(-) + +diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c +index 1855a3cd8d..5906a1325d 100644 +--- a/hw/ppc/spapr.c ++++ b/hw/ppc/spapr.c +@@ -77,7 +77,6 @@ + #include "hw/virtio/virtio-scsi.h" + #include "hw/virtio/vhost-scsi-common.h" + +-#include "system/ram_addr.h" + #include "system/confidential-guest-support.h" + #include "hw/usb.h" + #include "qemu/config-file.h" +diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c +index f2f5722d8a..0f94c192fd 100644 +--- a/hw/ppc/spapr_caps.c ++++ b/hw/ppc/spapr_caps.c +@@ -27,7 +27,6 @@ + #include "qapi/error.h" + #include "qapi/visitor.h" + #include "system/hw_accel.h" +-#include "system/ram_addr.h" + #include "target/ppc/cpu.h" + #include "target/ppc/mmu-hash64.h" + #include "cpu-models.h" +diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c +index 1ac1185825..f9095552e8 100644 +--- a/hw/ppc/spapr_pci.c ++++ b/hw/ppc/spapr_pci.c +@@ -34,7 +34,6 @@ + #include "hw/pci/pci_host.h" + #include "hw/ppc/spapr.h" + #include "hw/pci-host/spapr.h" +-#include "system/ram_addr.h" + #include + #include "trace.h" + #include "qemu/error-report.h" +diff --git a/hw/remote/memory.c b/hw/remote/memory.c +index 00193a552f..8195aa5fb8 100644 +--- a/hw/remote/memory.c ++++ b/hw/remote/memory.c +@@ -11,7 +11,6 @@ + #include "qemu/osdep.h" + + #include "hw/remote/memory.h" +-#include "system/ram_addr.h" + #include "qapi/error.h" + + static void remote_sysmem_reset(void) +diff --git a/hw/remote/proxy-memory-listener.c b/hw/remote/proxy-memory-listener.c +index 30ac74961d..e1a52d24f0 100644 +--- a/hw/remote/proxy-memory-listener.c ++++ b/hw/remote/proxy-memory-listener.c +@@ -12,7 +12,6 @@ + #include "qemu/range.h" + #include "system/memory.h" + #include "exec/cpu-common.h" +-#include "system/ram_addr.h" + #include "qapi/error.h" + #include "qemu/error-report.h" + #include "hw/remote/mpqemu-link.h" +diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c +index 4937a0c3b8..c2ebc086b3 100644 +--- a/hw/s390x/s390-virtio-ccw.c ++++ b/hw/s390x/s390-virtio-ccw.c +@@ -13,7 +13,6 @@ + + #include "qemu/osdep.h" + #include "qapi/error.h" +-#include "system/ram_addr.h" + #include "system/confidential-guest-support.h" + #include "hw/boards.h" + #include "hw/s390x/sclp.h" +diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c +index 8d9d68da4e..0f23681a3f 100644 +--- a/hw/vfio/spapr.c ++++ b/hw/vfio/spapr.c +@@ -17,7 +17,6 @@ + + #include "hw/vfio/vfio-container-legacy.h" + #include "hw/hw.h" +-#include "system/ram_addr.h" + #include "qemu/error-report.h" + #include "qapi/error.h" + #include "trace.h" +diff --git a/hw/virtio/virtio-mem.c b/hw/virtio/virtio-mem.c +index 1805597879..582f3f0e00 100644 +--- a/hw/virtio/virtio-mem.c ++++ b/hw/virtio/virtio-mem.c +@@ -24,7 +24,6 @@ + #include "hw/virtio/virtio-mem.h" + #include "qapi/error.h" + #include "qapi/visitor.h" +-#include "system/ram_addr.h" + #include "migration/misc.h" + #include "hw/boards.h" + #include "hw/qdev-properties.h" diff --git a/0199-vfio-container-Remap-only-populated-parts-in-a-secti.patch b/0199-vfio-container-Remap-only-populated-parts-in-a-secti.patch new file mode 100644 index 0000000..68fda90 --- /dev/null +++ b/0199-vfio-container-Remap-only-populated-parts-in-a-secti.patch @@ -0,0 +1,103 @@ +From 5abd3b18d76b09ff3a023281ff9e7ec38aa4a55e Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Sun, 28 Sep 2025 04:54:27 -0400 +Subject: [PATCH] vfio/container: Remap only populated parts in a section +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 5d498b0b7a (clegoate/qemu-kvm-centos) + +If there are multiple containers and unmap-all fails for some of them, we +need to remap vaddr for the other containers for which unmap-all succeeded. +When ram discard is enabled, we should only remap populated parts in a +section instead of the whole section. + +Fixes: eba1f657cbb1 ("vfio/container: recover from unmap-all-vaddr failure") +Signed-off-by: Zhenzhong Duan +Reviewed-by: Steven Sistare +Reviewed-by: David Hildenbrand +Link: https://lore.kernel.org/qemu-devel/20250928085432.40107-2-zhenzhong.duan@intel.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 5a78db7f8099274550bdacdc1fc24943567ac615) +Signed-off-by: Eric Auger +--- + hw/vfio/cpr-legacy.c | 20 +++++++++++++++----- + hw/vfio/listener.c | 4 ++-- + include/hw/vfio/vfio-cpr.h | 2 +- + 3 files changed, 18 insertions(+), 8 deletions(-) + +diff --git a/hw/vfio/cpr-legacy.c b/hw/vfio/cpr-legacy.c +index 80af7469d0..b4581e8f85 100644 +--- a/hw/vfio/cpr-legacy.c ++++ b/hw/vfio/cpr-legacy.c +@@ -228,22 +228,32 @@ void vfio_cpr_giommu_remap(VFIOContainer *bcontainer, + memory_region_iommu_replay(giommu->iommu_mr, &giommu->n); + } + ++static int vfio_cpr_rdm_remap(MemoryRegionSection *section, void *opaque) ++{ ++ RamDiscardListener *rdl = opaque; ++ ++ return rdl->notify_populate(rdl, section); ++} ++ + /* + * In old QEMU, VFIO_DMA_UNMAP_FLAG_VADDR may fail on some mapping after + * succeeding for others, so the latter have lost their vaddr. Call this +- * to restore vaddr for a section with a RamDiscardManager. ++ * to restore vaddr for populated parts in a section with a RamDiscardManager. + * +- * The ram discard listener already exists. Call its populate function ++ * The ram discard listener already exists. Call its replay_populated function + * directly, which calls vfio_legacy_cpr_dma_map. + */ +-bool vfio_cpr_ram_discard_register_listener(VFIOContainer *bcontainer, +- MemoryRegionSection *section) ++bool vfio_cpr_ram_discard_replay_populated(VFIOContainer *bcontainer, ++ MemoryRegionSection *section) + { ++ RamDiscardManager *rdm = memory_region_get_ram_discard_manager(section->mr); + VFIORamDiscardListener *vrdl = + vfio_find_ram_discard_listener(bcontainer, section); + + g_assert(vrdl); +- return vrdl->listener.notify_populate(&vrdl->listener, section) == 0; ++ return ram_discard_manager_replay_populated(rdm, section, ++ vfio_cpr_rdm_remap, ++ &vrdl->listener) == 0; + } + + int vfio_cpr_group_get_device_fd(int d, const char *name) +diff --git a/hw/vfio/listener.c b/hw/vfio/listener.c +index b5cefc9395..df42bc58e7 100644 +--- a/hw/vfio/listener.c ++++ b/hw/vfio/listener.c +@@ -578,8 +578,8 @@ void vfio_container_region_add(VFIOContainer *bcontainer, + if (!vfio_ram_discard_register_listener(bcontainer, section, &err)) { + goto fail; + } +- } else if (!vfio_cpr_ram_discard_register_listener(bcontainer, +- section)) { ++ } else if (!vfio_cpr_ram_discard_replay_populated(bcontainer, ++ section)) { + error_setg(&err, + "vfio_cpr_ram_discard_register_listener for %s failed", + memory_region_name(section->mr)); +diff --git a/include/hw/vfio/vfio-cpr.h b/include/hw/vfio/vfio-cpr.h +index 81f4e24e22..4606da500a 100644 +--- a/include/hw/vfio/vfio-cpr.h ++++ b/include/hw/vfio/vfio-cpr.h +@@ -68,7 +68,7 @@ bool vfio_cpr_container_match(struct VFIOLegacyContainer *container, + void vfio_cpr_giommu_remap(struct VFIOContainer *bcontainer, + MemoryRegionSection *section); + +-bool vfio_cpr_ram_discard_register_listener( ++bool vfio_cpr_ram_discard_replay_populated( + struct VFIOContainer *bcontainer, MemoryRegionSection *section); + + void vfio_cpr_save_vector_fd(struct VFIOPCIDevice *vdev, const char *name, diff --git a/0200-vfio-cpr-legacy-drop-an-erroneous-assert.patch b/0200-vfio-cpr-legacy-drop-an-erroneous-assert.patch new file mode 100644 index 0000000..6a3caed --- /dev/null +++ b/0200-vfio-cpr-legacy-drop-an-erroneous-assert.patch @@ -0,0 +1,42 @@ +From 45f79ce38ca7746c051e8d09252bc4ff54487238 Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Sun, 28 Sep 2025 04:54:28 -0400 +Subject: [PATCH] vfio/cpr-legacy: drop an erroneous assert +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 90f50b47e5 (clegoate/qemu-kvm-centos) + +vfio_legacy_cpr_dma_map() is not only used in post_load on destination +but also error recovery path on source side. Assert it for destination +is wrong. + +Fixes: 7e9f21411302 ("vfio/container: restore DMA vaddr") +Signed-off-by: Zhenzhong Duan +Reviewed-by: Steve Sistare +Link: https://lore.kernel.org/qemu-devel/20250928085432.40107-3-zhenzhong.duan@intel.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 94230948960e56cb47e835266c7cd8df46da03a4) +Signed-off-by: Eric Auger +--- + hw/vfio/cpr-legacy.c | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/hw/vfio/cpr-legacy.c b/hw/vfio/cpr-legacy.c +index b4581e8f85..7184c93991 100644 +--- a/hw/vfio/cpr-legacy.c ++++ b/hw/vfio/cpr-legacy.c +@@ -52,8 +52,6 @@ static int vfio_legacy_cpr_dma_map(const VFIOContainer *bcontainer, + .size = size, + }; + +- g_assert(cpr_is_incoming()); +- + if (ioctl(container->fd, VFIO_IOMMU_MAP_DMA, &map)) { + return -errno; + } diff --git a/0201-vfio-iommufd-Set-cpr.ioas_id-on-source-side-for-CPR-.patch b/0201-vfio-iommufd-Set-cpr.ioas_id-on-source-side-for-CPR-.patch new file mode 100644 index 0000000..2d1177a --- /dev/null +++ b/0201-vfio-iommufd-Set-cpr.ioas_id-on-source-side-for-CPR-.patch @@ -0,0 +1,51 @@ +From e70a6a253067d8f2694035e178112e49e701eccd Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Sun, 28 Sep 2025 04:54:29 -0400 +Subject: [PATCH] vfio/iommufd: Set cpr.ioas_id on source side for CPR transfer +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] cddc83c176 (clegoate/qemu-kvm-centos) + +On source side, if there are more than one VFIO devices and they +attach to same container, only the first device sets cpr.ioas_id, +the others are bypassed. We should set it for each device, or +else only first device works. + +Fixes: 4296ee07455e ("vfio/iommufd: reconstruct device") +Signed-off-by: Zhenzhong Duan +Reviewed-by: Steve Sistare +Link: https://lore.kernel.org/qemu-devel/20250928085432.40107-4-zhenzhong.duan@intel.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit d59db04aed750ba4fc56f79cae99814334ec8285) +Signed-off-by: Eric Auger +--- + hw/vfio/iommufd.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c +index 10fc065d20..3b0288f416 100644 +--- a/hw/vfio/iommufd.c ++++ b/hw/vfio/iommufd.c +@@ -602,7 +602,6 @@ skip_ioas_alloc: + container->be = vbasedev->iommufd; + container->ioas_id = ioas_id; + QLIST_INIT(&container->hwpt_list); +- vbasedev->cpr.ioas_id = ioas_id; + + bcontainer = VFIO_IOMMU(container); + vfio_address_space_insert(space, bcontainer); +@@ -636,6 +635,8 @@ skip_ioas_alloc: + bcontainer->initialized = true; + + found_container: ++ vbasedev->cpr.ioas_id = container->ioas_id; ++ + ret = ioctl(devfd, VFIO_DEVICE_GET_INFO, &dev_info); + if (ret) { + error_setg_errno(errp, errno, "error getting device info"); diff --git a/0202-vfio-iommufd-Restore-vbasedev-s-reference-to-hwpt-af.patch b/0202-vfio-iommufd-Restore-vbasedev-s-reference-to-hwpt-af.patch new file mode 100644 index 0000000..d109608 --- /dev/null +++ b/0202-vfio-iommufd-Restore-vbasedev-s-reference-to-hwpt-af.patch @@ -0,0 +1,48 @@ +From 69e051cb1cb19d5c604dd5fb0839974acf654b2b Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Sun, 28 Sep 2025 04:54:30 -0400 +Subject: [PATCH] vfio/iommufd: Restore vbasedev's reference to hwpt after CPR + transfer +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 1ac80f7b65 (clegoate/qemu-kvm-centos) + +After CPR transfer, if there are more than one VFIO devices, device is +not added to hwpt->device_list and its reference to hwpt isn't restored +on destination. We still need to call iommufd_cdev_attach_container() to +restore it after a matching container is found, or else SIGSEV triggers. + +Fixes: 4296ee07455e ("vfio/iommufd: reconstruct device") +Signed-off-by: Zhenzhong Duan +Reviewed-by: Steve Sistare +Link: https://lore.kernel.org/qemu-devel/20250928085432.40107-5-zhenzhong.duan@intel.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 8bf49fff0dfbb065ad65daa48d2e1a63ad2fd552) +Signed-off-by: Eric Auger +--- + hw/vfio/iommufd.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c +index 3b0288f416..ce10371818 100644 +--- a/hw/vfio/iommufd.c ++++ b/hw/vfio/iommufd.c +@@ -560,10 +560,9 @@ static bool iommufd_cdev_attach(const char *name, VFIODevice *vbasedev, + continue; + } + +- if (!cpr_is_incoming()) { ++ if (!cpr_is_incoming() || ++ (vbasedev->cpr.ioas_id == container->ioas_id)) { + res = iommufd_cdev_attach_container(vbasedev, container, &err); +- } else if (vbasedev->cpr.ioas_id == container->ioas_id) { +- res = true; + } else { + continue; + } diff --git a/0203-vfio-container-Support-unmap-all-in-one-ioctl.patch b/0203-vfio-container-Support-unmap-all-in-one-ioctl.patch new file mode 100644 index 0000000..a949f05 --- /dev/null +++ b/0203-vfio-container-Support-unmap-all-in-one-ioctl.patch @@ -0,0 +1,120 @@ +From 1549b29b432e92b55769a934b24892f1279224f8 Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Thu, 9 Oct 2025 00:01:32 -0400 +Subject: [PATCH] vfio/container: Support unmap all in one ioctl() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 7906a26c64 (clegoate/qemu-kvm-centos) + +VFIO type1 kernel uAPI supports unmapping whole address space in one call +since commit c19650995374 ("vfio/type1: implement unmap all"). Use the +unmap_all variant whenever it's supported in kernel. + +Opportunistically pass VFIOLegacyContainer pointer in low level function +vfio_legacy_dma_unmap_one(). + +Co-developed-by: John Levon +Signed-off-by: John Levon +Signed-off-by: Zhenzhong Duan +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20251009040134.334251-2-zhenzhong.duan@intel.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 962bcf0911e7f3601da0f07ba7da9824cb6a5ba5) +Signed-off-by: Eric Auger +--- + hw/vfio/container-legacy.c | 38 ++++++++++++++----------- + include/hw/vfio/vfio-container-legacy.h | 1 + + 2 files changed, 23 insertions(+), 16 deletions(-) + +diff --git a/hw/vfio/container-legacy.c b/hw/vfio/container-legacy.c +index fad0226f7d..e639760381 100644 +--- a/hw/vfio/container-legacy.c ++++ b/hw/vfio/container-legacy.c +@@ -135,14 +135,14 @@ unmap_exit: + return ret; + } + +-static int vfio_legacy_dma_unmap_one(const VFIOContainer *bcontainer, ++static int vfio_legacy_dma_unmap_one(const VFIOLegacyContainer *container, + hwaddr iova, uint64_t size, +- IOMMUTLBEntry *iotlb) ++ uint32_t flags, IOMMUTLBEntry *iotlb) + { +- const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ const VFIOContainer *bcontainer = VFIO_IOMMU(container); + struct vfio_iommu_type1_dma_unmap unmap = { + .argsz = sizeof(unmap), +- .flags = 0, ++ .flags = flags, + .iova = iova, + .size = size, + }; +@@ -184,25 +184,28 @@ static int vfio_legacy_dma_unmap(const VFIOContainer *bcontainer, + hwaddr iova, uint64_t size, + IOMMUTLBEntry *iotlb, bool unmap_all) + { ++ const VFIOLegacyContainer *container = VFIO_IOMMU_LEGACY(bcontainer); ++ uint32_t flags = 0; + int ret; + + if (unmap_all) { +- /* The unmap ioctl doesn't accept a full 64-bit span. */ +- Int128 llsize = int128_rshift(int128_2_64(), 1); +- +- ret = vfio_legacy_dma_unmap_one(bcontainer, 0, int128_get64(llsize), +- iotlb); ++ if (container->unmap_all_supported) { ++ flags = VFIO_DMA_UNMAP_FLAG_ALL; ++ } else { ++ /* The unmap ioctl doesn't accept a full 64-bit span. */ ++ Int128 llsize = int128_rshift(int128_2_64(), 1); ++ size = int128_get64(llsize); ++ ++ ret = vfio_legacy_dma_unmap_one(container, 0, size, flags, iotlb); ++ if (ret) { ++ return ret; ++ } + +- if (ret == 0) { +- ret = vfio_legacy_dma_unmap_one(bcontainer, int128_get64(llsize), +- int128_get64(llsize), iotlb); ++ iova = size; + } +- +- } else { +- ret = vfio_legacy_dma_unmap_one(bcontainer, iova, size, iotlb); + } + +- return ret; ++ return vfio_legacy_dma_unmap_one(container, iova, size, flags, iotlb); + } + + static int vfio_legacy_dma_map(const VFIOContainer *bcontainer, hwaddr iova, +@@ -533,6 +536,9 @@ static bool vfio_legacy_setup(VFIOContainer *bcontainer, Error **errp) + + vfio_get_info_iova_range(info, bcontainer); + ++ ret = ioctl(container->fd, VFIO_CHECK_EXTENSION, VFIO_UNMAP_ALL); ++ container->unmap_all_supported = !!ret; ++ + vfio_get_iommu_info_migration(container, info); + return true; + } +diff --git a/include/hw/vfio/vfio-container-legacy.h b/include/hw/vfio/vfio-container-legacy.h +index 74a72df018..ffd594e80d 100644 +--- a/include/hw/vfio/vfio-container-legacy.h ++++ b/include/hw/vfio/vfio-container-legacy.h +@@ -30,6 +30,7 @@ struct VFIOLegacyContainer { + + int fd; /* /dev/vfio/vfio, empowered by the attached groups */ + unsigned iommu_type; ++ bool unmap_all_supported; + QLIST_HEAD(, VFIOGroup) group_list; + VFIOContainerCPR cpr; + }; diff --git a/0204-vfio-iommufd-Support-unmap-all-in-one-ioctl.patch b/0204-vfio-iommufd-Support-unmap-all-in-one-ioctl.patch new file mode 100644 index 0000000..bdd30fb --- /dev/null +++ b/0204-vfio-iommufd-Support-unmap-all-in-one-ioctl.patch @@ -0,0 +1,55 @@ +From 984c79003ad7cedf1d28178782b5f8c719aaded7 Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Thu, 9 Oct 2025 00:01:33 -0400 +Subject: [PATCH] vfio/iommufd: Support unmap all in one ioctl() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 54dfd6f114 (clegoate/qemu-kvm-centos) + +IOMMUFD kernel uAPI supports unmapping whole address space in one call with +[iova, size] set to [0, UINT64_MAX], this can simplify iommufd_cdev_unmap() +a bit. See iommufd_ioas_unmap() in kernel for details. + +Signed-off-by: Zhenzhong Duan +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20251009040134.334251-3-zhenzhong.duan@intel.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit b30823e5619ed5658d33e43abe1308195edb3e8b) +Signed-off-by: Eric Auger +--- + hw/vfio/iommufd.c | 15 +-------------- + 1 file changed, 1 insertion(+), 14 deletions(-) + +diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c +index ce10371818..bb5775aa71 100644 +--- a/hw/vfio/iommufd.c ++++ b/hw/vfio/iommufd.c +@@ -62,21 +62,8 @@ static int iommufd_cdev_unmap(const VFIOContainer *bcontainer, + { + const VFIOIOMMUFDContainer *container = VFIO_IOMMU_IOMMUFD(bcontainer); + +- /* unmap in halves */ + if (unmap_all) { +- Int128 llsize = int128_rshift(int128_2_64(), 1); +- int ret; +- +- ret = iommufd_backend_unmap_dma(container->be, container->ioas_id, +- 0, int128_get64(llsize)); +- +- if (ret == 0) { +- ret = iommufd_backend_unmap_dma(container->be, container->ioas_id, +- int128_get64(llsize), +- int128_get64(llsize)); +- } +- +- return ret; ++ size = UINT64_MAX; + } + + /* TODO: Handle dma_unmap_bitmap with iotlb args (migration) */ diff --git a/0205-vfio-listener-Add-an-assertion-for-unmap_all.patch b/0205-vfio-listener-Add-an-assertion-for-unmap_all.patch new file mode 100644 index 0000000..3573a0d --- /dev/null +++ b/0205-vfio-listener-Add-an-assertion-for-unmap_all.patch @@ -0,0 +1,41 @@ +From 7a36cfd85927ecf1377e95f90a54de89216059dd Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Thu, 9 Oct 2025 00:01:34 -0400 +Subject: [PATCH] vfio/listener: Add an assertion for unmap_all +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 062fd3c8eb (clegoate/qemu-kvm-centos) + +Currently the maximum of iommu address space is 64bit. So when a maximum +iommu memory section is deleted, it's in scope [0, 2^64). Add a +assertion for that. + +Suggested-by: Cédric Le Goater +Signed-off-by: Zhenzhong Duan +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20251009040134.334251-4-zhenzhong.duan@intel.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 271fec6f18492630df2e1b4599ba2de6eb1d0668) +Signed-off-by: Eric Auger +--- + hw/vfio/listener.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/hw/vfio/listener.c b/hw/vfio/listener.c +index df42bc58e7..27174bf87c 100644 +--- a/hw/vfio/listener.c ++++ b/hw/vfio/listener.c +@@ -716,6 +716,7 @@ static void vfio_listener_region_del(MemoryListener *listener, + bool unmap_all = false; + + if (int128_eq(llsize, int128_2_64())) { ++ assert(!iova); + unmap_all = true; + llsize = int128_zero(); + } diff --git a/0206-vfio-Clean-up-includes.patch b/0206-vfio-Clean-up-includes.patch new file mode 100644 index 0000000..71e47ab --- /dev/null +++ b/0206-vfio-Clean-up-includes.patch @@ -0,0 +1,151 @@ +From f15772747ec1912f5a444e5eb19a5464dc4745f1 Mon Sep 17 00:00:00 2001 +From: Peter Maydell +Date: Tue, 4 Nov 2025 16:09:42 +0000 +Subject: [PATCH] vfio: Clean up includes +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 93c313213f (clegoate/qemu-kvm-centos) + +This commit was created with scripts/clean-includes: + ./scripts/clean-includes --git vfio hw/vfio hw/vfio-user + +All .c should include qemu/osdep.h first. The script performs three +related cleanups: + +* Ensure .c files include qemu/osdep.h first. +* Including it in a .h is redundant, since the .c already includes + it. Drop such inclusions. +* Likewise, including headers qemu/osdep.h includes is redundant. + Drop these, too. + +Signed-off-by: Peter Maydell +Reviewed-by: Cédric Le Goater +Reviewed-by: Philippe Mathieu-Daudé +Message-id: 20251104160943.751997-9-peter.maydell@linaro.org +(cherry picked from commit b1f4f4695c96bb8e20a00e82d1868b5b018002bc) +Signed-off-by: Eric Auger +--- + hw/vfio-user/container.c | 2 +- + hw/vfio-user/container.h | 1 - + hw/vfio-user/device.h | 1 - + hw/vfio-user/pci.c | 2 +- + hw/vfio/ap.c | 1 - + hw/vfio/container.c | 2 +- + hw/vfio/cpr-legacy.c | 2 +- + hw/vfio/pci-quirks.h | 1 - + 8 files changed, 4 insertions(+), 8 deletions(-) + +diff --git a/hw/vfio-user/container.c b/hw/vfio-user/container.c +index e45192fef6..dab7a23224 100644 +--- a/hw/vfio-user/container.c ++++ b/hw/vfio-user/container.c +@@ -6,9 +6,9 @@ + * SPDX-License-Identifier: GPL-2.0-or-later + */ + ++#include "qemu/osdep.h" + #include + #include +-#include "qemu/osdep.h" + + #include "hw/vfio-user/container.h" + #include "hw/vfio-user/device.h" +diff --git a/hw/vfio-user/container.h b/hw/vfio-user/container.h +index a2b42e3169..c952e09063 100644 +--- a/hw/vfio-user/container.h ++++ b/hw/vfio-user/container.h +@@ -7,7 +7,6 @@ + #ifndef HW_VFIO_USER_CONTAINER_H + #define HW_VFIO_USER_CONTAINER_H + +-#include "qemu/osdep.h" + + #include "hw/vfio/vfio-container.h" + #include "hw/vfio-user/proxy.h" +diff --git a/hw/vfio-user/device.h b/hw/vfio-user/device.h +index d183a3950e..49c05848f1 100644 +--- a/hw/vfio-user/device.h ++++ b/hw/vfio-user/device.h +@@ -9,7 +9,6 @@ + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +-#include "qemu/osdep.h" + #include "linux/vfio.h" + + #include "hw/vfio-user/proxy.h" +diff --git a/hw/vfio-user/pci.c b/hw/vfio-user/pci.c +index b53ed3b456..353d07e781 100644 +--- a/hw/vfio-user/pci.c ++++ b/hw/vfio-user/pci.c +@@ -6,8 +6,8 @@ + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +-#include + #include "qemu/osdep.h" ++#include + #include "qapi-visit-sockets.h" + #include "qemu/error-report.h" + +diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c +index 7719f24579..3368ac8915 100644 +--- a/hw/vfio/ap.c ++++ b/hw/vfio/ap.c +@@ -10,7 +10,6 @@ + * directory. + */ + +-#include + #include "qemu/osdep.h" + #include CONFIG_DEVICES /* CONFIG_IOMMUFD */ + #include +diff --git a/hw/vfio/container.c b/hw/vfio/container.c +index 41de343924..cc0367ecc4 100644 +--- a/hw/vfio/container.c ++++ b/hw/vfio/container.c +@@ -10,10 +10,10 @@ + * SPDX-License-Identifier: GPL-2.0-or-later + */ + ++#include "qemu/osdep.h" + #include + #include + +-#include "qemu/osdep.h" + #include "system/tcg.h" + #include "system/ram_addr.h" + #include "qapi/error.h" +diff --git a/hw/vfio/cpr-legacy.c b/hw/vfio/cpr-legacy.c +index 7184c93991..273b597880 100644 +--- a/hw/vfio/cpr-legacy.c ++++ b/hw/vfio/cpr-legacy.c +@@ -4,9 +4,9 @@ + * SPDX-License-Identifier: GPL-2.0-or-later + */ + ++#include "qemu/osdep.h" + #include + #include +-#include "qemu/osdep.h" + #include "hw/vfio/vfio-container-legacy.h" + #include "hw/vfio/vfio-device.h" + #include "hw/vfio/vfio-listener.h" +diff --git a/hw/vfio/pci-quirks.h b/hw/vfio/pci-quirks.h +index d1532e379b..a6282e063a 100644 +--- a/hw/vfio/pci-quirks.h ++++ b/hw/vfio/pci-quirks.h +@@ -12,7 +12,6 @@ + #ifndef HW_VFIO_VFIO_PCI_QUIRKS_H + #define HW_VFIO_VFIO_PCI_QUIRKS_H + +-#include "qemu/osdep.h" + #include "exec/memop.h" + + /* diff --git a/0207-migration-set-correct-list-pointer-when-removing-not.patch b/0207-migration-set-correct-list-pointer-when-removing-not.patch new file mode 100644 index 0000000..b2ac09d --- /dev/null +++ b/0207-migration-set-correct-list-pointer-when-removing-not.patch @@ -0,0 +1,44 @@ +From 718fe6e5ec6b2ae8f0d677a10d2fdd7e60ef0542 Mon Sep 17 00:00:00 2001 +From: Matthew Rosato +Date: Thu, 13 Nov 2025 16:35:45 -0500 +Subject: [PATCH] migration: set correct list pointer when removing notifier +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 6af3926583 (clegoate/qemu-kvm-centos) + +In migration_remove_notifier(), g_slist_remove() will search for and +potentially remove an entry from the specified list. The return value +should be used to update the potentially-changed head pointer of the +list that was just searched (migration_state_notifiers[mode]) instead +of the migration blockers list. + +Fixes: dc79c7d5e1 ("migration: multi-mode notifier") +Signed-off-by: Matthew Rosato +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/r/20251113213545.513453-1-mjrosato@linux.ibm.com +Signed-off-by: Peter Xu +(cherry picked from commit 911bdd34ca1a3f9e62836e7bc581e7edc57319be) +Signed-off-by: Cédric Le Goater +--- + migration/migration.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/migration/migration.c b/migration/migration.c +index 2515bec48f..0233b25f86 100644 +--- a/migration/migration.c ++++ b/migration/migration.c +@@ -1704,7 +1704,7 @@ void migration_remove_notifier(NotifierWithReturn *notify) + { + if (notify->notify) { + for (MigMode mode = 0; mode < MIG_MODE__MAX; mode++) { +- migration_blockers[mode] = ++ migration_state_notifiers[mode] = + g_slist_remove(migration_state_notifiers[mode], notify); + } + notify->notify = NULL; diff --git a/0208-vfio-user-simplify-vfio_user_process.patch b/0208-vfio-user-simplify-vfio_user_process.patch new file mode 100644 index 0000000..6370e18 --- /dev/null +++ b/0208-vfio-user-simplify-vfio_user_process.patch @@ -0,0 +1,78 @@ +From 43699026ca3b352f1217766fc88fbb0303a72cdb Mon Sep 17 00:00:00 2001 +From: John Levon +Date: Wed, 3 Dec 2025 15:33:11 +0530 +Subject: [PATCH] vfio-user: simplify vfio_user_process() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 9d14a1e2cd (clegoate/qemu-kvm-centos) + +It can figure out if it's a reply by itself, rather than passing that +information in. + +Signed-off-by: John Levon +Reviewed-by: Cédric Le Goater +Reviewed-by: Mark Cave-Ayland +Link: https://lore.kernel.org/qemu-devel/20251203100316.3604456-2-john.levon@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit a8731f691df2bd9efd041d836ece27e3173555f2) +Signed-off-by: Eric Auger +--- + hw/vfio-user/proxy.c | 11 ++++------- + 1 file changed, 4 insertions(+), 7 deletions(-) + +diff --git a/hw/vfio-user/proxy.c b/hw/vfio-user/proxy.c +index bbd7ec243d..75845d7c89 100644 +--- a/hw/vfio-user/proxy.c ++++ b/hw/vfio-user/proxy.c +@@ -147,8 +147,7 @@ VFIOUserFDs *vfio_user_getfds(int numfds) + /* + * Process a received message. + */ +-static void vfio_user_process(VFIOUserProxy *proxy, VFIOUserMsg *msg, +- bool isreply) ++static void vfio_user_process(VFIOUserProxy *proxy, VFIOUserMsg *msg) + { + + /* +@@ -157,7 +156,7 @@ static void vfio_user_process(VFIOUserProxy *proxy, VFIOUserMsg *msg, + * + * Requests get queued for the BH. + */ +- if (isreply) { ++ if ((msg->hdr->flags & VFIO_USER_TYPE) == VFIO_USER_REPLY) { + msg->complete = true; + if (msg->type == VFIO_MSG_WAIT) { + qemu_cond_signal(&msg->cv); +@@ -187,7 +186,6 @@ static int vfio_user_complete(VFIOUserProxy *proxy, Error **errp) + { + VFIOUserMsg *msg = proxy->part_recv; + size_t msgleft = proxy->recv_left; +- bool isreply; + char *data; + int ret; + +@@ -214,8 +212,7 @@ static int vfio_user_complete(VFIOUserProxy *proxy, Error **errp) + */ + proxy->part_recv = NULL; + proxy->recv_left = 0; +- isreply = (msg->hdr->flags & VFIO_USER_TYPE) == VFIO_USER_REPLY; +- vfio_user_process(proxy, msg, isreply); ++ vfio_user_process(proxy, msg); + + /* return positive value */ + return 1; +@@ -381,7 +378,7 @@ static int vfio_user_recv_one(VFIOUserProxy *proxy, Error **errp) + data += ret; + } + +- vfio_user_process(proxy, msg, isreply); ++ vfio_user_process(proxy, msg); + return 0; + + /* diff --git a/0209-vfio-user-clarify-partial-message-handling.patch b/0209-vfio-user-clarify-partial-message-handling.patch new file mode 100644 index 0000000..5c6fa56 --- /dev/null +++ b/0209-vfio-user-clarify-partial-message-handling.patch @@ -0,0 +1,43 @@ +From 993cbc35557d3982e00d2372721605a79a1ababe Mon Sep 17 00:00:00 2001 +From: John Levon +Date: Wed, 3 Dec 2025 15:33:12 +0530 +Subject: [PATCH] vfio-user: clarify partial message handling +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] ac859801a5 (clegoate/qemu-kvm-centos) + +Improve a comment for this. + +Signed-off-by: John Levon +Reviewed-by: Cédric Le Goater +Reviewed-by: Mark Cave-Ayland +Link: https://lore.kernel.org/qemu-devel/20251203100316.3604456-3-john.levon@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 356c7b175258f29429fb91a7641f775080ab6b49) +Signed-off-by: Eric Auger +--- + hw/vfio-user/proxy.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/hw/vfio-user/proxy.c b/hw/vfio-user/proxy.c +index 75845d7c89..82c76c6665 100644 +--- a/hw/vfio-user/proxy.c ++++ b/hw/vfio-user/proxy.c +@@ -362,7 +362,10 @@ static int vfio_user_recv_one(VFIOUserProxy *proxy, Error **errp) + while (msgleft > 0) { + ret = qio_channel_read(proxy->ioc, data, msgleft, errp); + +- /* prepare to complete read on next iternation */ ++ /* ++ * We'll complete this read on the next go around; keep track of the ++ * partial message until then. ++ */ + if (ret == QIO_CHANNEL_ERR_BLOCK) { + proxy->part_recv = msg; + proxy->recv_left = msgleft; diff --git a/0210-vfio-user-refactor-out-header-handling.patch b/0210-vfio-user-refactor-out-header-handling.patch new file mode 100644 index 0000000..8001565 --- /dev/null +++ b/0210-vfio-user-refactor-out-header-handling.patch @@ -0,0 +1,155 @@ +From 091443954d6c70f7c30cef4ca02a33d3d3106b0e Mon Sep 17 00:00:00 2001 +From: John Levon +Date: Wed, 3 Dec 2025 15:33:13 +0530 +Subject: [PATCH] vfio-user: refactor out header handling +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] e2eaa2dcef (clegoate/qemu-kvm-centos) + +Simplify vfio_user_recv_one() by moving the header handling out to a +helper function. + +Signed-off-by: John Levon +Reviewed-by: Cédric Le Goater +Link: https://lore.kernel.org/qemu-devel/20251203100316.3604456-4-john.levon@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 7b884e2a27793e0ff5817ad04ecce85d0a90149d) +Signed-off-by: Eric Auger +--- + hw/vfio-user/proxy.c | 101 +++++++++++++++++++++++++------------------ + 1 file changed, 60 insertions(+), 41 deletions(-) + +diff --git a/hw/vfio-user/proxy.c b/hw/vfio-user/proxy.c +index 82c76c6665..e0f9202535 100644 +--- a/hw/vfio-user/proxy.c ++++ b/hw/vfio-user/proxy.c +@@ -218,6 +218,61 @@ static int vfio_user_complete(VFIOUserProxy *proxy, Error **errp) + return 1; + } + ++static int vfio_user_recv_hdr(VFIOUserProxy *proxy, Error **errp, ++ VFIOUserHdr *hdr, int **fdp, size_t *numfdp, ++ bool *isreply) ++{ ++ struct iovec iov = { ++ .iov_base = hdr, ++ .iov_len = sizeof(*hdr), ++ }; ++ int ret; ++ ++ /* ++ * Read header ++ */ ++ ret = qio_channel_readv_full(proxy->ioc, &iov, 1, fdp, numfdp, 0, ++ errp); ++ if (ret == QIO_CHANNEL_ERR_BLOCK) { ++ return ret; ++ } ++ ++ if (ret < 0) { ++ error_setg_errno(errp, errno, "failed to read header"); ++ return -1; ++ } else if (ret == 0) { ++ error_setg(errp, "failed to read header: EOF"); ++ return -1; ++ } else if (ret < sizeof(*hdr)) { ++ error_setg(errp, "short read of header"); ++ return -1; ++ } ++ ++ /* ++ * Validate header ++ */ ++ if (hdr->size < sizeof(*hdr)) { ++ error_setg(errp, "bad header size"); ++ return -1; ++ } ++ ++ switch (hdr->flags & VFIO_USER_TYPE) { ++ case VFIO_USER_REQUEST: ++ *isreply = false; ++ break; ++ case VFIO_USER_REPLY: ++ *isreply = true; ++ break; ++ default: ++ error_setg(errp, "unknown message type"); ++ return -1; ++ } ++ ++ trace_vfio_user_recv_hdr(proxy->sockname, hdr->id, hdr->command, hdr->size, ++ hdr->flags); ++ return 0; ++} ++ + /* + * Receive and process one incoming message. + * +@@ -230,10 +285,6 @@ static int vfio_user_recv_one(VFIOUserProxy *proxy, Error **errp) + g_autofree int *fdp = NULL; + VFIOUserFDs *reqfds; + VFIOUserHdr hdr; +- struct iovec iov = { +- .iov_base = &hdr, +- .iov_len = sizeof(hdr), +- }; + bool isreply = false; + int i, ret; + size_t msgleft, numfds = 0; +@@ -257,45 +308,13 @@ static int vfio_user_recv_one(VFIOUserProxy *proxy, Error **errp) + /* else fall into reading another msg */ + } + +- /* +- * Read header +- */ +- ret = qio_channel_readv_full(proxy->ioc, &iov, 1, &fdp, &numfds, 0, +- errp); +- if (ret == QIO_CHANNEL_ERR_BLOCK) { +- return ret; +- } +- +- /* read error or other side closed connection */ +- if (ret <= 0) { +- goto fatal; +- } +- +- if (ret < sizeof(hdr)) { +- error_setg(errp, "short read of header"); +- goto fatal; +- } +- +- /* +- * Validate header +- */ +- if (hdr.size < sizeof(VFIOUserHdr)) { +- error_setg(errp, "bad header size"); +- goto fatal; +- } +- switch (hdr.flags & VFIO_USER_TYPE) { +- case VFIO_USER_REQUEST: +- isreply = false; +- break; +- case VFIO_USER_REPLY: +- isreply = true; +- break; +- default: +- error_setg(errp, "unknown message type"); ++ ret = vfio_user_recv_hdr(proxy, errp, &hdr, &fdp, &numfds, &isreply); ++ if (ret < 0) { ++ if (ret == QIO_CHANNEL_ERR_BLOCK) { ++ return ret; ++ } + goto fatal; + } +- trace_vfio_user_recv_hdr(proxy->sockname, hdr.id, hdr.command, hdr.size, +- hdr.flags); + + /* + * For replies, find the matching pending request. diff --git a/0211-vfio-user-simplify-vfio_user_recv_one.patch b/0211-vfio-user-simplify-vfio_user_recv_one.patch new file mode 100644 index 0000000..726d210 --- /dev/null +++ b/0211-vfio-user-simplify-vfio_user_recv_one.patch @@ -0,0 +1,139 @@ +From 0087e93ed139f683c19f54b8db022593da943a35 Mon Sep 17 00:00:00 2001 +From: John Levon +Date: Wed, 3 Dec 2025 15:33:14 +0530 +Subject: [PATCH] vfio-user: simplify vfio_user_recv_one() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] e1117cebca (clegoate/qemu-kvm-centos) + +This function was unnecessarily difficult to understand due to the +separate handling of request and reply messages. Use common code for +both where we can. + +Signed-off-by: John Levon +Reviewed-by: Mark Cave-Ayland +Link: https://lore.kernel.org/qemu-devel/20251203100316.3604456-5-john.levon@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 0df8baec95b76c93093efde37d1644508c3c7d2c) +Signed-off-by: Eric Auger +--- + hw/vfio-user/proxy.c | 68 +++++++++++++++++++------------------------- + 1 file changed, 30 insertions(+), 38 deletions(-) + +diff --git a/hw/vfio-user/proxy.c b/hw/vfio-user/proxy.c +index e0f9202535..f2601eada5 100644 +--- a/hw/vfio-user/proxy.c ++++ b/hw/vfio-user/proxy.c +@@ -281,15 +281,14 @@ static int vfio_user_recv_hdr(VFIOUserProxy *proxy, Error **errp, + */ + static int vfio_user_recv_one(VFIOUserProxy *proxy, Error **errp) + { +- VFIOUserMsg *msg = NULL; + g_autofree int *fdp = NULL; +- VFIOUserFDs *reqfds; +- VFIOUserHdr hdr; ++ VFIOUserMsg *msg = NULL; + bool isreply = false; +- int i, ret; +- size_t msgleft, numfds = 0; ++ size_t msgleft = 0; ++ size_t numfds = 0; + char *data = NULL; +- char *buf = NULL; ++ VFIOUserHdr hdr; ++ int i, ret; + + /* + * Complete any partial reads +@@ -317,8 +316,8 @@ static int vfio_user_recv_one(VFIOUserProxy *proxy, Error **errp) + } + + /* +- * For replies, find the matching pending request. +- * For requests, reap incoming FDs. ++ * Find the matching request if this is a reply, or initialize a new ++ * server->client request. + */ + if (isreply) { + QTAILQ_FOREACH(msg, &proxy->pending, next) { +@@ -332,51 +331,44 @@ static int vfio_user_recv_one(VFIOUserProxy *proxy, Error **errp) + } + QTAILQ_REMOVE(&proxy->pending, msg, next); + +- /* +- * Process any received FDs +- */ +- if (numfds != 0) { +- if (msg->fds == NULL || msg->fds->recv_fds < numfds) { +- error_setg(errp, "unexpected FDs"); +- goto err; +- } +- msg->fds->recv_fds = numfds; +- memcpy(msg->fds->fds, fdp, numfds * sizeof(int)); +- } +- } else { +- if (numfds != 0) { +- reqfds = vfio_user_getfds(numfds); +- memcpy(reqfds->fds, fdp, numfds * sizeof(int)); +- } else { +- reqfds = NULL; +- } +- } +- +- /* +- * Put the whole message into a single buffer. +- */ +- if (isreply) { + if (hdr.size > msg->rsize) { + error_setg(errp, "reply larger than recv buffer"); + goto err; + } +- *msg->hdr = hdr; +- data = (char *)msg->hdr + sizeof(hdr); + } else { ++ void *buf; ++ + if (hdr.size > proxy->max_xfer_size + sizeof(VFIOUserDMARW)) { + error_setg(errp, "vfio_user_recv request larger than max"); + goto err; + } ++ + buf = g_malloc0(hdr.size); +- memcpy(buf, &hdr, sizeof(hdr)); +- data = buf + sizeof(hdr); +- msg = vfio_user_getmsg(proxy, (VFIOUserHdr *)buf, reqfds); ++ msg = vfio_user_getmsg(proxy, buf, NULL); + msg->type = VFIO_MSG_REQ; + } + ++ *msg->hdr = hdr; ++ data = (char *)msg->hdr + sizeof(hdr); ++ ++ if (numfds != 0) { ++ if (msg->type == VFIO_MSG_REQ) { ++ msg->fds = vfio_user_getfds(numfds); ++ } else { ++ if (msg->fds == NULL || msg->fds->recv_fds < numfds) { ++ error_setg(errp, "unexpected FDs in reply"); ++ goto err; ++ } ++ msg->fds->recv_fds = numfds; ++ } ++ ++ memcpy(msg->fds->fds, fdp, numfds * sizeof(int)); ++ } ++ + /* +- * Read rest of message. ++ * Read rest of message into the data buffer. + */ ++ + msgleft = hdr.size - sizeof(hdr); + while (msgleft > 0) { + ret = qio_channel_read(proxy->ioc, data, msgleft, errp); diff --git a/0212-vfio-user-recycle-msg-on-failure.patch b/0212-vfio-user-recycle-msg-on-failure.patch new file mode 100644 index 0000000..b70f4af --- /dev/null +++ b/0212-vfio-user-recycle-msg-on-failure.patch @@ -0,0 +1,60 @@ +From dc248aa38c478ce14a91fa431a817be7c646eb97 Mon Sep 17 00:00:00 2001 +From: John Levon +Date: Wed, 3 Dec 2025 15:33:15 +0530 +Subject: [PATCH] vfio-user: recycle msg on failure +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] c2496779b5 (clegoate/qemu-kvm-centos) + +If we fail to read an incoming request, recycle the message. + +Resolves: Coverity CID 1611807 +Resolves: Coverity CID 1611808 +Signed-off-by: John Levon +Reviewed-by: Mark Cave-Ayland +Link: https://lore.kernel.org/qemu-devel/20251203100316.3604456-6-john.levon@nutanix.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 23c586abf2e12843894189c4742c8ea55c594cd5) +Signed-off-by: Eric Auger +--- + hw/vfio-user/proxy.c | 21 ++++++++++++++++----- + 1 file changed, 16 insertions(+), 5 deletions(-) + +diff --git a/hw/vfio-user/proxy.c b/hw/vfio-user/proxy.c +index f2601eada5..314dfd23d8 100644 +--- a/hw/vfio-user/proxy.c ++++ b/hw/vfio-user/proxy.c +@@ -412,11 +412,22 @@ err: + for (i = 0; i < numfds; i++) { + close(fdp[i]); + } +- if (isreply && msg != NULL) { +- /* force an error to keep sending thread from hanging */ +- vfio_user_set_error(msg->hdr, EINVAL); +- msg->complete = true; +- qemu_cond_signal(&msg->cv); ++ if (msg != NULL) { ++ if (msg->type == VFIO_MSG_REQ) { ++ /* ++ * Clean up the request message on failure. Change type back to ++ * NOWAIT to free. ++ */ ++ msg->type = VFIO_MSG_NOWAIT; ++ vfio_user_recycle(proxy, msg); ++ } else { ++ /* ++ * Report an error back to the sender. Sender will recycle msg. ++ */ ++ vfio_user_set_error(msg->hdr, EINVAL); ++ msg->complete = true; ++ qemu_cond_signal(&msg->cv); ++ } + } + return -1; + } diff --git a/0213-include-hw-hyperv-Remove-unused-struct-mshv_vp_regis.patch b/0213-include-hw-hyperv-Remove-unused-struct-mshv_vp_regis.patch new file mode 100644 index 0000000..9e0ed50 --- /dev/null +++ b/0213-include-hw-hyperv-Remove-unused-struct-mshv_vp_regis.patch @@ -0,0 +1,50 @@ +From 99a4b9a96dc65a242bd2d8cff8ce928b7b640deb Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= +Date: Thu, 8 Jan 2026 19:50:12 +0100 +Subject: [PATCH] include/hw/hyperv: Remove unused 'struct mshv_vp_registers' + definition +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 96d4d43d65 (clegoate/qemu-kvm-centos) + +The 'struct mshv_vp_registers' definition in hvgdk_mini.h is unused in +QEMU and conflicts with the canonical definition in +linux-headers/linux/mshv.h. + +Remove the duplicate definition to avoid build conflicts when the Linux +headers are updated. + +Cc: Magnus Kulke +Reviewed-by: Magnus Kulke +Link: https://lore.kernel.org/qemu-devel/20260108185012.2568277-1-clg@redhat.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit ec7109999af691d84e8d2b518d7a4f30d8fa6d62) +Signed-off-by: Cédric Le Goater +--- + include/hw/hyperv/hvgdk_mini.h | 7 ------- + 1 file changed, 7 deletions(-) + +diff --git a/include/hw/hyperv/hvgdk_mini.h b/include/hw/hyperv/hvgdk_mini.h +index d89315f545..cb52cc9de2 100644 +--- a/include/hw/hyperv/hvgdk_mini.h ++++ b/include/hw/hyperv/hvgdk_mini.h +@@ -450,13 +450,6 @@ typedef struct hv_input_set_vp_registers { + struct hv_register_assoc elements[]; + } hv_input_set_vp_registers; + +-#define MSHV_VP_MAX_REGISTERS 128 +- +-struct mshv_vp_registers { +- int count; /* at most MSHV_VP_MAX_REGISTERS */ +- struct hv_register_assoc *regs; +-}; +- + union hv_interrupt_control { + uint64_t as_uint64; + struct { diff --git a/0214-linux-headers-Update-to-Linux-v6.18-rc3.patch b/0214-linux-headers-Update-to-Linux-v6.18-rc3.patch new file mode 100644 index 0000000..499a84b --- /dev/null +++ b/0214-linux-headers-Update-to-Linux-v6.18-rc3.patch @@ -0,0 +1,514 @@ +From d1a62412e36be76f0c642807627d0d0d725a087b Mon Sep 17 00:00:00 2001 +From: Bibo Mao +Date: Mon, 27 Oct 2025 09:43:32 +0800 +Subject: [PATCH] linux-headers: Update to Linux v6.18-rc3 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 8e6ecbd4ef (clegoate/qemu-kvm-centos) + +Update headers to retrieve the latest KVM caps for LoongArch. It is added +to the tree by running `update-linux-headers.sh` on linux v6.18-rc3. + +Signed-off-by: Bibo Mao +Reviewed-by: Song Gao +(cherry picked from commit 2e0096a2b6a5a7e3cde1dd13704cc71af6b9bdd7) +Signed-off-by: Cédric Le Goater +--- + include/standard-headers/linux/ethtool.h | 1 + + include/standard-headers/linux/fuse.h | 22 ++++++++++-- + .../linux/input-event-codes.h | 1 + + include/standard-headers/linux/input.h | 22 +++++++++++- + include/standard-headers/linux/pci_regs.h | 10 ++++++ + include/standard-headers/linux/virtio_ids.h | 1 + + linux-headers/asm-loongarch/kvm.h | 1 + + linux-headers/asm-riscv/kvm.h | 23 ++++++++++++- + linux-headers/asm-riscv/ptrace.h | 4 +-- + linux-headers/asm-x86/kvm.h | 34 +++++++++++++++++++ + linux-headers/asm-x86/unistd_64.h | 1 + + linux-headers/asm-x86/unistd_x32.h | 1 + + linux-headers/linux/kvm.h | 3 ++ + linux-headers/linux/psp-sev.h | 10 +++++- + linux-headers/linux/stddef.h | 1 - + linux-headers/linux/vduse.h | 2 +- + linux-headers/linux/vhost.h | 4 +-- + 17 files changed, 130 insertions(+), 11 deletions(-) + +diff --git a/include/standard-headers/linux/ethtool.h b/include/standard-headers/linux/ethtool.h +index eb80314028..dc24512d28 100644 +--- a/include/standard-headers/linux/ethtool.h ++++ b/include/standard-headers/linux/ethtool.h +@@ -2380,6 +2380,7 @@ enum { + #define RXH_L4_B_0_1 (1 << 6) /* src port in case of TCP/UDP/SCTP */ + #define RXH_L4_B_2_3 (1 << 7) /* dst port in case of TCP/UDP/SCTP */ + #define RXH_GTP_TEID (1 << 8) /* teid in case of GTP */ ++#define RXH_IP6_FL (1 << 9) /* IPv6 flow label */ + #define RXH_DISCARD (1 << 31) + + #define RX_CLS_FLOW_DISC 0xffffffffffffffffULL +diff --git a/include/standard-headers/linux/fuse.h b/include/standard-headers/linux/fuse.h +index d8b2fd67e1..abf3a78858 100644 +--- a/include/standard-headers/linux/fuse.h ++++ b/include/standard-headers/linux/fuse.h +@@ -235,6 +235,11 @@ + * + * 7.44 + * - add FUSE_NOTIFY_INC_EPOCH ++ * ++ * 7.45 ++ * - add FUSE_COPY_FILE_RANGE_64 ++ * - add struct fuse_copy_file_range_out ++ * - add FUSE_NOTIFY_PRUNE + */ + + #ifndef _LINUX_FUSE_H +@@ -266,7 +271,7 @@ + #define FUSE_KERNEL_VERSION 7 + + /** Minor version number of this interface */ +-#define FUSE_KERNEL_MINOR_VERSION 44 ++#define FUSE_KERNEL_MINOR_VERSION 45 + + /** The node ID of the root inode */ + #define FUSE_ROOT_ID 1 +@@ -653,6 +658,7 @@ enum fuse_opcode { + FUSE_SYNCFS = 50, + FUSE_TMPFILE = 51, + FUSE_STATX = 52, ++ FUSE_COPY_FILE_RANGE_64 = 53, + + /* CUSE specific operations */ + CUSE_INIT = 4096, +@@ -671,7 +677,7 @@ enum fuse_notify_code { + FUSE_NOTIFY_DELETE = 6, + FUSE_NOTIFY_RESEND = 7, + FUSE_NOTIFY_INC_EPOCH = 8, +- FUSE_NOTIFY_CODE_MAX, ++ FUSE_NOTIFY_PRUNE = 9, + }; + + /* The read buffer is required to be at least 8k, but may be much larger */ +@@ -1110,6 +1116,12 @@ struct fuse_notify_retrieve_in { + uint64_t dummy4; + }; + ++struct fuse_notify_prune_out { ++ uint32_t count; ++ uint32_t padding; ++ uint64_t spare; ++}; ++ + struct fuse_backing_map { + int32_t fd; + uint32_t flags; +@@ -1122,6 +1134,7 @@ struct fuse_backing_map { + #define FUSE_DEV_IOC_BACKING_OPEN _IOW(FUSE_DEV_IOC_MAGIC, 1, \ + struct fuse_backing_map) + #define FUSE_DEV_IOC_BACKING_CLOSE _IOW(FUSE_DEV_IOC_MAGIC, 2, uint32_t) ++#define FUSE_DEV_IOC_SYNC_INIT _IO(FUSE_DEV_IOC_MAGIC, 3) + + struct fuse_lseek_in { + uint64_t fh; +@@ -1144,6 +1157,11 @@ struct fuse_copy_file_range_in { + uint64_t flags; + }; + ++/* For FUSE_COPY_FILE_RANGE_64 */ ++struct fuse_copy_file_range_out { ++ uint64_t bytes_copied; ++}; ++ + #define FUSE_SETUPMAPPING_FLAG_WRITE (1ull << 0) + #define FUSE_SETUPMAPPING_FLAG_READ (1ull << 1) + struct fuse_setupmapping_in { +diff --git a/include/standard-headers/linux/input-event-codes.h b/include/standard-headers/linux/input-event-codes.h +index 00dc9caac9..c914ccd723 100644 +--- a/include/standard-headers/linux/input-event-codes.h ++++ b/include/standard-headers/linux/input-event-codes.h +@@ -27,6 +27,7 @@ + #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */ + #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */ + #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */ ++#define INPUT_PROP_HAPTIC_TOUCHPAD 0x07 /* is a haptic touchpad */ + + #define INPUT_PROP_MAX 0x1f + #define INPUT_PROP_CNT (INPUT_PROP_MAX + 1) +diff --git a/include/standard-headers/linux/input.h b/include/standard-headers/linux/input.h +index d4512c20b5..9aff211dd5 100644 +--- a/include/standard-headers/linux/input.h ++++ b/include/standard-headers/linux/input.h +@@ -426,6 +426,24 @@ struct ff_rumble_effect { + uint16_t weak_magnitude; + }; + ++/** ++ * struct ff_haptic_effect ++ * @hid_usage: hid_usage according to Haptics page (WAVEFORM_CLICK, etc.) ++ * @vendor_id: the waveform vendor ID if hid_usage is in the vendor-defined range ++ * @vendor_waveform_page: the vendor waveform page if hid_usage is in the vendor-defined range ++ * @intensity: strength of the effect as percentage ++ * @repeat_count: number of times to retrigger effect ++ * @retrigger_period: time before effect is retriggered (in ms) ++ */ ++struct ff_haptic_effect { ++ uint16_t hid_usage; ++ uint16_t vendor_id; ++ uint8_t vendor_waveform_page; ++ uint16_t intensity; ++ uint16_t repeat_count; ++ uint16_t retrigger_period; ++}; ++ + /** + * struct ff_effect - defines force feedback effect + * @type: type of the effect (FF_CONSTANT, FF_PERIODIC, FF_RAMP, FF_SPRING, +@@ -462,6 +480,7 @@ struct ff_effect { + struct ff_periodic_effect periodic; + struct ff_condition_effect condition[2]; /* One for each axis */ + struct ff_rumble_effect rumble; ++ struct ff_haptic_effect haptic; + } u; + }; + +@@ -469,6 +488,7 @@ struct ff_effect { + * Force feedback effect types + */ + ++#define FF_HAPTIC 0x4f + #define FF_RUMBLE 0x50 + #define FF_PERIODIC 0x51 + #define FF_CONSTANT 0x52 +@@ -478,7 +498,7 @@ struct ff_effect { + #define FF_INERTIA 0x56 + #define FF_RAMP 0x57 + +-#define FF_EFFECT_MIN FF_RUMBLE ++#define FF_EFFECT_MIN FF_HAPTIC + #define FF_EFFECT_MAX FF_RAMP + + /* +diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h +index f5b17745de..07e06aafec 100644 +--- a/include/standard-headers/linux/pci_regs.h ++++ b/include/standard-headers/linux/pci_regs.h +@@ -207,6 +207,9 @@ + + /* Capability lists */ + ++#define PCI_CAP_ID_MASK 0x00ff /* Capability ID mask */ ++#define PCI_CAP_LIST_NEXT_MASK 0xff00 /* Next Capability Pointer mask */ ++ + #define PCI_CAP_LIST_ID 0 /* Capability ID */ + #define PCI_CAP_ID_PM 0x01 /* Power Management */ + #define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */ +@@ -776,6 +779,12 @@ + #define PCI_ERR_UNC_MCBTLP 0x00800000 /* MC blocked TLP */ + #define PCI_ERR_UNC_ATOMEG 0x01000000 /* Atomic egress blocked */ + #define PCI_ERR_UNC_TLPPRE 0x02000000 /* TLP prefix blocked */ ++#define PCI_ERR_UNC_POISON_BLK 0x04000000 /* Poisoned TLP Egress Blocked */ ++#define PCI_ERR_UNC_DMWR_BLK 0x08000000 /* DMWr Request Egress Blocked */ ++#define PCI_ERR_UNC_IDE_CHECK 0x10000000 /* IDE Check Failed */ ++#define PCI_ERR_UNC_MISR_IDE 0x20000000 /* Misrouted IDE TLP */ ++#define PCI_ERR_UNC_PCRC_CHECK 0x40000000 /* PCRC Check Failed */ ++#define PCI_ERR_UNC_XLAT_BLK 0x80000000 /* TLP Translation Egress Blocked */ + #define PCI_ERR_UNCOR_MASK 0x08 /* Uncorrectable Error Mask */ + /* Same bits as above */ + #define PCI_ERR_UNCOR_SEVER 0x0c /* Uncorrectable Error Severity */ +@@ -798,6 +807,7 @@ + #define PCI_ERR_CAP_ECRC_CHKC 0x00000080 /* ECRC Check Capable */ + #define PCI_ERR_CAP_ECRC_CHKE 0x00000100 /* ECRC Check Enable */ + #define PCI_ERR_CAP_PREFIX_LOG_PRESENT 0x00000800 /* TLP Prefix Log Present */ ++#define PCI_ERR_CAP_COMP_TIME_LOG 0x00001000 /* Completion Timeout Prefix/Header Log Capable */ + #define PCI_ERR_CAP_TLP_LOG_FLIT 0x00040000 /* TLP was logged in Flit Mode */ + #define PCI_ERR_CAP_TLP_LOG_SIZE 0x00f80000 /* Logged TLP Size (only in Flit mode) */ + #define PCI_ERR_HEADER_LOG 0x1c /* Header Log Register (16 bytes) */ +diff --git a/include/standard-headers/linux/virtio_ids.h b/include/standard-headers/linux/virtio_ids.h +index 7aa2eb7662..6c12db16fa 100644 +--- a/include/standard-headers/linux/virtio_ids.h ++++ b/include/standard-headers/linux/virtio_ids.h +@@ -68,6 +68,7 @@ + #define VIRTIO_ID_AUDIO_POLICY 39 /* virtio audio policy */ + #define VIRTIO_ID_BT 40 /* virtio bluetooth */ + #define VIRTIO_ID_GPIO 41 /* virtio gpio */ ++#define VIRTIO_ID_SPI 45 /* virtio spi */ + + /* + * Virtio Transitional IDs +diff --git a/linux-headers/asm-loongarch/kvm.h b/linux-headers/asm-loongarch/kvm.h +index 5f354f5c68..57ba1a563b 100644 +--- a/linux-headers/asm-loongarch/kvm.h ++++ b/linux-headers/asm-loongarch/kvm.h +@@ -103,6 +103,7 @@ struct kvm_fpu { + #define KVM_LOONGARCH_VM_FEAT_PMU 5 + #define KVM_LOONGARCH_VM_FEAT_PV_IPI 6 + #define KVM_LOONGARCH_VM_FEAT_PV_STEALTIME 7 ++#define KVM_LOONGARCH_VM_FEAT_PTW 8 + + /* Device Control API on vcpu fd */ + #define KVM_LOONGARCH_VCPU_CPUCFG 0 +diff --git a/linux-headers/asm-riscv/kvm.h b/linux-headers/asm-riscv/kvm.h +index ef27d4289d..759a4852c0 100644 +--- a/linux-headers/asm-riscv/kvm.h ++++ b/linux-headers/asm-riscv/kvm.h +@@ -9,7 +9,7 @@ + #ifndef __LINUX_KVM_RISCV_H + #define __LINUX_KVM_RISCV_H + +-#ifndef __ASSEMBLY__ ++#ifndef __ASSEMBLER__ + + #include + #include +@@ -56,6 +56,7 @@ struct kvm_riscv_config { + unsigned long mimpid; + unsigned long zicboz_block_size; + unsigned long satp_mode; ++ unsigned long zicbop_block_size; + }; + + /* CORE registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */ +@@ -185,6 +186,10 @@ enum KVM_RISCV_ISA_EXT_ID { + KVM_RISCV_ISA_EXT_ZICCRSE, + KVM_RISCV_ISA_EXT_ZAAMO, + KVM_RISCV_ISA_EXT_ZALRSC, ++ KVM_RISCV_ISA_EXT_ZICBOP, ++ KVM_RISCV_ISA_EXT_ZFBFMIN, ++ KVM_RISCV_ISA_EXT_ZVFBFMIN, ++ KVM_RISCV_ISA_EXT_ZVFBFWMA, + KVM_RISCV_ISA_EXT_MAX, + }; + +@@ -205,6 +210,7 @@ enum KVM_RISCV_SBI_EXT_ID { + KVM_RISCV_SBI_EXT_DBCN, + KVM_RISCV_SBI_EXT_STA, + KVM_RISCV_SBI_EXT_SUSP, ++ KVM_RISCV_SBI_EXT_FWFT, + KVM_RISCV_SBI_EXT_MAX, + }; + +@@ -214,6 +220,18 @@ struct kvm_riscv_sbi_sta { + unsigned long shmem_hi; + }; + ++struct kvm_riscv_sbi_fwft_feature { ++ unsigned long enable; ++ unsigned long flags; ++ unsigned long value; ++}; ++ ++/* SBI FWFT extension registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */ ++struct kvm_riscv_sbi_fwft { ++ struct kvm_riscv_sbi_fwft_feature misaligned_deleg; ++ struct kvm_riscv_sbi_fwft_feature pointer_masking; ++}; ++ + /* Possible states for kvm_riscv_timer */ + #define KVM_RISCV_TIMER_STATE_OFF 0 + #define KVM_RISCV_TIMER_STATE_ON 1 +@@ -297,6 +315,9 @@ struct kvm_riscv_sbi_sta { + #define KVM_REG_RISCV_SBI_STA (0x0 << KVM_REG_RISCV_SUBTYPE_SHIFT) + #define KVM_REG_RISCV_SBI_STA_REG(name) \ + (offsetof(struct kvm_riscv_sbi_sta, name) / sizeof(unsigned long)) ++#define KVM_REG_RISCV_SBI_FWFT (0x1 << KVM_REG_RISCV_SUBTYPE_SHIFT) ++#define KVM_REG_RISCV_SBI_FWFT_REG(name) \ ++ (offsetof(struct kvm_riscv_sbi_fwft, name) / sizeof(unsigned long)) + + /* Device Control API: RISC-V AIA */ + #define KVM_DEV_RISCV_APLIC_ALIGN 0x1000 +diff --git a/linux-headers/asm-riscv/ptrace.h b/linux-headers/asm-riscv/ptrace.h +index 1e3166caca..a3f8211ede 100644 +--- a/linux-headers/asm-riscv/ptrace.h ++++ b/linux-headers/asm-riscv/ptrace.h +@@ -6,7 +6,7 @@ + #ifndef _ASM_RISCV_PTRACE_H + #define _ASM_RISCV_PTRACE_H + +-#ifndef __ASSEMBLY__ ++#ifndef __ASSEMBLER__ + + #include + +@@ -127,6 +127,6 @@ struct __riscv_v_regset_state { + */ + #define RISCV_MAX_VLENB (8192) + +-#endif /* __ASSEMBLY__ */ ++#endif /* __ASSEMBLER__ */ + + #endif /* _ASM_RISCV_PTRACE_H */ +diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h +index f0c1a730d9..3bb38f6c3a 100644 +--- a/linux-headers/asm-x86/kvm.h ++++ b/linux-headers/asm-x86/kvm.h +@@ -35,6 +35,11 @@ + #define MC_VECTOR 18 + #define XM_VECTOR 19 + #define VE_VECTOR 20 ++#define CP_VECTOR 21 ++ ++#define HV_VECTOR 28 ++#define VC_VECTOR 29 ++#define SX_VECTOR 30 + + /* Select x86 specific features in */ + #define __KVM_HAVE_PIT +@@ -409,6 +414,35 @@ struct kvm_xcrs { + __u64 padding[16]; + }; + ++#define KVM_X86_REG_TYPE_MSR 2 ++#define KVM_X86_REG_TYPE_KVM 3 ++ ++#define KVM_X86_KVM_REG_SIZE(reg) \ ++({ \ ++ reg == KVM_REG_GUEST_SSP ? KVM_REG_SIZE_U64 : 0; \ ++}) ++ ++#define KVM_X86_REG_TYPE_SIZE(type, reg) \ ++({ \ ++ __u64 type_size = (__u64)type << 32; \ ++ \ ++ type_size |= type == KVM_X86_REG_TYPE_MSR ? KVM_REG_SIZE_U64 : \ ++ type == KVM_X86_REG_TYPE_KVM ? KVM_X86_KVM_REG_SIZE(reg) : \ ++ 0; \ ++ type_size; \ ++}) ++ ++#define KVM_X86_REG_ID(type, index) \ ++ (KVM_REG_X86 | KVM_X86_REG_TYPE_SIZE(type, index) | index) ++ ++#define KVM_X86_REG_MSR(index) \ ++ KVM_X86_REG_ID(KVM_X86_REG_TYPE_MSR, index) ++#define KVM_X86_REG_KVM(index) \ ++ KVM_X86_REG_ID(KVM_X86_REG_TYPE_KVM, index) ++ ++/* KVM-defined registers starting from 0 */ ++#define KVM_REG_GUEST_SSP 0 ++ + #define KVM_SYNC_X86_REGS (1UL << 0) + #define KVM_SYNC_X86_SREGS (1UL << 1) + #define KVM_SYNC_X86_EVENTS (1UL << 2) +diff --git a/linux-headers/asm-x86/unistd_64.h b/linux-headers/asm-x86/unistd_64.h +index 2f55bebb81..26c258d1a6 100644 +--- a/linux-headers/asm-x86/unistd_64.h ++++ b/linux-headers/asm-x86/unistd_64.h +@@ -337,6 +337,7 @@ + #define __NR_io_pgetevents 333 + #define __NR_rseq 334 + #define __NR_uretprobe 335 ++#define __NR_uprobe 336 + #define __NR_pidfd_send_signal 424 + #define __NR_io_uring_setup 425 + #define __NR_io_uring_enter 426 +diff --git a/linux-headers/asm-x86/unistd_x32.h b/linux-headers/asm-x86/unistd_x32.h +index 8cc8673f15..65c2aed946 100644 +--- a/linux-headers/asm-x86/unistd_x32.h ++++ b/linux-headers/asm-x86/unistd_x32.h +@@ -290,6 +290,7 @@ + #define __NR_io_pgetevents (__X32_SYSCALL_BIT + 333) + #define __NR_rseq (__X32_SYSCALL_BIT + 334) + #define __NR_uretprobe (__X32_SYSCALL_BIT + 335) ++#define __NR_uprobe (__X32_SYSCALL_BIT + 336) + #define __NR_pidfd_send_signal (__X32_SYSCALL_BIT + 424) + #define __NR_io_uring_setup (__X32_SYSCALL_BIT + 425) + #define __NR_io_uring_enter (__X32_SYSCALL_BIT + 426) +diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h +index be704965d8..4ea28ef7ca 100644 +--- a/linux-headers/linux/kvm.h ++++ b/linux-headers/linux/kvm.h +@@ -954,6 +954,7 @@ struct kvm_enable_cap { + #define KVM_CAP_ARM_EL2_E2H0 241 + #define KVM_CAP_RISCV_MP_STATE_RESET 242 + #define KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED 243 ++#define KVM_CAP_GUEST_MEMFD_FLAGS 244 + + struct kvm_irq_routing_irqchip { + __u32 irqchip; +@@ -1590,6 +1591,8 @@ struct kvm_memory_attributes { + #define KVM_MEMORY_ATTRIBUTE_PRIVATE (1ULL << 3) + + #define KVM_CREATE_GUEST_MEMFD _IOWR(KVMIO, 0xd4, struct kvm_create_guest_memfd) ++#define GUEST_MEMFD_FLAG_MMAP (1ULL << 0) ++#define GUEST_MEMFD_FLAG_INIT_SHARED (1ULL << 1) + + struct kvm_create_guest_memfd { + __u64 size; +diff --git a/linux-headers/linux/psp-sev.h b/linux-headers/linux/psp-sev.h +index 113c4ceb78..c525125ea8 100644 +--- a/linux-headers/linux/psp-sev.h ++++ b/linux-headers/linux/psp-sev.h +@@ -185,6 +185,10 @@ struct sev_user_data_get_id2 { + * @mask_chip_id: whether chip id is present in attestation reports or not + * @mask_chip_key: whether attestation reports are signed or not + * @vlek_en: VLEK (Version Loaded Endorsement Key) hashstick is loaded ++ * @feature_info: whether SNP_FEATURE_INFO command is available ++ * @rapl_dis: whether RAPL is disabled ++ * @ciphertext_hiding_cap: whether platform has ciphertext hiding capability ++ * @ciphertext_hiding_en: whether ciphertext hiding is enabled + * @rsvd1: reserved + * @guest_count: the number of guest currently managed by the firmware + * @current_tcb_version: current TCB version +@@ -200,7 +204,11 @@ struct sev_user_data_snp_status { + __u32 mask_chip_id:1; /* Out */ + __u32 mask_chip_key:1; /* Out */ + __u32 vlek_en:1; /* Out */ +- __u32 rsvd1:29; ++ __u32 feature_info:1; /* Out */ ++ __u32 rapl_dis:1; /* Out */ ++ __u32 ciphertext_hiding_cap:1; /* Out */ ++ __u32 ciphertext_hiding_en:1; /* Out */ ++ __u32 rsvd1:25; + __u32 guest_count; /* Out */ + __u64 current_tcb_version; /* Out */ + __u64 reported_tcb_version; /* Out */ +diff --git a/linux-headers/linux/stddef.h b/linux-headers/linux/stddef.h +index e1fcfcf3b3..48ee4438e0 100644 +--- a/linux-headers/linux/stddef.h ++++ b/linux-headers/linux/stddef.h +@@ -3,7 +3,6 @@ + #define _LINUX_STDDEF_H + + +- + #ifndef __always_inline + #define __always_inline __inline__ + #endif +diff --git a/linux-headers/linux/vduse.h b/linux-headers/linux/vduse.h +index f46269af34..da6ac89af1 100644 +--- a/linux-headers/linux/vduse.h ++++ b/linux-headers/linux/vduse.h +@@ -237,7 +237,7 @@ struct vduse_iova_umem { + * struct vduse_iova_info - information of one IOVA region + * @start: start of the IOVA region + * @last: last of the IOVA region +- * @capability: capability of the IOVA regsion ++ * @capability: capability of the IOVA region + * @reserved: for future use, needs to be initialized to zero + * + * Structure used by VDUSE_IOTLB_GET_INFO ioctl to get information of +diff --git a/linux-headers/linux/vhost.h b/linux-headers/linux/vhost.h +index 283348b64a..c57674a6aa 100644 +--- a/linux-headers/linux/vhost.h ++++ b/linux-headers/linux/vhost.h +@@ -260,7 +260,7 @@ + * When fork_owner is set to VHOST_FORK_OWNER_KTHREAD: + * - Vhost will create vhost workers as kernel threads. + */ +-#define VHOST_SET_FORK_FROM_OWNER _IOW(VHOST_VIRTIO, 0x83, __u8) ++#define VHOST_SET_FORK_FROM_OWNER _IOW(VHOST_VIRTIO, 0x84, __u8) + + /** + * VHOST_GET_FORK_OWNER - Get the current fork_owner flag for the vhost device. +@@ -268,6 +268,6 @@ + * + * @return: An 8-bit value indicating the current thread mode. + */ +-#define VHOST_GET_FORK_FROM_OWNER _IOR(VHOST_VIRTIO, 0x84, __u8) ++#define VHOST_GET_FORK_FROM_OWNER _IOR(VHOST_VIRTIO, 0x85, __u8) + + #endif diff --git a/0215-linux-headers-Update-to-Linux-v6.19-rc1.patch b/0215-linux-headers-Update-to-Linux-v6.19-rc1.patch new file mode 100644 index 0000000..cc5a645 --- /dev/null +++ b/0215-linux-headers-Update-to-Linux-v6.19-rc1.patch @@ -0,0 +1,980 @@ +From ffcfd0550fe018df628ae15313fd69e05a21e7f5 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Wed, 21 Jan 2026 11:41:09 +0000 +Subject: [PATCH] linux-headers: Update to Linux v6.19-rc1 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 67c43054ac (clegoate/qemu-kvm-centos) + +Mainly for adding support for VFIO DMABUF. While at it, update all +headers. + +The header update breaks virtio-net due to virtio_net_hdr_v1_hash +changes. Include the virtio-net changes to avoid build and bisect +failures. + +Cc: Michael S. Tsirkin +Cc: Jason Wang +Tested-by: Nicolin Chen +Reviewed-by: Cédric Le Goater +Signed-off-by: Shameer Kolothum +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Reviewed-by: Michael S. Tsirkin +Link: https://lore.kernel.org/qemu-devel/20260121114111.34045-2-skolothumtho@nvidia.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 49f6b93d0752b91c233ae8097d00a986cb8482c3) +Signed-off-by: Cédric Le Goater +--- + hw/net/virtio-net.c | 11 +- + include/standard-headers/drm/drm_fourcc.h | 25 ++-- + include/standard-headers/linux/ethtool.h | 5 + + .../linux/input-event-codes.h | 14 ++- + include/standard-headers/linux/pci_regs.h | 89 ++++++++++++++ + include/standard-headers/linux/virtio_net.h | 3 +- + include/standard-headers/linux/virtio_pci.h | 2 +- + linux-headers/asm-arm64/kvm.h | 2 +- + linux-headers/asm-arm64/unistd_64.h | 1 + + linux-headers/asm-generic/unistd.h | 4 +- + linux-headers/asm-loongarch/kvm.h | 1 + + linux-headers/asm-loongarch/unistd.h | 6 + + linux-headers/asm-loongarch/unistd_64.h | 1 + + linux-headers/asm-mips/unistd_n32.h | 1 + + linux-headers/asm-mips/unistd_n64.h | 1 + + linux-headers/asm-mips/unistd_o32.h | 1 + + linux-headers/asm-powerpc/unistd_32.h | 1 + + linux-headers/asm-powerpc/unistd_64.h | 1 + + linux-headers/asm-riscv/kvm.h | 3 + + linux-headers/asm-riscv/unistd_32.h | 1 + + linux-headers/asm-riscv/unistd_64.h | 1 + + linux-headers/asm-s390/bitsperlong.h | 4 - + linux-headers/asm-s390/unistd.h | 4 - + linux-headers/asm-s390/unistd_64.h | 9 +- + linux-headers/asm-x86/kvm.h | 1 + + linux-headers/asm-x86/unistd_32.h | 1 + + linux-headers/asm-x86/unistd_64.h | 1 + + linux-headers/asm-x86/unistd_x32.h | 1 + + linux-headers/linux/iommufd.h | 10 ++ + linux-headers/linux/kvm.h | 11 ++ + linux-headers/linux/mshv.h | 116 +++++++++++++++++- + linux-headers/linux/psp-sev.h | 66 ++++++---- + linux-headers/linux/vfio.h | 28 +++++ + 33 files changed, 370 insertions(+), 56 deletions(-) + +diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c +index f021663f92..16e748c2c5 100644 +--- a/hw/net/virtio-net.c ++++ b/hw/net/virtio-net.c +@@ -1875,7 +1875,8 @@ static int virtio_net_process_rss(NetClientState *nc, const uint8_t *buf, + n->rss_data.runtime_hash_types); + if (net_hash_type > NetPktRssIpV6UdpEx) { + if (n->rss_data.populate_hash) { +- hdr->hash_value = VIRTIO_NET_HASH_REPORT_NONE; ++ hdr->hash_value_lo = VIRTIO_NET_HASH_REPORT_NONE; ++ hdr->hash_value_hi = VIRTIO_NET_HASH_REPORT_NONE; + hdr->hash_report = 0; + } + return n->rss_data.redirect ? n->rss_data.default_queue : -1; +@@ -1884,7 +1885,8 @@ static int virtio_net_process_rss(NetClientState *nc, const uint8_t *buf, + hash = net_rx_pkt_calc_rss_hash(pkt, net_hash_type, n->rss_data.key); + + if (n->rss_data.populate_hash) { +- hdr->hash_value = hash; ++ hdr->hash_value_lo = cpu_to_le16(hash & 0xffff); ++ hdr->hash_value_hi = cpu_to_le16((hash >> 16) & 0xffff); + hdr->hash_report = reports[net_hash_type]; + } + +@@ -1986,10 +1988,11 @@ static ssize_t virtio_net_receive_rcu(NetClientState *nc, const uint8_t *buf, + + receive_header(n, sg, elem->in_num, buf, size); + if (n->rss_data.populate_hash) { +- offset = offsetof(typeof(extra_hdr), hash_value); ++ offset = offsetof(typeof(extra_hdr), hash_value_lo); + iov_from_buf(sg, elem->in_num, offset, + (char *)&extra_hdr + offset, +- sizeof(extra_hdr.hash_value) + ++ sizeof(extra_hdr.hash_value_lo) + ++ sizeof(extra_hdr.hash_value_hi) + + sizeof(extra_hdr.hash_report)); + } + offset = n->host_hdr_len; +diff --git a/include/standard-headers/drm/drm_fourcc.h b/include/standard-headers/drm/drm_fourcc.h +index cef077dfb3..b39e197cc7 100644 +--- a/include/standard-headers/drm/drm_fourcc.h ++++ b/include/standard-headers/drm/drm_fourcc.h +@@ -978,14 +978,20 @@ extern "C" { + * 2 = Gob Height 8, Turing+ Page Kind mapping + * 3 = Reserved for future use. + * +- * 22:22 s Sector layout. On Tegra GPUs prior to Xavier, there is a further +- * bit remapping step that occurs at an even lower level than the +- * page kind and block linear swizzles. This causes the layout of +- * surfaces mapped in those SOC's GPUs to be incompatible with the +- * equivalent mapping on other GPUs in the same system. +- * +- * 0 = Tegra K1 - Tegra Parker/TX2 Layout. +- * 1 = Desktop GPU and Tegra Xavier+ Layout ++ * 22:22 s Sector layout. There is a further bit remapping step that occurs ++ * 26:27 at an even lower level than the page kind and block linear ++ * swizzles. This causes the bit arrangement of surfaces in memory ++ * to differ subtly, and prevents direct sharing of surfaces between ++ * GPUs with different layouts. ++ * ++ * 0 = Tegra K1 - Tegra Parker/TX2 Layout ++ * 1 = Pre-GB20x, GB20x 32+ bpp, GB10, Tegra Xavier-Orin Layout ++ * 2 = GB20x(Blackwell 2)+ 8 bpp surface layout ++ * 3 = GB20x(Blackwell 2)+ 16 bpp surface layout ++ * 4 = Reserved for future use. ++ * 5 = Reserved for future use. ++ * 6 = Reserved for future use. ++ * 7 = Reserved for future use. + * + * 25:23 c Lossless Framebuffer Compression type. + * +@@ -1000,7 +1006,7 @@ extern "C" { + * 6 = Reserved for future use + * 7 = Reserved for future use + * +- * 55:25 - Reserved for future use. Must be zero. ++ * 55:28 - Reserved for future use. Must be zero. + */ + #define DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D(c, s, g, k, h) \ + fourcc_mod_code(NVIDIA, (0x10 | \ +@@ -1008,6 +1014,7 @@ extern "C" { + (((k) & 0xff) << 12) | \ + (((g) & 0x3) << 20) | \ + (((s) & 0x1) << 22) | \ ++ (((s) & 0x6) << 25) | \ + (((c) & 0x7) << 23))) + + /* To grandfather in prior block linear format modifiers to the above layout, +diff --git a/include/standard-headers/linux/ethtool.h b/include/standard-headers/linux/ethtool.h +index dc24512d28..d0f7a63f10 100644 +--- a/include/standard-headers/linux/ethtool.h ++++ b/include/standard-headers/linux/ethtool.h +@@ -2077,6 +2077,10 @@ enum ethtool_link_mode_bit_indices { + ETHTOOL_LINK_MODE_800000baseDR4_2_Full_BIT = 118, + ETHTOOL_LINK_MODE_800000baseSR4_Full_BIT = 119, + ETHTOOL_LINK_MODE_800000baseVR4_Full_BIT = 120, ++ ETHTOOL_LINK_MODE_1600000baseCR8_Full_BIT = 121, ++ ETHTOOL_LINK_MODE_1600000baseKR8_Full_BIT = 122, ++ ETHTOOL_LINK_MODE_1600000baseDR8_Full_BIT = 123, ++ ETHTOOL_LINK_MODE_1600000baseDR8_2_Full_BIT = 124, + + /* must be last entry */ + __ETHTOOL_LINK_MODE_MASK_NBITS +@@ -2190,6 +2194,7 @@ enum ethtool_link_mode_bit_indices { + #define SPEED_200000 200000 + #define SPEED_400000 400000 + #define SPEED_800000 800000 ++#define SPEED_1600000 1600000 + + #define SPEED_UNKNOWN -1 + +diff --git a/include/standard-headers/linux/input-event-codes.h b/include/standard-headers/linux/input-event-codes.h +index c914ccd723..ede79c6ae4 100644 +--- a/include/standard-headers/linux/input-event-codes.h ++++ b/include/standard-headers/linux/input-event-codes.h +@@ -27,7 +27,7 @@ + #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */ + #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */ + #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */ +-#define INPUT_PROP_HAPTIC_TOUCHPAD 0x07 /* is a haptic touchpad */ ++#define INPUT_PROP_PRESSUREPAD 0x07 /* pressure triggers clicks */ + + #define INPUT_PROP_MAX 0x1f + #define INPUT_PROP_CNT (INPUT_PROP_MAX + 1) +@@ -631,6 +631,18 @@ + #define KEY_BRIGHTNESS_MIN 0x250 /* Set Brightness to Minimum */ + #define KEY_BRIGHTNESS_MAX 0x251 /* Set Brightness to Maximum */ + ++/* ++ * Keycodes for hotkeys toggling the electronic privacy screen found on some ++ * laptops on/off. Note when the embedded-controller turns on/off the eprivacy ++ * screen itself then the state should be reported through drm connecter props: ++ * https://www.kernel.org/doc/html/latest/gpu/drm-kms.html#standard-connector-properties ++ * Except when implementing the drm connecter properties API is not possible ++ * because e.g. the firmware does not allow querying the presence and/or status ++ * of the eprivacy screen at boot. ++ */ ++#define KEY_EPRIVACY_SCREEN_ON 0x252 ++#define KEY_EPRIVACY_SCREEN_OFF 0x253 ++ + #define KEY_KBDINPUTASSIST_PREV 0x260 + #define KEY_KBDINPUTASSIST_NEXT 0x261 + #define KEY_KBDINPUTASSIST_PREVGROUP 0x262 +diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h +index 07e06aafec..3add74ae25 100644 +--- a/include/standard-headers/linux/pci_regs.h ++++ b/include/standard-headers/linux/pci_regs.h +@@ -503,6 +503,7 @@ + #define PCI_EXP_DEVCAP_PWR_VAL 0x03fc0000 /* Slot Power Limit Value */ + #define PCI_EXP_DEVCAP_PWR_SCL 0x0c000000 /* Slot Power Limit Scale */ + #define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ ++#define PCI_EXP_DEVCAP_TEE 0x40000000 /* TEE I/O (TDISP) Support */ + #define PCI_EXP_DEVCTL 0x08 /* Device Control */ + #define PCI_EXP_DEVCTL_CERE 0x0001 /* Correctable Error Reporting En. */ + #define PCI_EXP_DEVCTL_NFERE 0x0002 /* Non-Fatal Error Reporting Enable */ +@@ -754,6 +755,8 @@ + #define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */ + #define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */ + #define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */ ++#define PCI_EXT_CAP_ID_DEV3 0x2F /* Device 3 Capability/Control/Status */ ++#define PCI_EXT_CAP_ID_IDE 0x30 /* Integrity and Data Encryption */ + #define PCI_EXT_CAP_ID_PL_64GT 0x31 /* Physical Layer 64.0 GT/s */ + #define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL_64GT + +@@ -1244,9 +1247,95 @@ + /* Deprecated old name, replaced with PCI_DOE_DATA_OBJECT_DISC_RSP_3_TYPE */ + #define PCI_DOE_DATA_OBJECT_DISC_RSP_3_PROTOCOL PCI_DOE_DATA_OBJECT_DISC_RSP_3_TYPE + ++/* Device 3 Extended Capability */ ++#define PCI_DEV3_CAP 0x04 /* Device 3 Capabilities Register */ ++#define PCI_DEV3_CTL 0x08 /* Device 3 Control Register */ ++#define PCI_DEV3_STA 0x0c /* Device 3 Status Register */ ++#define PCI_DEV3_STA_SEGMENT 0x8 /* Segment Captured (end-to-end flit-mode detected) */ ++ + /* Compute Express Link (CXL r3.1, sec 8.1.5) */ + #define PCI_DVSEC_CXL_PORT 3 + #define PCI_DVSEC_CXL_PORT_CTL 0x0c + #define PCI_DVSEC_CXL_PORT_CTL_UNMASK_SBR 0x00000001 + ++/* Integrity and Data Encryption Extended Capability */ ++#define PCI_IDE_CAP 0x04 ++#define PCI_IDE_CAP_LINK 0x1 /* Link IDE Stream Supported */ ++#define PCI_IDE_CAP_SELECTIVE 0x2 /* Selective IDE Streams Supported */ ++#define PCI_IDE_CAP_FLOWTHROUGH 0x4 /* Flow-Through IDE Stream Supported */ ++#define PCI_IDE_CAP_PARTIAL_HEADER_ENC 0x8 /* Partial Header Encryption Supported */ ++#define PCI_IDE_CAP_AGGREGATION 0x10 /* Aggregation Supported */ ++#define PCI_IDE_CAP_PCRC 0x20 /* PCRC Supported */ ++#define PCI_IDE_CAP_IDE_KM 0x40 /* IDE_KM Protocol Supported */ ++#define PCI_IDE_CAP_SEL_CFG 0x80 /* Selective IDE for Config Request Support */ ++#define PCI_IDE_CAP_ALG __GENMASK(12, 8) /* Supported Algorithms */ ++#define PCI_IDE_CAP_ALG_AES_GCM_256 0 /* AES-GCM 256 key size, 96b MAC */ ++#define PCI_IDE_CAP_LINK_TC_NUM __GENMASK(15, 13) /* Link IDE TCs */ ++#define PCI_IDE_CAP_SEL_NUM __GENMASK(23, 16) /* Supported Selective IDE Streams */ ++#define PCI_IDE_CAP_TEE_LIMITED 0x1000000 /* TEE-Limited Stream Supported */ ++#define PCI_IDE_CTL 0x08 ++#define PCI_IDE_CTL_FLOWTHROUGH_IDE 0x4 /* Flow-Through IDE Stream Enabled */ ++ ++#define PCI_IDE_LINK_STREAM_0 0xc /* First Link Stream Register Block */ ++#define PCI_IDE_LINK_BLOCK_SIZE 8 ++/* Link IDE Stream block, up to PCI_IDE_CAP_LINK_TC_NUM */ ++#define PCI_IDE_LINK_CTL_0 0x00 /* First Link Control Register Offset in block */ ++#define PCI_IDE_LINK_CTL_EN 0x1 /* Link IDE Stream Enable */ ++#define PCI_IDE_LINK_CTL_TX_AGGR_NPR __GENMASK(3, 2) /* Tx Aggregation Mode NPR */ ++#define PCI_IDE_LINK_CTL_TX_AGGR_PR __GENMASK(5, 4) /* Tx Aggregation Mode PR */ ++#define PCI_IDE_LINK_CTL_TX_AGGR_CPL __GENMASK(7, 6) /* Tx Aggregation Mode CPL */ ++#define PCI_IDE_LINK_CTL_PCRC_EN 0x100 /* PCRC Enable */ ++#define PCI_IDE_LINK_CTL_PART_ENC __GENMASK(13, 10) /* Partial Header Encryption Mode */ ++#define PCI_IDE_LINK_CTL_ALG __GENMASK(18, 14) /* Selection from PCI_IDE_CAP_ALG */ ++#define PCI_IDE_LINK_CTL_TC __GENMASK(21, 19) /* Traffic Class */ ++#define PCI_IDE_LINK_CTL_ID __GENMASK(31, 24) /* Stream ID */ ++#define PCI_IDE_LINK_STS_0 0x4 /* First Link Status Register Offset in block */ ++#define PCI_IDE_LINK_STS_STATE __GENMASK(3, 0) /* Link IDE Stream State */ ++#define PCI_IDE_LINK_STS_IDE_FAIL 0x80000000 /* IDE fail message received */ ++ ++/* Selective IDE Stream block, up to PCI_IDE_CAP_SELECTIVE_STREAMS_NUM */ ++/* Selective IDE Stream Capability Register */ ++#define PCI_IDE_SEL_CAP 0x00 ++#define PCI_IDE_SEL_CAP_ASSOC_NUM __GENMASK(3, 0) ++/* Selective IDE Stream Control Register */ ++#define PCI_IDE_SEL_CTL 0x04 ++#define PCI_IDE_SEL_CTL_EN 0x1 /* Selective IDE Stream Enable */ ++#define PCI_IDE_SEL_CTL_TX_AGGR_NPR __GENMASK(3, 2) /* Tx Aggregation Mode NPR */ ++#define PCI_IDE_SEL_CTL_TX_AGGR_PR __GENMASK(5, 4) /* Tx Aggregation Mode PR */ ++#define PCI_IDE_SEL_CTL_TX_AGGR_CPL __GENMASK(7, 6) /* Tx Aggregation Mode CPL */ ++#define PCI_IDE_SEL_CTL_PCRC_EN 0x100 /* PCRC Enable */ ++#define PCI_IDE_SEL_CTL_CFG_EN 0x200 /* Selective IDE for Configuration Requests */ ++#define PCI_IDE_SEL_CTL_PART_ENC __GENMASK(13, 10) /* Partial Header Encryption Mode */ ++#define PCI_IDE_SEL_CTL_ALG __GENMASK(18, 14) /* Selection from PCI_IDE_CAP_ALG */ ++#define PCI_IDE_SEL_CTL_TC __GENMASK(21, 19) /* Traffic Class */ ++#define PCI_IDE_SEL_CTL_DEFAULT 0x400000 /* Default Stream */ ++#define PCI_IDE_SEL_CTL_TEE_LIMITED 0x800000 /* TEE-Limited Stream */ ++#define PCI_IDE_SEL_CTL_ID __GENMASK(31, 24) /* Stream ID */ ++#define PCI_IDE_SEL_CTL_ID_MAX 255 ++/* Selective IDE Stream Status Register */ ++#define PCI_IDE_SEL_STS 0x08 ++#define PCI_IDE_SEL_STS_STATE __GENMASK(3, 0) /* Selective IDE Stream State */ ++#define PCI_IDE_SEL_STS_STATE_INSECURE 0 ++#define PCI_IDE_SEL_STS_STATE_SECURE 2 ++#define PCI_IDE_SEL_STS_IDE_FAIL 0x80000000 /* IDE fail message received */ ++/* IDE RID Association Register 1 */ ++#define PCI_IDE_SEL_RID_1 0x0c ++#define PCI_IDE_SEL_RID_1_LIMIT __GENMASK(23, 8) ++/* IDE RID Association Register 2 */ ++#define PCI_IDE_SEL_RID_2 0x10 ++#define PCI_IDE_SEL_RID_2_VALID 0x1 ++#define PCI_IDE_SEL_RID_2_BASE __GENMASK(23, 8) ++#define PCI_IDE_SEL_RID_2_SEG __GENMASK(31, 24) ++/* Selective IDE Address Association Register Block, up to PCI_IDE_SEL_CAP_ASSOC_NUM */ ++#define PCI_IDE_SEL_ADDR_BLOCK_SIZE 12 ++#define PCI_IDE_SEL_ADDR_1(x) (20 + (x) * PCI_IDE_SEL_ADDR_BLOCK_SIZE) ++#define PCI_IDE_SEL_ADDR_1_VALID 0x1 ++#define PCI_IDE_SEL_ADDR_1_BASE_LOW __GENMASK(19, 8) ++#define PCI_IDE_SEL_ADDR_1_LIMIT_LOW __GENMASK(31, 20) ++/* IDE Address Association Register 2 is "Memory Limit Upper" */ ++#define PCI_IDE_SEL_ADDR_2(x) (24 + (x) * PCI_IDE_SEL_ADDR_BLOCK_SIZE) ++/* IDE Address Association Register 3 is "Memory Base Upper" */ ++#define PCI_IDE_SEL_ADDR_3(x) (28 + (x) * PCI_IDE_SEL_ADDR_BLOCK_SIZE) ++#define PCI_IDE_SEL_BLOCK_SIZE(nr_assoc) (20 + PCI_IDE_SEL_ADDR_BLOCK_SIZE * (nr_assoc)) ++ + #endif /* LINUX_PCI_REGS_H */ +diff --git a/include/standard-headers/linux/virtio_net.h b/include/standard-headers/linux/virtio_net.h +index 93abaae0b9..17a0174d6c 100644 +--- a/include/standard-headers/linux/virtio_net.h ++++ b/include/standard-headers/linux/virtio_net.h +@@ -193,7 +193,8 @@ struct virtio_net_hdr_v1 { + + struct virtio_net_hdr_v1_hash { + struct virtio_net_hdr_v1 hdr; +- uint32_t hash_value; ++ uint16_t hash_value_lo; ++ uint16_t hash_value_hi; + #define VIRTIO_NET_HASH_REPORT_NONE 0 + #define VIRTIO_NET_HASH_REPORT_IPv4 1 + #define VIRTIO_NET_HASH_REPORT_TCPv4 2 +diff --git a/include/standard-headers/linux/virtio_pci.h b/include/standard-headers/linux/virtio_pci.h +index 09e964e6ee..4c82513df2 100644 +--- a/include/standard-headers/linux/virtio_pci.h ++++ b/include/standard-headers/linux/virtio_pci.h +@@ -40,7 +40,7 @@ + #define _LINUX_VIRTIO_PCI_H + + #include "standard-headers/linux/types.h" +-#include "standard-headers/linux/kernel.h" ++#include "standard-headers/linux/const.h" + + #ifndef VIRTIO_PCI_NO_LEGACY + +diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h +index f4d9baafa1..46ffbddab5 100644 +--- a/linux-headers/asm-arm64/kvm.h ++++ b/linux-headers/asm-arm64/kvm.h +@@ -31,7 +31,7 @@ + #define KVM_SPSR_FIQ 4 + #define KVM_NR_SPSR 5 + +-#ifndef __ASSEMBLY__ ++#ifndef __ASSEMBLER__ + #include + #include + #include +diff --git a/linux-headers/asm-arm64/unistd_64.h b/linux-headers/asm-arm64/unistd_64.h +index 4ae25c2b91..1ef9c40813 100644 +--- a/linux-headers/asm-arm64/unistd_64.h ++++ b/linux-headers/asm-arm64/unistd_64.h +@@ -326,6 +326,7 @@ + #define __NR_open_tree_attr 467 + #define __NR_file_getattr 468 + #define __NR_file_setattr 469 ++#define __NR_listns 470 + + + #endif /* _ASM_UNISTD_64_H */ +diff --git a/linux-headers/asm-generic/unistd.h b/linux-headers/asm-generic/unistd.h +index 04e0077fb4..942370b3f5 100644 +--- a/linux-headers/asm-generic/unistd.h ++++ b/linux-headers/asm-generic/unistd.h +@@ -857,9 +857,11 @@ __SYSCALL(__NR_open_tree_attr, sys_open_tree_attr) + __SYSCALL(__NR_file_getattr, sys_file_getattr) + #define __NR_file_setattr 469 + __SYSCALL(__NR_file_setattr, sys_file_setattr) ++#define __NR_listns 470 ++__SYSCALL(__NR_listns, sys_listns) + + #undef __NR_syscalls +-#define __NR_syscalls 470 ++#define __NR_syscalls 471 + + /* + * 32 bit systems traditionally used different +diff --git a/linux-headers/asm-loongarch/kvm.h b/linux-headers/asm-loongarch/kvm.h +index 57ba1a563b..de6c3f18e4 100644 +--- a/linux-headers/asm-loongarch/kvm.h ++++ b/linux-headers/asm-loongarch/kvm.h +@@ -104,6 +104,7 @@ struct kvm_fpu { + #define KVM_LOONGARCH_VM_FEAT_PV_IPI 6 + #define KVM_LOONGARCH_VM_FEAT_PV_STEALTIME 7 + #define KVM_LOONGARCH_VM_FEAT_PTW 8 ++#define KVM_LOONGARCH_VM_FEAT_MSGINT 9 + + /* Device Control API on vcpu fd */ + #define KVM_LOONGARCH_VCPU_CPUCFG 0 +diff --git a/linux-headers/asm-loongarch/unistd.h b/linux-headers/asm-loongarch/unistd.h +index 1f01980f9c..e19c7f2f9f 100644 +--- a/linux-headers/asm-loongarch/unistd.h ++++ b/linux-headers/asm-loongarch/unistd.h +@@ -1,3 +1,9 @@ + /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ + ++#include ++ ++#if __BITS_PER_LONG == 32 ++#include ++#else + #include ++#endif +diff --git a/linux-headers/asm-loongarch/unistd_64.h b/linux-headers/asm-loongarch/unistd_64.h +index 5033fc8f2f..aa5daac4ef 100644 +--- a/linux-headers/asm-loongarch/unistd_64.h ++++ b/linux-headers/asm-loongarch/unistd_64.h +@@ -322,6 +322,7 @@ + #define __NR_open_tree_attr 467 + #define __NR_file_getattr 468 + #define __NR_file_setattr 469 ++#define __NR_listns 470 + + + #endif /* _ASM_UNISTD_64_H */ +diff --git a/linux-headers/asm-mips/unistd_n32.h b/linux-headers/asm-mips/unistd_n32.h +index c99c10e5bf..a33d106dca 100644 +--- a/linux-headers/asm-mips/unistd_n32.h ++++ b/linux-headers/asm-mips/unistd_n32.h +@@ -398,5 +398,6 @@ + #define __NR_open_tree_attr (__NR_Linux + 467) + #define __NR_file_getattr (__NR_Linux + 468) + #define __NR_file_setattr (__NR_Linux + 469) ++#define __NR_listns (__NR_Linux + 470) + + #endif /* _ASM_UNISTD_N32_H */ +diff --git a/linux-headers/asm-mips/unistd_n64.h b/linux-headers/asm-mips/unistd_n64.h +index 0d975bb185..1bc251e450 100644 +--- a/linux-headers/asm-mips/unistd_n64.h ++++ b/linux-headers/asm-mips/unistd_n64.h +@@ -374,5 +374,6 @@ + #define __NR_open_tree_attr (__NR_Linux + 467) + #define __NR_file_getattr (__NR_Linux + 468) + #define __NR_file_setattr (__NR_Linux + 469) ++#define __NR_listns (__NR_Linux + 470) + + #endif /* _ASM_UNISTD_N64_H */ +diff --git a/linux-headers/asm-mips/unistd_o32.h b/linux-headers/asm-mips/unistd_o32.h +index 86ac0ac84b..c57175d496 100644 +--- a/linux-headers/asm-mips/unistd_o32.h ++++ b/linux-headers/asm-mips/unistd_o32.h +@@ -444,5 +444,6 @@ + #define __NR_open_tree_attr (__NR_Linux + 467) + #define __NR_file_getattr (__NR_Linux + 468) + #define __NR_file_setattr (__NR_Linux + 469) ++#define __NR_listns (__NR_Linux + 470) + + #endif /* _ASM_UNISTD_O32_H */ +diff --git a/linux-headers/asm-powerpc/unistd_32.h b/linux-headers/asm-powerpc/unistd_32.h +index d7a32c5e06..a3f4aa2fe2 100644 +--- a/linux-headers/asm-powerpc/unistd_32.h ++++ b/linux-headers/asm-powerpc/unistd_32.h +@@ -451,6 +451,7 @@ + #define __NR_open_tree_attr 467 + #define __NR_file_getattr 468 + #define __NR_file_setattr 469 ++#define __NR_listns 470 + + + #endif /* _ASM_UNISTD_32_H */ +diff --git a/linux-headers/asm-powerpc/unistd_64.h b/linux-headers/asm-powerpc/unistd_64.h +index ff35c51fc6..d4444557f1 100644 +--- a/linux-headers/asm-powerpc/unistd_64.h ++++ b/linux-headers/asm-powerpc/unistd_64.h +@@ -423,6 +423,7 @@ + #define __NR_open_tree_attr 467 + #define __NR_file_getattr 468 + #define __NR_file_setattr 469 ++#define __NR_listns 470 + + + #endif /* _ASM_UNISTD_64_H */ +diff --git a/linux-headers/asm-riscv/kvm.h b/linux-headers/asm-riscv/kvm.h +index 759a4852c0..54f3ad7ed2 100644 +--- a/linux-headers/asm-riscv/kvm.h ++++ b/linux-headers/asm-riscv/kvm.h +@@ -23,6 +23,8 @@ + #define KVM_INTERRUPT_SET -1U + #define KVM_INTERRUPT_UNSET -2U + ++#define KVM_EXIT_FAIL_ENTRY_NO_VSFILE (1ULL << 0) ++ + /* for KVM_GET_REGS and KVM_SET_REGS */ + struct kvm_regs { + }; +@@ -211,6 +213,7 @@ enum KVM_RISCV_SBI_EXT_ID { + KVM_RISCV_SBI_EXT_STA, + KVM_RISCV_SBI_EXT_SUSP, + KVM_RISCV_SBI_EXT_FWFT, ++ KVM_RISCV_SBI_EXT_MPXY, + KVM_RISCV_SBI_EXT_MAX, + }; + +diff --git a/linux-headers/asm-riscv/unistd_32.h b/linux-headers/asm-riscv/unistd_32.h +index 6083373e88..9f33956246 100644 +--- a/linux-headers/asm-riscv/unistd_32.h ++++ b/linux-headers/asm-riscv/unistd_32.h +@@ -317,6 +317,7 @@ + #define __NR_open_tree_attr 467 + #define __NR_file_getattr 468 + #define __NR_file_setattr 469 ++#define __NR_listns 470 + + + #endif /* _ASM_UNISTD_32_H */ +diff --git a/linux-headers/asm-riscv/unistd_64.h b/linux-headers/asm-riscv/unistd_64.h +index f0c7585c60..c2e7258916 100644 +--- a/linux-headers/asm-riscv/unistd_64.h ++++ b/linux-headers/asm-riscv/unistd_64.h +@@ -327,6 +327,7 @@ + #define __NR_open_tree_attr 467 + #define __NR_file_getattr 468 + #define __NR_file_setattr 469 ++#define __NR_listns 470 + + + #endif /* _ASM_UNISTD_64_H */ +diff --git a/linux-headers/asm-s390/bitsperlong.h b/linux-headers/asm-s390/bitsperlong.h +index cceaf47b02..7af27a985f 100644 +--- a/linux-headers/asm-s390/bitsperlong.h ++++ b/linux-headers/asm-s390/bitsperlong.h +@@ -2,11 +2,7 @@ + #ifndef __ASM_S390_BITSPERLONG_H + #define __ASM_S390_BITSPERLONG_H + +-#ifndef __s390x__ +-#define __BITS_PER_LONG 32 +-#else + #define __BITS_PER_LONG 64 +-#endif + + #include + +diff --git a/linux-headers/asm-s390/unistd.h b/linux-headers/asm-s390/unistd.h +index 27b8b211c8..1484618877 100644 +--- a/linux-headers/asm-s390/unistd.h ++++ b/linux-headers/asm-s390/unistd.h +@@ -8,10 +8,6 @@ + #ifndef _ASM_S390_UNISTD_H_ + #define _ASM_S390_UNISTD_H_ + +-#ifdef __s390x__ + #include +-#else +-#include +-#endif + + #endif /* _ASM_S390_UNISTD_H_ */ +diff --git a/linux-headers/asm-s390/unistd_64.h b/linux-headers/asm-s390/unistd_64.h +index 0652ba6331..8d9e579ef5 100644 +--- a/linux-headers/asm-s390/unistd_64.h ++++ b/linux-headers/asm-s390/unistd_64.h +@@ -1,6 +1,5 @@ +-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +-#ifndef _ASM_S390_UNISTD_64_H +-#define _ASM_S390_UNISTD_64_H ++#ifndef _ASM_UNISTD_64_H ++#define _ASM_UNISTD_64_H + + #define __NR_exit 1 + #define __NR_fork 2 +@@ -390,5 +389,7 @@ + #define __NR_open_tree_attr 467 + #define __NR_file_getattr 468 + #define __NR_file_setattr 469 ++#define __NR_listns 470 + +-#endif /* _ASM_S390_UNISTD_64_H */ ++ ++#endif /* _ASM_UNISTD_64_H */ +diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h +index 3bb38f6c3a..b804fd25a2 100644 +--- a/linux-headers/asm-x86/kvm.h ++++ b/linux-headers/asm-x86/kvm.h +@@ -500,6 +500,7 @@ struct kvm_sync_regs { + /* vendor-specific groups and attributes for system fd */ + #define KVM_X86_GRP_SEV 1 + # define KVM_X86_SEV_VMSA_FEATURES 0 ++# define KVM_X86_SNP_POLICY_BITS 1 + + struct kvm_vmx_nested_state_data { + __u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE]; +diff --git a/linux-headers/asm-x86/unistd_32.h b/linux-headers/asm-x86/unistd_32.h +index 8f784a5634..34255aac64 100644 +--- a/linux-headers/asm-x86/unistd_32.h ++++ b/linux-headers/asm-x86/unistd_32.h +@@ -460,6 +460,7 @@ + #define __NR_open_tree_attr 467 + #define __NR_file_getattr 468 + #define __NR_file_setattr 469 ++#define __NR_listns 470 + + + #endif /* _ASM_UNISTD_32_H */ +diff --git a/linux-headers/asm-x86/unistd_64.h b/linux-headers/asm-x86/unistd_64.h +index 26c258d1a6..07f242a5fa 100644 +--- a/linux-headers/asm-x86/unistd_64.h ++++ b/linux-headers/asm-x86/unistd_64.h +@@ -384,6 +384,7 @@ + #define __NR_open_tree_attr 467 + #define __NR_file_getattr 468 + #define __NR_file_setattr 469 ++#define __NR_listns 470 + + + #endif /* _ASM_UNISTD_64_H */ +diff --git a/linux-headers/asm-x86/unistd_x32.h b/linux-headers/asm-x86/unistd_x32.h +index 65c2aed946..08fc9da2fa 100644 +--- a/linux-headers/asm-x86/unistd_x32.h ++++ b/linux-headers/asm-x86/unistd_x32.h +@@ -337,6 +337,7 @@ + #define __NR_open_tree_attr (__X32_SYSCALL_BIT + 467) + #define __NR_file_getattr (__X32_SYSCALL_BIT + 468) + #define __NR_file_setattr (__X32_SYSCALL_BIT + 469) ++#define __NR_listns (__X32_SYSCALL_BIT + 470) + #define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512) + #define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513) + #define __NR_ioctl (__X32_SYSCALL_BIT + 514) +diff --git a/linux-headers/linux/iommufd.h b/linux-headers/linux/iommufd.h +index 2105a03955..384183a403 100644 +--- a/linux-headers/linux/iommufd.h ++++ b/linux-headers/linux/iommufd.h +@@ -450,6 +450,16 @@ struct iommu_hwpt_vtd_s1 { + * nested domain will translate the same as the nesting parent. The S1 will + * install a Context Descriptor Table pointing at userspace memory translated + * by the nesting parent. ++ * ++ * It's suggested to allocate a vDEVICE object carrying vSID and then re-attach ++ * the nested domain, as soon as the vSID is available in the VMM level: ++ * ++ * - when Cfg=translate, a vDEVICE must be allocated prior to attaching to the ++ * allocated nested domain, as CD/ATS invalidations and vevents need a vSID. ++ * - when Cfg=bypass/abort, a vDEVICE is not enforced during the nested domain ++ * attachment, to support a GBPA case where VM sets CR0.SMMUEN=0. However, if ++ * VM sets CR0.SMMUEN=1 while missing a vDEVICE object, kernel would fail to ++ * report events to the VM. E.g. F_TRANSLATION when guest STE.Cfg=abort. + */ + struct iommu_hwpt_arm_smmuv3 { + __aligned_le64 ste[2]; +diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h +index 4ea28ef7ca..a4ab42dcba 100644 +--- a/linux-headers/linux/kvm.h ++++ b/linux-headers/linux/kvm.h +@@ -179,6 +179,7 @@ struct kvm_xen_exit { + #define KVM_EXIT_LOONGARCH_IOCSR 38 + #define KVM_EXIT_MEMORY_FAULT 39 + #define KVM_EXIT_TDX 40 ++#define KVM_EXIT_ARM_SEA 41 + + /* For KVM_EXIT_INTERNAL_ERROR */ + /* Emulate instruction failed. */ +@@ -465,6 +466,14 @@ struct kvm_run { + } setup_event_notify; + }; + } tdx; ++ /* KVM_EXIT_ARM_SEA */ ++ struct { ++#define KVM_EXIT_ARM_SEA_FLAG_GPA_VALID (1ULL << 0) ++ __u64 flags; ++ __u64 esr; ++ __u64 gva; ++ __u64 gpa; ++ } arm_sea; + /* Fix the size of the union. */ + char padding[256]; + }; +@@ -955,6 +964,8 @@ struct kvm_enable_cap { + #define KVM_CAP_RISCV_MP_STATE_RESET 242 + #define KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED 243 + #define KVM_CAP_GUEST_MEMFD_FLAGS 244 ++#define KVM_CAP_ARM_SEA_TO_USER 245 ++#define KVM_CAP_S390_USER_OPEREXEC 246 + + struct kvm_irq_routing_irqchip { + __u32 irqchip; +diff --git a/linux-headers/linux/mshv.h b/linux-headers/linux/mshv.h +index 5bc83db6a3..acceeddc1c 100644 +--- a/linux-headers/linux/mshv.h ++++ b/linux-headers/linux/mshv.h +@@ -26,6 +26,7 @@ enum { + MSHV_PT_BIT_LAPIC, + MSHV_PT_BIT_X2APIC, + MSHV_PT_BIT_GPA_SUPER_PAGES, ++ MSHV_PT_BIT_CPU_AND_XSAVE_FEATURES, + MSHV_PT_BIT_COUNT, + }; + +@@ -41,6 +42,8 @@ enum { + * @pt_flags: Bitmask of 1 << MSHV_PT_BIT_* + * @pt_isolation: MSHV_PT_ISOLATION_* + * ++ * This is the initial/v1 version for backward compatibility. ++ * + * Returns a file descriptor to act as a handle to a guest partition. + * At this point the partition is not yet initialized in the hypervisor. + * Some operations must be done with the partition in this state, e.g. setting +@@ -52,6 +55,37 @@ struct mshv_create_partition { + __u64 pt_isolation; + }; + ++#define MSHV_NUM_CPU_FEATURES_BANKS 2 ++ ++/** ++ * struct mshv_create_partition_v2 ++ * ++ * This is extended version of the above initial MSHV_CREATE_PARTITION ++ * ioctl and allows for following additional parameters: ++ * ++ * @pt_num_cpu_fbanks: Must be set to MSHV_NUM_CPU_FEATURES_BANKS. ++ * @pt_cpu_fbanks: Disabled processor feature banks array. ++ * @pt_disabled_xsave: Disabled xsave feature bits. ++ * ++ * pt_cpu_fbanks and pt_disabled_xsave are passed through as-is to the create ++ * partition hypercall. ++ * ++ * Returns : same as above original mshv_create_partition ++ */ ++struct mshv_create_partition_v2 { ++ __u64 pt_flags; ++ __u64 pt_isolation; ++ __u16 pt_num_cpu_fbanks; ++ __u8 pt_rsvd[6]; /* MBZ */ ++ __u64 pt_cpu_fbanks[MSHV_NUM_CPU_FEATURES_BANKS]; ++ __u64 pt_rsvd1[2]; /* MBZ */ ++#if defined(__x86_64__) ++ __u64 pt_disabled_xsave; ++#else ++ __u64 pt_rsvd2; /* MBZ */ ++#endif ++} __attribute__((packed)); ++ + /* /dev/mshv */ + #define MSHV_CREATE_PARTITION _IOW(MSHV_IOCTL, 0x00, struct mshv_create_partition) + +@@ -89,7 +123,7 @@ enum { + * @rsvd: MBZ + * + * Map or unmap a region of userspace memory to Guest Physical Addresses (GPA). +- * Mappings can't overlap in GPA space or userspace. ++ * Mappings can't overlap in GPA space. + * To unmap, these fields must match an existing mapping. + */ + struct mshv_user_mem_region { +@@ -288,4 +322,84 @@ struct mshv_get_set_vp_state { + * #define MSHV_ROOT_HVCALL _IOWR(MSHV_IOCTL, 0x07, struct mshv_root_hvcall) + */ + ++/* Structure definitions, macros and IOCTLs for mshv_vtl */ ++ ++#define MSHV_CAP_CORE_API_STABLE 0x0 ++#define MSHV_CAP_REGISTER_PAGE 0x1 ++#define MSHV_CAP_VTL_RETURN_ACTION 0x2 ++#define MSHV_CAP_DR6_SHARED 0x3 ++#define MSHV_MAX_RUN_MSG_SIZE 256 ++ ++struct mshv_vp_registers { ++ __u32 count; /* supports only 1 register at a time */ ++ __u32 reserved; /* Reserved for alignment or future use */ ++ __u64 regs_ptr; /* pointer to struct hv_register_assoc */ ++}; ++ ++struct mshv_vtl_set_eventfd { ++ __s32 fd; ++ __u32 flag; ++}; ++ ++struct mshv_vtl_signal_event { ++ __u32 connection_id; ++ __u32 flag; ++}; ++ ++struct mshv_vtl_sint_post_msg { ++ __u64 message_type; ++ __u32 connection_id; ++ __u32 payload_size; /* Must not exceed HV_MESSAGE_PAYLOAD_BYTE_COUNT */ ++ __u64 payload_ptr; /* pointer to message payload (bytes) */ ++}; ++ ++struct mshv_vtl_ram_disposition { ++ __u64 start_pfn; ++ __u64 last_pfn; ++}; ++ ++struct mshv_vtl_set_poll_file { ++ __u32 cpu; ++ __u32 fd; ++}; ++ ++struct mshv_vtl_hvcall_setup { ++ __u64 bitmap_array_size; /* stores number of bytes */ ++ __u64 allow_bitmap_ptr; ++}; ++ ++struct mshv_vtl_hvcall { ++ __u64 control; /* Hypercall control code */ ++ __u64 input_size; /* Size of the input data */ ++ __u64 input_ptr; /* Pointer to the input struct */ ++ __u64 status; /* Status of the hypercall (output) */ ++ __u64 output_size; /* Size of the output data */ ++ __u64 output_ptr; /* Pointer to the output struct */ ++}; ++ ++struct mshv_sint_mask { ++ __u8 mask; ++ __u8 reserved[7]; ++}; ++ ++/* /dev/mshv device IOCTL */ ++#define MSHV_CHECK_EXTENSION _IOW(MSHV_IOCTL, 0x00, __u32) ++ ++/* vtl device */ ++#define MSHV_CREATE_VTL _IOR(MSHV_IOCTL, 0x1D, char) ++#define MSHV_ADD_VTL0_MEMORY _IOW(MSHV_IOCTL, 0x21, struct mshv_vtl_ram_disposition) ++#define MSHV_SET_POLL_FILE _IOW(MSHV_IOCTL, 0x25, struct mshv_vtl_set_poll_file) ++#define MSHV_RETURN_TO_LOWER_VTL _IO(MSHV_IOCTL, 0x27) ++#define MSHV_GET_VP_REGISTERS _IOWR(MSHV_IOCTL, 0x05, struct mshv_vp_registers) ++#define MSHV_SET_VP_REGISTERS _IOW(MSHV_IOCTL, 0x06, struct mshv_vp_registers) ++ ++/* VMBus device IOCTLs */ ++#define MSHV_SINT_SIGNAL_EVENT _IOW(MSHV_IOCTL, 0x22, struct mshv_vtl_signal_event) ++#define MSHV_SINT_POST_MESSAGE _IOW(MSHV_IOCTL, 0x23, struct mshv_vtl_sint_post_msg) ++#define MSHV_SINT_SET_EVENTFD _IOW(MSHV_IOCTL, 0x24, struct mshv_vtl_set_eventfd) ++#define MSHV_SINT_PAUSE_MESSAGE_STREAM _IOW(MSHV_IOCTL, 0x25, struct mshv_sint_mask) ++ ++/* hv_hvcall device */ ++#define MSHV_HVCALL_SETUP _IOW(MSHV_IOCTL, 0x1E, struct mshv_vtl_hvcall_setup) ++#define MSHV_HVCALL _IOWR(MSHV_IOCTL, 0x1F, struct mshv_vtl_hvcall) + #endif +diff --git a/linux-headers/linux/psp-sev.h b/linux-headers/linux/psp-sev.h +index c525125ea8..9479928a4a 100644 +--- a/linux-headers/linux/psp-sev.h ++++ b/linux-headers/linux/psp-sev.h +@@ -47,32 +47,32 @@ typedef enum { + * with possible values from the specification. + */ + SEV_RET_NO_FW_CALL = -1, +- SEV_RET_SUCCESS = 0, +- SEV_RET_INVALID_PLATFORM_STATE, +- SEV_RET_INVALID_GUEST_STATE, +- SEV_RET_INAVLID_CONFIG, ++ SEV_RET_SUCCESS = 0, ++ SEV_RET_INVALID_PLATFORM_STATE = 0x0001, ++ SEV_RET_INVALID_GUEST_STATE = 0x0002, ++ SEV_RET_INAVLID_CONFIG = 0x0003, + SEV_RET_INVALID_CONFIG = SEV_RET_INAVLID_CONFIG, +- SEV_RET_INVALID_LEN, +- SEV_RET_ALREADY_OWNED, +- SEV_RET_INVALID_CERTIFICATE, +- SEV_RET_POLICY_FAILURE, +- SEV_RET_INACTIVE, +- SEV_RET_INVALID_ADDRESS, +- SEV_RET_BAD_SIGNATURE, +- SEV_RET_BAD_MEASUREMENT, +- SEV_RET_ASID_OWNED, +- SEV_RET_INVALID_ASID, +- SEV_RET_WBINVD_REQUIRED, +- SEV_RET_DFFLUSH_REQUIRED, +- SEV_RET_INVALID_GUEST, +- SEV_RET_INVALID_COMMAND, +- SEV_RET_ACTIVE, +- SEV_RET_HWSEV_RET_PLATFORM, +- SEV_RET_HWSEV_RET_UNSAFE, +- SEV_RET_UNSUPPORTED, +- SEV_RET_INVALID_PARAM, +- SEV_RET_RESOURCE_LIMIT, +- SEV_RET_SECURE_DATA_INVALID, ++ SEV_RET_INVALID_LEN = 0x0004, ++ SEV_RET_ALREADY_OWNED = 0x0005, ++ SEV_RET_INVALID_CERTIFICATE = 0x0006, ++ SEV_RET_POLICY_FAILURE = 0x0007, ++ SEV_RET_INACTIVE = 0x0008, ++ SEV_RET_INVALID_ADDRESS = 0x0009, ++ SEV_RET_BAD_SIGNATURE = 0x000A, ++ SEV_RET_BAD_MEASUREMENT = 0x000B, ++ SEV_RET_ASID_OWNED = 0x000C, ++ SEV_RET_INVALID_ASID = 0x000D, ++ SEV_RET_WBINVD_REQUIRED = 0x000E, ++ SEV_RET_DFFLUSH_REQUIRED = 0x000F, ++ SEV_RET_INVALID_GUEST = 0x0010, ++ SEV_RET_INVALID_COMMAND = 0x0011, ++ SEV_RET_ACTIVE = 0x0012, ++ SEV_RET_HWSEV_RET_PLATFORM = 0x0013, ++ SEV_RET_HWSEV_RET_UNSAFE = 0x0014, ++ SEV_RET_UNSUPPORTED = 0x0015, ++ SEV_RET_INVALID_PARAM = 0x0016, ++ SEV_RET_RESOURCE_LIMIT = 0x0017, ++ SEV_RET_SECURE_DATA_INVALID = 0x0018, + SEV_RET_INVALID_PAGE_SIZE = 0x0019, + SEV_RET_INVALID_PAGE_STATE = 0x001A, + SEV_RET_INVALID_MDATA_ENTRY = 0x001B, +@@ -87,6 +87,22 @@ typedef enum { + SEV_RET_RESTORE_REQUIRED = 0x0025, + SEV_RET_RMP_INITIALIZATION_FAILED = 0x0026, + SEV_RET_INVALID_KEY = 0x0027, ++ SEV_RET_SHUTDOWN_INCOMPLETE = 0x0028, ++ SEV_RET_INCORRECT_BUFFER_LENGTH = 0x0030, ++ SEV_RET_EXPAND_BUFFER_LENGTH_REQUEST = 0x0031, ++ SEV_RET_SPDM_REQUEST = 0x0032, ++ SEV_RET_SPDM_ERROR = 0x0033, ++ SEV_RET_SEV_STATUS_ERR_IN_DEV_CONN = 0x0035, ++ SEV_RET_SEV_STATUS_INVALID_DEV_CTX = 0x0036, ++ SEV_RET_SEV_STATUS_INVALID_TDI_CTX = 0x0037, ++ SEV_RET_SEV_STATUS_INVALID_TDI = 0x0038, ++ SEV_RET_SEV_STATUS_RECLAIM_REQUIRED = 0x0039, ++ SEV_RET_IN_USE = 0x003A, ++ SEV_RET_SEV_STATUS_INVALID_DEV_STATE = 0x003B, ++ SEV_RET_SEV_STATUS_INVALID_TDI_STATE = 0x003C, ++ SEV_RET_SEV_STATUS_DEV_CERT_CHANGED = 0x003D, ++ SEV_RET_SEV_STATUS_RESYNC_REQ = 0x003E, ++ SEV_RET_SEV_STATUS_RESPONSE_TOO_LARGE = 0x003F, + SEV_RET_MAX, + } sev_ret_code; + +diff --git a/linux-headers/linux/vfio.h b/linux-headers/linux/vfio.h +index 4d96d1fc12..720edfee7a 100644 +--- a/linux-headers/linux/vfio.h ++++ b/linux-headers/linux/vfio.h +@@ -14,6 +14,7 @@ + + #include + #include ++#include + + #define VFIO_API_VERSION 0 + +@@ -1478,6 +1479,33 @@ struct vfio_device_feature_bus_master { + }; + #define VFIO_DEVICE_FEATURE_BUS_MASTER 10 + ++/** ++ * Upon VFIO_DEVICE_FEATURE_GET create a dma_buf fd for the ++ * regions selected. ++ * ++ * open_flags are the typical flags passed to open(2), eg O_RDWR, O_CLOEXEC, ++ * etc. offset/length specify a slice of the region to create the dmabuf from. ++ * nr_ranges is the total number of (P2P DMA) ranges that comprise the dmabuf. ++ * ++ * flags should be 0. ++ * ++ * Return: The fd number on success, -1 and errno is set on failure. ++ */ ++#define VFIO_DEVICE_FEATURE_DMA_BUF 11 ++ ++struct vfio_region_dma_range { ++ __u64 offset; ++ __u64 length; ++}; ++ ++struct vfio_device_feature_dma_buf { ++ __u32 region_index; ++ __u32 open_flags; ++ __u32 flags; ++ __u32 nr_ranges; ++ struct vfio_region_dma_range dma_ranges[] __counted_by(nr_ranges); ++}; ++ + /* -------- API for Type1 VFIO IOMMU -------- */ + + /** diff --git a/0216-hw-vfio-Add-helper-to-retrieve-device-feature.patch b/0216-hw-vfio-Add-helper-to-retrieve-device-feature.patch new file mode 100644 index 0000000..d426ec1 --- /dev/null +++ b/0216-hw-vfio-Add-helper-to-retrieve-device-feature.patch @@ -0,0 +1,104 @@ +From 057f0f9df41fb0fb3210a4bcdda5864a0a40c751 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Wed, 21 Jan 2026 11:41:10 +0000 +Subject: [PATCH] hw/vfio: Add helper to retrieve device feature +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 49cbf95381 (clegoate/qemu-kvm-centos) + +Add vfio_device_get_feature() as a common helper to retrieve +VFIO device features. + +No functional change intended. + +Reviewed-by: Cédric Le Goater +Signed-off-by: Shameer Kolothum +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Reviewed-by: Michael S. Tsirkin +Link: https://lore.kernel.org/qemu-devel/20260121114111.34045-3-skolothumtho@nvidia.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit de36da106dcfd42ee79779a25713e86500276382) +Signed-off-by: Cédric Le Goater +--- + hw/vfio/container.c | 2 +- + hw/vfio/device.c | 9 +++++++++ + hw/vfio/listener.c | 4 ++-- + include/hw/vfio/vfio-device.h | 3 +++ + 4 files changed, 15 insertions(+), 3 deletions(-) + +diff --git a/hw/vfio/container.c b/hw/vfio/container.c +index cc0367ecc4..1b8569d36a 100644 +--- a/hw/vfio/container.c ++++ b/hw/vfio/container.c +@@ -207,7 +207,7 @@ static int vfio_device_dma_logging_report(VFIODevice *vbasedev, hwaddr iova, + feature->flags = VFIO_DEVICE_FEATURE_GET | + VFIO_DEVICE_FEATURE_DMA_LOGGING_REPORT; + +- return vbasedev->io_ops->device_feature(vbasedev, feature); ++ return vfio_device_get_feature(vbasedev, feature); + } + + static int vfio_container_iommu_query_dirty_bitmap( +diff --git a/hw/vfio/device.c b/hw/vfio/device.c +index 8b63e765ac..330f2598ff 100644 +--- a/hw/vfio/device.c ++++ b/hw/vfio/device.c +@@ -515,6 +515,15 @@ void vfio_device_unprepare(VFIODevice *vbasedev) + vbasedev->bcontainer = NULL; + } + ++int vfio_device_get_feature(VFIODevice *vbasedev, ++ struct vfio_device_feature *feature) ++{ ++ if (!vbasedev->io_ops || !vbasedev->io_ops->device_feature) { ++ return -EINVAL; ++ } ++ return vbasedev->io_ops->device_feature(vbasedev, feature); ++} ++ + /* + * Traditional ioctl() based io + */ +diff --git a/hw/vfio/listener.c b/hw/vfio/listener.c +index 27174bf87c..afcf518f56 100644 +--- a/hw/vfio/listener.c ++++ b/hw/vfio/listener.c +@@ -880,7 +880,7 @@ static void vfio_devices_dma_logging_stop(VFIOContainer *bcontainer) + continue; + } + +- ret = vbasedev->io_ops->device_feature(vbasedev, feature); ++ ret = vfio_device_get_feature(vbasedev, feature); + + if (ret != 0) { + warn_report("%s: Failed to stop DMA logging, err %d (%s)", +@@ -985,7 +985,7 @@ static bool vfio_devices_dma_logging_start(VFIOContainer *bcontainer, + continue; + } + +- ret = vbasedev->io_ops->device_feature(vbasedev, feature); ++ ret = vfio_device_get_feature(vbasedev, feature); + if (ret) { + error_setg_errno(errp, -ret, "%s: Failed to start DMA logging", + vbasedev->name); +diff --git a/include/hw/vfio/vfio-device.h b/include/hw/vfio/vfio-device.h +index dac305fc6f..fc28f580ba 100644 +--- a/include/hw/vfio/vfio-device.h ++++ b/include/hw/vfio/vfio-device.h +@@ -258,6 +258,9 @@ void vfio_device_prepare(VFIODevice *vbasedev, VFIOContainer *bcontainer, + + void vfio_device_unprepare(VFIODevice *vbasedev); + ++int vfio_device_get_feature(VFIODevice *vbasedev, ++ struct vfio_device_feature *feature); ++ + int vfio_device_get_region_info(VFIODevice *vbasedev, int index, + struct vfio_region_info **info); + int vfio_device_get_region_info_type(VFIODevice *vbasedev, uint32_t type, diff --git a/0217-hw-vfio-region-Create-dmabuf-for-PCI-BAR-per-region.patch b/0217-hw-vfio-region-Create-dmabuf-for-PCI-BAR-per-region.patch new file mode 100644 index 0000000..a4e76da --- /dev/null +++ b/0217-hw-vfio-region-Create-dmabuf-for-PCI-BAR-per-region.patch @@ -0,0 +1,148 @@ +From ee14e9b290126ff70c0145d3c4cf7fca7e675559 Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Wed, 21 Jan 2026 11:41:11 +0000 +Subject: [PATCH] hw/vfio/region: Create dmabuf for PCI BAR per region +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Cédric Le Goater +RH-MergeRequest: 458: Add DMABUF support +RH-Jira: VOYAGER-19 VOYAGER-53 +RH-Acked-by: Eric Auger +RH-Commit: [1/101] 91c0a17d0c (clegoate/qemu-kvm-centos) + +Linux now provides a VFIO dmabuf exporter to expose PCI BAR memory for P2P +use cases. Create a dmabuf for each mapped BAR region after the mmap is set +up, and store the returned fd in the region’s RAMBlock. This allows QEMU to +pass the fd to dma_map_file(), enabling iommufd to import the dmabuf and map +the BAR correctly in the host IOMMU page table. + +If the kernel lacks support or dmabuf setup fails, QEMU skips the setup +and continues with normal mmap handling. + +Tested-by: Nicolin Chen +Reviewed-by: Zhenzhong Duan +Reviewed-by: Cédric Le Goater +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Reviewed-by: Michael S. Tsirkin +Link: https://lore.kernel.org/qemu-devel/20260121114111.34045-4-skolothumtho@nvidia.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit 8cfaf22668c7a9ed79f8b8f0910a2f69b4cfaae6) +Signed-off-by: Cédric Le Goater +--- + hw/vfio/region.c | 65 +++++++++++++++++++++++++++++++++++++++++++- + hw/vfio/trace-events | 1 + + 2 files changed, 65 insertions(+), 1 deletion(-) + +diff --git a/hw/vfio/region.c b/hw/vfio/region.c +index b165ab0b93..1deaef12fd 100644 +--- a/hw/vfio/region.c ++++ b/hw/vfio/region.c +@@ -29,6 +29,7 @@ + #include "qemu/error-report.h" + #include "qemu/units.h" + #include "monitor/monitor.h" ++#include "system/ramblock.h" + #include "vfio-helpers.h" + + /* +@@ -238,13 +239,71 @@ static void vfio_subregion_unmap(VFIORegion *region, int index) + region->mmaps[index].mmap = NULL; + } + ++static bool vfio_region_create_dma_buf(VFIORegion *region, Error **errp) ++{ ++ g_autofree struct vfio_device_feature *feature = NULL; ++ VFIODevice *vbasedev = region->vbasedev; ++ struct vfio_device_feature_dma_buf *dma_buf; ++ size_t total_size; ++ int i, ret; ++ ++ total_size = sizeof(*feature) + sizeof(*dma_buf) + ++ sizeof(struct vfio_region_dma_range) * region->nr_mmaps; ++ feature = g_malloc0(total_size); ++ *feature = (struct vfio_device_feature) { ++ .argsz = total_size, ++ .flags = VFIO_DEVICE_FEATURE_GET | VFIO_DEVICE_FEATURE_DMA_BUF, ++ }; ++ ++ dma_buf = (void *)feature->data; ++ *dma_buf = (struct vfio_device_feature_dma_buf) { ++ .region_index = region->nr, ++ .open_flags = O_RDWR, ++ .nr_ranges = region->nr_mmaps, ++ }; ++ ++ for (i = 0; i < region->nr_mmaps; i++) { ++ dma_buf->dma_ranges[i].offset = region->mmaps[i].offset; ++ dma_buf->dma_ranges[i].length = region->mmaps[i].size; ++ } ++ ++ ret = vfio_device_get_feature(vbasedev, feature); ++ if (ret < 0) { ++ if (ret == -ENOTTY) { ++ warn_report_once("VFIO dma-buf not supported in kernel: " ++ "PCI BAR IOMMU mappings may fail"); ++ return true; ++ } ++ /* P2P DMA or exposing device memory use cases are not supported. */ ++ error_setg_errno(errp, -ret, "%s: failed to create dma-buf: " ++ "PCI BAR IOMMU mappings may fail", ++ memory_region_name(region->mem)); ++ return false; ++ } ++ ++ /* Assign the dmabuf fd to associated RAMBlock */ ++ for (i = 0; i < region->nr_mmaps; i++) { ++ MemoryRegion *mr = ®ion->mmaps[i].mem; ++ RAMBlock *ram_block = mr->ram_block; ++ ++ ram_block->fd = ret; ++ ram_block->fd_offset = region->mmaps[i].offset; ++ trace_vfio_region_dmabuf(region->vbasedev->name, ret, region->nr, ++ memory_region_name(region->mem), ++ region->mmaps[i].offset, ++ region->mmaps[i].size); ++ } ++ return true; ++} ++ + int vfio_region_mmap(VFIORegion *region) + { + int i, ret, prot = 0; ++ Error *local_err = NULL; + char *name; + int fd; + +- if (!region->mem) { ++ if (!region->mem || !region->nr_mmaps) { + return 0; + } + +@@ -305,6 +364,10 @@ int vfio_region_mmap(VFIORegion *region) + region->mmaps[i].size - 1); + } + ++ if (!vfio_region_create_dma_buf(region, &local_err)) { ++ error_report_err(local_err); ++ } ++ + return 0; + + no_mmap: +diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events +index 1e895448cd..592a0349d4 100644 +--- a/hw/vfio/trace-events ++++ b/hw/vfio/trace-events +@@ -117,6 +117,7 @@ vfio_device_put(int fd) "close vdev->fd=%d" + vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)" + vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64 + vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) "Device %s, region %d \"%s\", flags: 0x%lx, offset: 0x%lx, size: 0x%lx" ++vfio_region_dmabuf(const char *dev, int fd, int index, const char *name, unsigned long offset, unsigned long size) "Device %s, dmabuf fd %d region %d \"%s\", offset: 0x%lx, size: 0x%lx" + vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) "Region %s mmaps[%d], [0x%lx - 0x%lx], fault: %d" + vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) "Region %s [0x%lx - 0x%lx]" + vfio_region_exit(const char *name, int index) "Device %s, region %d" diff --git a/0218-backends-iommufd-Introduce-iommufd_backend_alloc_vio.patch b/0218-backends-iommufd-Introduce-iommufd_backend_alloc_vio.patch new file mode 100644 index 0000000..24a61ec --- /dev/null +++ b/0218-backends-iommufd-Introduce-iommufd_backend_alloc_vio.patch @@ -0,0 +1,115 @@ +From e3e1c8e8896c3c9602804e30916e886d1259828e Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 26 Jan 2026 10:42:58 +0000 +Subject: [PATCH] backends/iommufd: Introduce iommufd_backend_alloc_viommu +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 3d892d0c72 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Add a helper to allocate a viommu object. + +Also introduce a struct IOMMUFDViommu that can be used later by vendor +IOMMU implementations. + +Signed-off-by: Nicolin Chen +Reviewed-by: Eric Auger +Reviewed-by: Jonathan Cameron +Signed-off-by: Shameer Kolothum +Tested-by: Zhangfei Gao +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 2e381281ff7a6b228ef4b912eedc1696fa2b8b54) +Signed-off-by: Eric Auger +--- + backends/iommufd.c | 26 ++++++++++++++++++++++++++ + backends/trace-events | 1 + + include/system/iommufd.h | 14 ++++++++++++++ + 3 files changed, 41 insertions(+) + +diff --git a/backends/iommufd.c b/backends/iommufd.c +index fdfb7c9d67..3d4a4ae736 100644 +--- a/backends/iommufd.c ++++ b/backends/iommufd.c +@@ -446,6 +446,32 @@ bool iommufd_backend_invalidate_cache(IOMMUFDBackend *be, uint32_t id, + return !ret; + } + ++bool iommufd_backend_alloc_viommu(IOMMUFDBackend *be, uint32_t dev_id, ++ uint32_t viommu_type, uint32_t hwpt_id, ++ uint32_t *out_viommu_id, Error **errp) ++{ ++ int ret; ++ struct iommu_viommu_alloc alloc_viommu = { ++ .size = sizeof(alloc_viommu), ++ .type = viommu_type, ++ .dev_id = dev_id, ++ .hwpt_id = hwpt_id, ++ }; ++ ++ ret = ioctl(be->fd, IOMMU_VIOMMU_ALLOC, &alloc_viommu); ++ ++ trace_iommufd_backend_alloc_viommu(be->fd, dev_id, viommu_type, hwpt_id, ++ alloc_viommu.out_viommu_id, ret); ++ if (ret) { ++ error_setg_errno(errp, errno, "IOMMU_VIOMMU_ALLOC failed"); ++ return false; ++ } ++ ++ g_assert(out_viommu_id); ++ *out_viommu_id = alloc_viommu.out_viommu_id; ++ return true; ++} ++ + bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *idev, + uint32_t hwpt_id, Error **errp) + { +diff --git a/backends/trace-events b/backends/trace-events +index 56132d3fd2..01c2d9bde9 100644 +--- a/backends/trace-events ++++ b/backends/trace-events +@@ -21,3 +21,4 @@ iommufd_backend_free_id(int iommufd, uint32_t id, int ret) " iommufd=%d id=%d (% + iommufd_backend_set_dirty(int iommufd, uint32_t hwpt_id, bool start, int ret) " iommufd=%d hwpt=%u enable=%d (%d)" + iommufd_backend_get_dirty_bitmap(int iommufd, uint32_t hwpt_id, uint64_t iova, uint64_t size, uint64_t page_size, int ret) " iommufd=%d hwpt=%u iova=0x%"PRIx64" size=0x%"PRIx64" page_size=0x%"PRIx64" (%d)" + iommufd_backend_invalidate_cache(int iommufd, uint32_t id, uint32_t data_type, uint32_t entry_len, uint32_t entry_num, uint32_t done_num, uint64_t data_ptr, int ret) " iommufd=%d id=%u data_type=%u entry_len=%u entry_num=%u done_num=%u data_ptr=0x%"PRIx64" (%d)" ++iommufd_backend_alloc_viommu(int iommufd, uint32_t dev_id, uint32_t type, uint32_t hwpt_id, uint32_t viommu_id, int ret) " iommufd=%d type=%u dev_id=%u hwpt_id=%u viommu_id=%u (%d)" +diff --git a/include/system/iommufd.h b/include/system/iommufd.h +index a659f36a20..11b8413c3f 100644 +--- a/include/system/iommufd.h ++++ b/include/system/iommufd.h +@@ -38,6 +38,16 @@ struct IOMMUFDBackend { + /*< public >*/ + }; + ++/* ++ * Virtual IOMMU object that represents physical IOMMU's virtualization ++ * support ++ */ ++typedef struct IOMMUFDViommu { ++ IOMMUFDBackend *iommufd; ++ uint32_t s2_hwpt_id; /* ID of stage 2 HWPT */ ++ uint32_t viommu_id; /* virtual IOMMU ID of allocated object */ ++} IOMMUFDViommu; ++ + bool iommufd_backend_connect(IOMMUFDBackend *be, Error **errp); + void iommufd_backend_disconnect(IOMMUFDBackend *be); + +@@ -59,6 +69,10 @@ bool iommufd_backend_alloc_hwpt(IOMMUFDBackend *be, uint32_t dev_id, + uint32_t data_type, uint32_t data_len, + void *data_ptr, uint32_t *out_hwpt, + Error **errp); ++bool iommufd_backend_alloc_viommu(IOMMUFDBackend *be, uint32_t dev_id, ++ uint32_t viommu_type, uint32_t hwpt_id, ++ uint32_t *out_hwpt, Error **errp); ++ + bool iommufd_backend_set_dirty_tracking(IOMMUFDBackend *be, uint32_t hwpt_id, + bool start, Error **errp); + bool iommufd_backend_get_dirty_bitmap(IOMMUFDBackend *be, uint32_t hwpt_id, diff --git a/0219-backends-iommufd-Introduce-iommufd_backend_alloc_vde.patch b/0219-backends-iommufd-Introduce-iommufd_backend_alloc_vde.patch new file mode 100644 index 0000000..8e382c5 --- /dev/null +++ b/0219-backends-iommufd-Introduce-iommufd_backend_alloc_vde.patch @@ -0,0 +1,115 @@ +From 61e0e5d6a9779df58850dc805c92c52079dabd1f Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 26 Jan 2026 10:42:59 +0000 +Subject: [PATCH] backends/iommufd: Introduce iommufd_backend_alloc_vdev +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 20eaea0ee7 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Add a helper to allocate an iommufd device's virtual device (in the user +space) per a viommu instance. + +While at it, introduce a struct IOMMUFDVdev for later use by vendor +IOMMU implementations. + +Signed-off-by: Nicolin Chen +Reviewed-by: Eric Auger +Signed-off-by: Shameer Kolothum +Reviewed-by: Jonathan Cameron +Tested-by: Zhangfei Gao +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 9db560e84df54d70c3e47c7d604c1d17df3ca879) +Signed-off-by: Eric Auger +--- + backends/iommufd.c | 27 +++++++++++++++++++++++++++ + backends/trace-events | 1 + + include/system/iommufd.h | 12 ++++++++++++ + 3 files changed, 40 insertions(+) + +diff --git a/backends/iommufd.c b/backends/iommufd.c +index 3d4a4ae736..e68a2c934f 100644 +--- a/backends/iommufd.c ++++ b/backends/iommufd.c +@@ -472,6 +472,33 @@ bool iommufd_backend_alloc_viommu(IOMMUFDBackend *be, uint32_t dev_id, + return true; + } + ++bool iommufd_backend_alloc_vdev(IOMMUFDBackend *be, uint32_t dev_id, ++ uint32_t viommu_id, uint64_t virt_id, ++ uint32_t *out_vdev_id, Error **errp) ++{ ++ int ret; ++ struct iommu_vdevice_alloc alloc_vdev = { ++ .size = sizeof(alloc_vdev), ++ .viommu_id = viommu_id, ++ .dev_id = dev_id, ++ .virt_id = virt_id, ++ }; ++ ++ ret = ioctl(be->fd, IOMMU_VDEVICE_ALLOC, &alloc_vdev); ++ ++ trace_iommufd_backend_alloc_vdev(be->fd, dev_id, viommu_id, virt_id, ++ alloc_vdev.out_vdevice_id, ret); ++ ++ if (ret) { ++ error_setg_errno(errp, errno, "IOMMU_VDEVICE_ALLOC failed"); ++ return false; ++ } ++ ++ g_assert(out_vdev_id); ++ *out_vdev_id = alloc_vdev.out_vdevice_id; ++ return true; ++} ++ + bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *idev, + uint32_t hwpt_id, Error **errp) + { +diff --git a/backends/trace-events b/backends/trace-events +index 01c2d9bde9..8408dc8701 100644 +--- a/backends/trace-events ++++ b/backends/trace-events +@@ -22,3 +22,4 @@ iommufd_backend_set_dirty(int iommufd, uint32_t hwpt_id, bool start, int ret) " + iommufd_backend_get_dirty_bitmap(int iommufd, uint32_t hwpt_id, uint64_t iova, uint64_t size, uint64_t page_size, int ret) " iommufd=%d hwpt=%u iova=0x%"PRIx64" size=0x%"PRIx64" page_size=0x%"PRIx64" (%d)" + iommufd_backend_invalidate_cache(int iommufd, uint32_t id, uint32_t data_type, uint32_t entry_len, uint32_t entry_num, uint32_t done_num, uint64_t data_ptr, int ret) " iommufd=%d id=%u data_type=%u entry_len=%u entry_num=%u done_num=%u data_ptr=0x%"PRIx64" (%d)" + iommufd_backend_alloc_viommu(int iommufd, uint32_t dev_id, uint32_t type, uint32_t hwpt_id, uint32_t viommu_id, int ret) " iommufd=%d type=%u dev_id=%u hwpt_id=%u viommu_id=%u (%d)" ++iommufd_backend_alloc_vdev(int iommufd, uint32_t dev_id, uint32_t viommu_id, uint64_t virt_id, uint32_t vdev_id, int ret) " iommufd=%d dev_id=%u viommu_id=%u virt_id=0x%"PRIx64" vdev_id=%u (%d)" +diff --git a/include/system/iommufd.h b/include/system/iommufd.h +index 11b8413c3f..41e216c677 100644 +--- a/include/system/iommufd.h ++++ b/include/system/iommufd.h +@@ -48,6 +48,14 @@ typedef struct IOMMUFDViommu { + uint32_t viommu_id; /* virtual IOMMU ID of allocated object */ + } IOMMUFDViommu; + ++/* ++ * Virtual device object for a physical device bind to a vIOMMU. ++ */ ++typedef struct IOMMUFDVdev { ++ uint32_t vdevice_id; /* object handle for vDevice */ ++ uint32_t virt_id; /* virtual device ID */ ++} IOMMUFDVdev; ++ + bool iommufd_backend_connect(IOMMUFDBackend *be, Error **errp); + void iommufd_backend_disconnect(IOMMUFDBackend *be); + +@@ -73,6 +81,10 @@ bool iommufd_backend_alloc_viommu(IOMMUFDBackend *be, uint32_t dev_id, + uint32_t viommu_type, uint32_t hwpt_id, + uint32_t *out_hwpt, Error **errp); + ++bool iommufd_backend_alloc_vdev(IOMMUFDBackend *be, uint32_t dev_id, ++ uint32_t viommu_id, uint64_t virt_id, ++ uint32_t *out_vdev_id, Error **errp); ++ + bool iommufd_backend_set_dirty_tracking(IOMMUFDBackend *be, uint32_t hwpt_id, + bool start, Error **errp); + bool iommufd_backend_get_dirty_bitmap(IOMMUFDBackend *be, uint32_t hwpt_id, diff --git a/0220-hw-arm-smmu-common-Factor-out-common-helper-function.patch b/0220-hw-arm-smmu-common-Factor-out-common-helper-function.patch new file mode 100644 index 0000000..1ad742e --- /dev/null +++ b/0220-hw-arm-smmu-common-Factor-out-common-helper-function.patch @@ -0,0 +1,119 @@ +From 1c1dc6cc6f48485961dcf634f43c29c3f12085c3 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:00 +0000 +Subject: [PATCH] hw/arm/smmu-common: Factor out common helper functions and + export +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] e115103fd1 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Factor out common helper functions and export. Subsequent patches for +smmuv3 accel support will make use of this. + +Signed-off-by: Nicolin Chen +Reviewed-by: Eric Auger +Signed-off-by: Shameer Kolothum +Reviewed-by: Jonathan Cameron +Tested-by: Zhangfei Gao +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 910c1f2e3b2ff008a061609e5a23a6a0910ecb2b) +Signed-off-by: Eric Auger +--- + hw/arm/smmu-common.c | 44 +++++++++++++++++++++--------------- + include/hw/arm/smmu-common.h | 6 +++++ + 2 files changed, 32 insertions(+), 18 deletions(-) + +diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c +index 62a7612184..59d6147ec9 100644 +--- a/hw/arm/smmu-common.c ++++ b/hw/arm/smmu-common.c +@@ -847,12 +847,24 @@ SMMUPciBus *smmu_find_smmu_pcibus(SMMUState *s, uint8_t bus_num) + return NULL; + } + +-static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn) ++void smmu_init_sdev(SMMUState *s, SMMUDevice *sdev, PCIBus *bus, int devfn) + { +- SMMUState *s = opaque; +- SMMUPciBus *sbus = g_hash_table_lookup(s->smmu_pcibus_by_busptr, bus); +- SMMUDevice *sdev; + static unsigned int index; ++ g_autofree char *name = g_strdup_printf("%s-%d-%d", s->mrtypename, devfn, ++ index++); ++ sdev->smmu = s; ++ sdev->bus = bus; ++ sdev->devfn = devfn; ++ ++ memory_region_init_iommu(&sdev->iommu, sizeof(sdev->iommu), ++ s->mrtypename, OBJECT(s), name, UINT64_MAX); ++ address_space_init(&sdev->as, MEMORY_REGION(&sdev->iommu), name); ++ trace_smmu_add_mr(name); ++} ++ ++SMMUPciBus *smmu_get_sbus(SMMUState *s, PCIBus *bus) ++{ ++ SMMUPciBus *sbus = g_hash_table_lookup(s->smmu_pcibus_by_busptr, bus); + + if (!sbus) { + sbus = g_malloc0(sizeof(SMMUPciBus) + +@@ -861,23 +873,19 @@ static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn) + g_hash_table_insert(s->smmu_pcibus_by_busptr, bus, sbus); + } + ++ return sbus; ++} ++ ++static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn) ++{ ++ SMMUState *s = opaque; ++ SMMUPciBus *sbus = smmu_get_sbus(s, bus); ++ SMMUDevice *sdev; ++ + sdev = sbus->pbdev[devfn]; + if (!sdev) { +- char *name = g_strdup_printf("%s-%d-%d", s->mrtypename, devfn, index++); +- + sdev = sbus->pbdev[devfn] = g_new0(SMMUDevice, 1); +- +- sdev->smmu = s; +- sdev->bus = bus; +- sdev->devfn = devfn; +- +- memory_region_init_iommu(&sdev->iommu, sizeof(sdev->iommu), +- s->mrtypename, +- OBJECT(s), name, UINT64_MAX); +- address_space_init(&sdev->as, +- MEMORY_REGION(&sdev->iommu), name); +- trace_smmu_add_mr(name); +- g_free(name); ++ smmu_init_sdev(s, sdev, bus, devfn); + } + + return &sdev->as; +diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h +index 80d0fecfde..d307ddd952 100644 +--- a/include/hw/arm/smmu-common.h ++++ b/include/hw/arm/smmu-common.h +@@ -180,6 +180,12 @@ OBJECT_DECLARE_TYPE(SMMUState, SMMUBaseClass, ARM_SMMU) + /* Return the SMMUPciBus handle associated to a PCI bus number */ + SMMUPciBus *smmu_find_smmu_pcibus(SMMUState *s, uint8_t bus_num); + ++/* Return the SMMUPciBus handle associated to a PCI bus */ ++SMMUPciBus *smmu_get_sbus(SMMUState *s, PCIBus *bus); ++ ++/* Initialize SMMUDevice handle associated to a SMMUPciBus */ ++void smmu_init_sdev(SMMUState *s, SMMUDevice *sdev, PCIBus *bus, int devfn); ++ + /* Return the stream ID of an SMMU device */ + static inline uint16_t smmu_get_sid(SMMUDevice *sdev) + { diff --git a/0221-hw-arm-smmu-add-memory-regions-as-property-for-an-SM.patch b/0221-hw-arm-smmu-add-memory-regions-as-property-for-an-SM.patch new file mode 100644 index 0000000..531ad02 --- /dev/null +++ b/0221-hw-arm-smmu-add-memory-regions-as-property-for-an-SM.patch @@ -0,0 +1,207 @@ +From fb2daa590ab6682e885d34a9aee3a9774985d1d1 Mon Sep 17 00:00:00 2001 +From: Pierrick Bouvier +Date: Thu, 15 Jan 2026 15:26:30 +0000 +Subject: [PATCH] hw/arm/smmu: add memory regions as property for an SMMU + instance +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 0161722a98 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +This will be used to access non-secure and secure memory. Secure support +and Granule Protection Check (for RME) for SMMU need to access secure +memory. + +As well, it allows to remove usage of global address_space_memory, +allowing different SMMU instances to have a specific view of memory. + +User creatable SMMU are handled as well for virt machine, +by setting the memory properties when device is plugged in. + +Reviewed-by: Philippe Mathieu-Daudé +Signed-off-by: Pierrick Bouvier +Reviewed-by: Eric Auger +Message-id: 20260108210453.2280733-1-pierrick.bouvier@linaro.org +Signed-off-by: Peter Maydell +(cherry picked from commit 53b54a82520f23da2be49cc0d69210a086fc7072) +Signed-off-by: Eric Auger +--- + hw/arm/sbsa-ref.c | 16 ++++++++++++---- + hw/arm/smmu-common.c | 11 +++++++++++ + hw/arm/virt.c | 13 +++++++++++-- + include/hw/arm/smmu-common.h | 4 ++++ + include/hw/arm/virt.h | 2 ++ + 5 files changed, 40 insertions(+), 6 deletions(-) + +diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c +index 15c1ff4b14..48c2054be0 100644 +--- a/hw/arm/sbsa-ref.c ++++ b/hw/arm/sbsa-ref.c +@@ -611,7 +611,9 @@ static void create_xhci(const SBSAMachineState *sms) + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(sms->gic, irq)); + } + +-static void create_smmu(const SBSAMachineState *sms, PCIBus *bus) ++static void create_smmu(const SBSAMachineState *sms, PCIBus *bus, ++ MemoryRegion *sysmem, ++ MemoryRegion *secure_sysmem) + { + hwaddr base = sbsa_ref_memmap[SBSA_SMMU].base; + int irq = sbsa_ref_irqmap[SBSA_SMMU]; +@@ -623,6 +625,10 @@ static void create_smmu(const SBSAMachineState *sms, PCIBus *bus) + object_property_set_str(OBJECT(dev), "stage", "nested", &error_abort); + object_property_set_link(OBJECT(dev), "primary-bus", OBJECT(bus), + &error_abort); ++ object_property_set_link(OBJECT(dev), "memory", OBJECT(sysmem), ++ &error_abort); ++ object_property_set_link(OBJECT(dev), "secure-memory", OBJECT(secure_sysmem), ++ &error_abort); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); + for (i = 0; i < NUM_SMMU_IRQS; i++) { +@@ -631,7 +637,9 @@ static void create_smmu(const SBSAMachineState *sms, PCIBus *bus) + } + } + +-static void create_pcie(SBSAMachineState *sms) ++static void create_pcie(SBSAMachineState *sms, ++ MemoryRegion *sysmem, ++ MemoryRegion *secure_sysmem) + { + hwaddr base_ecam = sbsa_ref_memmap[SBSA_PCIE_ECAM].base; + hwaddr size_ecam = sbsa_ref_memmap[SBSA_PCIE_ECAM].size; +@@ -687,7 +695,7 @@ static void create_pcie(SBSAMachineState *sms) + + pci_create_simple(pci->bus, -1, "bochs-display"); + +- create_smmu(sms, pci->bus); ++ create_smmu(sms, pci->bus, sysmem, secure_sysmem); + } + + static void *sbsa_ref_dtb(const struct arm_boot_info *binfo, int *fdt_size) +@@ -823,7 +831,7 @@ static void sbsa_ref_init(MachineState *machine) + + create_xhci(sms); + +- create_pcie(sms); ++ create_pcie(sms, sysmem, secure_sysmem); + + create_secure_ec(secure_sysmem); + +diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c +index 59d6147ec9..75d840e389 100644 +--- a/hw/arm/smmu-common.c ++++ b/hw/arm/smmu-common.c +@@ -952,6 +952,13 @@ static void smmu_base_realize(DeviceState *dev, Error **errp) + return; + } + ++ g_assert(s->memory); ++ address_space_init(&s->memory_as, s->memory, "smmu-memory-view"); ++ if (s->secure_memory) { ++ address_space_init(&s->secure_memory_as, s->secure_memory, ++ "smmu-secure-memory-view"); ++ } ++ + /* + * We only allow default PCIe Root Complex(pcie.0) or pxb-pcie based extra + * root complexes to be associated with SMMU. +@@ -1002,6 +1009,10 @@ static const Property smmu_dev_properties[] = { + DEFINE_PROP_BOOL("smmu_per_bus", SMMUState, smmu_per_bus, false), + DEFINE_PROP_LINK("primary-bus", SMMUState, primary_bus, + TYPE_PCI_BUS, PCIBus *), ++ DEFINE_PROP_LINK("memory", SMMUState, memory, ++ TYPE_MEMORY_REGION, MemoryRegion *), ++ DEFINE_PROP_LINK("secure-memory", SMMUState, secure_memory, ++ TYPE_MEMORY_REGION, MemoryRegion *), + }; + + static void smmu_base_class_init(ObjectClass *klass, const void *data) +diff --git a/hw/arm/virt.c b/hw/arm/virt.c +index 5f871e7a8f..97788c0822 100644 +--- a/hw/arm/virt.c ++++ b/hw/arm/virt.c +@@ -1534,8 +1534,7 @@ static void create_smmuv3_dev_dtb(VirtMachineState *vms, + 0x0, vms->iommu_phandle, 0x0, 0x10000); + } + +-static void create_smmu(const VirtMachineState *vms, +- PCIBus *bus) ++static void create_smmu(const VirtMachineState *vms, PCIBus *bus) + { + VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); + int irq = vms->irqmap[VIRT_SMMU]; +@@ -1555,6 +1554,10 @@ static void create_smmu(const VirtMachineState *vms, + } + object_property_set_link(OBJECT(dev), "primary-bus", OBJECT(bus), + &error_abort); ++ object_property_set_link(OBJECT(dev), "memory", OBJECT(vms->sysmem), ++ &error_abort); ++ object_property_set_link(OBJECT(dev), "secure-memory", OBJECT(vms->secure_sysmem), ++ &error_abort); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); + for (i = 0; i < NUM_SMMU_IRQS; i++) { +@@ -1629,6 +1632,7 @@ static void create_pcie(VirtMachineState *vms) + memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", + ecam_reg, 0, size_ecam); + memory_region_add_subregion(get_system_memory(), base_ecam, ecam_alias); ++ vms->sysmem = get_system_memory(); + + /* Map the MMIO window into system address space so as to expose + * the section of PCI MMIO space which starts at the same base address +@@ -2287,6 +2291,7 @@ static void machvirt_init(MachineState *machine) + * devices go in at higher priority and take precedence. + */ + secure_sysmem = g_new(MemoryRegion, 1); ++ vms->secure_sysmem = secure_sysmem; + memory_region_init(secure_sysmem, OBJECT(machine), "secure-memory", + UINT64_MAX); + memory_region_add_subregion_overlap(secure_sysmem, 0, sysmem, -1); +@@ -3090,6 +3095,10 @@ static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, + } else if (vms->iommu == VIRT_IOMMU_NONE) { + /* The new SMMUv3 device is specific to the PCI bus */ + object_property_set_bool(OBJECT(dev), "smmu_per_bus", true, NULL); ++ object_property_set_link(OBJECT(dev), "memory", ++ OBJECT(vms->sysmem), NULL); ++ object_property_set_link(OBJECT(dev), "secure-memory", ++ OBJECT(vms->secure_sysmem), NULL); + } + } + } +diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h +index d307ddd952..e626c6c567 100644 +--- a/include/hw/arm/smmu-common.h ++++ b/include/hw/arm/smmu-common.h +@@ -162,6 +162,10 @@ struct SMMUState { + uint8_t bus_num; + PCIBus *primary_bus; + bool smmu_per_bus; /* SMMU is specific to the primary_bus */ ++ MemoryRegion *memory; ++ AddressSpace memory_as; ++ MemoryRegion *secure_memory; ++ AddressSpace secure_memory_as; + }; + + struct SMMUBaseClass { +diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h +index 98b877c8b9..8d90b66b87 100644 +--- a/include/hw/arm/virt.h ++++ b/include/hw/arm/virt.h +@@ -181,6 +181,8 @@ struct VirtMachineState { + bool ns_el2_virt_timer_irq; + CXLState cxl_devices_state; + bool legacy_smmuv3_present; ++ MemoryRegion *sysmem; ++ MemoryRegion *secure_sysmem; + }; + + #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) diff --git a/0222-hw-arm-smmuv3-Extract-common-definitions-to-smmuv3-c.patch b/0222-hw-arm-smmuv3-Extract-common-definitions-to-smmuv3-c.patch new file mode 100644 index 0000000..53dd0dc --- /dev/null +++ b/0222-hw-arm-smmuv3-Extract-common-definitions-to-smmuv3-c.patch @@ -0,0 +1,607 @@ +From eda368a5f79e0d0a6ea5d884a3374ee28063b181 Mon Sep 17 00:00:00 2001 +From: Tao Tang +Date: Sun, 21 Dec 2025 11:25:01 +0800 +Subject: [PATCH] hw/arm/smmuv3: Extract common definitions to smmuv3-common.h +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 247747d499 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Move register definitions, command enums, and Stream Table Entry (STE) / +Context Descriptor (CD) structure definitions from the internal header +hw/arm/smmuv3-internal.h to a new common header +include/hw/arm/smmuv3-common.h. + +This allows other components, such as generic SMMUv3 tests or test devices, +to utilize these definitions without including the specific SMMUv3 device +internal state. + +Signed-off-by: Tao Tang +Reviewed-by: Pierrick Bouvier +Reviewed-by: Eric Auger +Message-ID: <20260119161112.3841386-2-tangtao1634@phytium.com.cn> +Signed-off-by: Philippe Mathieu-Daudé +(cherry picked from commit 81ee3206f05797aeeae4baa0cecae44e5fad5d64) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-internal.h | 255 +------------------------------ + include/hw/arm/smmuv3-common.h | 268 +++++++++++++++++++++++++++++++++ + 2 files changed, 269 insertions(+), 254 deletions(-) + create mode 100644 include/hw/arm/smmuv3-common.h + +diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h +index b6b7399347..8679ab6d09 100644 +--- a/hw/arm/smmuv3-internal.h ++++ b/hw/arm/smmuv3-internal.h +@@ -23,6 +23,7 @@ + + #include "hw/registerfields.h" + #include "hw/arm/smmu-common.h" ++#include "hw/arm/smmuv3-common.h" + + typedef enum SMMUTranslationStatus { + SMMU_TRANS_DISABLE, +@@ -38,147 +39,6 @@ typedef enum SMMUTranslationClass { + SMMU_CLASS_IN, + } SMMUTranslationClass; + +-/* MMIO Registers */ +- +-REG32(IDR0, 0x0) +- FIELD(IDR0, S2P, 0 , 1) +- FIELD(IDR0, S1P, 1 , 1) +- FIELD(IDR0, TTF, 2 , 2) +- FIELD(IDR0, COHACC, 4 , 1) +- FIELD(IDR0, BTM, 5 , 1) +- FIELD(IDR0, HTTU, 6 , 2) +- FIELD(IDR0, DORMHINT, 8 , 1) +- FIELD(IDR0, HYP, 9 , 1) +- FIELD(IDR0, ATS, 10, 1) +- FIELD(IDR0, NS1ATS, 11, 1) +- FIELD(IDR0, ASID16, 12, 1) +- FIELD(IDR0, MSI, 13, 1) +- FIELD(IDR0, SEV, 14, 1) +- FIELD(IDR0, ATOS, 15, 1) +- FIELD(IDR0, PRI, 16, 1) +- FIELD(IDR0, VMW, 17, 1) +- FIELD(IDR0, VMID16, 18, 1) +- FIELD(IDR0, CD2L, 19, 1) +- FIELD(IDR0, VATOS, 20, 1) +- FIELD(IDR0, TTENDIAN, 21, 2) +- FIELD(IDR0, ATSRECERR, 23, 1) +- FIELD(IDR0, STALL_MODEL, 24, 2) +- FIELD(IDR0, TERM_MODEL, 26, 1) +- FIELD(IDR0, STLEVEL, 27, 2) +- FIELD(IDR0, RME_IMPL, 30, 1) +- +-REG32(IDR1, 0x4) +- FIELD(IDR1, SIDSIZE, 0 , 6) +- FIELD(IDR1, SSIDSIZE, 6 , 5) +- FIELD(IDR1, PRIQS, 11, 5) +- FIELD(IDR1, EVENTQS, 16, 5) +- FIELD(IDR1, CMDQS, 21, 5) +- FIELD(IDR1, ATTR_PERMS_OVR, 26, 1) +- FIELD(IDR1, ATTR_TYPES_OVR, 27, 1) +- FIELD(IDR1, REL, 28, 1) +- FIELD(IDR1, QUEUES_PRESET, 29, 1) +- FIELD(IDR1, TABLES_PRESET, 30, 1) +- FIELD(IDR1, ECMDQ, 31, 1) +- +-#define SMMU_IDR1_SIDSIZE 16 +-#define SMMU_CMDQS 19 +-#define SMMU_EVENTQS 19 +- +-REG32(IDR2, 0x8) +- FIELD(IDR2, BA_VATOS, 0, 10) +- +-REG32(IDR3, 0xc) +- FIELD(IDR3, HAD, 2, 1); +- FIELD(IDR3, PBHA, 3, 1); +- FIELD(IDR3, XNX, 4, 1); +- FIELD(IDR3, PPS, 5, 1); +- FIELD(IDR3, MPAM, 7, 1); +- FIELD(IDR3, FWB, 8, 1); +- FIELD(IDR3, STT, 9, 1); +- FIELD(IDR3, RIL, 10, 1); +- FIELD(IDR3, BBML, 11, 2); +- FIELD(IDR3, E0PD, 13, 1); +- FIELD(IDR3, PTWNNC, 14, 1); +- FIELD(IDR3, DPT, 15, 1); +- +-REG32(IDR4, 0x10) +- +-REG32(IDR5, 0x14) +- FIELD(IDR5, OAS, 0, 3); +- FIELD(IDR5, GRAN4K, 4, 1); +- FIELD(IDR5, GRAN16K, 5, 1); +- FIELD(IDR5, GRAN64K, 6, 1); +- FIELD(IDR5, VAX, 10, 2); +- FIELD(IDR5, STALL_MAX, 16, 16); +- +-#define SMMU_IDR5_OAS 4 +- +-REG32(IIDR, 0x18) +-REG32(AIDR, 0x1c) +-REG32(CR0, 0x20) +- FIELD(CR0, SMMU_ENABLE, 0, 1) +- FIELD(CR0, EVENTQEN, 2, 1) +- FIELD(CR0, CMDQEN, 3, 1) +- +-#define SMMU_CR0_RESERVED 0xFFFFFC20 +- +-REG32(CR0ACK, 0x24) +-REG32(CR1, 0x28) +-REG32(CR2, 0x2c) +-REG32(STATUSR, 0x40) +-REG32(GBPA, 0x44) +- FIELD(GBPA, ABORT, 20, 1) +- FIELD(GBPA, UPDATE, 31, 1) +- +-/* Use incoming. */ +-#define SMMU_GBPA_RESET_VAL 0x1000 +- +-REG32(IRQ_CTRL, 0x50) +- FIELD(IRQ_CTRL, GERROR_IRQEN, 0, 1) +- FIELD(IRQ_CTRL, PRI_IRQEN, 1, 1) +- FIELD(IRQ_CTRL, EVENTQ_IRQEN, 2, 1) +- +-REG32(IRQ_CTRL_ACK, 0x54) +-REG32(GERROR, 0x60) +- FIELD(GERROR, CMDQ_ERR, 0, 1) +- FIELD(GERROR, EVENTQ_ABT_ERR, 2, 1) +- FIELD(GERROR, PRIQ_ABT_ERR, 3, 1) +- FIELD(GERROR, MSI_CMDQ_ABT_ERR, 4, 1) +- FIELD(GERROR, MSI_EVENTQ_ABT_ERR, 5, 1) +- FIELD(GERROR, MSI_PRIQ_ABT_ERR, 6, 1) +- FIELD(GERROR, MSI_GERROR_ABT_ERR, 7, 1) +- FIELD(GERROR, MSI_SFM_ERR, 8, 1) +- +-REG32(GERRORN, 0x64) +- +-#define A_GERROR_IRQ_CFG0 0x68 /* 64b */ +-REG32(GERROR_IRQ_CFG1, 0x70) +-REG32(GERROR_IRQ_CFG2, 0x74) +- +-#define A_STRTAB_BASE 0x80 /* 64b */ +- +-#define SMMU_BASE_ADDR_MASK 0xfffffffffffc0 +- +-REG32(STRTAB_BASE_CFG, 0x88) +- FIELD(STRTAB_BASE_CFG, FMT, 16, 2) +- FIELD(STRTAB_BASE_CFG, SPLIT, 6 , 5) +- FIELD(STRTAB_BASE_CFG, LOG2SIZE, 0 , 6) +- +-#define A_CMDQ_BASE 0x90 /* 64b */ +-REG32(CMDQ_PROD, 0x98) +-REG32(CMDQ_CONS, 0x9c) +- FIELD(CMDQ_CONS, ERR, 24, 7) +- +-#define A_EVENTQ_BASE 0xa0 /* 64b */ +-REG32(EVENTQ_PROD, 0xa8) +-REG32(EVENTQ_CONS, 0xac) +- +-#define A_EVENTQ_IRQ_CFG0 0xb0 /* 64b */ +-REG32(EVENTQ_IRQ_CFG1, 0xb8) +-REG32(EVENTQ_IRQ_CFG2, 0xbc) +- +-#define A_IDREGS 0xfd0 +- + static inline int smmu_enabled(SMMUv3State *s) + { + return FIELD_EX32(s->cr[0], CR0, SMMU_ENABLE); +@@ -272,37 +132,6 @@ static inline void smmu_write_cmdq_err(SMMUv3State *s, uint32_t err_type) + s->cmdq.cons = FIELD_DP32(s->cmdq.cons, CMDQ_CONS, ERR, err_type); + } + +-/* Commands */ +- +-typedef enum SMMUCommandType { +- SMMU_CMD_NONE = 0x00, +- SMMU_CMD_PREFETCH_CONFIG , +- SMMU_CMD_PREFETCH_ADDR, +- SMMU_CMD_CFGI_STE, +- SMMU_CMD_CFGI_STE_RANGE, +- SMMU_CMD_CFGI_CD, +- SMMU_CMD_CFGI_CD_ALL, +- SMMU_CMD_CFGI_ALL, +- SMMU_CMD_TLBI_NH_ALL = 0x10, +- SMMU_CMD_TLBI_NH_ASID, +- SMMU_CMD_TLBI_NH_VA, +- SMMU_CMD_TLBI_NH_VAA, +- SMMU_CMD_TLBI_EL3_ALL = 0x18, +- SMMU_CMD_TLBI_EL3_VA = 0x1a, +- SMMU_CMD_TLBI_EL2_ALL = 0x20, +- SMMU_CMD_TLBI_EL2_ASID, +- SMMU_CMD_TLBI_EL2_VA, +- SMMU_CMD_TLBI_EL2_VAA, +- SMMU_CMD_TLBI_S12_VMALL = 0x28, +- SMMU_CMD_TLBI_S2_IPA = 0x2a, +- SMMU_CMD_TLBI_NSNH_ALL = 0x30, +- SMMU_CMD_ATC_INV = 0x40, +- SMMU_CMD_PRI_RESP, +- SMMU_CMD_RESUME = 0x44, +- SMMU_CMD_STALL_TERM, +- SMMU_CMD_SYNC, +-} SMMUCommandType; +- + static const char *cmd_stringify[] = { + [SMMU_CMD_PREFETCH_CONFIG] = "SMMU_CMD_PREFETCH_CONFIG", + [SMMU_CMD_PREFETCH_ADDR] = "SMMU_CMD_PREFETCH_ADDR", +@@ -525,64 +354,6 @@ typedef struct SMMUEventInfo { + + void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *event); + +-/* Configuration Data */ +- +-/* STE Level 1 Descriptor */ +-typedef struct STEDesc { +- uint32_t word[2]; +-} STEDesc; +- +-/* CD Level 1 Descriptor */ +-typedef struct CDDesc { +- uint32_t word[2]; +-} CDDesc; +- +-/* Stream Table Entry(STE) */ +-typedef struct STE { +- uint32_t word[16]; +-} STE; +- +-/* Context Descriptor(CD) */ +-typedef struct CD { +- uint32_t word[16]; +-} CD; +- +-/* STE fields */ +- +-#define STE_VALID(x) extract32((x)->word[0], 0, 1) +- +-#define STE_CONFIG(x) extract32((x)->word[0], 1, 3) +-#define STE_CFG_S1_ENABLED(config) (config & 0x1) +-#define STE_CFG_S2_ENABLED(config) (config & 0x2) +-#define STE_CFG_ABORT(config) (!(config & 0x4)) +-#define STE_CFG_BYPASS(config) (config == 0x4) +- +-#define STE_S1FMT(x) extract32((x)->word[0], 4 , 2) +-#define STE_S1CDMAX(x) extract32((x)->word[1], 27, 5) +-#define STE_S1STALLD(x) extract32((x)->word[2], 27, 1) +-#define STE_EATS(x) extract32((x)->word[2], 28, 2) +-#define STE_STRW(x) extract32((x)->word[2], 30, 2) +-#define STE_S2VMID(x) extract32((x)->word[4], 0 , 16) +-#define STE_S2T0SZ(x) extract32((x)->word[5], 0 , 6) +-#define STE_S2SL0(x) extract32((x)->word[5], 6 , 2) +-#define STE_S2TG(x) extract32((x)->word[5], 14, 2) +-#define STE_S2PS(x) extract32((x)->word[5], 16, 3) +-#define STE_S2AA64(x) extract32((x)->word[5], 19, 1) +-#define STE_S2ENDI(x) extract32((x)->word[5], 20, 1) +-#define STE_S2AFFD(x) extract32((x)->word[5], 21, 1) +-#define STE_S2HD(x) extract32((x)->word[5], 23, 1) +-#define STE_S2HA(x) extract32((x)->word[5], 24, 1) +-#define STE_S2S(x) extract32((x)->word[5], 25, 1) +-#define STE_S2R(x) extract32((x)->word[5], 26, 1) +- +-#define STE_CTXPTR(x) \ +- ((extract64((x)->word[1], 0, 16) << 32) | \ +- ((x)->word[0] & 0xffffffc0)) +- +-#define STE_S2TTB(x) \ +- ((extract64((x)->word[7], 0, 16) << 32) | \ +- ((x)->word[6] & 0xfffffff0)) +- + static inline int oas2bits(int oas_field) + { + switch (oas_field) { +@@ -603,30 +374,6 @@ static inline int oas2bits(int oas_field) + g_assert_not_reached(); + } + +-/* CD fields */ +- +-#define CD_VALID(x) extract32((x)->word[0], 31, 1) +-#define CD_ASID(x) extract32((x)->word[1], 16, 16) +-#define CD_TTB(x, sel) \ +- ((extract64((x)->word[(sel) * 2 + 3], 0, 19) << 32) | \ +- ((x)->word[(sel) * 2 + 2] & ~0xfULL)) +- +-#define CD_HAD(x, sel) extract32((x)->word[(sel) * 2 + 2], 1, 1) +- +-#define CD_TSZ(x, sel) extract32((x)->word[0], (16 * (sel)) + 0, 6) +-#define CD_TG(x, sel) extract32((x)->word[0], (16 * (sel)) + 6, 2) +-#define CD_EPD(x, sel) extract32((x)->word[0], (16 * (sel)) + 14, 1) +-#define CD_ENDI(x) extract32((x)->word[0], 15, 1) +-#define CD_IPS(x) extract32((x)->word[1], 0 , 3) +-#define CD_AFFD(x) extract32((x)->word[1], 3 , 1) +-#define CD_TBI(x) extract32((x)->word[1], 6 , 2) +-#define CD_HD(x) extract32((x)->word[1], 10 , 1) +-#define CD_HA(x) extract32((x)->word[1], 11 , 1) +-#define CD_S(x) extract32((x)->word[1], 12, 1) +-#define CD_R(x) extract32((x)->word[1], 13, 1) +-#define CD_A(x) extract32((x)->word[1], 14, 1) +-#define CD_AARCH64(x) extract32((x)->word[1], 9 , 1) +- + /** + * tg2granule - Decodes the CD translation granule size field according + * to the ttbr in use +diff --git a/include/hw/arm/smmuv3-common.h b/include/hw/arm/smmuv3-common.h +new file mode 100644 +index 0000000000..9da817f41a +--- /dev/null ++++ b/include/hw/arm/smmuv3-common.h +@@ -0,0 +1,268 @@ ++/* ++ * ARM SMMUv3 support - Common API ++ * ++ * Copyright (C) 2014-2016 Broadcom Corporation ++ * Copyright (c) 2017 Red Hat, Inc. ++ * Written by Prem Mallappa, Eric Auger ++ * ++ * SPDX-License-Identifier: GPL-2.0-or-later ++ */ ++ ++#ifndef HW_ARM_SMMUV3_COMMON_H ++#define HW_ARM_SMMUV3_COMMON_H ++ ++/* Configuration Data */ ++ ++/* STE Level 1 Descriptor */ ++typedef struct STEDesc { ++ uint32_t word[2]; ++} STEDesc; ++ ++/* CD Level 1 Descriptor */ ++typedef struct CDDesc { ++ uint32_t word[2]; ++} CDDesc; ++ ++/* Stream Table Entry(STE) */ ++typedef struct STE { ++ uint32_t word[16]; ++} STE; ++ ++/* Context Descriptor(CD) */ ++typedef struct CD { ++ uint32_t word[16]; ++} CD; ++ ++/* STE fields */ ++ ++#define STE_VALID(x) extract32((x)->word[0], 0, 1) ++ ++#define STE_CONFIG(x) extract32((x)->word[0], 1, 3) ++#define STE_CFG_S1_ENABLED(config) (config & 0x1) ++#define STE_CFG_S2_ENABLED(config) (config & 0x2) ++#define STE_CFG_ABORT(config) (!(config & 0x4)) ++#define STE_CFG_BYPASS(config) (config == 0x4) ++ ++#define STE_S1FMT(x) extract32((x)->word[0], 4 , 2) ++#define STE_S1CDMAX(x) extract32((x)->word[1], 27, 5) ++#define STE_S1STALLD(x) extract32((x)->word[2], 27, 1) ++#define STE_EATS(x) extract32((x)->word[2], 28, 2) ++#define STE_STRW(x) extract32((x)->word[2], 30, 2) ++#define STE_S2VMID(x) extract32((x)->word[4], 0 , 16) ++#define STE_S2T0SZ(x) extract32((x)->word[5], 0 , 6) ++#define STE_S2SL0(x) extract32((x)->word[5], 6 , 2) ++#define STE_S2TG(x) extract32((x)->word[5], 14, 2) ++#define STE_S2PS(x) extract32((x)->word[5], 16, 3) ++#define STE_S2AA64(x) extract32((x)->word[5], 19, 1) ++#define STE_S2ENDI(x) extract32((x)->word[5], 20, 1) ++#define STE_S2AFFD(x) extract32((x)->word[5], 21, 1) ++#define STE_S2HD(x) extract32((x)->word[5], 23, 1) ++#define STE_S2HA(x) extract32((x)->word[5], 24, 1) ++#define STE_S2S(x) extract32((x)->word[5], 25, 1) ++#define STE_S2R(x) extract32((x)->word[5], 26, 1) ++ ++#define STE_CTXPTR(x) \ ++ ((extract64((x)->word[1], 0, 16) << 32) | \ ++ ((x)->word[0] & 0xffffffc0)) ++ ++#define STE_S2TTB(x) \ ++ ((extract64((x)->word[7], 0, 16) << 32) | \ ++ ((x)->word[6] & 0xfffffff0)) ++ ++/* CD fields */ ++ ++#define CD_VALID(x) extract32((x)->word[0], 31, 1) ++#define CD_ASID(x) extract32((x)->word[1], 16, 16) ++#define CD_TTB(x, sel) \ ++ ((extract64((x)->word[(sel) * 2 + 3], 0, 19) << 32) | \ ++ ((x)->word[(sel) * 2 + 2] & ~0xfULL)) ++ ++#define CD_HAD(x, sel) extract32((x)->word[(sel) * 2 + 2], 1, 1) ++ ++#define CD_TSZ(x, sel) extract32((x)->word[0], (16 * (sel)) + 0, 6) ++#define CD_TG(x, sel) extract32((x)->word[0], (16 * (sel)) + 6, 2) ++#define CD_EPD(x, sel) extract32((x)->word[0], (16 * (sel)) + 14, 1) ++#define CD_ENDI(x) extract32((x)->word[0], 15, 1) ++#define CD_IPS(x) extract32((x)->word[1], 0 , 3) ++#define CD_AFFD(x) extract32((x)->word[1], 3 , 1) ++#define CD_TBI(x) extract32((x)->word[1], 6 , 2) ++#define CD_HD(x) extract32((x)->word[1], 10 , 1) ++#define CD_HA(x) extract32((x)->word[1], 11 , 1) ++#define CD_S(x) extract32((x)->word[1], 12, 1) ++#define CD_R(x) extract32((x)->word[1], 13, 1) ++#define CD_A(x) extract32((x)->word[1], 14, 1) ++#define CD_AARCH64(x) extract32((x)->word[1], 9 , 1) ++ ++/* MMIO Registers */ ++ ++REG32(IDR0, 0x0) ++ FIELD(IDR0, S2P, 0 , 1) ++ FIELD(IDR0, S1P, 1 , 1) ++ FIELD(IDR0, TTF, 2 , 2) ++ FIELD(IDR0, COHACC, 4 , 1) ++ FIELD(IDR0, BTM, 5 , 1) ++ FIELD(IDR0, HTTU, 6 , 2) ++ FIELD(IDR0, DORMHINT, 8 , 1) ++ FIELD(IDR0, HYP, 9 , 1) ++ FIELD(IDR0, ATS, 10, 1) ++ FIELD(IDR0, NS1ATS, 11, 1) ++ FIELD(IDR0, ASID16, 12, 1) ++ FIELD(IDR0, MSI, 13, 1) ++ FIELD(IDR0, SEV, 14, 1) ++ FIELD(IDR0, ATOS, 15, 1) ++ FIELD(IDR0, PRI, 16, 1) ++ FIELD(IDR0, VMW, 17, 1) ++ FIELD(IDR0, VMID16, 18, 1) ++ FIELD(IDR0, CD2L, 19, 1) ++ FIELD(IDR0, VATOS, 20, 1) ++ FIELD(IDR0, TTENDIAN, 21, 2) ++ FIELD(IDR0, ATSRECERR, 23, 1) ++ FIELD(IDR0, STALL_MODEL, 24, 2) ++ FIELD(IDR0, TERM_MODEL, 26, 1) ++ FIELD(IDR0, STLEVEL, 27, 2) ++ FIELD(IDR0, RME_IMPL, 30, 1) ++ ++REG32(IDR1, 0x4) ++ FIELD(IDR1, SIDSIZE, 0 , 6) ++ FIELD(IDR1, SSIDSIZE, 6 , 5) ++ FIELD(IDR1, PRIQS, 11, 5) ++ FIELD(IDR1, EVENTQS, 16, 5) ++ FIELD(IDR1, CMDQS, 21, 5) ++ FIELD(IDR1, ATTR_PERMS_OVR, 26, 1) ++ FIELD(IDR1, ATTR_TYPES_OVR, 27, 1) ++ FIELD(IDR1, REL, 28, 1) ++ FIELD(IDR1, QUEUES_PRESET, 29, 1) ++ FIELD(IDR1, TABLES_PRESET, 30, 1) ++ FIELD(IDR1, ECMDQ, 31, 1) ++ ++#define SMMU_IDR1_SIDSIZE 16 ++#define SMMU_CMDQS 19 ++#define SMMU_EVENTQS 19 ++ ++REG32(IDR2, 0x8) ++ FIELD(IDR2, BA_VATOS, 0, 10) ++ ++REG32(IDR3, 0xc) ++ FIELD(IDR3, HAD, 2, 1); ++ FIELD(IDR3, PBHA, 3, 1); ++ FIELD(IDR3, XNX, 4, 1); ++ FIELD(IDR3, PPS, 5, 1); ++ FIELD(IDR3, MPAM, 7, 1); ++ FIELD(IDR3, FWB, 8, 1); ++ FIELD(IDR3, STT, 9, 1); ++ FIELD(IDR3, RIL, 10, 1); ++ FIELD(IDR3, BBML, 11, 2); ++ FIELD(IDR3, E0PD, 13, 1); ++ FIELD(IDR3, PTWNNC, 14, 1); ++ FIELD(IDR3, DPT, 15, 1); ++ ++REG32(IDR4, 0x10) ++ ++REG32(IDR5, 0x14) ++ FIELD(IDR5, OAS, 0, 3); ++ FIELD(IDR5, GRAN4K, 4, 1); ++ FIELD(IDR5, GRAN16K, 5, 1); ++ FIELD(IDR5, GRAN64K, 6, 1); ++ FIELD(IDR5, VAX, 10, 2); ++ FIELD(IDR5, STALL_MAX, 16, 16); ++ ++#define SMMU_IDR5_OAS 4 ++ ++REG32(IIDR, 0x18) ++REG32(AIDR, 0x1c) ++REG32(CR0, 0x20) ++ FIELD(CR0, SMMU_ENABLE, 0, 1) ++ FIELD(CR0, EVENTQEN, 2, 1) ++ FIELD(CR0, CMDQEN, 3, 1) ++ ++#define SMMU_CR0_RESERVED 0xFFFFFC20 ++ ++REG32(CR0ACK, 0x24) ++REG32(CR1, 0x28) ++REG32(CR2, 0x2c) ++REG32(STATUSR, 0x40) ++REG32(GBPA, 0x44) ++ FIELD(GBPA, ABORT, 20, 1) ++ FIELD(GBPA, UPDATE, 31, 1) ++ ++/* Use incoming. */ ++#define SMMU_GBPA_RESET_VAL 0x1000 ++ ++REG32(IRQ_CTRL, 0x50) ++ FIELD(IRQ_CTRL, GERROR_IRQEN, 0, 1) ++ FIELD(IRQ_CTRL, PRI_IRQEN, 1, 1) ++ FIELD(IRQ_CTRL, EVENTQ_IRQEN, 2, 1) ++ ++REG32(IRQ_CTRL_ACK, 0x54) ++REG32(GERROR, 0x60) ++ FIELD(GERROR, CMDQ_ERR, 0, 1) ++ FIELD(GERROR, EVENTQ_ABT_ERR, 2, 1) ++ FIELD(GERROR, PRIQ_ABT_ERR, 3, 1) ++ FIELD(GERROR, MSI_CMDQ_ABT_ERR, 4, 1) ++ FIELD(GERROR, MSI_EVENTQ_ABT_ERR, 5, 1) ++ FIELD(GERROR, MSI_PRIQ_ABT_ERR, 6, 1) ++ FIELD(GERROR, MSI_GERROR_ABT_ERR, 7, 1) ++ FIELD(GERROR, MSI_SFM_ERR, 8, 1) ++ ++REG32(GERRORN, 0x64) ++ ++#define A_GERROR_IRQ_CFG0 0x68 /* 64b */ ++REG32(GERROR_IRQ_CFG1, 0x70) ++REG32(GERROR_IRQ_CFG2, 0x74) ++ ++#define A_STRTAB_BASE 0x80 /* 64b */ ++ ++#define SMMU_BASE_ADDR_MASK 0xfffffffffffc0 ++ ++REG32(STRTAB_BASE_CFG, 0x88) ++ FIELD(STRTAB_BASE_CFG, FMT, 16, 2) ++ FIELD(STRTAB_BASE_CFG, SPLIT, 6 , 5) ++ FIELD(STRTAB_BASE_CFG, LOG2SIZE, 0 , 6) ++ ++#define A_CMDQ_BASE 0x90 /* 64b */ ++REG32(CMDQ_PROD, 0x98) ++REG32(CMDQ_CONS, 0x9c) ++ FIELD(CMDQ_CONS, ERR, 24, 7) ++ ++#define A_EVENTQ_BASE 0xa0 /* 64b */ ++REG32(EVENTQ_PROD, 0xa8) ++REG32(EVENTQ_CONS, 0xac) ++ ++#define A_EVENTQ_IRQ_CFG0 0xb0 /* 64b */ ++REG32(EVENTQ_IRQ_CFG1, 0xb8) ++REG32(EVENTQ_IRQ_CFG2, 0xbc) ++ ++#define A_IDREGS 0xfd0 ++ ++/* Commands */ ++ ++typedef enum SMMUCommandType { ++ SMMU_CMD_NONE = 0x00, ++ SMMU_CMD_PREFETCH_CONFIG , ++ SMMU_CMD_PREFETCH_ADDR, ++ SMMU_CMD_CFGI_STE, ++ SMMU_CMD_CFGI_STE_RANGE, ++ SMMU_CMD_CFGI_CD, ++ SMMU_CMD_CFGI_CD_ALL, ++ SMMU_CMD_CFGI_ALL, ++ SMMU_CMD_TLBI_NH_ALL = 0x10, ++ SMMU_CMD_TLBI_NH_ASID, ++ SMMU_CMD_TLBI_NH_VA, ++ SMMU_CMD_TLBI_NH_VAA, ++ SMMU_CMD_TLBI_EL3_ALL = 0x18, ++ SMMU_CMD_TLBI_EL3_VA = 0x1a, ++ SMMU_CMD_TLBI_EL2_ALL = 0x20, ++ SMMU_CMD_TLBI_EL2_ASID, ++ SMMU_CMD_TLBI_EL2_VA, ++ SMMU_CMD_TLBI_EL2_VAA, ++ SMMU_CMD_TLBI_S12_VMALL = 0x28, ++ SMMU_CMD_TLBI_S2_IPA = 0x2a, ++ SMMU_CMD_TLBI_NSNH_ALL = 0x30, ++ SMMU_CMD_ATC_INV = 0x40, ++ SMMU_CMD_PRI_RESP, ++ SMMU_CMD_RESUME = 0x44, ++ SMMU_CMD_STALL_TERM, ++ SMMU_CMD_SYNC, ++} SMMUCommandType; ++ ++#endif /* HW_ARM_SMMUV3_COMMON_H */ diff --git a/0223-hw-arm-smmu-common-Make-iommu-ops-part-of-SMMUState.patch b/0223-hw-arm-smmu-common-Make-iommu-ops-part-of-SMMUState.patch new file mode 100644 index 0000000..8de20fa --- /dev/null +++ b/0223-hw-arm-smmu-common-Make-iommu-ops-part-of-SMMUState.patch @@ -0,0 +1,72 @@ +From 2bcfa2a06dd56a5001ca6fec260d316ea0b16687 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:01 +0000 +Subject: [PATCH] hw/arm/smmu-common: Make iommu ops part of SMMUState +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 7c8573bff4 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Make iommu ops part of SMMUState and set to the current default smmu_ops. +No functional change intended. This will allow SMMUv3 accel implementation +to set a different iommu ops later. + +Reviewed-by: Jonathan Cameron +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Tested-by: Zhangfei Gao +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 92b36b9045290e3bf6046d41a9a8a192d03c527b) +Signed-off-by: Eric Auger +--- + hw/arm/smmu-common.c | 7 +++++-- + include/hw/arm/smmu-common.h | 1 + + 2 files changed, 6 insertions(+), 2 deletions(-) + +diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c +index 75d840e389..d70ca81775 100644 +--- a/hw/arm/smmu-common.c ++++ b/hw/arm/smmu-common.c +@@ -959,6 +959,9 @@ static void smmu_base_realize(DeviceState *dev, Error **errp) + "smmu-secure-memory-view"); + } + ++ if (!s->iommu_ops) { ++ s->iommu_ops = &smmu_ops; ++ } + /* + * We only allow default PCIe Root Complex(pcie.0) or pxb-pcie based extra + * root complexes to be associated with SMMU. +@@ -978,9 +981,9 @@ static void smmu_base_realize(DeviceState *dev, Error **errp) + } + + if (s->smmu_per_bus) { +- pci_setup_iommu_per_bus(pci_bus, &smmu_ops, s); ++ pci_setup_iommu_per_bus(pci_bus, s->iommu_ops, s); + } else { +- pci_setup_iommu(pci_bus, &smmu_ops, s); ++ pci_setup_iommu(pci_bus, s->iommu_ops, s); + } + return; + } +diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h +index e626c6c567..ffcac991de 100644 +--- a/include/hw/arm/smmu-common.h ++++ b/include/hw/arm/smmu-common.h +@@ -166,6 +166,7 @@ struct SMMUState { + AddressSpace memory_as; + MemoryRegion *secure_memory; + AddressSpace secure_memory_as; ++ const PCIIOMMUOps *iommu_ops; + }; + + struct SMMUBaseClass { diff --git a/0224-hw-arm-smmuv3-accel-Introduce-smmuv3-accel-device.patch b/0224-hw-arm-smmuv3-accel-Introduce-smmuv3-accel-device.patch new file mode 100644 index 0000000..5f8df1b --- /dev/null +++ b/0224-hw-arm-smmuv3-accel-Introduce-smmuv3-accel-device.patch @@ -0,0 +1,214 @@ +From fab3399fbd9584b789cb57ebf6c2b7b57cf4a1a3 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:02 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Introduce smmuv3 accel device +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 09f774e846 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Set up dedicated PCIIOMMUOps for the accel SMMUv3, since it will need +different callback handling in upcoming patches. This also adds a +CONFIG_ARM_SMMUV3_ACCEL build option so the feature can be disabled +at compile time. Because we now include CONFIG_DEVICES in the header to +check for ARM_SMMUV3_ACCEL, the meson file entry for smmuv3.c needs to +be changed to arm_ss.add. + +The “accel” property isn’t user visible yet and it will be introduced in +a later patch once all the supporting pieces are ready. + +Signed-off-by: Shameer Kolothum +Reviewed-by: Nicolin Chen +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Tested-by: Zhangfei Gao +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 7c828b054f61d44f33c7078a5aae97c4571609f2) +Signed-off-by: Eric Auger +--- + hw/arm/Kconfig | 5 ++++ + hw/arm/meson.build | 3 ++- + hw/arm/smmuv3-accel.c | 59 +++++++++++++++++++++++++++++++++++++++++ + hw/arm/smmuv3-accel.h | 27 +++++++++++++++++++ + hw/arm/smmuv3.c | 5 ++++ + include/hw/arm/smmuv3.h | 3 +++ + 6 files changed, 101 insertions(+), 1 deletion(-) + create mode 100644 hw/arm/smmuv3-accel.c + create mode 100644 hw/arm/smmuv3-accel.h + +diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig +index 3baa6c6c74..1f49550c61 100644 +--- a/hw/arm/Kconfig ++++ b/hw/arm/Kconfig +@@ -622,8 +622,13 @@ config FSL_IMX8MP_EVK + depends on TCG && AARCH64 + select FSL_IMX8MP + ++config ARM_SMMUV3_ACCEL ++ bool ++ depends on ARM_SMMUV3 ++ + config ARM_SMMUV3 + bool ++ select ARM_SMMUV3_ACCEL if IOMMUFD + + config FSL_IMX6UL + bool +diff --git a/hw/arm/meson.build b/hw/arm/meson.build +index dc68391305..bcb27c0bf6 100644 +--- a/hw/arm/meson.build ++++ b/hw/arm/meson.build +@@ -61,7 +61,8 @@ arm_common_ss.add(when: 'CONFIG_ARMSSE', if_true: files('armsse.c')) + arm_common_ss.add(when: 'CONFIG_FSL_IMX7', if_true: files('fsl-imx7.c', 'mcimx7d-sabre.c')) + arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP', if_true: files('fsl-imx8mp.c')) + arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP_EVK', if_true: files('imx8mp-evk.c')) +-arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c')) ++arm_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c')) ++arm_ss.add(when: 'CONFIG_ARM_SMMUV3_ACCEL', if_true: files('smmuv3-accel.c')) + arm_common_ss.add(when: 'CONFIG_FSL_IMX6UL', if_true: files('fsl-imx6ul.c', 'mcimx6ul-evk.c')) + arm_common_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c')) + arm_ss.add(when: 'CONFIG_XEN', if_true: files( +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +new file mode 100644 +index 0000000000..99ef0db8c4 +--- /dev/null ++++ b/hw/arm/smmuv3-accel.c +@@ -0,0 +1,59 @@ ++/* ++ * Copyright (c) 2025 Huawei Technologies R & D (UK) Ltd ++ * Copyright (C) 2025 NVIDIA ++ * Written by Nicolin Chen, Shameer Kolothum ++ * ++ * SPDX-License-Identifier: GPL-2.0-or-later ++ */ ++ ++#include "qemu/osdep.h" ++ ++#include "hw/arm/smmuv3.h" ++#include "smmuv3-accel.h" ++ ++static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState *bs, SMMUPciBus *sbus, ++ PCIBus *bus, int devfn) ++{ ++ SMMUDevice *sdev = sbus->pbdev[devfn]; ++ SMMUv3AccelDevice *accel_dev; ++ ++ if (sdev) { ++ return container_of(sdev, SMMUv3AccelDevice, sdev); ++ } ++ ++ accel_dev = g_new0(SMMUv3AccelDevice, 1); ++ sdev = &accel_dev->sdev; ++ ++ sbus->pbdev[devfn] = sdev; ++ smmu_init_sdev(bs, sdev, bus, devfn); ++ return accel_dev; ++} ++ ++/* ++ * Find or add an address space for the given PCI device. ++ * ++ * If a device matching @bus and @devfn already exists, return its ++ * corresponding address space. Otherwise, create a new device entry ++ * and initialize address space for it. ++ */ ++static AddressSpace *smmuv3_accel_find_add_as(PCIBus *bus, void *opaque, ++ int devfn) ++{ ++ SMMUState *bs = opaque; ++ SMMUPciBus *sbus = smmu_get_sbus(bs, bus); ++ SMMUv3AccelDevice *accel_dev = smmuv3_accel_get_dev(bs, sbus, bus, devfn); ++ SMMUDevice *sdev = &accel_dev->sdev; ++ ++ return &sdev->as; ++} ++ ++static const PCIIOMMUOps smmuv3_accel_ops = { ++ .get_address_space = smmuv3_accel_find_add_as, ++}; ++ ++void smmuv3_accel_init(SMMUv3State *s) ++{ ++ SMMUState *bs = ARM_SMMU(s); ++ ++ bs->iommu_ops = &smmuv3_accel_ops; ++} +diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h +new file mode 100644 +index 0000000000..0dc6b00d35 +--- /dev/null ++++ b/hw/arm/smmuv3-accel.h +@@ -0,0 +1,27 @@ ++/* ++ * Copyright (c) 2025 Huawei Technologies R & D (UK) Ltd ++ * Copyright (C) 2025 NVIDIA ++ * Written by Nicolin Chen, Shameer Kolothum ++ * ++ * SPDX-License-Identifier: GPL-2.0-or-later ++ */ ++ ++#ifndef HW_ARM_SMMUV3_ACCEL_H ++#define HW_ARM_SMMUV3_ACCEL_H ++ ++#include "hw/arm/smmu-common.h" ++#include CONFIG_DEVICES ++ ++typedef struct SMMUv3AccelDevice { ++ SMMUDevice sdev; ++} SMMUv3AccelDevice; ++ ++#ifdef CONFIG_ARM_SMMUV3_ACCEL ++void smmuv3_accel_init(SMMUv3State *s); ++#else ++static inline void smmuv3_accel_init(SMMUv3State *s) ++{ ++} ++#endif ++ ++#endif /* HW_ARM_SMMUV3_ACCEL_H */ +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index bcf8af8dc7..ef991cb7d8 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -32,6 +32,7 @@ + #include "qapi/error.h" + + #include "hw/arm/smmuv3.h" ++#include "smmuv3-accel.h" + #include "smmuv3-internal.h" + #include "smmu-internal.h" + +@@ -1882,6 +1883,10 @@ static void smmu_realize(DeviceState *d, Error **errp) + SysBusDevice *dev = SYS_BUS_DEVICE(d); + Error *local_err = NULL; + ++ if (s->accel) { ++ smmuv3_accel_init(s); ++ } ++ + c->parent_realize(d, &local_err); + if (local_err) { + error_propagate(errp, local_err); +diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h +index d183a62766..bb7076286b 100644 +--- a/include/hw/arm/smmuv3.h ++++ b/include/hw/arm/smmuv3.h +@@ -63,6 +63,9 @@ struct SMMUv3State { + qemu_irq irq[4]; + QemuMutex mutex; + char *stage; ++ ++ /* SMMU has HW accelerator support for nested S1 + s2 */ ++ bool accel; + }; + + typedef enum { diff --git a/0225-hw-arm-smmuv3-accel-Initialize-shared-system-address.patch b/0225-hw-arm-smmuv3-accel-Initialize-shared-system-address.patch new file mode 100644 index 0000000..a6a9538 --- /dev/null +++ b/0225-hw-arm-smmuv3-accel-Initialize-shared-system-address.patch @@ -0,0 +1,87 @@ +From 8d8d77ea16aea5a823b6deb12462c3371497b5a0 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:03 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Initialize shared system address space +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] a4241d76f4 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +To support accelerated SMMUv3 instances, introduce a shared system-wide +AddressSpace (shared_as_sysmem) that aliases the global system memory. +This shared AddressSpace will be used in a subsequent patch for all +vfio-pci devices behind all accelerated SMMUv3 instances within a VM. + +Sharing a single system AddressSpace ensures that all devices behind +accelerated SMMUv3s use the same system address space pointer. This +allows VFIO/iommufd to reuse a single IOAS ID in iommufd_cdev_attach(), +enabling the Stage-2 page tables to be shared within the VM rather than +duplicated for each SMMUv3 instance. + +Reviewed-by: Nicolin Chen +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Tested-by: Zhangfei Gao +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 1420b8f0de68c5ffeeeebb55bd780666c55b469b) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index 99ef0db8c4..b2eded743e 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -11,6 +11,14 @@ + #include "hw/arm/smmuv3.h" + #include "smmuv3-accel.h" + ++/* ++ * The root region aliases the global system memory, and shared_as_sysmem ++ * provides a shared Address Space referencing it. This Address Space is used ++ * by all vfio-pci devices behind all accelerated SMMUv3 instances within a VM. ++ */ ++static MemoryRegion root, sysmem; ++static AddressSpace *shared_as_sysmem; ++ + static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState *bs, SMMUPciBus *sbus, + PCIBus *bus, int devfn) + { +@@ -51,9 +59,27 @@ static const PCIIOMMUOps smmuv3_accel_ops = { + .get_address_space = smmuv3_accel_find_add_as, + }; + ++static void smmuv3_accel_as_init(SMMUv3State *s) ++{ ++ ++ if (shared_as_sysmem) { ++ return; ++ } ++ ++ memory_region_init(&root, OBJECT(s), "root", UINT64_MAX); ++ memory_region_init_alias(&sysmem, OBJECT(s), "smmuv3-accel-sysmem", ++ get_system_memory(), 0, ++ memory_region_size(get_system_memory())); ++ memory_region_add_subregion(&root, 0, &sysmem); ++ ++ shared_as_sysmem = g_new0(AddressSpace, 1); ++ address_space_init(shared_as_sysmem, &root, "smmuv3-accel-as-sysmem"); ++} ++ + void smmuv3_accel_init(SMMUv3State *s) + { + SMMUState *bs = ARM_SMMU(s); + + bs->iommu_ops = &smmuv3_accel_ops; ++ smmuv3_accel_as_init(s); + } diff --git a/0226-hw-pci-pci-Move-pci_init_bus_master-after-adding-dev.patch b/0226-hw-pci-pci-Move-pci_init_bus_master-after-adding-dev.patch new file mode 100644 index 0000000..8640ed7 --- /dev/null +++ b/0226-hw-pci-pci-Move-pci_init_bus_master-after-adding-dev.patch @@ -0,0 +1,72 @@ +From 332b6037cfa46b2751b572a81b74750816179420 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:04 +0000 +Subject: [PATCH] hw/pci/pci: Move pci_init_bus_master() after adding device to + bus +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 3eb7647b30 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +During PCI hotplug, in do_pci_register_device(), pci_init_bus_master() +is called before storing the pci_dev pointer in bus->devices[devfn]. + +This causes a problem if pci_init_bus_master() (via its +get_address_space() callback) attempts to retrieve the device using +pci_find_device(), since the PCI device is not yet visible on the bus. + +Fix this by moving the pci_init_bus_master() call to after the device +has been added to bus->devices[devfn]. + +This prepares for a subsequent patch where the accel SMMUv3 +get_address_space() callback retrieves the pci_dev to identify the +attached device type. + +No functional change intended. + +Cc: Michael S. Tsirkin +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Reviewed-by: Nicolin Chen +Reviewed-by: Michael S. Tsirkin +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Signed-off-by: Shameer Kolothum +(cherry picked from commit 18e9d73a011252b80e25c3befe840e30340d14d5) +Signed-off-by: Eric Auger +--- + hw/pci/pci.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/hw/pci/pci.c b/hw/pci/pci.c +index d1c22999b9..a8eeafd3b2 100644 +--- a/hw/pci/pci.c ++++ b/hw/pci/pci.c +@@ -1369,9 +1369,6 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, + pci_dev->bus_master_as.max_bounce_buffer_size = + pci_dev->max_bounce_buffer_size; + +- if (phase_check(PHASE_MACHINE_READY)) { +- pci_init_bus_master(pci_dev); +- } + pci_dev->irq_state = 0; + pci_config_alloc(pci_dev); + +@@ -1415,6 +1412,9 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, + pci_dev->config_write = config_write; + bus->devices[devfn] = pci_dev; + pci_dev->version_id = 2; /* Current pci device vmstate version */ ++ if (phase_check(PHASE_MACHINE_READY)) { ++ pci_init_bus_master(pci_dev); ++ } + return pci_dev; + } + diff --git a/0227-hw-pci-Export-pci_device_get_iommu_bus_devfn-and-ret.patch b/0227-hw-pci-Export-pci_device_get_iommu_bus_devfn-and-ret.patch new file mode 100644 index 0000000..a8bc93f --- /dev/null +++ b/0227-hw-pci-Export-pci_device_get_iommu_bus_devfn-and-ret.patch @@ -0,0 +1,96 @@ +From 348fb1909be76af7ae79a3b1fb7e339fbc143aef Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Tue, 6 Jan 2026 01:12:46 -0500 +Subject: [PATCH] hw/pci: Export pci_device_get_iommu_bus_devfn() and return + bool +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 5c75f23411 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Returns true if PCI device is aliased or false otherwise. This will be +used in following patch to determine if a PCI device is under a PCI +bridge. + +Signed-off-by: Zhenzhong Duan +Reviewed-by: Eric Auger +Reviewed-by: Nicolin Chen +Reviewed-by: Yi Liu +Reviewed-by: Michael S. Tsirkin +Link: https://lore.kernel.org/qemu-devel/20260106061304.314546-5-zhenzhong.duan@intel.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit d58230d8754fedf6fc7313e0faa25bb5edc5ba2e) +Signed-off-by: Eric Auger +--- + hw/pci/pci.c | 12 ++++++++---- + include/hw/pci/pci.h | 2 ++ + 2 files changed, 10 insertions(+), 4 deletions(-) + +diff --git a/hw/pci/pci.c b/hw/pci/pci.c +index a8eeafd3b2..15dd232cf8 100644 +--- a/hw/pci/pci.c ++++ b/hw/pci/pci.c +@@ -2855,20 +2855,21 @@ static void pci_device_class_base_init(ObjectClass *klass, const void *data) + * For call sites which don't need aliased BDF, passing NULL to + * aliased_[bus|devfn] is allowed. + * ++ * Returns true if PCI device RID is aliased or false otherwise. ++ * + * @piommu_bus: return root #PCIBus backed by an IOMMU for the PCI device. + * + * @aliased_bus: return aliased #PCIBus of the PCI device, optional. + * + * @aliased_devfn: return aliased devfn of the PCI device, optional. + */ +-static void pci_device_get_iommu_bus_devfn(PCIDevice *dev, +- PCIBus **piommu_bus, +- PCIBus **aliased_bus, +- int *aliased_devfn) ++bool pci_device_get_iommu_bus_devfn(PCIDevice *dev, PCIBus **piommu_bus, ++ PCIBus **aliased_bus, int *aliased_devfn) + { + PCIBus *bus = pci_get_bus(dev); + PCIBus *iommu_bus = bus; + int devfn = dev->devfn; ++ bool aliased = false; + + while (iommu_bus && !iommu_bus->iommu_ops && iommu_bus->parent_dev) { + PCIBus *parent_bus = pci_get_bus(iommu_bus->parent_dev); +@@ -2905,6 +2906,7 @@ static void pci_device_get_iommu_bus_devfn(PCIDevice *dev, + devfn = parent->devfn; + bus = parent_bus; + } ++ aliased = true; + } + + /* +@@ -2939,6 +2941,8 @@ static void pci_device_get_iommu_bus_devfn(PCIDevice *dev, + if (aliased_devfn) { + *aliased_devfn = devfn; + } ++ ++ return aliased; + } + + AddressSpace *pci_device_iommu_address_space(PCIDevice *dev) +diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h +index 6bccb25ac2..bde9dca8e2 100644 +--- a/include/hw/pci/pci.h ++++ b/include/hw/pci/pci.h +@@ -637,6 +637,8 @@ typedef struct PCIIOMMUOps { + bool is_write); + } PCIIOMMUOps; + ++bool pci_device_get_iommu_bus_devfn(PCIDevice *dev, PCIBus **piommu_bus, ++ PCIBus **aliased_bus, int *aliased_devfn); + AddressSpace *pci_device_iommu_address_space(PCIDevice *dev); + bool pci_device_set_iommu_device(PCIDevice *dev, HostIOMMUDevice *hiod, + Error **errp); diff --git a/0228-hw-pci-pci-Add-optional-supports_address_space-callb.patch b/0228-hw-pci-pci-Add-optional-supports_address_space-callb.patch new file mode 100644 index 0000000..8ae0bc1 --- /dev/null +++ b/0228-hw-pci-pci-Add-optional-supports_address_space-callb.patch @@ -0,0 +1,114 @@ +From 8121cf5eb99466c17f2b0fe05a9f4b0e630938f6 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:05 +0000 +Subject: [PATCH] hw/pci/pci: Add optional supports_address_space() callback +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] e2dde6a996 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Introduce an optional supports_address_space() callback in PCIIOMMUOps to +allow a vIOMMU implementation to reject devices that should not be attached +to it. + +Currently, get_address_space() is the first and mandatory callback into the +vIOMMU layer, which always returns an address space. For certain setups, such +as hardware accelerated vIOMMUs (e.g. ARM SMMUv3 with accel=on), attaching +emulated endpoint devices is undesirable as it may impact the behavior or +performance of VFIO passthrough devices, for example, by triggering +unnecessary invalidations on the host IOMMU. + +The new callback allows a vIOMMU to check and reject unsupported devices +early during PCI device registration. + +Cc: Michael S. Tsirkin +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Reviewed-by: Nicolin Chen +Reviewed-by: Michael S. Tsirkin +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Signed-off-by: Shameer Kolothum +(cherry picked from commit 326f23780e45a99879fe3b61c94172c94870ce75) +Signed-off-by: Eric Auger +--- + hw/pci/pci.c | 20 ++++++++++++++++++++ + include/hw/pci/pci.h | 19 +++++++++++++++++++ + 2 files changed, 39 insertions(+) + +diff --git a/hw/pci/pci.c b/hw/pci/pci.c +index 15dd232cf8..141b7ad1f8 100644 +--- a/hw/pci/pci.c ++++ b/hw/pci/pci.c +@@ -135,6 +135,21 @@ static void pci_set_master(PCIDevice *d, bool enable) + d->is_master = enable; /* cache the status */ + } + ++static bool ++pci_device_supports_iommu_address_space(PCIDevice *dev, Error **errp) ++{ ++ PCIBus *bus; ++ PCIBus *iommu_bus; ++ int devfn; ++ ++ pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); ++ if (iommu_bus && iommu_bus->iommu_ops->supports_address_space) { ++ return iommu_bus->iommu_ops->supports_address_space(bus, ++ iommu_bus->iommu_opaque, devfn, errp); ++ } ++ return true; ++} ++ + static void pci_init_bus_master(PCIDevice *pci_dev) + { + AddressSpace *dma_as = pci_device_iommu_address_space(pci_dev); +@@ -1412,6 +1427,11 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, + pci_dev->config_write = config_write; + bus->devices[devfn] = pci_dev; + pci_dev->version_id = 2; /* Current pci device vmstate version */ ++ if (!pci_device_supports_iommu_address_space(pci_dev, errp)) { ++ do_pci_unregister_device(pci_dev); ++ bus->devices[devfn] = NULL; ++ return NULL; ++ } + if (phase_check(PHASE_MACHINE_READY)) { + pci_init_bus_master(pci_dev); + } +diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h +index bde9dca8e2..a19773d0f9 100644 +--- a/include/hw/pci/pci.h ++++ b/include/hw/pci/pci.h +@@ -417,6 +417,25 @@ typedef struct IOMMUPRINotifier { + * framework for a set of devices on a PCI bus. + */ + typedef struct PCIIOMMUOps { ++ /** ++ * @supports_address_space: Optional pre-check to determine whether a PCI ++ * device can be associated with an IOMMU. If this callback returns true, ++ * the IOMMU accepts the device association and get_address_space() can be ++ * called to obtain the address_space to be used. ++ * ++ * @bus: the #PCIBus being accessed. ++ * ++ * @opaque: the data passed to pci_setup_iommu(). ++ * ++ * @devfn: device and function number. ++ * ++ * @errp: pass an Error out only when return false ++ * ++ * Returns: true if the device can be associated with an IOMMU, false ++ * otherwise with errp set. ++ */ ++ bool (*supports_address_space)(PCIBus *bus, void *opaque, int devfn, ++ Error **errp); + /** + * @get_address_space: get the address space for a set of devices + * on a PCI bus. diff --git a/0229-hw-pci-bridge-pci_expander_bridge-Move-TYPE_PXB_PCIE.patch b/0229-hw-pci-bridge-pci_expander_bridge-Move-TYPE_PXB_PCIE.patch new file mode 100644 index 0000000..1036bbd --- /dev/null +++ b/0229-hw-pci-bridge-pci_expander_bridge-Move-TYPE_PXB_PCIE.patch @@ -0,0 +1,58 @@ +From 0f94f34237bcece8afce0e97c0a0c28921eae996 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:06 +0000 +Subject: [PATCH] hw/pci-bridge/pci_expander_bridge: Move TYPE_PXB_PCIE_DEV to + header +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 665ed4ec6f (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Move the TYPE_PXB_PCIE_DEV definition to header so that it can be +referenced by other code in subsequent patch. + +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Reviewed-by: Nicolin Chen +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Signed-off-by: Shameer Kolothum +(cherry picked from commit 17870f1504d3a402f777e3da28eb208ea4688a18) +Signed-off-by: Eric Auger +--- + hw/pci-bridge/pci_expander_bridge.c | 1 - + include/hw/pci/pci_bridge.h | 1 + + 2 files changed, 1 insertion(+), 1 deletion(-) + +diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c +index 1bcceddbc4..a8eb2d2426 100644 +--- a/hw/pci-bridge/pci_expander_bridge.c ++++ b/hw/pci-bridge/pci_expander_bridge.c +@@ -48,7 +48,6 @@ struct PXBBus { + char bus_path[8]; + }; + +-#define TYPE_PXB_PCIE_DEV "pxb-pcie" + OBJECT_DECLARE_SIMPLE_TYPE(PXBPCIEDev, PXB_PCIE_DEV) + + static GList *pxb_dev_list; +diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h +index a055fd8d32..b61360b900 100644 +--- a/include/hw/pci/pci_bridge.h ++++ b/include/hw/pci/pci_bridge.h +@@ -106,6 +106,7 @@ typedef struct PXBPCIEDev { + + #define TYPE_PXB_PCIE_BUS "pxb-pcie-bus" + #define TYPE_PXB_CXL_BUS "pxb-cxl-bus" ++#define TYPE_PXB_PCIE_DEV "pxb-pcie" + #define TYPE_PXB_DEV "pxb" + OBJECT_DECLARE_SIMPLE_TYPE(PXBDev, PXB_DEV) + diff --git a/0230-hw-arm-smmuv3-accel-Restrict-accelerated-SMMUv3-to-v.patch b/0230-hw-arm-smmuv3-accel-Restrict-accelerated-SMMUv3-to-v.patch new file mode 100644 index 0000000..aa3272c --- /dev/null +++ b/0230-hw-arm-smmuv3-accel-Restrict-accelerated-SMMUv3-to-v.patch @@ -0,0 +1,193 @@ +From 37d850b5730488b8e5a9c7e1144d4f4ab2524519 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:07 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Restrict accelerated SMMUv3 to vfio-pci + endpoints with iommufd +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 6cdcc1d7f3 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Accelerated SMMUv3 is only meaningful when a device can leverage the host +SMMUv3 in nested mode (S1+S2 translation). To keep the model consistent +and correct, this mode is restricted to vfio-pci endpoint devices using +the iommufd backend. + +Non-endpoint emulated devices such as PCIe root ports and bridges are also +permitted so that vfio-pci devices can be attached downstream. All other +device types are unsupported in accelerated mode. + +Implement supports_address_space() callback to reject all such unsupported +devices. + +This restriction also avoids complications with IOTLB invalidations. Some +TLBI commands (e.g. CMD_TLBI_NH_ASID) lack an associated SID, making it +difficult to trace the originating device. Allowing emulated endpoints +would require invalidating both QEMU’s software IOTLB and the host’s +hardware IOTLB, which can significantly degrade performance. + +A key design choice is the address space returned for accelerated vfio-pci +endpoints. VFIO core has a container that manages an HWPT. By default, it +allocates a stage-1 normal HWPT, unless vIOMMU requests for a nesting +parent HWPT for accelerated cases. + +VFIO core adds a listener for that HWPT and sets up a handler +vfio_container_region_add() where it checks the memory region. + + -If the region is a non-IOMMU translated one (system address space), VFIO + treats it as RAM and handles all stage-2 mappings for the core allocated + nesting parent HWPT. + + -If the region is an IOMMU address space, VFIO instead enables IOTLB + notifier handling and translation replay, skipping the RAM listener and + therefore not installing stage-2 mappings. + +For accelerated SMMUv3, correct operation requires the S1+S2 nesting +model, and therefore VFIO must take the "system address space" path so +that stage-2 mappings are properly built. Returning an alias of the +system address space ensures this happens. Returning the IOMMU address +space would omit stage-2 mapping and break nested translation. + +Another option considered was forcing a pre-registration path using +vfio_prereg_listener() to set up stage-2 mappings, but this requires +changes in VFIO core and was not adopted. Returning an alias of the +system address space keeps the design aligned with existing VFIO/iommufd +nesting flows and avoids the need for cross-subsystem changes. + +In summary: + - vfio-pci devices(with iommufd as backend) return an address space + aliased to system address space. + - bridges and root ports return the IOMMU address space. + +Reviewed-by: Jonathan Cameron +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Signed-off-by: Shameer Kolothum +(cherry picked from commit 56f4401290b5b81446480b50b7cbad7334c750e0) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 77 ++++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 76 insertions(+), 1 deletion(-) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index b2eded743e..2fcd301322 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -7,8 +7,13 @@ + */ + + #include "qemu/osdep.h" ++#include "qemu/error-report.h" + + #include "hw/arm/smmuv3.h" ++#include "hw/pci/pci_bridge.h" ++#include "hw/pci-host/gpex.h" ++#include "hw/vfio/pci.h" ++ + #include "smmuv3-accel.h" + + /* +@@ -37,6 +42,48 @@ static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState *bs, SMMUPciBus *sbus, + return accel_dev; + } + ++/* ++ * Only allow PCIe bridges, pxb-pcie roots, and GPEX roots so vfio-pci ++ * endpoints can sit downstream. Accelerated SMMUv3 requires a vfio-pci ++ * endpoint using the iommufd backend; all other device types are rejected. ++ * This avoids supporting emulated endpoints, which would complicate IOTLB ++ * invalidation and hurt performance. ++ */ ++static bool smmuv3_accel_pdev_allowed(PCIDevice *pdev, bool *vfio_pci) ++{ ++ ++ if (object_dynamic_cast(OBJECT(pdev), TYPE_PCI_BRIDGE) || ++ object_dynamic_cast(OBJECT(pdev), TYPE_PXB_PCIE_DEV) || ++ object_dynamic_cast(OBJECT(pdev), TYPE_GPEX_ROOT_DEVICE)) { ++ return true; ++ } else if ((object_dynamic_cast(OBJECT(pdev), TYPE_VFIO_PCI))) { ++ *vfio_pci = true; ++ if (object_property_get_link(OBJECT(pdev), "iommufd", NULL)) { ++ return true; ++ } ++ } ++ return false; ++} ++ ++static bool smmuv3_accel_supports_as(PCIBus *bus, void *opaque, int devfn, ++ Error **errp) ++{ ++ PCIDevice *pdev = pci_find_device(bus, pci_bus_num(bus), devfn); ++ bool vfio_pci = false; ++ ++ if (pdev && !smmuv3_accel_pdev_allowed(pdev, &vfio_pci)) { ++ if (vfio_pci) { ++ error_setg(errp, "vfio-pci endpoint devices without an iommufd " ++ "backend not allowed when using arm-smmuv3,accel=on"); ++ ++ } else { ++ error_setg(errp, "Emulated endpoint devices are not allowed when " ++ "using arm-smmuv3,accel=on"); ++ } ++ return false; ++ } ++ return true; ++} + /* + * Find or add an address space for the given PCI device. + * +@@ -47,15 +94,43 @@ static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState *bs, SMMUPciBus *sbus, + static AddressSpace *smmuv3_accel_find_add_as(PCIBus *bus, void *opaque, + int devfn) + { ++ PCIDevice *pdev = pci_find_device(bus, pci_bus_num(bus), devfn); + SMMUState *bs = opaque; + SMMUPciBus *sbus = smmu_get_sbus(bs, bus); + SMMUv3AccelDevice *accel_dev = smmuv3_accel_get_dev(bs, sbus, bus, devfn); + SMMUDevice *sdev = &accel_dev->sdev; ++ bool vfio_pci = false; + +- return &sdev->as; ++ if (pdev && !smmuv3_accel_pdev_allowed(pdev, &vfio_pci)) { ++ /* Should never be here: supports_address_space() filters these out */ ++ g_assert_not_reached(); ++ } ++ ++ /* ++ * In the accelerated mode, a vfio-pci device attached via the iommufd ++ * backend must remain in the system address space. Such a device is ++ * always translated by its physical SMMU (using either a stage-2-only ++ * STE or a nested STE), where the parent stage-2 page table is allocated ++ * by the VFIO core to back the system address space. ++ * ++ * Return the shared_as_sysmem aliased to the global system memory in this ++ * case. Sharing address_space_memory also allows devices under different ++ * vSMMU instances in the same VM to reuse a single nesting parent HWPT in ++ * the VFIO core. ++ * ++ * For non-endpoint emulated devices such as PCIe root ports and bridges, ++ * which may use the normal emulated translation path and software IOTLBs, ++ * return the SMMU's IOMMU address space. ++ */ ++ if (vfio_pci) { ++ return shared_as_sysmem; ++ } else { ++ return &sdev->as; ++ } + } + + static const PCIIOMMUOps smmuv3_accel_ops = { ++ .supports_address_space = smmuv3_accel_supports_as, + .get_address_space = smmuv3_accel_find_add_as, + }; + diff --git a/0231-hw-pci-Introduce-pci_device_get_viommu_flags.patch b/0231-hw-pci-Introduce-pci_device_get_viommu_flags.patch new file mode 100644 index 0000000..e08de83 --- /dev/null +++ b/0231-hw-pci-Introduce-pci_device_get_viommu_flags.patch @@ -0,0 +1,174 @@ +From b964ac3e129c58f51c815be27b5eb01a323ac5d0 Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Tue, 6 Jan 2026 01:12:47 -0500 +Subject: [PATCH] hw/pci: Introduce pci_device_get_viommu_flags() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 218814265b (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Introduce a new PCIIOMMUOps optional callback, get_viommu_flags() which +allows to retrieve flags exposed by a vIOMMU. The first planned vIOMMU +device flag is VIOMMU_FLAG_WANT_NESTING_PARENT that advertises the +support of HW nested stage translation scheme and wants other sub-system +like VFIO's cooperation to create nesting parent HWPT. + +pci_device_get_viommu_flags() is a wrapper that can be called on a PCI +device potentially protected by a vIOMMU. + +get_viommu_flags() is designed to return 64bit bitmap of purely vIOMMU +flags which are only determined by user's configuration, no host +capabilities involved. Reasons are: + +1. host may has heterogeneous IOMMUs, each with different capabilities +2. this is migration friendly, return value is consistent between source + and target. + +Note that this op will be invoked at the attach_device() stage, at which +point host IOMMU capabilities are not yet forwarded to the vIOMMU through +the set_iommu_device() callback that will be after the attach_device(). + +See below sequence: + + vfio_device_attach(): + iommufd_cdev_attach(): + pci_device_get_viommu_flags() for HW nesting cap + create a nesting parent HWPT + attach device to the HWPT + vfio_device_hiod_create_and_realize() creating hiod + ... + pci_device_set_iommu_device(hiod) + +Suggested-by: Yi Liu +Signed-off-by: Zhenzhong Duan +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Reviewed-by: Yi Liu +Reviewed-by: Cédric Le Goater +Reviewed-by: Michael S. Tsirkin +Link: https://lore.kernel.org/qemu-devel/20260106061304.314546-6-zhenzhong.duan@intel.com +[ clg: include/hw/core/iommu.h: Changed Copyright date 2025 -> 2026 ] +Signed-off-by: Cédric Le Goater +(cherry picked from commit 844302bd5961d8e7a35b601495b9af8f3d26a4c8) +Signed-off-by: Eric Auger +--- + MAINTAINERS | 1 + + hw/pci/pci.c | 11 +++++++++++ + include/hw/core/iommu.h | 25 +++++++++++++++++++++++++ + include/hw/pci/pci.h | 22 ++++++++++++++++++++++ + 4 files changed, 59 insertions(+) + create mode 100644 include/hw/core/iommu.h + +diff --git a/MAINTAINERS b/MAINTAINERS +index d4696f00d7..c71f53c480 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -2320,6 +2320,7 @@ F: include/system/iommufd.h + F: backends/host_iommu_device.c + F: include/system/host_iommu_device.h + F: include/qemu/chardev_open.h ++F: include/hw/core/iommu.h + F: util/chardev_open.c + F: docs/devel/vfio-iommufd.rst + +diff --git a/hw/pci/pci.c b/hw/pci/pci.c +index 141b7ad1f8..27bb2285d4 100644 +--- a/hw/pci/pci.c ++++ b/hw/pci/pci.c +@@ -3027,6 +3027,17 @@ void pci_device_unset_iommu_device(PCIDevice *dev) + } + } + ++uint64_t pci_device_get_viommu_flags(PCIDevice *dev) ++{ ++ PCIBus *iommu_bus; ++ ++ pci_device_get_iommu_bus_devfn(dev, &iommu_bus, NULL, NULL); ++ if (iommu_bus && iommu_bus->iommu_ops->get_viommu_flags) { ++ return iommu_bus->iommu_ops->get_viommu_flags(iommu_bus->iommu_opaque); ++ } ++ return 0; ++} ++ + int pci_pri_request_page(PCIDevice *dev, uint32_t pasid, bool priv_req, + bool exec_req, hwaddr addr, bool lpig, + uint16_t prgi, bool is_read, bool is_write) +diff --git a/include/hw/core/iommu.h b/include/hw/core/iommu.h +new file mode 100644 +index 0000000000..fcbbcd1015 +--- /dev/null ++++ b/include/hw/core/iommu.h +@@ -0,0 +1,25 @@ ++/* ++ * General vIOMMU flags ++ * ++ * Copyright (C) 2026 Intel Corporation. ++ * ++ * SPDX-License-Identifier: GPL-2.0-or-later ++ */ ++ ++#ifndef HW_IOMMU_H ++#define HW_IOMMU_H ++ ++#include "qemu/bitops.h" ++ ++/* ++ * Theoretical vIOMMU flags. Only determined by the vIOMMU device properties and ++ * independent on the actual host IOMMU capabilities they may depend on. Each ++ * flag can be an expectation or request to other sub-system or just a pure ++ * vIOMMU capability. vIOMMU can choose which flags to expose. ++ */ ++enum viommu_flags { ++ /* vIOMMU needs nesting parent HWPT to create nested HWPT */ ++ VIOMMU_FLAG_WANT_NESTING_PARENT = BIT_ULL(0), ++}; ++ ++#endif /* HW_IOMMU_H */ +diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h +index a19773d0f9..299e7f94da 100644 +--- a/include/hw/pci/pci.h ++++ b/include/hw/pci/pci.h +@@ -481,6 +481,18 @@ typedef struct PCIIOMMUOps { + * @devfn: device and function number of the PCI device. + */ + void (*unset_iommu_device)(PCIBus *bus, void *opaque, int devfn); ++ /** ++ * @get_viommu_flags: get vIOMMU flags ++ * ++ * Optional callback, if not implemented, then vIOMMU doesn't support ++ * exposing flags to other sub-system, e.g., VFIO. ++ * ++ * @opaque: the data passed to pci_setup_iommu(). ++ * ++ * Returns: bitmap with each bit representing a vIOMMU flag defined in ++ * enum viommu_flags. ++ */ ++ uint64_t (*get_viommu_flags)(void *opaque); + /** + * @get_iotlb_info: get properties required to initialize a device IOTLB. + * +@@ -663,6 +675,16 @@ bool pci_device_set_iommu_device(PCIDevice *dev, HostIOMMUDevice *hiod, + Error **errp); + void pci_device_unset_iommu_device(PCIDevice *dev); + ++/** ++ * pci_device_get_viommu_flags: get vIOMMU flags. ++ * ++ * Returns: bitmap with each bit representing a vIOMMU flag defined in ++ * enum viommu_flags. Or 0 if vIOMMU doesn't report any. ++ * ++ * @dev: PCI device pointer. ++ */ ++uint64_t pci_device_get_viommu_flags(PCIDevice *dev); ++ + /** + * pci_iommu_get_iotlb_info: get properties required to initialize a + * device IOTLB. diff --git a/0232-vfio-iommufd-Force-creating-nesting-parent-HWPT.patch b/0232-vfio-iommufd-Force-creating-nesting-parent-HWPT.patch new file mode 100644 index 0000000..fb8d3d1 --- /dev/null +++ b/0232-vfio-iommufd-Force-creating-nesting-parent-HWPT.patch @@ -0,0 +1,114 @@ +From feb26ac0392813380dc25a30546bf2e4df0cd86f Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Tue, 6 Jan 2026 01:12:50 -0500 +Subject: [PATCH] vfio/iommufd: Force creating nesting parent HWPT +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 8e7ab7a540 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Conflicts: Contextual conflict in include/hw/vfio/vfio-device.h +(vfio_device_get_feature) and hw/vfio/device.c (same) + +Call pci_device_get_viommu_flags() to get if vIOMMU supports +VIOMMU_FLAG_WANT_NESTING_PARENT. + +If yes, create a nesting parent HWPT and add it to the container's hwpt_list, +letting this parent HWPT cover the entire second stage mappings (GPA=>HPA). + +This allows a VFIO passthrough device to directly attach to this default HWPT +and then to use the system address space and its listener. + +Introduce a vfio_device_get_viommu_flags_want_nesting() helper to facilitate +this implementation. + +It is safe to do so because a vIOMMU will be able to fail in set_iommu_device() +call, if something else related to the VFIO device or vIOMMU isn't compatible. + +Suggested-by: Nicolin Chen +Suggested-by: Yi Liu +Signed-off-by: Zhenzhong Duan +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Reviewed-by: Yi Liu +Reviewed-by: Michael S. Tsirkin +Link: https://lore.kernel.org/qemu-devel/20260106061304.314546-9-zhenzhong.duan@intel.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit c3459c6bfaad6a3d0bef4d3ebc6753bb3e66c1ef) +Signed-off-by: Eric Auger +--- + hw/vfio/device.c | 12 ++++++++++++ + hw/vfio/iommufd.c | 9 +++++++++ + include/hw/vfio/vfio-device.h | 1 + + 3 files changed, 22 insertions(+) + +diff --git a/hw/vfio/device.c b/hw/vfio/device.c +index 330f2598ff..7bdb6db923 100644 +--- a/hw/vfio/device.c ++++ b/hw/vfio/device.c +@@ -24,6 +24,7 @@ + #include "hw/vfio/vfio-device.h" + #include "hw/vfio/pci.h" + #include "hw/hw.h" ++#include "hw/core/iommu.h" + #include "trace.h" + #include "qapi/error.h" + #include "qemu/error-report.h" +@@ -524,6 +525,17 @@ int vfio_device_get_feature(VFIODevice *vbasedev, + return vbasedev->io_ops->device_feature(vbasedev, feature); + } + ++bool vfio_device_get_viommu_flags_want_nesting(VFIODevice *vbasedev) ++{ ++ VFIOPCIDevice *vdev = vfio_pci_from_vfio_device(vbasedev); ++ ++ if (vdev) { ++ return !!(pci_device_get_viommu_flags(PCI_DEVICE(vdev)) & ++ VIOMMU_FLAG_WANT_NESTING_PARENT); ++ } ++ return false; ++} ++ + /* + * Traditional ioctl() based io + */ +diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c +index bb5775aa71..ca8a6b7029 100644 +--- a/hw/vfio/iommufd.c ++++ b/hw/vfio/iommufd.c +@@ -361,6 +361,15 @@ static bool iommufd_cdev_autodomains_get(VFIODevice *vbasedev, + flags = IOMMU_HWPT_ALLOC_DIRTY_TRACKING; + } + ++ /* ++ * If vIOMMU requests VFIO's cooperation to create nesting parent HWPT, ++ * force to create it so that it could be reused by vIOMMU to create ++ * nested HWPT. ++ */ ++ if (vfio_device_get_viommu_flags_want_nesting(vbasedev)) { ++ flags |= IOMMU_HWPT_ALLOC_NEST_PARENT; ++ } ++ + if (cpr_is_incoming()) { + hwpt_id = vbasedev->cpr.hwpt_id; + goto skip_alloc; +diff --git a/include/hw/vfio/vfio-device.h b/include/hw/vfio/vfio-device.h +index fc28f580ba..27e2976593 100644 +--- a/include/hw/vfio/vfio-device.h ++++ b/include/hw/vfio/vfio-device.h +@@ -260,6 +260,7 @@ void vfio_device_unprepare(VFIODevice *vbasedev); + + int vfio_device_get_feature(VFIODevice *vbasedev, + struct vfio_device_feature *feature); ++bool vfio_device_get_viommu_flags_want_nesting(VFIODevice *vbasedev); + + int vfio_device_get_region_info(VFIODevice *vbasedev, int index, + struct vfio_region_info **info); diff --git a/0233-hw-pci-Introduce-pci_device_get_host_iommu_quirks.patch b/0233-hw-pci-Introduce-pci_device_get_host_iommu_quirks.patch new file mode 100644 index 0000000..ebe28ea --- /dev/null +++ b/0233-hw-pci-Introduce-pci_device_get_host_iommu_quirks.patch @@ -0,0 +1,127 @@ +From 50ad9c0f8f7b0f7c3240fa200866f548424c38d6 Mon Sep 17 00:00:00 2001 +From: Zhenzhong Duan +Date: Tue, 6 Jan 2026 01:28:03 -0500 +Subject: [PATCH] hw/pci: Introduce pci_device_get_host_iommu_quirks() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] f47407de54 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +In VFIO core, we call iommufd_backend_get_device_info() to return vendor +specific hardware information data, but it's not good to retrieve this raw +data in VFIO core. + +Introduce a new PCIIOMMUOps optional callback, get_host_iommu_quirk() which +allows to retrieve the vendor specific hardware information data and convert +it into bitmaps defined with enum host_iommu_quirks. + +pci_device_get_host_iommu_quirks() is a wrapper that can be called on a PCI +device potentially protected by a vIOMMU. + +Suggested-by: Eric Auger +Suggested-by: Nicolin Chen +Signed-off-by: Zhenzhong Duan +Link: https://lore.kernel.org/qemu-devel/20260106062808.316574-2-zhenzhong.duan@intel.com +Signed-off-by: Cédric Le Goater +(cherry picked from commit cd4d7fb72109043d60b5cf6191a1678e96775b98) +Signed-off-by: Eric Auger +--- + hw/pci/pci.c | 12 ++++++++++++ + include/hw/core/iommu.h | 5 +++++ + include/hw/pci/pci.h | 31 +++++++++++++++++++++++++++++++ + 3 files changed, 48 insertions(+) + +diff --git a/hw/pci/pci.c b/hw/pci/pci.c +index 27bb2285d4..1f2d4d76f9 100644 +--- a/hw/pci/pci.c ++++ b/hw/pci/pci.c +@@ -3038,6 +3038,18 @@ uint64_t pci_device_get_viommu_flags(PCIDevice *dev) + return 0; + } + ++uint64_t pci_device_get_host_iommu_quirks(PCIDevice *dev, uint32_t type, ++ void *caps, uint32_t size) ++{ ++ PCIBus *iommu_bus; ++ ++ pci_device_get_iommu_bus_devfn(dev, &iommu_bus, NULL, NULL); ++ if (iommu_bus && iommu_bus->iommu_ops->get_host_iommu_quirks) { ++ return iommu_bus->iommu_ops->get_host_iommu_quirks(type, caps, size); ++ } ++ return 0; ++} ++ + int pci_pri_request_page(PCIDevice *dev, uint32_t pasid, bool priv_req, + bool exec_req, hwaddr addr, bool lpig, + uint16_t prgi, bool is_read, bool is_write) +diff --git a/include/hw/core/iommu.h b/include/hw/core/iommu.h +index fcbbcd1015..d5401a397b 100644 +--- a/include/hw/core/iommu.h ++++ b/include/hw/core/iommu.h +@@ -22,4 +22,9 @@ enum viommu_flags { + VIOMMU_FLAG_WANT_NESTING_PARENT = BIT_ULL(0), + }; + ++/* Host IOMMU quirks. Extracted from host IOMMU capabilities */ ++enum host_iommu_quirks { ++ HOST_IOMMU_QUIRK_NESTING_PARENT_BYPASS_RO = BIT_ULL(0), ++}; ++ + #endif /* HW_IOMMU_H */ +diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h +index 299e7f94da..528faafad2 100644 +--- a/include/hw/pci/pci.h ++++ b/include/hw/pci/pci.h +@@ -493,6 +493,23 @@ typedef struct PCIIOMMUOps { + * enum viommu_flags. + */ + uint64_t (*get_viommu_flags)(void *opaque); ++ /** ++ * @get_host_iommu_quirks: get host IOMMU quirks ++ * ++ * Optional callback, if not implemented, then vIOMMU doesn't support ++ * converting @type specific hardware information data into a standard ++ * bitmap format. ++ * ++ * @type: IOMMU hardware info type ++ * ++ * @caps: IOMMU @type specific hardware information data ++ * ++ * @size: size of @caps ++ * ++ * Returns: bitmap with each bit representing a host IOMMU quirk defined in ++ * enum host_iommu_quirks ++ */ ++ uint64_t (*get_host_iommu_quirks)(uint32_t type, void *caps, uint32_t size); + /** + * @get_iotlb_info: get properties required to initialize a device IOTLB. + * +@@ -685,6 +702,20 @@ void pci_device_unset_iommu_device(PCIDevice *dev); + */ + uint64_t pci_device_get_viommu_flags(PCIDevice *dev); + ++/** ++ * pci_device_get_host_iommu_quirks: get host IOMMU quirks. ++ * ++ * Returns: bitmap with each bit representing a host IOMMU quirk defined in ++ * enum host_iommu_quirks. Or 0 if vIOMMU doesn't convert any. ++ * ++ * @dev: PCI device pointer. ++ * @type: IOMMU hardware info type ++ * @caps: IOMMU @type specific hardware information data ++ * @size: size of @caps ++ */ ++uint64_t pci_device_get_host_iommu_quirks(PCIDevice *dev, uint32_t type, ++ void *caps, uint32_t size); ++ + /** + * pci_iommu_get_iotlb_info: get properties required to initialize a + * device IOTLB. diff --git a/0234-hw-arm-smmuv3-Implement-get_viommu_cap-callback.patch b/0234-hw-arm-smmuv3-Implement-get_viommu_cap-callback.patch new file mode 100644 index 0000000..84c3a3c --- /dev/null +++ b/0234-hw-arm-smmuv3-Implement-get_viommu_cap-callback.patch @@ -0,0 +1,67 @@ +From 988158e7abb6d8339d18852f32412909d29b2dd0 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:08 +0000 +Subject: [PATCH] hw/arm/smmuv3: Implement get_viommu_cap() callback +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] ffc1ebd609 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +For accelerated SMMUv3, we need nested parent domain creation. Add the +callback support so that VFIO can create a nested parent. + +Reviewed-by: Nicolin Chen +Reviewed-by: Jonathan Cameron +Signed-off-by: Shameer Kolothum +Tested-by: Zhangfei Gao +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit d5627b6051449a153dde8ed786d01ac2b50f3f84) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index 2fcd301322..be09cf8b73 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -10,6 +10,7 @@ + #include "qemu/error-report.h" + + #include "hw/arm/smmuv3.h" ++#include "hw/core/iommu.h" + #include "hw/pci/pci_bridge.h" + #include "hw/pci-host/gpex.h" + #include "hw/vfio/pci.h" +@@ -129,9 +130,21 @@ static AddressSpace *smmuv3_accel_find_add_as(PCIBus *bus, void *opaque, + } + } + ++static uint64_t smmuv3_accel_get_viommu_flags(void *opaque) ++{ ++ /* ++ * We return VIOMMU_FLAG_WANT_NESTING_PARENT to inform VFIO core to create a ++ * nesting parent which is required for accelerated SMMUv3 support. ++ * The real HW nested support should be reported from host SMMUv3 and if ++ * it doesn't, the nesting parent allocation will fail anyway in VFIO core. ++ */ ++ return VIOMMU_FLAG_WANT_NESTING_PARENT; ++} ++ + static const PCIIOMMUOps smmuv3_accel_ops = { + .supports_address_space = smmuv3_accel_supports_as, + .get_address_space = smmuv3_accel_find_add_as, ++ .get_viommu_flags = smmuv3_accel_get_viommu_flags, + }; + + static void smmuv3_accel_as_init(SMMUv3State *s) diff --git a/0235-hw-arm-smmuv3-common-Define-STE-CD-fields-via-regist.patch b/0235-hw-arm-smmuv3-common-Define-STE-CD-fields-via-regist.patch new file mode 100644 index 0000000..a69cc4a --- /dev/null +++ b/0235-hw-arm-smmuv3-common-Define-STE-CD-fields-via-regist.patch @@ -0,0 +1,231 @@ +From 1fc8ea73876edeec7b13730e07b152be91fc271c Mon Sep 17 00:00:00 2001 +From: Tao Tang +Date: Sun, 21 Dec 2025 12:46:12 +0800 +Subject: [PATCH] hw/arm/smmuv3-common: Define STE/CD fields via registerfields +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 141bb744e2 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Conflicts: replace hw/core/registerfields.h by former + hw/registerfields.h because we don't have +3e7316044d9c include: move hw/registerfields.h to hw/core/ + +Switch STE/CD bitfield definitions and accessors to the +'registerfields.h' REG/FIELD API. + +Signed-off-by: Tao Tang +Reviewed-by: Pierrick Bouvier +Reviewed-by: Eric Auger +Message-ID: <20260119161112.3841386-3-tangtao1634@phytium.com.cn> +[PMD: Updated STE::CTXPTR_HI, STE::S2TTB_HI and CD:TTBx_HI lengths] +Signed-off-by: Philippe Mathieu-Daudé +(cherry picked from commit 0a50d06fa1dd5425077c71f223ef29be9b36fe45) +Signed-off-by: Eric Auger +--- + include/hw/arm/smmuv3-common.h | 169 +++++++++++++++++++++++---------- + 1 file changed, 120 insertions(+), 49 deletions(-) + +diff --git a/include/hw/arm/smmuv3-common.h b/include/hw/arm/smmuv3-common.h +index 9da817f41a..90300ad61c 100644 +--- a/include/hw/arm/smmuv3-common.h ++++ b/include/hw/arm/smmuv3-common.h +@@ -11,6 +11,8 @@ + #ifndef HW_ARM_SMMUV3_COMMON_H + #define HW_ARM_SMMUV3_COMMON_H + ++#include "hw/registerfields.h" ++ + /* Configuration Data */ + + /* STE Level 1 Descriptor */ +@@ -35,63 +37,132 @@ typedef struct CD { + + /* STE fields */ + +-#define STE_VALID(x) extract32((x)->word[0], 0, 1) ++REG32(STE_0, 0) ++ FIELD(STE_0, VALID, 0, 1) ++ FIELD(STE_0, CONFIG, 1, 3) ++ FIELD(STE_0, S1FMT, 4, 2) ++ FIELD(STE_0, CTXPTR_LO, 6, 26) ++REG32(STE_1, 4) ++ FIELD(STE_1, CTXPTR_HI, 0, 24) ++ FIELD(STE_1, S1CDMAX, 27, 5) ++REG32(STE_2, 8) ++ FIELD(STE_2, S1STALLD, 27, 1) ++ FIELD(STE_2, EATS, 28, 2) ++ FIELD(STE_2, STRW, 30, 2) ++REG32(STE_4, 16) ++ FIELD(STE_4, S2VMID, 0, 16) ++REG32(STE_5, 20) ++ FIELD(STE_5, S2T0SZ, 0, 6) ++ FIELD(STE_5, S2SL0, 6, 2) ++ FIELD(STE_5, S2TG, 14, 2) ++ FIELD(STE_5, S2PS, 16, 3) ++ FIELD(STE_5, S2AA64, 19, 1) ++ FIELD(STE_5, S2ENDI, 20, 1) ++ FIELD(STE_5, S2AFFD, 21, 1) ++ FIELD(STE_5, S2HD, 23, 1) ++ FIELD(STE_5, S2HA, 24, 1) ++ FIELD(STE_5, S2S, 25, 1) ++ FIELD(STE_5, S2R, 26, 1) ++REG32(STE_6, 24) ++ FIELD(STE_6, S2TTB_LO, 4, 28) ++REG32(STE_7, 28) ++ FIELD(STE_7, S2TTB_HI, 0, 20) ++ ++/* Get STE fields */ ++#define STE_VALID(x) FIELD_EX32((x)->word[0], STE_0, VALID) ++#define STE_CONFIG(x) FIELD_EX32((x)->word[0], STE_0, CONFIG) ++#define STE_S1FMT(x) FIELD_EX32((x)->word[0], STE_0, S1FMT) ++#define STE_CTXPTR(x) \ ++ (((uint64_t)FIELD_EX32((x)->word[0], STE_0, CTXPTR_LO) << 6) | \ ++ ((uint64_t)FIELD_EX32((x)->word[1], STE_1, CTXPTR_HI) << 32)) ++#define STE_S1CDMAX(x) FIELD_EX32((x)->word[1], STE_1, S1CDMAX) ++#define STE_S1STALLD(x) FIELD_EX32((x)->word[2], STE_2, S1STALLD) ++#define STE_EATS(x) FIELD_EX32((x)->word[2], STE_2, EATS) ++#define STE_STRW(x) FIELD_EX32((x)->word[2], STE_2, STRW) ++#define STE_S2VMID(x) FIELD_EX32((x)->word[4], STE_4, S2VMID) ++#define STE_S2T0SZ(x) FIELD_EX32((x)->word[5], STE_5, S2T0SZ) ++#define STE_S2SL0(x) FIELD_EX32((x)->word[5], STE_5, S2SL0) ++#define STE_S2TG(x) FIELD_EX32((x)->word[5], STE_5, S2TG) ++#define STE_S2PS(x) FIELD_EX32((x)->word[5], STE_5, S2PS) ++#define STE_S2AA64(x) FIELD_EX32((x)->word[5], STE_5, S2AA64) ++#define STE_S2ENDI(x) FIELD_EX32((x)->word[5], STE_5, S2ENDI) ++#define STE_S2AFFD(x) FIELD_EX32((x)->word[5], STE_5, S2AFFD) ++#define STE_S2HD(x) FIELD_EX32((x)->word[5], STE_5, S2HD) ++#define STE_S2HA(x) FIELD_EX32((x)->word[5], STE_5, S2HA) ++#define STE_S2S(x) FIELD_EX32((x)->word[5], STE_5, S2S) ++#define STE_S2R(x) FIELD_EX32((x)->word[5], STE_5, S2R) ++#define STE_S2TTB(x) \ ++ (((uint64_t)FIELD_EX32((x)->word[6], STE_6, S2TTB_LO) << 4) | \ ++ ((uint64_t)FIELD_EX32((x)->word[7], STE_7, S2TTB_HI) << 32)) + +-#define STE_CONFIG(x) extract32((x)->word[0], 1, 3) + #define STE_CFG_S1_ENABLED(config) (config & 0x1) + #define STE_CFG_S2_ENABLED(config) (config & 0x2) + #define STE_CFG_ABORT(config) (!(config & 0x4)) + #define STE_CFG_BYPASS(config) (config == 0x4) + +-#define STE_S1FMT(x) extract32((x)->word[0], 4 , 2) +-#define STE_S1CDMAX(x) extract32((x)->word[1], 27, 5) +-#define STE_S1STALLD(x) extract32((x)->word[2], 27, 1) +-#define STE_EATS(x) extract32((x)->word[2], 28, 2) +-#define STE_STRW(x) extract32((x)->word[2], 30, 2) +-#define STE_S2VMID(x) extract32((x)->word[4], 0 , 16) +-#define STE_S2T0SZ(x) extract32((x)->word[5], 0 , 6) +-#define STE_S2SL0(x) extract32((x)->word[5], 6 , 2) +-#define STE_S2TG(x) extract32((x)->word[5], 14, 2) +-#define STE_S2PS(x) extract32((x)->word[5], 16, 3) +-#define STE_S2AA64(x) extract32((x)->word[5], 19, 1) +-#define STE_S2ENDI(x) extract32((x)->word[5], 20, 1) +-#define STE_S2AFFD(x) extract32((x)->word[5], 21, 1) +-#define STE_S2HD(x) extract32((x)->word[5], 23, 1) +-#define STE_S2HA(x) extract32((x)->word[5], 24, 1) +-#define STE_S2S(x) extract32((x)->word[5], 25, 1) +-#define STE_S2R(x) extract32((x)->word[5], 26, 1) +- +-#define STE_CTXPTR(x) \ +- ((extract64((x)->word[1], 0, 16) << 32) | \ +- ((x)->word[0] & 0xffffffc0)) +- +-#define STE_S2TTB(x) \ +- ((extract64((x)->word[7], 0, 16) << 32) | \ +- ((x)->word[6] & 0xfffffff0)) +- + /* CD fields */ + +-#define CD_VALID(x) extract32((x)->word[0], 31, 1) +-#define CD_ASID(x) extract32((x)->word[1], 16, 16) +-#define CD_TTB(x, sel) \ +- ((extract64((x)->word[(sel) * 2 + 3], 0, 19) << 32) | \ +- ((x)->word[(sel) * 2 + 2] & ~0xfULL)) +- +-#define CD_HAD(x, sel) extract32((x)->word[(sel) * 2 + 2], 1, 1) +- +-#define CD_TSZ(x, sel) extract32((x)->word[0], (16 * (sel)) + 0, 6) +-#define CD_TG(x, sel) extract32((x)->word[0], (16 * (sel)) + 6, 2) +-#define CD_EPD(x, sel) extract32((x)->word[0], (16 * (sel)) + 14, 1) +-#define CD_ENDI(x) extract32((x)->word[0], 15, 1) +-#define CD_IPS(x) extract32((x)->word[1], 0 , 3) +-#define CD_AFFD(x) extract32((x)->word[1], 3 , 1) +-#define CD_TBI(x) extract32((x)->word[1], 6 , 2) +-#define CD_HD(x) extract32((x)->word[1], 10 , 1) +-#define CD_HA(x) extract32((x)->word[1], 11 , 1) +-#define CD_S(x) extract32((x)->word[1], 12, 1) +-#define CD_R(x) extract32((x)->word[1], 13, 1) +-#define CD_A(x) extract32((x)->word[1], 14, 1) +-#define CD_AARCH64(x) extract32((x)->word[1], 9 , 1) ++REG32(CD_0, 0) ++ FIELD(CD_0, TSZ0, 0, 6) ++ FIELD(CD_0, TG0, 6, 2) ++ FIELD(CD_0, EPD0, 14, 1) ++ FIELD(CD_0, ENDI, 15, 1) ++ FIELD(CD_0, TSZ1, 16, 6) ++ FIELD(CD_0, TG1, 22, 2) ++ FIELD(CD_0, EPD1, 30, 1) ++ FIELD(CD_0, VALID, 31, 1) ++REG32(CD_1, 4) ++ FIELD(CD_1, IPS, 0, 3) ++ FIELD(CD_1, AFFD, 3, 1) ++ FIELD(CD_1, TBI, 6, 2) ++ FIELD(CD_1, AARCH64, 9, 1) ++ FIELD(CD_1, HD, 10, 1) ++ FIELD(CD_1, HA, 11, 1) ++ FIELD(CD_1, S, 12, 1) ++ FIELD(CD_1, R, 13, 1) ++ FIELD(CD_1, A, 14, 1) ++ FIELD(CD_1, ASID, 16, 16) ++REG32(CD_2, 8) ++ FIELD(CD_2, HAD0, 1, 1) ++ FIELD(CD_2, TTB0_LO, 4, 28) ++REG32(CD_3, 12) ++ FIELD(CD_3, TTB0_HI, 0, 20) ++REG32(CD_4, 16) ++ FIELD(CD_4, HAD1, 1, 1) ++ FIELD(CD_4, TTB1_LO, 4, 28) ++REG32(CD_5, 20) ++ FIELD(CD_5, TTB1_HI, 0, 20) ++ ++/* Get CD fields */ ++#define CD_TSZ(x, sel) ((sel) ? \ ++ FIELD_EX32((x)->word[0], CD_0, TSZ1) : \ ++ FIELD_EX32((x)->word[0], CD_0, TSZ0)) ++#define CD_TG(x, sel) ((sel) ? \ ++ FIELD_EX32((x)->word[0], CD_0, TG1) : \ ++ FIELD_EX32((x)->word[0], CD_0, TG0)) ++#define CD_EPD(x, sel) ((sel) ? \ ++ FIELD_EX32((x)->word[0], CD_0, EPD1) : \ ++ FIELD_EX32((x)->word[0], CD_0, EPD0)) ++#define CD_ENDI(x) FIELD_EX32((x)->word[0], CD_0, ENDI) ++#define CD_VALID(x) FIELD_EX32((x)->word[0], CD_0, VALID) ++#define CD_IPS(x) FIELD_EX32((x)->word[1], CD_1, IPS) ++#define CD_AFFD(x) FIELD_EX32((x)->word[1], CD_1, AFFD) ++#define CD_TBI(x) FIELD_EX32((x)->word[1], CD_1, TBI) ++#define CD_AARCH64(x) FIELD_EX32((x)->word[1], CD_1, AARCH64) ++#define CD_HD(x) FIELD_EX32((x)->word[1], CD_1, HD) ++#define CD_HA(x) FIELD_EX32((x)->word[1], CD_1, HA) ++#define CD_S(x) FIELD_EX32((x)->word[1], CD_1, S) ++#define CD_R(x) FIELD_EX32((x)->word[1], CD_1, R) ++#define CD_A(x) FIELD_EX32((x)->word[1], CD_1, A) ++#define CD_ASID(x) FIELD_EX32((x)->word[1], CD_1, ASID) ++#define CD_HAD(x, sel) ((sel) ? \ ++ FIELD_EX32((x)->word[4], CD_4, HAD1) : \ ++ FIELD_EX32((x)->word[2], CD_2, HAD0)) ++#define CD_TTB(x, sel) \ ++ ((sel) ? (((uint64_t)FIELD_EX32((x)->word[5], CD_5, TTB1_HI) << 32) | \ ++ ((uint64_t)FIELD_EX32((x)->word[4], CD_4, TTB1_LO) << 4)) : \ ++ (((uint64_t)FIELD_EX32((x)->word[3], CD_3, TTB0_HI) << 32) | \ ++ ((uint64_t)FIELD_EX32((x)->word[2], CD_2, TTB0_LO) << 4))) + + /* MMIO Registers */ + diff --git a/0236-hw-arm-smmuv3-common-Add-NSCFG-bit-definition-for-CD.patch b/0236-hw-arm-smmuv3-common-Add-NSCFG-bit-definition-for-CD.patch new file mode 100644 index 0000000..a03ad56 --- /dev/null +++ b/0236-hw-arm-smmuv3-common-Add-NSCFG-bit-definition-for-CD.patch @@ -0,0 +1,59 @@ +From 7fcb330f5c15bc22d41116a6833ab6865d8402aa Mon Sep 17 00:00:00 2001 +From: Tao Tang +Date: Sun, 21 Dec 2025 16:25:11 +0800 +Subject: [PATCH] hw/arm/smmuv3-common: Add NSCFG bit definition for CD +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 37b34aa757 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Add NSCFG bit definition for CD structure. This allows proper +configuration of non-secure access settings in CD. + +Signed-off-by: Tao Tang +Reviewed-by: Pierrick Bouvier +Reviewed-by: Eric Auger +Message-ID: <20260119161112.3841386-5-tangtao1634@phytium.com.cn> +Signed-off-by: Philippe Mathieu-Daudé +(cherry picked from commit ee1c84ded10cf82674e494df4f6b92aef099e4fb) +Signed-off-by: Eric Auger +--- + include/hw/arm/smmuv3-common.h | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/include/hw/arm/smmuv3-common.h b/include/hw/arm/smmuv3-common.h +index 90300ad61c..06ef6e7720 100644 +--- a/include/hw/arm/smmuv3-common.h ++++ b/include/hw/arm/smmuv3-common.h +@@ -123,11 +123,13 @@ REG32(CD_1, 4) + FIELD(CD_1, A, 14, 1) + FIELD(CD_1, ASID, 16, 16) + REG32(CD_2, 8) ++ FIELD(CD_2, NSCFG0, 0, 1) + FIELD(CD_2, HAD0, 1, 1) + FIELD(CD_2, TTB0_LO, 4, 28) + REG32(CD_3, 12) + FIELD(CD_3, TTB0_HI, 0, 20) + REG32(CD_4, 16) ++ FIELD(CD_4, NSCFG1, 0, 1) + FIELD(CD_4, HAD1, 1, 1) + FIELD(CD_4, TTB1_LO, 4, 28) + REG32(CD_5, 20) +@@ -155,6 +157,9 @@ REG32(CD_5, 20) + #define CD_R(x) FIELD_EX32((x)->word[1], CD_1, R) + #define CD_A(x) FIELD_EX32((x)->word[1], CD_1, A) + #define CD_ASID(x) FIELD_EX32((x)->word[1], CD_1, ASID) ++#define CD_NSCFG(x, sel) ((sel) ? \ ++ FIELD_EX32((x)->word[4], CD_4, NSCFG1) : \ ++ FIELD_EX32((x)->word[2], CD_2, NSCFG0)) + #define CD_HAD(x, sel) ((sel) ? \ + FIELD_EX32((x)->word[4], CD_4, HAD1) : \ + FIELD_EX32((x)->word[2], CD_2, HAD0)) diff --git a/0237-hw-arm-smmuv3-common-Add-STE-CD-set-helpers-for-repe.patch b/0237-hw-arm-smmuv3-common-Add-STE-CD-set-helpers-for-repe.patch new file mode 100644 index 0000000..fd8eb7d --- /dev/null +++ b/0237-hw-arm-smmuv3-common-Add-STE-CD-set-helpers-for-repe.patch @@ -0,0 +1,129 @@ +From d69877e2da36fae3b60f481888987cac75a279e0 Mon Sep 17 00:00:00 2001 +From: Tao Tang +Date: Sun, 21 Dec 2025 16:28:00 +0800 +Subject: [PATCH] hw/arm/smmuv3-common: Add STE/CD set helpers for repeated + field setup +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] c609d0ab83 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +This change introduces STE_SET_* and CD_SET_* helpers to centralize and +simplify repeated field setting logic. + +Signed-off-by: Tao Tang +Reviewed-by: Pierrick Bouvier +Reviewed-by: Eric Auger +Message-ID: <20260119161112.3841386-6-tangtao1634@phytium.com.cn> +Signed-off-by: Philippe Mathieu-Daudé +(cherry picked from commit 59a6b74aeb34c185e261a0cc8d0beb4591388422) +Signed-off-by: Eric Auger +--- + include/hw/arm/smmuv3-common.h | 79 ++++++++++++++++++++++++++++++++++ + 1 file changed, 79 insertions(+) + +diff --git a/include/hw/arm/smmuv3-common.h b/include/hw/arm/smmuv3-common.h +index 06ef6e7720..30101915e2 100644 +--- a/include/hw/arm/smmuv3-common.h ++++ b/include/hw/arm/smmuv3-common.h +@@ -100,6 +100,37 @@ REG32(STE_7, 28) + #define STE_CFG_ABORT(config) (!(config & 0x4)) + #define STE_CFG_BYPASS(config) (config == 0x4) + ++/* Update STE fields */ ++#define STE_SET_VALID(ste, v) \ ++ ((ste)->word[0] = FIELD_DP32((ste)->word[0], STE_0, VALID, (v))) ++#define STE_SET_CONFIG(ste, v) \ ++ ((ste)->word[0] = FIELD_DP32((ste)->word[0], STE_0, CONFIG, (v))) ++ ++#define STE_SET_CTXPTR(ste, v) do { \ ++ (ste)->word[0] = FIELD_DP32((ste)->word[0], STE_0, CTXPTR_LO, (v) >> 6); \ ++ (ste)->word[1] = FIELD_DP32((ste)->word[1], STE_1, CTXPTR_HI, (v) >> 32); \ ++} while (0) ++#define STE_SET_S2T0SZ(ste, v) \ ++ ((ste)->word[5] = FIELD_DP32((ste)->word[5], STE_5, S2T0SZ, (v))) ++#define STE_SET_S2SL0(ste, v) \ ++ ((ste)->word[5] = FIELD_DP32((ste)->word[5], STE_5, S2SL0, (v))) ++#define STE_SET_S2TG(ste, v) \ ++ ((ste)->word[5] = FIELD_DP32((ste)->word[5], STE_5, S2TG, (v))) ++#define STE_SET_S2PS(ste, v) \ ++ ((ste)->word[5] = FIELD_DP32((ste)->word[5], STE_5, S2PS, (v))) ++#define STE_SET_S2AA64(ste, v) \ ++ ((ste)->word[5] = FIELD_DP32((ste)->word[5], STE_5, S2AA64, (v))) ++#define STE_SET_S2ENDI(ste, v) \ ++ ((ste)->word[5] = FIELD_DP32((ste)->word[5], STE_5, S2ENDI, (v))) ++#define STE_SET_S2AFFD(ste, v) \ ++ ((ste)->word[5] = FIELD_DP32((ste)->word[5], STE_5, S2AFFD, (v))) ++#define STE_SET_S2S(ste, v) \ ++ ((ste)->word[5] = FIELD_DP32((ste)->word[5], STE_5, S2S, (v))) ++#define STE_SET_S2TTB(ste, v) do { \ ++ (ste)->word[6] = FIELD_DP32((ste)->word[6], STE_6, S2TTB_LO, (v) >> 4); \ ++ (ste)->word[7] = FIELD_DP32((ste)->word[7], STE_7, S2TTB_HI, (v) >> 32); \ ++} while (0) ++ + /* CD fields */ + + REG32(CD_0, 0) +@@ -169,6 +200,54 @@ REG32(CD_5, 20) + (((uint64_t)FIELD_EX32((x)->word[3], CD_3, TTB0_HI) << 32) | \ + ((uint64_t)FIELD_EX32((x)->word[2], CD_2, TTB0_LO) << 4))) + ++/* Update CD fields */ ++#define CD_SET_VALID(cd, v) \ ++ ((cd)->word[0] = FIELD_DP32((cd)->word[0], CD_0, VALID, (v))) ++#define CD_SET_ASID(cd, v) \ ++ ((cd)->word[1] = FIELD_DP32((cd)->word[1], CD_1, ASID, (v))) ++#define CD_SET_TTB(cd, sel, v) do { \ ++ if (sel) { \ ++ (cd)->word[4] = FIELD_DP32((cd)->word[4], CD_4, TTB1_LO, (v) >> 4); \ ++ (cd)->word[5] = FIELD_DP32((cd)->word[5], CD_5, TTB1_HI, (v) >> 32); \ ++ } else { \ ++ (cd)->word[2] = FIELD_DP32((cd)->word[2], CD_2, TTB0_LO, (v) >> 4); \ ++ (cd)->word[3] = FIELD_DP32((cd)->word[3], CD_3, TTB0_HI, (v) >> 32); \ ++ } \ ++} while (0) ++ ++#define CD_SET_TSZ(cd, sel, v) \ ++ ((cd)->word[0] = (sel) ? FIELD_DP32((cd)->word[0], CD_0, TSZ1, (v)) : \ ++ FIELD_DP32((cd)->word[0], CD_0, TSZ0, (v))) ++#define CD_SET_TG(cd, sel, v) \ ++ ((cd)->word[0] = (sel) ? FIELD_DP32((cd)->word[0], CD_0, TG1, (v)) : \ ++ FIELD_DP32((cd)->word[0], CD_0, TG0, (v))) ++#define CD_SET_EPD(cd, sel, v) \ ++ ((cd)->word[0] = (sel) ? FIELD_DP32((cd)->word[0], CD_0, EPD1, (v)) : \ ++ FIELD_DP32((cd)->word[0], CD_0, EPD0, (v))) ++#define CD_SET_ENDI(cd, v) \ ++ ((cd)->word[0] = FIELD_DP32((cd)->word[0], CD_0, ENDI, (v))) ++#define CD_SET_IPS(cd, v) \ ++ ((cd)->word[1] = FIELD_DP32((cd)->word[1], CD_1, IPS, (v))) ++#define CD_SET_AFFD(cd, v) \ ++ ((cd)->word[1] = FIELD_DP32((cd)->word[1], CD_1, AFFD, (v))) ++#define CD_SET_TBI(cd, v) \ ++ ((cd)->word[1] = FIELD_DP32((cd)->word[1], CD_1, TBI, (v))) ++#define CD_SET_HD(cd, v) \ ++ ((cd)->word[1] = FIELD_DP32((cd)->word[1], CD_1, HD, (v))) ++#define CD_SET_HA(cd, v) \ ++ ((cd)->word[1] = FIELD_DP32((cd)->word[1], CD_1, HA, (v))) ++#define CD_SET_S(cd, v) \ ++ ((cd)->word[1] = FIELD_DP32((cd)->word[1], CD_1, S, (v))) ++#define CD_SET_R(cd, v) \ ++ ((cd)->word[1] = FIELD_DP32((cd)->word[1], CD_1, R, (v))) ++#define CD_SET_A(cd, v) \ ++ ((cd)->word[1] = FIELD_DP32((cd)->word[1], CD_1, A, (v))) ++#define CD_SET_AARCH64(cd, v) \ ++ ((cd)->word[1] = FIELD_DP32((cd)->word[1], CD_1, AARCH64, (v))) ++#define CD_SET_NSCFG(cd, sel, v) \ ++ ((sel) ? ((cd)->word[4] = FIELD_DP32((cd)->word[4], CD_4, NSCFG1, (v))) : \ ++ ((cd)->word[2] = FIELD_DP32((cd)->word[2], CD_2, NSCFG0, (v)))) ++ + /* MMIO Registers */ + + REG32(IDR0, 0x0) diff --git a/0238-hw-arm-smmuv3-accel-Add-set-unset_iommu_device-callb.patch b/0238-hw-arm-smmuv3-accel-Add-set-unset_iommu_device-callb.patch new file mode 100644 index 0000000..cb18f32 --- /dev/null +++ b/0238-hw-arm-smmuv3-accel-Add-set-unset_iommu_device-callb.patch @@ -0,0 +1,359 @@ +From 244929f2728e2f2d6699968c75bd27dfe456207f Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 26 Jan 2026 10:43:09 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Add set/unset_iommu_device callback +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 23abfb0a73 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Implement the VFIO/PCI callbacks to attach and detach a HostIOMMUDevice +to a vSMMUv3 when accel=on, + + - set_iommu_device(): attach a HostIOMMUDevice to a vIOMMU + - unset_iommu_device(): detach and release associated resources + +In SMMUv3 accel=on mode, the guest SMMUv3 is backed by the host SMMUv3 via +IOMMUFD. A vIOMMU object (created via IOMMU_VIOMMU_ALLOC) provides a per-VM, +security-isolated handle to the physical SMMUv3. Without a vIOMMU, the +vSMMUv3 cannot relay guest operations to the host hardware nor maintain +isolation across VMs or devices. Therefore, set_iommu_device() allocates +a vIOMMU object if one does not already exist. + +There are two main points to consider in this implementation: + +1) VFIO core allocates and attaches a S2 HWPT that acts as the nesting + parent for nested HWPTs(IOMMU_DOMAIN_NESTED). This parent HWPT will + be shared across multiple vSMMU instances within a VM. + +2) A device cannot attach directly to a vIOMMU. Instead, it attaches + through a proxy nested HWPT (IOMMU_DOMAIN_NESTED). Based on the STE + configuration,there are three types of nested HWPTs: bypass, abort, + and translate. + -The bypass and abort proxy HWPTs are pre-allocated. When SMMUv3 + operates in global abort or bypass modes, as controlled by the GBPA + register, or issues a vSTE for bypass or abort we attach these + pre-allocated nested HWPTs. + -The translate HWPT requires a vDEVICE to be allocated first, since + invalidations and events depend on a valid vSID. + -The vDEVICE allocation and attach operations for vSTE based HWPTs + are implemented in subsequent patches. + +In summary, a device placed behind a vSMMU instance must have a vSID for +translate vSTE. The bypass and abort vSTEs are pre-allocated as proxy +nested HWPTs and is attached based on GBPA register. The core-managed +nesting parent S2 HWPT is used as parent S2 HWPT for all the nested +HWPTs and is intended to be shared across vSMMU instances within the +same VM. + +set_iommu_device(): + - Reuse an existing vIOMMU for the same physical SMMU if available. + If not, allocate a new one using the nesting parent S2 HWPT. + - Pre-allocate two proxy nested HWPTs (bypass and abort) under the + vIOMMU and install one based on GBPA.ABORT value. + - Add the device to the vIOMMU’s device list. + +unset_iommu_device(): + - Re-attach device to the nesting parent S2 HWPT. + - Remove the device from the vIOMMU’s device list. + - If the list is empty, free the proxy HWPTs (bypass and abort) + and release the vIOMMU object. + +Introduce struct SMMUv3AccelState, representing an accelerated SMMUv3 +instance backed by an iommufd vIOMMU object, and storing the bypass and +abort proxy HWPT IDs. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +Tested-by: Zhangfei Gao +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 8179446f57e55fed93789425337f7ed98a089234) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 156 +++++++++++++++++++++++++++++++++ + hw/arm/smmuv3-accel.h | 18 ++++ + hw/arm/trace-events | 4 + + include/hw/arm/smmuv3-common.h | 3 + + include/hw/arm/smmuv3.h | 1 + + 5 files changed, 182 insertions(+) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index be09cf8b73..9c2b917a11 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -8,6 +8,7 @@ + + #include "qemu/osdep.h" + #include "qemu/error-report.h" ++#include "trace.h" + + #include "hw/arm/smmuv3.h" + #include "hw/core/iommu.h" +@@ -15,6 +16,7 @@ + #include "hw/pci-host/gpex.h" + #include "hw/vfio/pci.h" + ++#include "smmuv3-internal.h" + #include "smmuv3-accel.h" + + /* +@@ -43,6 +45,157 @@ static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState *bs, SMMUPciBus *sbus, + return accel_dev; + } + ++static uint32_t smmuv3_accel_gbpa_hwpt(SMMUv3State *s, SMMUv3AccelState *accel) ++{ ++ return FIELD_EX32(s->gbpa, GBPA, ABORT) ? ++ accel->abort_hwpt_id : accel->bypass_hwpt_id; ++} ++ ++static bool ++smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, ++ Error **errp) ++{ ++ SMMUv3AccelState *accel = s->s_accel; ++ struct iommu_hwpt_arm_smmuv3 bypass_data = { ++ .ste = { SMMU_STE_CFG_BYPASS | SMMU_STE_VALID, 0x0ULL }, ++ }; ++ struct iommu_hwpt_arm_smmuv3 abort_data = { ++ .ste = { SMMU_STE_VALID, 0x0ULL }, ++ }; ++ uint32_t s2_hwpt_id = idev->hwpt_id; ++ uint32_t viommu_id, hwpt_id; ++ IOMMUFDViommu *viommu; ++ ++ if (!iommufd_backend_alloc_viommu(idev->iommufd, idev->devid, ++ IOMMU_VIOMMU_TYPE_ARM_SMMUV3, ++ s2_hwpt_id, &viommu_id, errp)) { ++ return false; ++ } ++ ++ viommu = g_new0(IOMMUFDViommu, 1); ++ viommu->viommu_id = viommu_id; ++ viommu->s2_hwpt_id = s2_hwpt_id; ++ viommu->iommufd = idev->iommufd; ++ ++ /* ++ * Pre-allocate HWPTs for S1 bypass and abort cases. These will be attached ++ * later for guest STEs or GBPAs that require bypass or abort configuration. ++ */ ++ if (!iommufd_backend_alloc_hwpt(idev->iommufd, idev->devid, viommu_id, ++ 0, IOMMU_HWPT_DATA_ARM_SMMUV3, ++ sizeof(abort_data), &abort_data, ++ &accel->abort_hwpt_id, errp)) { ++ goto free_viommu; ++ } ++ ++ if (!iommufd_backend_alloc_hwpt(idev->iommufd, idev->devid, viommu_id, ++ 0, IOMMU_HWPT_DATA_ARM_SMMUV3, ++ sizeof(bypass_data), &bypass_data, ++ &accel->bypass_hwpt_id, errp)) { ++ goto free_abort_hwpt; ++ } ++ ++ /* Attach a HWPT based on SMMUv3 GBPA.ABORT value */ ++ hwpt_id = smmuv3_accel_gbpa_hwpt(s, accel); ++ if (!host_iommu_device_iommufd_attach_hwpt(idev, hwpt_id, errp)) { ++ goto free_bypass_hwpt; ++ } ++ accel->viommu = viommu; ++ return true; ++ ++free_bypass_hwpt: ++ iommufd_backend_free_id(idev->iommufd, accel->bypass_hwpt_id); ++free_abort_hwpt: ++ iommufd_backend_free_id(idev->iommufd, accel->abort_hwpt_id); ++free_viommu: ++ iommufd_backend_free_id(idev->iommufd, viommu->viommu_id); ++ g_free(viommu); ++ return false; ++} ++ ++static bool smmuv3_accel_set_iommu_device(PCIBus *bus, void *opaque, int devfn, ++ HostIOMMUDevice *hiod, Error **errp) ++{ ++ HostIOMMUDeviceIOMMUFD *idev = HOST_IOMMU_DEVICE_IOMMUFD(hiod); ++ SMMUState *bs = opaque; ++ SMMUv3State *s = ARM_SMMUV3(bs); ++ SMMUPciBus *sbus = smmu_get_sbus(bs, bus); ++ SMMUv3AccelDevice *accel_dev = smmuv3_accel_get_dev(bs, sbus, bus, devfn); ++ ++ if (!idev) { ++ return true; ++ } ++ ++ if (accel_dev->idev) { ++ if (accel_dev->idev != idev) { ++ error_setg(errp, "Device already has an associated idev 0x%x", ++ idev->devid); ++ return false; ++ } ++ return true; ++ } ++ ++ if (s->s_accel->viommu) { ++ goto done; ++ } ++ ++ if (!smmuv3_accel_alloc_viommu(s, idev, errp)) { ++ error_append_hint(errp, "Unable to alloc vIOMMU: idev devid 0x%x: ", ++ idev->devid); ++ return false; ++ } ++ ++done: ++ accel_dev->idev = idev; ++ accel_dev->s_accel = s->s_accel; ++ QLIST_INSERT_HEAD(&s->s_accel->device_list, accel_dev, next); ++ trace_smmuv3_accel_set_iommu_device(devfn, idev->devid); ++ return true; ++} ++ ++static void smmuv3_accel_unset_iommu_device(PCIBus *bus, void *opaque, ++ int devfn) ++{ ++ SMMUState *bs = opaque; ++ SMMUPciBus *sbus = g_hash_table_lookup(bs->smmu_pcibus_by_busptr, bus); ++ HostIOMMUDeviceIOMMUFD *idev; ++ SMMUv3AccelDevice *accel_dev; ++ SMMUv3AccelState *accel; ++ SMMUDevice *sdev; ++ ++ if (!sbus) { ++ return; ++ } ++ ++ sdev = sbus->pbdev[devfn]; ++ if (!sdev) { ++ return; ++ } ++ ++ accel_dev = container_of(sdev, SMMUv3AccelDevice, sdev); ++ idev = accel_dev->idev; ++ accel = accel_dev->s_accel; ++ /* Re-attach the default s2 hwpt id */ ++ if (!host_iommu_device_iommufd_attach_hwpt(idev, idev->hwpt_id, NULL)) { ++ error_report("Unable to attach the default HW pagetable: idev devid " ++ "0x%x", idev->devid); ++ } ++ ++ accel_dev->idev = NULL; ++ accel_dev->s_accel = NULL; ++ QLIST_REMOVE(accel_dev, next); ++ trace_smmuv3_accel_unset_iommu_device(devfn, idev->devid); ++ ++ if (QLIST_EMPTY(&accel->device_list)) { ++ iommufd_backend_free_id(accel->viommu->iommufd, accel->bypass_hwpt_id); ++ iommufd_backend_free_id(accel->viommu->iommufd, accel->abort_hwpt_id); ++ iommufd_backend_free_id(accel->viommu->iommufd, ++ accel->viommu->viommu_id); ++ g_free(accel->viommu); ++ accel->viommu = NULL; ++ } ++} ++ + /* + * Only allow PCIe bridges, pxb-pcie roots, and GPEX roots so vfio-pci + * endpoints can sit downstream. Accelerated SMMUv3 requires a vfio-pci +@@ -145,6 +298,8 @@ static const PCIIOMMUOps smmuv3_accel_ops = { + .supports_address_space = smmuv3_accel_supports_as, + .get_address_space = smmuv3_accel_find_add_as, + .get_viommu_flags = smmuv3_accel_get_viommu_flags, ++ .set_iommu_device = smmuv3_accel_set_iommu_device, ++ .unset_iommu_device = smmuv3_accel_unset_iommu_device, + }; + + static void smmuv3_accel_as_init(SMMUv3State *s) +@@ -168,6 +323,7 @@ void smmuv3_accel_init(SMMUv3State *s) + { + SMMUState *bs = ARM_SMMU(s); + ++ s->s_accel = g_new0(SMMUv3AccelState, 1); + bs->iommu_ops = &smmuv3_accel_ops; + smmuv3_accel_as_init(s); + } +diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h +index 0dc6b00d35..efb631db4f 100644 +--- a/hw/arm/smmuv3-accel.h ++++ b/hw/arm/smmuv3-accel.h +@@ -10,10 +10,28 @@ + #define HW_ARM_SMMUV3_ACCEL_H + + #include "hw/arm/smmu-common.h" ++#include "system/iommufd.h" ++#ifdef CONFIG_LINUX ++#include ++#endif + #include CONFIG_DEVICES + ++/* ++ * Represents an accelerated SMMU instance backed by an iommufd vIOMMU object. ++ * Holds bypass and abort proxy HWPT IDs used for device attachment. ++ */ ++typedef struct SMMUv3AccelState { ++ IOMMUFDViommu *viommu; ++ uint32_t bypass_hwpt_id; ++ uint32_t abort_hwpt_id; ++ QLIST_HEAD(, SMMUv3AccelDevice) device_list; ++} SMMUv3AccelState; ++ + typedef struct SMMUv3AccelDevice { + SMMUDevice sdev; ++ HostIOMMUDeviceIOMMUFD *idev; ++ QLIST_ENTRY(SMMUv3AccelDevice) next; ++ SMMUv3AccelState *s_accel; + } SMMUv3AccelDevice; + + #ifdef CONFIG_ARM_SMMUV3_ACCEL +diff --git a/hw/arm/trace-events b/hw/arm/trace-events +index f3386bd7ae..2aaa0c40c7 100644 +--- a/hw/arm/trace-events ++++ b/hw/arm/trace-events +@@ -66,6 +66,10 @@ smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu mr=%s + smmuv3_inv_notifiers_iova(const char *name, int asid, int vmid, uint64_t iova, uint8_t tg, uint64_t num_pages, int stage) "iommu mr=%s asid=%d vmid=%d iova=0x%"PRIx64" tg=%d num_pages=0x%"PRIx64" stage=%d" + smmu_reset_exit(void) "" + ++#smmuv3-accel.c ++smmuv3_accel_set_iommu_device(int devfn, uint32_t devid) "devfn=0x%x (idev devid=0x%x)" ++smmuv3_accel_unset_iommu_device(int devfn, uint32_t devid) "devfn=0x%x (idev devid=0x%x)" ++ + # strongarm.c + strongarm_uart_update_parameters(const char *label, int speed, char parity, int data_bits, int stop_bits) "%s speed=%d parity=%c data=%d stop=%d" + strongarm_ssp_read_underrun(void) "SSP rx underrun" +diff --git a/include/hw/arm/smmuv3-common.h b/include/hw/arm/smmuv3-common.h +index 30101915e2..905e6ca67f 100644 +--- a/include/hw/arm/smmuv3-common.h ++++ b/include/hw/arm/smmuv3-common.h +@@ -100,6 +100,9 @@ REG32(STE_7, 28) + #define STE_CFG_ABORT(config) (!(config & 0x4)) + #define STE_CFG_BYPASS(config) (config == 0x4) + ++#define SMMU_STE_VALID (1ULL << 0) ++#define SMMU_STE_CFG_BYPASS (1ULL << 3) ++ + /* Update STE fields */ + #define STE_SET_VALID(ste, v) \ + ((ste)->word[0] = FIELD_DP32((ste)->word[0], STE_0, VALID, (v))) +diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h +index bb7076286b..e54ece2d38 100644 +--- a/include/hw/arm/smmuv3.h ++++ b/include/hw/arm/smmuv3.h +@@ -66,6 +66,7 @@ struct SMMUv3State { + + /* SMMU has HW accelerator support for nested S1 + s2 */ + bool accel; ++ struct SMMUv3AccelState *s_accel; + }; + + typedef enum { diff --git a/0239-hw-arm-smmuv3-propagate-smmuv3_cmdq_consume-errors-t.patch b/0239-hw-arm-smmuv3-propagate-smmuv3_cmdq_consume-errors-t.patch new file mode 100644 index 0000000..685103a --- /dev/null +++ b/0239-hw-arm-smmuv3-propagate-smmuv3_cmdq_consume-errors-t.patch @@ -0,0 +1,200 @@ +From 8eef0e25a8a1a757c86d401ee81f3fbdd303b457 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:10 +0000 +Subject: [PATCH] hw/arm/smmuv3: propagate smmuv3_cmdq_consume() errors to + caller +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 89b7284d03 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +smmuv3_cmdq_consume() is updated to return detailed errors via errp. + +Although this is currently a no-op, it prepares the ground for accel +SMMUv3 specific command handling where proper error reporting will be +useful. + +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Reviewed-by: Jonathan Cameron +Signed-off-by: Shameer Kolothum +(cherry picked from commit 2a620a93a8d521d8db4d9da3d7dc9d2b5f678497) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3.c | 67 +++++++++++++++++++++++++++---------------------- + 1 file changed, 37 insertions(+), 30 deletions(-) + +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index ef991cb7d8..374ae08baa 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -1279,7 +1279,7 @@ static void smmuv3_range_inval(SMMUState *s, Cmd *cmd, SMMUStage stage) + } + } + +-static int smmuv3_cmdq_consume(SMMUv3State *s) ++static int smmuv3_cmdq_consume(SMMUv3State *s, Error **errp) + { + SMMUState *bs = ARM_SMMU(s); + SMMUCmdError cmd_error = SMMU_CERROR_NONE; +@@ -1547,42 +1547,44 @@ static MemTxResult smmu_writell(SMMUv3State *s, hwaddr offset, + static MemTxResult smmu_writel(SMMUv3State *s, hwaddr offset, + uint64_t data, MemTxAttrs attrs) + { ++ Error *local_err = NULL; ++ + switch (offset) { + case A_CR0: + s->cr[0] = data; + s->cr0ack = data & ~SMMU_CR0_RESERVED; + /* in case the command queue has been enabled */ +- smmuv3_cmdq_consume(s); +- return MEMTX_OK; ++ smmuv3_cmdq_consume(s, &local_err); ++ break; + case A_CR1: + s->cr[1] = data; +- return MEMTX_OK; ++ break; + case A_CR2: + s->cr[2] = data; +- return MEMTX_OK; ++ break; + case A_IRQ_CTRL: + s->irq_ctrl = data; +- return MEMTX_OK; ++ break; + case A_GERRORN: + smmuv3_write_gerrorn(s, data); + /* + * By acknowledging the CMDQ_ERR, SW may notify cmds can + * be processed again + */ +- smmuv3_cmdq_consume(s); +- return MEMTX_OK; ++ smmuv3_cmdq_consume(s, &local_err); ++ break; + case A_GERROR_IRQ_CFG0: /* 64b */ + s->gerror_irq_cfg0 = deposit64(s->gerror_irq_cfg0, 0, 32, data); +- return MEMTX_OK; ++ break; + case A_GERROR_IRQ_CFG0 + 4: + s->gerror_irq_cfg0 = deposit64(s->gerror_irq_cfg0, 32, 32, data); +- return MEMTX_OK; ++ break; + case A_GERROR_IRQ_CFG1: + s->gerror_irq_cfg1 = data; +- return MEMTX_OK; ++ break; + case A_GERROR_IRQ_CFG2: + s->gerror_irq_cfg2 = data; +- return MEMTX_OK; ++ break; + case A_GBPA: + /* + * If UPDATE is not set, the write is ignored. This is the only +@@ -1592,71 +1594,76 @@ static MemTxResult smmu_writel(SMMUv3State *s, hwaddr offset, + /* Ignore update bit as write is synchronous. */ + s->gbpa = data & ~R_GBPA_UPDATE_MASK; + } +- return MEMTX_OK; ++ break; + case A_STRTAB_BASE: /* 64b */ + s->strtab_base = deposit64(s->strtab_base, 0, 32, data); +- return MEMTX_OK; ++ break; + case A_STRTAB_BASE + 4: + s->strtab_base = deposit64(s->strtab_base, 32, 32, data); +- return MEMTX_OK; ++ break; + case A_STRTAB_BASE_CFG: + s->strtab_base_cfg = data; + if (FIELD_EX32(data, STRTAB_BASE_CFG, FMT) == 1) { + s->sid_split = FIELD_EX32(data, STRTAB_BASE_CFG, SPLIT); + s->features |= SMMU_FEATURE_2LVL_STE; + } +- return MEMTX_OK; ++ break; + case A_CMDQ_BASE: /* 64b */ + s->cmdq.base = deposit64(s->cmdq.base, 0, 32, data); + s->cmdq.log2size = extract64(s->cmdq.base, 0, 5); + if (s->cmdq.log2size > SMMU_CMDQS) { + s->cmdq.log2size = SMMU_CMDQS; + } +- return MEMTX_OK; ++ break; + case A_CMDQ_BASE + 4: /* 64b */ + s->cmdq.base = deposit64(s->cmdq.base, 32, 32, data); +- return MEMTX_OK; ++ break; + case A_CMDQ_PROD: + s->cmdq.prod = data; +- smmuv3_cmdq_consume(s); +- return MEMTX_OK; ++ smmuv3_cmdq_consume(s, &local_err); ++ break; + case A_CMDQ_CONS: + s->cmdq.cons = data; +- return MEMTX_OK; ++ break; + case A_EVENTQ_BASE: /* 64b */ + s->eventq.base = deposit64(s->eventq.base, 0, 32, data); + s->eventq.log2size = extract64(s->eventq.base, 0, 5); + if (s->eventq.log2size > SMMU_EVENTQS) { + s->eventq.log2size = SMMU_EVENTQS; + } +- return MEMTX_OK; ++ break; + case A_EVENTQ_BASE + 4: + s->eventq.base = deposit64(s->eventq.base, 32, 32, data); +- return MEMTX_OK; ++ break; + case A_EVENTQ_PROD: + s->eventq.prod = data; +- return MEMTX_OK; ++ break; + case A_EVENTQ_CONS: + s->eventq.cons = data; +- return MEMTX_OK; ++ break; + case A_EVENTQ_IRQ_CFG0: /* 64b */ + s->eventq_irq_cfg0 = deposit64(s->eventq_irq_cfg0, 0, 32, data); +- return MEMTX_OK; ++ break; + case A_EVENTQ_IRQ_CFG0 + 4: + s->eventq_irq_cfg0 = deposit64(s->eventq_irq_cfg0, 32, 32, data); +- return MEMTX_OK; ++ break; + case A_EVENTQ_IRQ_CFG1: + s->eventq_irq_cfg1 = data; +- return MEMTX_OK; ++ break; + case A_EVENTQ_IRQ_CFG2: + s->eventq_irq_cfg2 = data; +- return MEMTX_OK; ++ break; + default: + qemu_log_mask(LOG_UNIMP, + "%s Unexpected 32-bit access to 0x%"PRIx64" (WI)\n", + __func__, offset); +- return MEMTX_OK; ++ break; + } ++ ++ if (local_err) { ++ error_report_err(local_err); ++ } ++ return MEMTX_OK; + } + + static MemTxResult smmu_write_mmio(void *opaque, hwaddr offset, uint64_t data, diff --git a/0240-hw-arm-smmuv3-accel-Add-nested-vSTE-install-uninstal.patch b/0240-hw-arm-smmuv3-accel-Add-nested-vSTE-install-uninstal.patch new file mode 100644 index 0000000..57f658a --- /dev/null +++ b/0240-hw-arm-smmuv3-accel-Add-nested-vSTE-install-uninstal.patch @@ -0,0 +1,416 @@ +From 840e788579b68b878edf5627905c6b095acd2def Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 26 Jan 2026 10:43:11 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Add nested vSTE install/uninstall + support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 0257e269a7 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +A device placed behind a vSMMU instance must have corresponding vSTEs +(bypass, abort, or translate) installed. The bypass and abort proxy nested +HWPTs are pre-allocated. + +For translat HWPT, a vDEVICE object is allocated and associated with the +vIOMMU for each guest device. This allows the host kernel to establish a +virtual SID to physical SID mapping, which is required for handling +invalidations and event reporting. + +An translate HWPT is allocated based on the guest STE configuration and +attached to the device when the guest issues SMMU_CMD_CFGI_STE or +SMMU_CMD_CFGI_STE_RANGE, provided the STE enables S1 translation. + +If the guest STE is invalid or S1 translation is disabled, the device is +attached to one of the pre-allocated ABORT or BYPASS HWPTs instead. + +While at it, export smmu_find_ste() for use here. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Signed-off-by: Shameer Kolothum +(cherry picked from commit 5feca829326abb3ffa649bbad77ab9cc17fa30a3) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 197 +++++++++++++++++++++++++++++++++ + hw/arm/smmuv3-accel.h | 22 ++++ + hw/arm/smmuv3-internal.h | 1 + + hw/arm/smmuv3.c | 11 +- + hw/arm/trace-events | 2 + + include/hw/arm/smmuv3-common.h | 18 +++ + 6 files changed, 249 insertions(+), 2 deletions(-) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index 9c2b917a11..877b7e0e17 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -51,6 +51,188 @@ static uint32_t smmuv3_accel_gbpa_hwpt(SMMUv3State *s, SMMUv3AccelState *accel) + accel->abort_hwpt_id : accel->bypass_hwpt_id; + } + ++static bool ++smmuv3_accel_alloc_vdev(SMMUv3AccelDevice *accel_dev, int sid, Error **errp) ++{ ++ SMMUv3AccelState *accel = accel_dev->s_accel; ++ HostIOMMUDeviceIOMMUFD *idev = accel_dev->idev; ++ IOMMUFDVdev *vdev = accel_dev->vdev; ++ uint32_t vdevice_id; ++ ++ if (!idev || vdev) { ++ return true; ++ } ++ ++ if (!iommufd_backend_alloc_vdev(idev->iommufd, idev->devid, ++ accel->viommu->viommu_id, sid, ++ &vdevice_id, errp)) { ++ return false; ++ } ++ ++ vdev = g_new(IOMMUFDVdev, 1); ++ vdev->vdevice_id = vdevice_id; ++ vdev->virt_id = sid; ++ accel_dev->vdev = vdev; ++ return true; ++} ++ ++static SMMUS1Hwpt * ++smmuv3_accel_dev_alloc_translate(SMMUv3AccelDevice *accel_dev, STE *ste, ++ Error **errp) ++{ ++ uint64_t ste_0 = (uint64_t)ste->word[0] | (uint64_t)ste->word[1] << 32; ++ uint64_t ste_1 = (uint64_t)ste->word[2] | (uint64_t)ste->word[3] << 32; ++ HostIOMMUDeviceIOMMUFD *idev = accel_dev->idev; ++ SMMUv3AccelState *accel = accel_dev->s_accel; ++ struct iommu_hwpt_arm_smmuv3 nested_data = { ++ .ste = { ++ cpu_to_le64(ste_0 & STE0_MASK), ++ cpu_to_le64(ste_1 & STE1_MASK), ++ }, ++ }; ++ uint32_t hwpt_id = 0, flags = 0; ++ SMMUS1Hwpt *s1_hwpt; ++ ++ if (!iommufd_backend_alloc_hwpt(idev->iommufd, idev->devid, ++ accel->viommu->viommu_id, flags, ++ IOMMU_HWPT_DATA_ARM_SMMUV3, ++ sizeof(nested_data), &nested_data, ++ &hwpt_id, errp)) { ++ return NULL; ++ } ++ ++ s1_hwpt = g_new0(SMMUS1Hwpt, 1); ++ s1_hwpt->hwpt_id = hwpt_id; ++ trace_smmuv3_accel_translate_ste(accel_dev->vdev->virt_id, hwpt_id, ++ nested_data.ste[1], nested_data.ste[0]); ++ return s1_hwpt; ++} ++ ++bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid, ++ Error **errp) ++{ ++ SMMUEventInfo event = {.type = SMMU_EVT_NONE, .sid = sid, ++ .inval_ste_allowed = true}; ++ SMMUv3AccelState *accel = s->s_accel; ++ SMMUv3AccelDevice *accel_dev; ++ HostIOMMUDeviceIOMMUFD *idev; ++ uint32_t config, hwpt_id = 0; ++ SMMUS1Hwpt *s1_hwpt = NULL; ++ const char *type; ++ STE ste; ++ ++ if (!accel || !accel->viommu) { ++ return true; ++ } ++ ++ accel_dev = container_of(sdev, SMMUv3AccelDevice, sdev); ++ if (!accel_dev->s_accel) { ++ return true; ++ } ++ ++ idev = accel_dev->idev; ++ if (!smmuv3_accel_alloc_vdev(accel_dev, sid, errp)) { ++ return false; ++ } ++ ++ if (smmu_find_ste(sdev->smmu, sid, &ste, &event)) { ++ /* No STE found, nothing to install */ ++ return true; ++ } ++ ++ /* ++ * Install the STE based on SMMU enabled/config: ++ * - attach a pre-allocated HWPT for abort/bypass ++ * - or a new HWPT for translate STE ++ * ++ * Note: The vdev remains associated with accel_dev even if HWPT ++ * attach/alloc fails, since the Guest–Host SID mapping stays ++ * valid as long as the device is behind the accelerated SMMUv3. ++ */ ++ if (!smmu_enabled(s)) { ++ hwpt_id = smmuv3_accel_gbpa_hwpt(s, accel); ++ } else { ++ config = STE_CONFIG(&ste); ++ ++ if (!STE_VALID(&ste) || STE_CFG_ABORT(config)) { ++ hwpt_id = accel->abort_hwpt_id; ++ } else if (STE_CFG_BYPASS(config)) { ++ hwpt_id = accel->bypass_hwpt_id; ++ } else if (STE_CFG_S1_TRANSLATE(config)) { ++ s1_hwpt = smmuv3_accel_dev_alloc_translate(accel_dev, &ste, errp); ++ if (!s1_hwpt) { ++ return false; ++ } ++ hwpt_id = s1_hwpt->hwpt_id; ++ } ++ } ++ ++ if (!hwpt_id) { ++ error_setg(errp, "Invalid STE config for sid 0x%x", ++ smmu_get_sid(&accel_dev->sdev)); ++ return false; ++ } ++ ++ if (!host_iommu_device_iommufd_attach_hwpt(idev, hwpt_id, errp)) { ++ if (s1_hwpt) { ++ iommufd_backend_free_id(idev->iommufd, s1_hwpt->hwpt_id); ++ g_free(s1_hwpt); ++ } ++ return false; ++ } ++ ++ /* Free the previous s1_hwpt */ ++ if (accel_dev->s1_hwpt) { ++ iommufd_backend_free_id(idev->iommufd, accel_dev->s1_hwpt->hwpt_id); ++ g_free(accel_dev->s1_hwpt); ++ } ++ ++ accel_dev->s1_hwpt = s1_hwpt; ++ if (hwpt_id == accel->abort_hwpt_id) { ++ type = "abort"; ++ } else if (hwpt_id == accel->bypass_hwpt_id) { ++ type = "bypass"; ++ } else { ++ type = "translate"; ++ } ++ ++ trace_smmuv3_accel_install_ste(sid, type, hwpt_id); ++ return true; ++} ++ ++bool smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range, ++ Error **errp) ++{ ++ SMMUv3AccelState *accel = s->s_accel; ++ SMMUv3AccelDevice *accel_dev; ++ Error *local_err = NULL; ++ bool all_ok = true; ++ ++ if (!accel || !accel->viommu) { ++ return true; ++ } ++ ++ QLIST_FOREACH(accel_dev, &accel->device_list, next) { ++ uint32_t sid = smmu_get_sid(&accel_dev->sdev); ++ ++ if (sid >= range->start && sid <= range->end) { ++ if (!smmuv3_accel_install_ste(s, &accel_dev->sdev, ++ sid, &local_err)) { ++ error_append_hint(&local_err, "Device 0x%x: Failed to install " ++ "STE\n", sid); ++ error_report_err(local_err); ++ local_err = NULL; ++ all_ok = false; ++ } ++ } ++ } ++ ++ if (!all_ok) { ++ error_setg(errp, "Failed to install all STEs properly"); ++ } ++ return all_ok; ++} ++ + static bool + smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + Error **errp) +@@ -161,6 +343,7 @@ static void smmuv3_accel_unset_iommu_device(PCIBus *bus, void *opaque, + HostIOMMUDeviceIOMMUFD *idev; + SMMUv3AccelDevice *accel_dev; + SMMUv3AccelState *accel; ++ IOMMUFDVdev *vdev; + SMMUDevice *sdev; + + if (!sbus) { +@@ -181,6 +364,20 @@ static void smmuv3_accel_unset_iommu_device(PCIBus *bus, void *opaque, + "0x%x", idev->devid); + } + ++ if (accel_dev->s1_hwpt) { ++ iommufd_backend_free_id(accel_dev->idev->iommufd, ++ accel_dev->s1_hwpt->hwpt_id); ++ g_free(accel_dev->s1_hwpt); ++ accel_dev->s1_hwpt = NULL; ++ } ++ ++ vdev = accel_dev->vdev; ++ if (vdev) { ++ iommufd_backend_free_id(accel->viommu->iommufd, vdev->vdevice_id); ++ g_free(vdev); ++ accel_dev->vdev = NULL; ++ } ++ + accel_dev->idev = NULL; + accel_dev->s_accel = NULL; + QLIST_REMOVE(accel_dev, next); +diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h +index efb631db4f..4e20b646dc 100644 +--- a/hw/arm/smmuv3-accel.h ++++ b/hw/arm/smmuv3-accel.h +@@ -27,19 +27,41 @@ typedef struct SMMUv3AccelState { + QLIST_HEAD(, SMMUv3AccelDevice) device_list; + } SMMUv3AccelState; + ++typedef struct SMMUS1Hwpt { ++ uint32_t hwpt_id; ++} SMMUS1Hwpt; ++ + typedef struct SMMUv3AccelDevice { + SMMUDevice sdev; + HostIOMMUDeviceIOMMUFD *idev; ++ SMMUS1Hwpt *s1_hwpt; ++ IOMMUFDVdev *vdev; + QLIST_ENTRY(SMMUv3AccelDevice) next; + SMMUv3AccelState *s_accel; + } SMMUv3AccelDevice; + + #ifdef CONFIG_ARM_SMMUV3_ACCEL + void smmuv3_accel_init(SMMUv3State *s); ++bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid, ++ Error **errp); ++bool smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range, ++ Error **errp); + #else + static inline void smmuv3_accel_init(SMMUv3State *s) + { + } ++static inline bool ++smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid, ++ Error **errp) ++{ ++ return true; ++} ++static inline bool ++smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range, ++ Error **errp) ++{ ++ return true; ++} + #endif + + #endif /* HW_ARM_SMMUV3_ACCEL_H */ +diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h +index 8679ab6d09..998d30473d 100644 +--- a/hw/arm/smmuv3-internal.h ++++ b/hw/arm/smmuv3-internal.h +@@ -353,6 +353,7 @@ typedef struct SMMUEventInfo { + } while (0) + + void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *event); ++int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste, SMMUEventInfo *event); + + static inline int oas2bits(int oas_field) + { +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index 374ae08baa..bfb41b8866 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -630,8 +630,7 @@ bad_ste: + * Supports linear and 2-level stream table + * Return 0 on success, -EINVAL otherwise + */ +-static int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste, +- SMMUEventInfo *event) ++int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste, SMMUEventInfo *event) + { + dma_addr_t addr, strtab_base; + uint32_t log2size; +@@ -1341,6 +1340,10 @@ static int smmuv3_cmdq_consume(SMMUv3State *s, Error **errp) + } + + trace_smmuv3_cmdq_cfgi_ste(sid); ++ if (!smmuv3_accel_install_ste(s, sdev, sid, errp)) { ++ cmd_error = SMMU_CERROR_ILL; ++ break; ++ } + smmuv3_flush_config(sdev); + + break; +@@ -1361,6 +1364,10 @@ static int smmuv3_cmdq_consume(SMMUv3State *s, Error **errp) + sid_range.end = sid_range.start + mask; + + trace_smmuv3_cmdq_cfgi_ste_range(sid_range.start, sid_range.end); ++ if (!smmuv3_accel_install_ste_range(s, &sid_range, errp)) { ++ cmd_error = SMMU_CERROR_ILL; ++ break; ++ } + smmu_configs_inv_sid_range(bs, sid_range); + break; + } +diff --git a/hw/arm/trace-events b/hw/arm/trace-events +index 2aaa0c40c7..8135c0c734 100644 +--- a/hw/arm/trace-events ++++ b/hw/arm/trace-events +@@ -69,6 +69,8 @@ smmu_reset_exit(void) "" + #smmuv3-accel.c + smmuv3_accel_set_iommu_device(int devfn, uint32_t devid) "devfn=0x%x (idev devid=0x%x)" + smmuv3_accel_unset_iommu_device(int devfn, uint32_t devid) "devfn=0x%x (idev devid=0x%x)" ++smmuv3_accel_translate_ste(uint32_t vsid, uint32_t hwpt_id, uint64_t ste_1, uint64_t ste_0) "vSID=0x%x hwpt_id=0x%x ste=%"PRIx64":%"PRIx64 ++smmuv3_accel_install_ste(uint32_t vsid, const char * type, uint32_t hwpt_id) "vSID=0x%x ste type=%s hwpt_id=0x%x" + + # strongarm.c + strongarm_uart_update_parameters(const char *label, int speed, char parity, int data_bits, int stop_bits) "%s speed=%d parity=%c data=%d stop=%d" +diff --git a/include/hw/arm/smmuv3-common.h b/include/hw/arm/smmuv3-common.h +index 905e6ca67f..4d8af5736a 100644 +--- a/include/hw/arm/smmuv3-common.h ++++ b/include/hw/arm/smmuv3-common.h +@@ -99,10 +99,28 @@ REG32(STE_7, 28) + #define STE_CFG_S2_ENABLED(config) (config & 0x2) + #define STE_CFG_ABORT(config) (!(config & 0x4)) + #define STE_CFG_BYPASS(config) (config == 0x4) ++#define STE_CFG_S1_TRANSLATE(config) (config == 0x5) + + #define SMMU_STE_VALID (1ULL << 0) + #define SMMU_STE_CFG_BYPASS (1ULL << 3) + ++#define STE0_V MAKE_64BIT_MASK(0, 1) ++#define STE0_CONFIG MAKE_64BIT_MASK(1, 3) ++#define STE0_S1FMT MAKE_64BIT_MASK(4, 2) ++#define STE0_CTXPTR MAKE_64BIT_MASK(6, 50) ++#define STE0_S1CDMAX MAKE_64BIT_MASK(59, 5) ++#define STE0_MASK (STE0_S1CDMAX | STE0_CTXPTR | STE0_S1FMT | STE0_CONFIG | \ ++ STE0_V) ++ ++#define STE1_S1DSS MAKE_64BIT_MASK(0, 2) ++#define STE1_S1CIR MAKE_64BIT_MASK(2, 2) ++#define STE1_S1COR MAKE_64BIT_MASK(4, 2) ++#define STE1_S1CSH MAKE_64BIT_MASK(6, 2) ++#define STE1_S1STALLD MAKE_64BIT_MASK(27, 1) ++#define STE1_EATS MAKE_64BIT_MASK(28, 2) ++#define STE1_MASK (STE1_EATS | STE1_S1STALLD | STE1_S1CSH | STE1_S1COR | \ ++ STE1_S1CIR | STE1_S1DSS) ++ + /* Update STE fields */ + #define STE_SET_VALID(ste, v) \ + ((ste)->word[0] = FIELD_DP32((ste)->word[0], STE_0, VALID, (v))) diff --git a/0241-hw-arm-smmuv3-accel-Install-SMMUv3-GBPA-based-hwpt.patch b/0241-hw-arm-smmuv3-accel-Install-SMMUv3-GBPA-based-hwpt.patch new file mode 100644 index 0000000..16fa29f --- /dev/null +++ b/0241-hw-arm-smmuv3-accel-Install-SMMUv3-GBPA-based-hwpt.patch @@ -0,0 +1,129 @@ +From 74b103e1c3e344c016ce666b18a1631cebe7f437 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:12 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Install SMMUv3 GBPA based hwpt +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 569d5a8b97 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +On guest reboot or on GBPA update, attach a nested HWPT based on the +GPBA.ABORT bit which either aborts all incoming transactions or bypasses +them. + +Reviewed-by: Eric Auger +Reviewed-by: Nicolin Chen +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Reviewed-by: Jonathan Cameron +Signed-off-by: Shameer Kolothum +(cherry picked from commit 7e0cb562428d991b350e3a92a43dc96351b6f5b6) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 36 ++++++++++++++++++++++++++++++++++++ + hw/arm/smmuv3-accel.h | 9 +++++++++ + hw/arm/smmuv3.c | 2 ++ + 3 files changed, 47 insertions(+) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index 877b7e0e17..c125974d12 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -499,6 +499,42 @@ static const PCIIOMMUOps smmuv3_accel_ops = { + .unset_iommu_device = smmuv3_accel_unset_iommu_device, + }; + ++/* Based on SMUUv3 GPBA.ABORT configuration, attach a corresponding HWPT */ ++bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp) ++{ ++ SMMUv3AccelState *accel = s->s_accel; ++ SMMUv3AccelDevice *accel_dev; ++ Error *local_err = NULL; ++ bool all_ok = true; ++ uint32_t hwpt_id; ++ ++ if (!accel || !accel->viommu) { ++ return true; ++ } ++ ++ hwpt_id = smmuv3_accel_gbpa_hwpt(s, accel); ++ QLIST_FOREACH(accel_dev, &accel->device_list, next) { ++ if (!host_iommu_device_iommufd_attach_hwpt(accel_dev->idev, hwpt_id, ++ &local_err)) { ++ error_append_hint(&local_err, "Failed to attach GBPA hwpt %u for " ++ "idev devid %u", hwpt_id, accel_dev->idev->devid); ++ error_report_err(local_err); ++ local_err = NULL; ++ all_ok = false; ++ } ++ } ++ if (!all_ok) { ++ error_setg(errp, "Failed to attach all GBPA based HWPTs properly"); ++ } ++ return all_ok; ++} ++ ++void smmuv3_accel_reset(SMMUv3State *s) ++{ ++ /* Attach a HWPT based on GBPA reset value */ ++ smmuv3_accel_attach_gbpa_hwpt(s, NULL); ++} ++ + static void smmuv3_accel_as_init(SMMUv3State *s) + { + +diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h +index 4e20b646dc..c7ed4dce3a 100644 +--- a/hw/arm/smmuv3-accel.h ++++ b/hw/arm/smmuv3-accel.h +@@ -46,6 +46,8 @@ bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid, + Error **errp); + bool smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range, + Error **errp); ++bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp); ++void smmuv3_accel_reset(SMMUv3State *s); + #else + static inline void smmuv3_accel_init(SMMUv3State *s) + { +@@ -62,6 +64,13 @@ smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range, + { + return true; + } ++static inline bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp) ++{ ++ return true; ++} ++static inline void smmuv3_accel_reset(SMMUv3State *s) ++{ ++} + #endif + + #endif /* HW_ARM_SMMUV3_ACCEL_H */ +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index bfb41b8866..42c60b1ec8 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -1600,6 +1600,7 @@ static MemTxResult smmu_writel(SMMUv3State *s, hwaddr offset, + if (data & R_GBPA_UPDATE_MASK) { + /* Ignore update bit as write is synchronous. */ + s->gbpa = data & ~R_GBPA_UPDATE_MASK; ++ smmuv3_accel_attach_gbpa_hwpt(s, &local_err); + } + break; + case A_STRTAB_BASE: /* 64b */ +@@ -1887,6 +1888,7 @@ static void smmu_reset_exit(Object *obj, ResetType type) + } + + smmuv3_init_regs(s); ++ smmuv3_accel_reset(s); + } + + static void smmu_realize(DeviceState *d, Error **errp) diff --git a/0242-hw-pci-pci-Introduce-a-callback-to-retrieve-the-MSI-.patch b/0242-hw-pci-pci-Introduce-a-callback-to-retrieve-the-MSI-.patch new file mode 100644 index 0000000..c86a513 --- /dev/null +++ b/0242-hw-pci-pci-Introduce-a-callback-to-retrieve-the-MSI-.patch @@ -0,0 +1,177 @@ +From 1e7936701c792e7196ac179f8b6335fb4efaffe6 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:13 +0000 +Subject: [PATCH] hw/pci/pci: Introduce a callback to retrieve the MSI doorbell + GPA directly +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 340ae7c37a (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +For certain vIOMMU implementations, such as SMMUv3 in accelerated mode, +the translation tables are programmed directly into the physical SMMUv3 +in a nested configuration. While QEMU knows where the guest tables live, +safely walking them in software would require trapping and ordering all +guest invalidations on every command queue. Without this, QEMU could race +with guest updates and walk stale or freed page tables. + +This constraint is fundamental to the design of HW-accelerated vSMMU when +used with downstream vfio-pci endpoint devices, where QEMU must never walk +guest translation tables and must rely on the physical SMMU for +translation. Future accelerated vSMMU features, such as virtual CMDQ, will +also prevent trapping invalidations, reinforcing this restriction. + +For vfio-pci endpoints behind such a vSMMU, the only translation QEMU +needs is for the MSI doorbell used when setting up KVM MSI route tables. +Instead of attempting a software walk, introduce an optional vIOMMU +callback that returns the MSI doorbell GPA directly. + +kvm_arch_fixup_msi_route() uses this callback when available and ignores +the guest provided IOVA in that case. + +If the vIOMMU does not implement the callback, we fall back to the +existing IOMMU based address space translation path. + +This ensures correct MSI routing for accelerated SMMUv3 + VFIO passthrough +while avoiding unsafe software walks of guest translation tables. + +As a related change, replace RCU_READ_LOCK_GUARD() with explicit +rcu_read_lock()/rcu_read_unlock(). The introduction of an early goto +(set_doorbell) path means the RCU read side critical section can no longer +be safely scoped using RCU_READ_LOCK_GUARD(). + +Cc: Michael S. Tsirkin +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Reviewed-by: Michael S. Tsirkin +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Reviewed-by: Jonathan Cameron +Signed-off-by: Shameer Kolothum +(cherry picked from commit a6716794b8a8b99e0d93f3552fd9c5b49ea4cc66) +Signed-off-by: Eric Auger +--- + hw/pci/pci.c | 17 +++++++++++++++++ + include/hw/pci/pci.h | 17 +++++++++++++++++ + target/arm/kvm.c | 18 +++++++++++++++++- + 3 files changed, 51 insertions(+), 1 deletion(-) + +diff --git a/hw/pci/pci.c b/hw/pci/pci.c +index 1f2d4d76f9..344914424c 100644 +--- a/hw/pci/pci.c ++++ b/hw/pci/pci.c +@@ -2965,6 +2965,23 @@ bool pci_device_get_iommu_bus_devfn(PCIDevice *dev, PCIBus **piommu_bus, + return aliased; + } + ++bool pci_device_iommu_msi_direct_gpa(PCIDevice *dev, hwaddr *out_doorbell) ++{ ++ PCIBus *bus; ++ PCIBus *iommu_bus; ++ int devfn; ++ ++ pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); ++ if (iommu_bus) { ++ if (iommu_bus->iommu_ops->get_msi_direct_gpa) { ++ *out_doorbell = iommu_bus->iommu_ops->get_msi_direct_gpa(bus, ++ iommu_bus->iommu_opaque, devfn); ++ return true; ++ } ++ } ++ return false; ++} ++ + AddressSpace *pci_device_iommu_address_space(PCIDevice *dev) + { + PCIBus *bus; +diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h +index 528faafad2..e672c92348 100644 +--- a/include/hw/pci/pci.h ++++ b/include/hw/pci/pci.h +@@ -683,6 +683,22 @@ typedef struct PCIIOMMUOps { + uint32_t pasid, bool priv_req, bool exec_req, + hwaddr addr, bool lpig, uint16_t prgi, bool is_read, + bool is_write); ++ /** ++ * @get_msi_direct_gpa: get the guest physical address of MSI doorbell ++ * for the device on a PCI bus. ++ * ++ * Optional callback. If implemented, it must return a valid guest ++ * physical address for the MSI doorbell ++ * ++ * @bus: the #PCIBus being accessed. ++ * ++ * @opaque: the data passed to pci_setup_iommu(). ++ * ++ * @devfn: device and function number ++ * ++ * Returns: the guest physical address of the MSI doorbell. ++ */ ++ uint64_t (*get_msi_direct_gpa)(PCIBus *bus, void *opaque, int devfn); + } PCIIOMMUOps; + + bool pci_device_get_iommu_bus_devfn(PCIDevice *dev, PCIBus **piommu_bus, +@@ -691,6 +707,7 @@ AddressSpace *pci_device_iommu_address_space(PCIDevice *dev); + bool pci_device_set_iommu_device(PCIDevice *dev, HostIOMMUDevice *hiod, + Error **errp); + void pci_device_unset_iommu_device(PCIDevice *dev); ++bool pci_device_iommu_msi_direct_gpa(PCIDevice *dev, hwaddr *out_doorbell); + + /** + * pci_device_get_viommu_flags: get vIOMMU flags. +diff --git a/target/arm/kvm.c b/target/arm/kvm.c +index c1ec6654ca..864f75600f 100644 +--- a/target/arm/kvm.c ++++ b/target/arm/kvm.c +@@ -1630,26 +1630,42 @@ int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, + return 0; + } + ++ /* ++ * We do have an IOMMU address space, but for some vIOMMU implementations ++ * (e.g. accelerated SMMUv3) the translation tables are programmed into ++ * the physical SMMUv3 in the host (nested S1=guest, S2=host). QEMU cannot ++ * walk these tables in a safe way, so in that case we obtain the MSI ++ * doorbell GPA directly from the vIOMMU backend and ignore the gIOVA ++ * @address. ++ */ ++ if (pci_device_iommu_msi_direct_gpa(dev, &doorbell_gpa)) { ++ goto set_doorbell; ++ } ++ + /* MSI doorbell address is translated by an IOMMU */ + +- RCU_READ_LOCK_GUARD(); ++ rcu_read_lock(); + + mr = address_space_translate(as, address, &xlat, &len, true, + MEMTXATTRS_UNSPECIFIED); + + if (!mr) { ++ rcu_read_unlock(); + return 1; + } + + mrs = memory_region_find(mr, xlat, 1); + + if (!mrs.mr) { ++ rcu_read_unlock(); + return 1; + } + + doorbell_gpa = mrs.offset_within_address_space; + memory_region_unref(mrs.mr); ++ rcu_read_unlock(); + ++set_doorbell: + route->u.msi.address_lo = doorbell_gpa; + route->u.msi.address_hi = doorbell_gpa >> 32; + diff --git a/0243-hw-arm-smmuv3-accel-Implement-get_msi_direct_gpa-cal.patch b/0243-hw-arm-smmuv3-accel-Implement-get_msi_direct_gpa-cal.patch new file mode 100644 index 0000000..649a155 --- /dev/null +++ b/0243-hw-arm-smmuv3-accel-Implement-get_msi_direct_gpa-cal.patch @@ -0,0 +1,98 @@ +From 4347d906f1279803ddbfa532760f95934b0a0c4d Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:14 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Implement get_msi_direct_gpa callback +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] dc6b5edda0 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Accelerated SMMUv3 instances rely on the physical SMMUv3 for nested +translation (guest Stage-1, host Stage-2). In this mode, the guest Stage-1 +tables are programmed directly into hardware, and QEMU must not attempt to +walk them for translation, as doing so is not reliably safe. For vfio-pci +endpoints behind such a vSMMU, the only translation QEMU needs to perform +is for the MSI doorbell used during KVM MSI setup. + +Implement the callback so that kvm_arch_fixup_msi_route() can retrieve the +MSI doorbell GPA directly, instead of attempting a software walk of the +guest translation tables. + +Also introduce an SMMUv3 device property to carry the MSI doorbell GPA. +This property will be set by the virt machine in a subsequent patch. + +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Reviewed-by: Jonathan Cameron +Signed-off-by: Shameer Kolothum +(cherry picked from commit 1d0588f1637503b02090d38c1f6d3b608a781ddf) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 10 ++++++++++ + hw/arm/smmuv3.c | 2 ++ + include/hw/arm/smmuv3.h | 1 + + 3 files changed, 13 insertions(+) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index c125974d12..c6ee123cdf 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -393,6 +393,15 @@ static void smmuv3_accel_unset_iommu_device(PCIBus *bus, void *opaque, + } + } + ++static uint64_t smmuv3_accel_get_msi_gpa(PCIBus *bus, void *opaque, int devfn) ++{ ++ SMMUState *bs = opaque; ++ SMMUv3State *s = ARM_SMMUV3(bs); ++ ++ g_assert(s->msi_gpa); ++ return s->msi_gpa; ++} ++ + /* + * Only allow PCIe bridges, pxb-pcie roots, and GPEX roots so vfio-pci + * endpoints can sit downstream. Accelerated SMMUv3 requires a vfio-pci +@@ -497,6 +506,7 @@ static const PCIIOMMUOps smmuv3_accel_ops = { + .get_viommu_flags = smmuv3_accel_get_viommu_flags, + .set_iommu_device = smmuv3_accel_set_iommu_device, + .unset_iommu_device = smmuv3_accel_unset_iommu_device, ++ .get_msi_direct_gpa = smmuv3_accel_get_msi_gpa, + }; + + /* Based on SMUUv3 GPBA.ABORT configuration, attach a corresponding HWPT */ +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index 42c60b1ec8..f02e3ee46c 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -1998,6 +1998,8 @@ static const Property smmuv3_properties[] = { + * Defaults to stage 1 + */ + DEFINE_PROP_STRING("stage", SMMUv3State, stage), ++ /* GPA of MSI doorbell, for SMMUv3 accel use. */ ++ DEFINE_PROP_UINT64("msi-gpa", SMMUv3State, msi_gpa, 0), + }; + + static void smmuv3_instance_init(Object *obj) +diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h +index e54ece2d38..5616a8a2be 100644 +--- a/include/hw/arm/smmuv3.h ++++ b/include/hw/arm/smmuv3.h +@@ -67,6 +67,7 @@ struct SMMUv3State { + /* SMMU has HW accelerator support for nested S1 + s2 */ + bool accel; + struct SMMUv3AccelState *s_accel; ++ uint64_t msi_gpa; + }; + + typedef enum { diff --git a/0244-hw-arm-virt-Set-msi-gpa-property.patch b/0244-hw-arm-virt-Set-msi-gpa-property.patch new file mode 100644 index 0000000..84853cf --- /dev/null +++ b/0244-hw-arm-virt-Set-msi-gpa-property.patch @@ -0,0 +1,64 @@ +From 6452c22deb3cfe4249c0c7f4b859aad2972d228c Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:15 +0000 +Subject: [PATCH] hw/arm/virt: Set msi-gpa property +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 35fbe2c501 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Set the MSI doorbell GPA property for accelerated SMMUv3 devices for use +by KVM MSI setup. Also, since any meaningful use of vfio-pci devices with +an accelerated SMMUv3 requires both KVM and a kernel irqchip, ensure +those are specified when accel=on is selected. + +Reviewed-by: Nicolin Chen +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Reviewed-by: Jonathan Cameron +Signed-off-by: Shameer Kolothum +(cherry picked from commit c1aad7ac9cc93c8be8b027e8e1d4f5749912ddc1) +Signed-off-by: Eric Auger +--- + hw/arm/virt.c | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) + +diff --git a/hw/arm/virt.c b/hw/arm/virt.c +index 97788c0822..1b1c9fe539 100644 +--- a/hw/arm/virt.c ++++ b/hw/arm/virt.c +@@ -3100,6 +3100,26 @@ static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, + object_property_set_link(OBJECT(dev), "secure-memory", + OBJECT(vms->secure_sysmem), NULL); + } ++ if (object_property_find(OBJECT(dev), "accel") && ++ object_property_get_bool(OBJECT(dev), "accel", &error_abort)) { ++ hwaddr db_start = 0; ++ ++ if (!kvm_enabled() || !kvm_irqchip_in_kernel()) { ++ error_setg(errp, "SMMUv3 accel=on requires KVM with " ++ "kernel-irqchip=on support"); ++ return; ++ } ++ ++ if (vms->msi_controller == VIRT_MSI_CTRL_ITS) { ++ /* GITS_TRANSLATER page + offset */ ++ db_start = base_memmap[VIRT_GIC_ITS].base + 0x10000 + 0x40; ++ } else if (vms->msi_controller == VIRT_MSI_CTRL_GICV2M) { ++ /* MSI_SETSPI_NS page + offset */ ++ db_start = base_memmap[VIRT_GIC_V2M].base + 0x40; ++ } ++ object_property_set_uint(OBJECT(dev), "msi-gpa", db_start, ++ &error_abort); ++ } + } + } + diff --git a/0245-hw-arm-smmuv3-accel-Add-support-to-issue-invalidatio.patch b/0245-hw-arm-smmuv3-accel-Add-support-to-issue-invalidatio.patch new file mode 100644 index 0000000..4012323 --- /dev/null +++ b/0245-hw-arm-smmuv3-accel-Add-support-to-issue-invalidatio.patch @@ -0,0 +1,159 @@ +From c1abba8db333c1f728bbf8e67a271c546a009578 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:16 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Add support to issue invalidation cmd to + host +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 876a7f307e (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Provide a helper and use that to issue the invalidation cmd to host SMMUv3. +We only issue one cmd at a time for now. + +Support for batching of commands will be added later after analysing the +impact. + +Reviewed-by: Jonathan Cameron +Tested-by: Zhangfei Gao +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 94d13f268eb4058a8e9770b6acf961fb354defe1) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 36 ++++++++++++++++++++++++++++++++++++ + hw/arm/smmuv3-accel.h | 8 ++++++++ + hw/arm/smmuv3.c | 16 ++++++++++++++++ + 3 files changed, 60 insertions(+) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index c6ee123cdf..89dc6f991c 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -233,6 +233,42 @@ bool smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range, + return all_ok; + } + ++/* ++ * This issues the invalidation cmd to the host SMMUv3. ++ * ++ * sdev is non-NULL for SID based invalidations (e.g. CFGI_CD), and NULL for ++ * non SID invalidations such as SMMU_CMD_TLBI_NH_ASID and SMMU_CMD_TLBI_NH_VA. ++ */ ++bool smmuv3_accel_issue_inv_cmd(SMMUv3State *bs, void *cmd, SMMUDevice *sdev, ++ Error **errp) ++{ ++ SMMUv3State *s = ARM_SMMUV3(bs); ++ SMMUv3AccelState *accel = s->s_accel; ++ uint32_t entry_num = 1; ++ ++ /* ++ * No accel or viommu means no VFIO/IOMMUFD devices, nothing to ++ * invalidate. ++ */ ++ if (!accel || !accel->viommu) { ++ return true; ++ } ++ ++ /* ++ * SID based invalidations (e.g. CFGI_CD) apply only to vfio-pci endpoints ++ * with a valid vIOMMU vdev. ++ */ ++ if (sdev && !container_of(sdev, SMMUv3AccelDevice, sdev)->vdev) { ++ return true; ++ } ++ ++ /* Single command (entry_num = 1); no need to check returned entry_num */ ++ return iommufd_backend_invalidate_cache( ++ accel->viommu->iommufd, accel->viommu->viommu_id, ++ IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3, ++ sizeof(Cmd), &entry_num, cmd, errp); ++} ++ + static bool + smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + Error **errp) +diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h +index c7ed4dce3a..41b37e3122 100644 +--- a/hw/arm/smmuv3-accel.h ++++ b/hw/arm/smmuv3-accel.h +@@ -47,6 +47,8 @@ bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid, + bool smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range, + Error **errp); + bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp); ++bool smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev, ++ Error **errp); + void smmuv3_accel_reset(SMMUv3State *s); + #else + static inline void smmuv3_accel_init(SMMUv3State *s) +@@ -68,6 +70,12 @@ static inline bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp) + { + return true; + } ++static inline bool ++smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev, ++ Error **errp) ++{ ++ return true; ++} + static inline void smmuv3_accel_reset(SMMUv3State *s) + { + } +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index f02e3ee46c..513da966a4 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -1388,6 +1388,10 @@ static int smmuv3_cmdq_consume(SMMUv3State *s, Error **errp) + + trace_smmuv3_cmdq_cfgi_cd(sid); + smmuv3_flush_config(sdev); ++ if (!smmuv3_accel_issue_inv_cmd(s, &cmd, sdev, errp)) { ++ cmd_error = SMMU_CERROR_ILL; ++ break; ++ } + break; + } + case SMMU_CMD_TLBI_NH_ASID: +@@ -1411,6 +1415,10 @@ static int smmuv3_cmdq_consume(SMMUv3State *s, Error **errp) + trace_smmuv3_cmdq_tlbi_nh_asid(asid); + smmu_inv_notifiers_all(&s->smmu_state); + smmu_iotlb_inv_asid_vmid(bs, asid, vmid); ++ if (!smmuv3_accel_issue_inv_cmd(s, &cmd, NULL, errp)) { ++ cmd_error = SMMU_CERROR_ILL; ++ break; ++ } + break; + } + case SMMU_CMD_TLBI_NH_ALL: +@@ -1438,6 +1446,10 @@ static int smmuv3_cmdq_consume(SMMUv3State *s, Error **errp) + trace_smmuv3_cmdq_tlbi_nsnh(); + smmu_inv_notifiers_all(&s->smmu_state); + smmu_iotlb_inv_all(bs); ++ if (!smmuv3_accel_issue_inv_cmd(s, &cmd, NULL, errp)) { ++ cmd_error = SMMU_CERROR_ILL; ++ break; ++ } + break; + case SMMU_CMD_TLBI_NH_VAA: + case SMMU_CMD_TLBI_NH_VA: +@@ -1446,6 +1458,10 @@ static int smmuv3_cmdq_consume(SMMUv3State *s, Error **errp) + break; + } + smmuv3_range_inval(bs, &cmd, SMMU_STAGE_1); ++ if (!smmuv3_accel_issue_inv_cmd(s, &cmd, NULL, errp)) { ++ cmd_error = SMMU_CERROR_ILL; ++ break; ++ } + break; + case SMMU_CMD_TLBI_S12_VMALL: + { diff --git a/0246-hw-arm-smmuv3-Initialize-ID-registers-early-during-r.patch b/0246-hw-arm-smmuv3-Initialize-ID-registers-early-during-r.patch new file mode 100644 index 0000000..6effb0e --- /dev/null +++ b/0246-hw-arm-smmuv3-Initialize-ID-registers-early-during-r.patch @@ -0,0 +1,90 @@ +From 42f204bde7d3efac1f36adfaf8ae552320bd1df1 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:17 +0000 +Subject: [PATCH] hw/arm/smmuv3: Initialize ID registers early during realize() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] e1ae78541c (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Factor out ID register init into smmuv3_init_id_regs() and call it from +realize(). This ensures ID registers are initialized early for use in the +accelerated SMMUv3 path and will be utilized in subsequent patch. + +Other registers remain initialized in smmuv3_reset(). + +Reviewed-by: Nicolin Chen +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Signed-off-by: Shameer Kolothum +(cherry picked from commit 1997b2eb2bd3e1093b632d853bacc2dfc4ff8d96) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3.c | 15 ++++++++++++--- + 1 file changed, 12 insertions(+), 3 deletions(-) + +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index 513da966a4..dba5abc8d3 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -258,7 +258,12 @@ void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *info) + info->recorded = true; + } + +-static void smmuv3_init_regs(SMMUv3State *s) ++/* ++ * Called during realize(), as the ID registers will be accessed early in the ++ * SMMUv3 accel path for feature compatibility checks. The remaining registers ++ * are initialized later in smmuv3_reset(). ++ */ ++static void smmuv3_init_id_regs(SMMUv3State *s) + { + /* Based on sys property, the stages supported in smmu will be advertised.*/ + if (s->stage && !strcmp("2", s->stage)) { +@@ -298,7 +303,11 @@ static void smmuv3_init_regs(SMMUv3State *s) + s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN4K, 1); + s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN16K, 1); + s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN64K, 1); ++ s->aidr = 0x1; ++} + ++static void smmuv3_reset(SMMUv3State *s) ++{ + s->cmdq.base = deposit64(s->cmdq.base, 0, 5, SMMU_CMDQS); + s->cmdq.prod = 0; + s->cmdq.cons = 0; +@@ -310,7 +319,6 @@ static void smmuv3_init_regs(SMMUv3State *s) + + s->features = 0; + s->sid_split = 0; +- s->aidr = 0x1; + s->cr[0] = 0; + s->cr0ack = 0; + s->irq_ctrl = 0; +@@ -1903,7 +1911,7 @@ static void smmu_reset_exit(Object *obj, ResetType type) + c->parent_phases.exit(obj, type); + } + +- smmuv3_init_regs(s); ++ smmuv3_reset(s); + smmuv3_accel_reset(s); + } + +@@ -1935,6 +1943,7 @@ static void smmu_realize(DeviceState *d, Error **errp) + sysbus_init_mmio(dev, &sys->iomem); + + smmu_init_irq(s, dev); ++ smmuv3_init_id_regs(s); + } + + static const VMStateDescription vmstate_smmuv3_queue = { diff --git a/0247-hw-arm-smmuv3-accel-Get-host-SMMUv3-hw-info-and-vali.patch b/0247-hw-arm-smmuv3-accel-Get-host-SMMUv3-hw-info-and-vali.patch new file mode 100644 index 0000000..a830628 --- /dev/null +++ b/0247-hw-arm-smmuv3-accel-Get-host-SMMUv3-hw-info-and-vali.patch @@ -0,0 +1,167 @@ +From 415dedd967161f800340ee16faf2804dfae00047 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:18 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Get host SMMUv3 hw info and validate +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] eb68841480 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Just before the device gets attached to the SMMUv3, make sure QEMU SMMUv3 +features are compatible with the host SMMUv3. + +Not all fields in the host SMMUv3 IDR registers are meaningful for userspace. +Only the following fields can be used: + + - IDR0: ST_LEVEL, TERM_MODEL, STALL_MODEL, TTENDIAN, CD2L, ASID16, TTF + - IDR1: SIDSIZE, SSIDSIZE + - IDR3: BBML, RIL + - IDR5: VAX, GRAN64K, GRAN16K, GRAN4K + +For now, the check is to make sure the features are in sync to enable +basic accelerated SMMUv3 support. AIDR is not checked, as hardware +implementations often provide a mix of architecture features regardless +of the revision reported in AIDR. + +Note that SSIDSIZE check will be added later when support for PASID is +introduced. + +Reviewed-by: Nicolin Chen +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Signed-off-by: Shameer Kolothum +(cherry picked from commit 8ec042e78b9312056e01ba44c01df7c6a0a73a9d) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 101 ++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 101 insertions(+) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index 89dc6f991c..33011962e3 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -27,6 +27,99 @@ + static MemoryRegion root, sysmem; + static AddressSpace *shared_as_sysmem; + ++static bool ++smmuv3_accel_check_hw_compatible(SMMUv3State *s, ++ struct iommu_hw_info_arm_smmuv3 *info, ++ Error **errp) ++{ ++ /* QEMU SMMUv3 supports both linear and 2-level stream tables */ ++ if (FIELD_EX32(info->idr[0], IDR0, STLEVEL) != ++ FIELD_EX32(s->idr[0], IDR0, STLEVEL)) { ++ error_setg(errp, "Host SMMUv3 Stream Table format mismatch " ++ "(host STLEVEL=%u, QEMU STLEVEL=%u)", ++ FIELD_EX32(info->idr[0], IDR0, STLEVEL), ++ FIELD_EX32(s->idr[0], IDR0, STLEVEL)); ++ return false; ++ } ++ ++ /* QEMU SMMUv3 supports only little-endian translation table walks */ ++ if (FIELD_EX32(info->idr[0], IDR0, TTENDIAN) > ++ FIELD_EX32(s->idr[0], IDR0, TTENDIAN)) { ++ error_setg(errp, "Host SMMUv3 doesn't support Little-endian " ++ "translation table"); ++ return false; ++ } ++ ++ /* QEMU SMMUv3 supports only AArch64 translation table format */ ++ if (FIELD_EX32(info->idr[0], IDR0, TTF) < ++ FIELD_EX32(s->idr[0], IDR0, TTF)) { ++ error_setg(errp, "Host SMMUv3 doesn't support AArch64 translation " ++ "table format"); ++ return false; ++ } ++ ++ /* QEMU SMMUv3 supports SIDSIZE 16 */ ++ if (FIELD_EX32(info->idr[1], IDR1, SIDSIZE) < ++ FIELD_EX32(s->idr[1], IDR1, SIDSIZE)) { ++ error_setg(errp, "Host SMMUv3 SIDSIZE not compatible " ++ "(host=%u, QEMU=%u)", ++ FIELD_EX32(info->idr[1], IDR1, SIDSIZE), ++ FIELD_EX32(s->idr[1], IDR1, SIDSIZE)); ++ return false; ++ } ++ ++ /* QEMU SMMUv3 supports Range Invalidation by default */ ++ if (FIELD_EX32(info->idr[3], IDR3, RIL) != ++ FIELD_EX32(s->idr[3], IDR3, RIL)) { ++ error_setg(errp, "Host SMMUv3 doesn't support Range Invalidation"); ++ return false; ++ } ++ ++ /* QEMU SMMUv3 supports GRAN4K/GRAN16K/GRAN64K translation granules */ ++ if (FIELD_EX32(info->idr[5], IDR5, GRAN4K) != ++ FIELD_EX32(s->idr[5], IDR5, GRAN4K)) { ++ error_setg(errp, "Host SMMUv3 doesn't support 4K translation granule"); ++ return false; ++ } ++ if (FIELD_EX32(info->idr[5], IDR5, GRAN16K) != ++ FIELD_EX32(s->idr[5], IDR5, GRAN16K)) { ++ error_setg(errp, "Host SMMUv3 doesn't support 16K translation granule"); ++ return false; ++ } ++ if (FIELD_EX32(info->idr[5], IDR5, GRAN64K) != ++ FIELD_EX32(s->idr[5], IDR5, GRAN64K)) { ++ error_setg(errp, "Host SMMUv3 doesn't support 64K translation granule"); ++ return false; ++ } ++ ++ return true; ++} ++ ++static bool ++smmuv3_accel_hw_compatible(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, ++ Error **errp) ++{ ++ struct iommu_hw_info_arm_smmuv3 info; ++ uint32_t data_type; ++ uint64_t caps; ++ ++ if (!iommufd_backend_get_device_info(idev->iommufd, idev->devid, &data_type, ++ &info, sizeof(info), &caps, errp)) { ++ return false; ++ } ++ ++ if (data_type != IOMMU_HW_INFO_TYPE_ARM_SMMUV3) { ++ error_setg(errp, "Wrong data type (%d) for Host SMMUv3 device info", ++ data_type); ++ return false; ++ } ++ ++ if (!smmuv3_accel_check_hw_compatible(s, &info, errp)) { ++ return false; ++ } ++ return true; ++} ++ + static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState *bs, SMMUPciBus *sbus, + PCIBus *bus, int devfn) + { +@@ -353,6 +446,14 @@ static bool smmuv3_accel_set_iommu_device(PCIBus *bus, void *opaque, int devfn, + return true; + } + ++ /* ++ * Check the host SMMUv3 associated with the dev is compatible with the ++ * QEMU SMMUv3 accel. ++ */ ++ if (!smmuv3_accel_hw_compatible(s, idev, errp)) { ++ return false; ++ } ++ + if (s->s_accel->viommu) { + goto done; + } diff --git a/0248-hw-pci-host-gpex-Allow-to-generate-preserve-boot-con.patch b/0248-hw-pci-host-gpex-Allow-to-generate-preserve-boot-con.patch new file mode 100644 index 0000000..75bd83f --- /dev/null +++ b/0248-hw-pci-host-gpex-Allow-to-generate-preserve-boot-con.patch @@ -0,0 +1,182 @@ +From 48978c7e68c900d372b0a86cb52060bf38727e27 Mon Sep 17 00:00:00 2001 +From: Eric Auger +Date: Mon, 26 Jan 2026 10:43:19 +0000 +Subject: [PATCH] hw/pci-host/gpex: Allow to generate preserve boot config DSM + #5 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 0a93d899cd (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Add a 'preserve_config' field in struct GPEXConfig and, if set, generate +the _DSM function #5 for preserving PCI boot configurations. + +This will be used for SMMUv3 accel=on support in subsequent patch. When +SMMUv3 acceleration (accel=on) is enabled, QEMU exposes IORT Reserved +Memory Region (RMR) nodes to support MSI doorbell translations. As per +the Arm IORT specification, using IORT RMRs mandates the presence of +_DSM function #5 so that the OS retains the firmware-assigned PCI +configuration. Hence, this patch adds conditional support for generating +_DSM #5. + +According to the ACPI Specification, Revision 6.6, Section 9.1.1 - +“_DSM (Device Specific Method)”, + +" +If Function Index is zero, the return is a buffer containing one bit for +each function index, starting with zero. Bit 0 indicates whether there +is support for any functions other than function 0 for the specified +UUID and Revision ID. If set to zero, no functions are supported (other +than function zero) for the specified UUID and Revision ID. If set to +one, at least one additional function is supported. For all other bits +in the buffer, a bit is set to zero to indicate if that function index +is not supported for the specific UUID and Revision ID. (For example, +bit 1 set to 0 indicates that function index 1 is not supported for the +specific UUID and Revision ID.) +" + +Please refer PCI Firmware Specification, Revision 3.3, Section 4.6.5 — +"_DSM for Preserving PCI Boot Configurations" for Function 5 of _DSM +method. + +Also, while at it, move the byte_list declaration to the top of the +function for clarity. + +At the moment, DSM generation is not yet enabled. + +The resulting AML when preserve_config=true is: + + Method (_DSM, 4, NotSerialized) + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d"))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x21 + }) + } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } + } + ... + } + +Cc: Michael S. Tsirkin +Signed-off-by: Eric Auger +[Shameer: Removed possible duplicate _DSM creations] +Signed-off-by: Shameer Kolothum +Tested-by: Zhangfei Gao +Reviewed-by: Jonathan Cameron +Reviewed-by: Michael S. Tsirkin +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 57483a5246dbe1bb10c7a529d630ef7b0dce5a75) +Signed-off-by: Eric Auger +--- + hw/pci-host/gpex-acpi.c | 29 +++++++++++++++++++++++------ + include/hw/pci-host/gpex.h | 1 + + 2 files changed, 24 insertions(+), 6 deletions(-) + +diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c +index 4587baeb78..d9820f9b41 100644 +--- a/hw/pci-host/gpex-acpi.c ++++ b/hw/pci-host/gpex-acpi.c +@@ -51,10 +51,11 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq, + } + } + +-static Aml *build_pci_host_bridge_dsm_method(void) ++static Aml *build_pci_host_bridge_dsm_method(bool preserve_config) + { + Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED); + Aml *UUID, *ifctx, *ifctx1, *buf; ++ uint8_t byte_list[1] = {0}; + + /* PCI Firmware Specification 3.0 + * 4.6.1. _DSM for PCI Express Slot Information +@@ -64,10 +65,23 @@ static Aml *build_pci_host_bridge_dsm_method(void) + UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); + ifctx = aml_if(aml_equal(aml_arg(0), UUID)); + ifctx1 = aml_if(aml_equal(aml_arg(2), aml_int(0))); +- uint8_t byte_list[1] = {0}; ++ if (preserve_config) { ++ /* support functions other than 0, specifically function 5 */ ++ byte_list[0] = 0x21; ++ } + buf = aml_buffer(1, byte_list); + aml_append(ifctx1, aml_return(buf)); + aml_append(ifctx, ifctx1); ++ if (preserve_config) { ++ Aml *ifctx2 = aml_if(aml_equal(aml_arg(2), aml_int(5))); ++ /* ++ * 0 - The operating system must not ignore the PCI configuration that ++ * firmware has done at boot time. ++ */ ++ aml_append(ifctx2, aml_return(aml_int(0))); ++ aml_append(ifctx, ifctx2); ++ } ++ + aml_append(method, ifctx); + + byte_list[0] = 0; +@@ -77,12 +91,13 @@ static Aml *build_pci_host_bridge_dsm_method(void) + } + + static void acpi_dsdt_add_host_bridge_methods(Aml *dev, +- bool enable_native_pcie_hotplug) ++ bool enable_native_pcie_hotplug, ++ bool preserve_config) + { + /* Declare an _OSC (OS Control Handoff) method */ + aml_append(dev, + build_pci_host_bridge_osc_method(enable_native_pcie_hotplug)); +- aml_append(dev, build_pci_host_bridge_dsm_method()); ++ aml_append(dev, build_pci_host_bridge_dsm_method(preserve_config)); + } + + void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg) +@@ -152,7 +167,8 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg) + build_cxl_osc_method(dev); + } else { + /* pxb bridges do not have ACPI PCI Hot-plug enabled */ +- acpi_dsdt_add_host_bridge_methods(dev, true); ++ acpi_dsdt_add_host_bridge_methods(dev, true, ++ cfg->preserve_config); + } + + aml_append(scope, dev); +@@ -227,7 +243,8 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg) + } + aml_append(dev, aml_name_decl("_CRS", rbuf)); + +- acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug); ++ acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug, ++ cfg->preserve_config); + + Aml *dev_res0 = aml_device("%s", "RES0"); + aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02"))); +diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h +index feaf827474..7eea16e728 100644 +--- a/include/hw/pci-host/gpex.h ++++ b/include/hw/pci-host/gpex.h +@@ -46,6 +46,7 @@ struct GPEXConfig { + int irq; + PCIBus *bus; + bool pci_native_hotplug; ++ bool preserve_config; + }; + + typedef struct GPEXIrq GPEXIrq; diff --git a/0249-hw-arm-virt-Set-PCI-preserve_config-for-accel-SMMUv3.patch b/0249-hw-arm-virt-Set-PCI-preserve_config-for-accel-SMMUv3.patch new file mode 100644 index 0000000..45df6d7 --- /dev/null +++ b/0249-hw-arm-virt-Set-PCI-preserve_config-for-accel-SMMUv3.patch @@ -0,0 +1,82 @@ +From 647573aa857520eca5d96d786171e02f0d4bc155 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:20 +0000 +Subject: [PATCH] hw/arm/virt: Set PCI preserve_config for accel SMMUv3 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 8422d071ab (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Introduce a new pci_preserve_config field in virt machine state which +allows the generation of DSM #5. This field is only set if accel SMMU +is instantiated. + +In a subsequent patch, SMMUv3 accel mode will make use of IORT RMR nodes +to enable nested translation of MSI doorbell addresses. IORT RMR requires +_DSM #5 to be set for the PCI host bridge so that the Guest kernel +preserves the PCI boot configuration. + +Reviewed-by: Jonathan Cameron +Tested-by: Zhangfei Gao +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit c37b3d4ab8cb40eefdc12560680ede1b11802229) +Signed-off-by: Eric Auger +--- + hw/arm/virt-acpi-build.c | 8 ++++++++ + hw/arm/virt.c | 1 + + include/hw/arm/virt.h | 1 + + 3 files changed, 10 insertions(+) + +diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c +index 96830f7c4e..0bbbebb7e3 100644 +--- a/hw/arm/virt-acpi-build.c ++++ b/hw/arm/virt-acpi-build.c +@@ -163,6 +163,14 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, + .pci_native_hotplug = !acpi_pcihp, + }; + ++ /* ++ * Accel SMMU requires RMRs for MSI 1-1 mapping, which require _DSM ++ * function 5 (_DSM for Preserving PCI Boot Configurations). ++ */ ++ if (vms->pci_preserve_config) { ++ cfg.preserve_config = true; ++ } ++ + if (vms->highmem_mmio) { + cfg.mmio64 = memmap[VIRT_HIGH_PCIE_MMIO]; + } +diff --git a/hw/arm/virt.c b/hw/arm/virt.c +index 1b1c9fe539..49009f99ed 100644 +--- a/hw/arm/virt.c ++++ b/hw/arm/virt.c +@@ -3119,6 +3119,7 @@ static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, + } + object_property_set_uint(OBJECT(dev), "msi-gpa", db_start, + &error_abort); ++ vms->pci_preserve_config = true; + } + } + } +diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h +index 8d90b66b87..b6d696e8ce 100644 +--- a/include/hw/arm/virt.h ++++ b/include/hw/arm/virt.h +@@ -183,6 +183,7 @@ struct VirtMachineState { + bool legacy_smmuv3_present; + MemoryRegion *sysmem; + MemoryRegion *secure_sysmem; ++ bool pci_preserve_config; + }; + + #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) diff --git a/0250-tests-qtest-bios-tables-test-Prepare-for-IORT-reviso.patch b/0250-tests-qtest-bios-tables-test-Prepare-for-IORT-reviso.patch new file mode 100644 index 0000000..ef730f4 --- /dev/null +++ b/0250-tests-qtest-bios-tables-test-Prepare-for-IORT-reviso.patch @@ -0,0 +1,45 @@ +From a6d6d4a3f6c36d260f6275dac19d0cc388ccbd15 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:21 +0000 +Subject: [PATCH] tests/qtest/bios-tables-test: Prepare for IORT revison + upgrade +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 27ab113c60 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Subsequent patch will upgrade IORT revision to 5 to add support +for IORT RMR nodes. + +Add the affected IORT blobs to allowed-diff list for bios-table +tests. + +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Signed-off-by: Shameer Kolothum +(cherry picked from commit 8a286818feadd90bcd14064c7ee8f18582ba9c43) +Signed-off-by: Eric Auger +--- + tests/qtest/bios-tables-test-allowed-diff.h | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h +index dfb8523c8b..3279638ad0 100644 +--- a/tests/qtest/bios-tables-test-allowed-diff.h ++++ b/tests/qtest/bios-tables-test-allowed-diff.h +@@ -1 +1,5 @@ + /* List of comma-separated changed AML files to ignore */ ++"tests/data/acpi/aarch64/virt/IORT", ++"tests/data/acpi/aarch64/virt/IORT.its_off", ++"tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy", ++"tests/data/acpi/aarch64/virt/IORT.smmuv3-dev", diff --git a/0251-hw-arm-virt-acpi-build-Add-IORT-RMR-regions-to-handl.patch b/0251-hw-arm-virt-acpi-build-Add-IORT-RMR-regions-to-handl.patch new file mode 100644 index 0000000..09ece1a --- /dev/null +++ b/0251-hw-arm-virt-acpi-build-Add-IORT-RMR-regions-to-handl.patch @@ -0,0 +1,280 @@ +From 0dce6aba607481f8e798e595f0383f42fb826098 Mon Sep 17 00:00:00 2001 +From: Eric Auger +Date: Mon, 26 Jan 2026 10:43:22 +0000 +Subject: [PATCH] hw/arm/virt-acpi-build: Add IORT RMR regions to handle MSI + nested binding +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 3816d9bfe3 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +To handle SMMUv3 accel=on mode(which configures the host SMMUv3 in nested +mode), it is practical to expose the guest with reserved memory regions +(RMRs) covering the IOVAs used by the host kernel to map physical MSI +doorbells. + +Those IOVAs belong to [0x8000000, 0x8100000] matching MSI_IOVA_BASE and +MSI_IOVA_LENGTH definitions in kernel arm-smmu-v3 driver. This is the +window used to allocate IOVAs matching physical MSI doorbells. + +With those RMRs, the guest is forced to use a flat mapping for this range. +Hence the assigned device is programmed with one IOVA from this range. +Stage 1, owned by the guest has a flat mapping for this IOVA. Stage2, +owned by the VMM then enforces a mapping from this IOVA to the physical +MSI doorbell. + +The creation of those RMR nodes is only relevant if nested stage SMMU is +in use, along with VFIO. As VFIO devices can be hotplugged, all RMRs need +to be created in advance. + +Initialise AcpiIortSMMUv3Dev structures to avoid using uninitialised +state when building the IORT, as legacy and device SMMUv3 paths +populate different fields now(e.g. accel). + +Signed-off-by: Eric Auger +Suggested-by: Jean-Philippe Brucker +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +Tested-by: Zhangfei Gao +Reviewed-by: Jonathan Cameron +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit a6229201e2f76e84978e030755f794fc1ec52afa) +Signed-off-by: Eric Auger +--- + hw/arm/virt-acpi-build.c | 115 +++++++++++++++++++++++++++++++++++---- + 1 file changed, 105 insertions(+), 10 deletions(-) + +diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c +index 0bbbebb7e3..149f1e7b67 100644 +--- a/hw/arm/virt-acpi-build.c ++++ b/hw/arm/virt-acpi-build.c +@@ -256,6 +256,29 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms) + #define ROOT_COMPLEX_ENTRY_SIZE 36 + #define IORT_NODE_OFFSET 48 + ++#define IORT_RMR_NUM_ID_MAPPINGS 1 ++#define IORT_RMR_NUM_MEM_RANGE_DESC 1 ++#define IORT_RMR_COMMON_HEADER_SIZE 28 ++#define IORT_RMR_MEM_RANGE_DESC_SIZE 20 ++ ++/* ++ * IORT RMR flags: ++ * Bit[0] = 0 Disallow remapping of reserved ranges ++ * Bit[1] = 0 Unprivileged access ++ * Bits[9:2] = 0x00 Device nGnRnE memory ++ */ ++#define IORT_RMR_FLAGS 0 ++ ++/* ++ * MSI doorbell IOVA window used by the host kernel SMMUv3 driver. ++ * Described in IORT RMR nodes to reserve the IOVA range where the host ++ * kernel maps physical MSI doorbells for devices. This ensures guests ++ * preserve a flat mapping for MSI doorbell in nested SMMUv3(accel=on) ++ * configurations. ++ */ ++#define MSI_IOVA_BASE 0x8000000 ++#define MSI_IOVA_LENGTH 0x100000 ++ + /* + * Append an ID mapping entry as described by "Table 4 ID mapping format" in + * "IO Remapping Table System Software on ARM Platforms", Chapter 3. +@@ -264,7 +287,8 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms) + * Note that @id_count gets internally subtracted by one, following the spec. + */ + static void build_iort_id_mapping(GArray *table_data, uint32_t input_base, +- uint32_t id_count, uint32_t out_ref) ++ uint32_t id_count, uint32_t out_ref, ++ uint32_t flags) + { + build_append_int_noprefix(table_data, input_base, 4); /* Input base */ + /* Number of IDs - The number of IDs in the range minus one */ +@@ -272,7 +296,7 @@ static void build_iort_id_mapping(GArray *table_data, uint32_t input_base, + build_append_int_noprefix(table_data, input_base, 4); /* Output base */ + build_append_int_noprefix(table_data, out_ref, 4); /* Output Reference */ + /* Flags */ +- build_append_int_noprefix(table_data, 0 /* Single mapping (disabled) */, 4); ++ build_append_int_noprefix(table_data, flags, 4); + } + + struct AcpiIortIdMapping { +@@ -320,6 +344,7 @@ typedef struct AcpiIortSMMUv3Dev { + GArray *rc_smmu_idmaps; + /* Offset of the SMMUv3 IORT Node relative to the start of the IORT */ + size_t offset; ++ bool accel; + } AcpiIortSMMUv3Dev; + + /* +@@ -329,7 +354,7 @@ typedef struct AcpiIortSMMUv3Dev { + static int populate_smmuv3_legacy_dev(GArray *sdev_blob) + { + VirtMachineState *vms = VIRT_MACHINE(qdev_get_machine()); +- AcpiIortSMMUv3Dev sdev; ++ AcpiIortSMMUv3Dev sdev = {0}; + + sdev.rc_smmu_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping)); + object_child_foreach_recursive(object_get_root(), iort_host_bridges, +@@ -361,10 +386,10 @@ static int smmuv3_dev_idmap_compare(gconstpointer a, gconstpointer b) + static int iort_smmuv3_devices(Object *obj, void *opaque) + { + VirtMachineState *vms = VIRT_MACHINE(qdev_get_machine()); ++ AcpiIortSMMUv3Dev sdev = {0}; + GArray *sdev_blob = opaque; + AcpiIortIdMapping idmap; + PlatformBusDevice *pbus; +- AcpiIortSMMUv3Dev sdev; + int min_bus, max_bus; + SysBusDevice *sbdev; + PCIBus *bus; +@@ -374,6 +399,9 @@ static int iort_smmuv3_devices(Object *obj, void *opaque) + } + + bus = PCI_BUS(object_property_get_link(obj, "primary-bus", &error_abort)); ++ if (object_property_find(obj, "accel")) { ++ sdev.accel = object_property_get_bool(obj, "accel", &error_abort); ++ } + pbus = PLATFORM_BUS_DEVICE(vms->platform_bus_dev); + sbdev = SYS_BUS_DEVICE(obj); + sdev.base = platform_bus_get_mmio_addr(pbus, sbdev, 0); +@@ -447,10 +475,69 @@ static void create_rc_its_idmaps(GArray *its_idmaps, GArray *smmuv3_devs) + } + } + ++static void ++build_iort_rmr_nodes(GArray *table_data, GArray *smmuv3_devices, uint32_t *id) ++{ ++ AcpiIortSMMUv3Dev *sdev; ++ AcpiIortIdMapping *idmap; ++ int i; ++ ++ for (i = 0; i < smmuv3_devices->len; i++) { ++ uint16_t rmr_len; ++ int bdf; ++ ++ sdev = &g_array_index(smmuv3_devices, AcpiIortSMMUv3Dev, i); ++ if (!sdev->accel) { ++ continue; ++ } ++ ++ /* ++ * Spec reference:Arm IO Remapping Table(IORT), ARM DEN 0049E.d, ++ * Section 3.1.1.5 "Reserved Memory Range node" ++ */ ++ idmap = &g_array_index(sdev->rc_smmu_idmaps, AcpiIortIdMapping, 0); ++ bdf = idmap->input_base; ++ rmr_len = IORT_RMR_COMMON_HEADER_SIZE ++ + (IORT_RMR_NUM_ID_MAPPINGS * ID_MAPPING_ENTRY_SIZE) ++ + (IORT_RMR_NUM_MEM_RANGE_DESC * IORT_RMR_MEM_RANGE_DESC_SIZE); ++ ++ /* Table 18 Reserved Memory Range Node */ ++ build_append_int_noprefix(table_data, 6 /* RMR */, 1); /* Type */ ++ /* Length */ ++ build_append_int_noprefix(table_data, rmr_len, 2); ++ build_append_int_noprefix(table_data, 3, 1); /* Revision */ ++ build_append_int_noprefix(table_data, (*id)++, 4); /* Identifier */ ++ /* Number of ID mappings */ ++ build_append_int_noprefix(table_data, IORT_RMR_NUM_ID_MAPPINGS, 4); ++ /* Reference to ID Array */ ++ build_append_int_noprefix(table_data, IORT_RMR_COMMON_HEADER_SIZE, 4); ++ ++ /* RMR specific data */ ++ ++ /* Flags */ ++ build_append_int_noprefix(table_data, IORT_RMR_FLAGS, 4); ++ /* Number of Memory Range Descriptors */ ++ build_append_int_noprefix(table_data, IORT_RMR_NUM_MEM_RANGE_DESC, 4); ++ /* Reference to Memory Range Descriptors */ ++ build_append_int_noprefix(table_data, IORT_RMR_COMMON_HEADER_SIZE + ++ (IORT_RMR_NUM_ID_MAPPINGS * ID_MAPPING_ENTRY_SIZE), 4); ++ build_iort_id_mapping(table_data, bdf, idmap->id_count, sdev->offset, ++ 1); ++ ++ /* Table 19 Memory Range Descriptor */ ++ ++ /* Physical Range offset */ ++ build_append_int_noprefix(table_data, MSI_IOVA_BASE, 8); ++ /* Physical Range length */ ++ build_append_int_noprefix(table_data, MSI_IOVA_LENGTH, 8); ++ build_append_int_noprefix(table_data, 0, 4); /* Reserved */ ++ } ++} ++ + /* + * Input Output Remapping Table (IORT) + * Conforms to "IO Remapping Table System Software on ARM Platforms", +- * Document number: ARM DEN 0049E.b, Feb 2021 ++ * Document number: ARM DEN 0049E.d, Feb 2022 + */ + static void + build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) +@@ -464,7 +551,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + GArray *smmuv3_devs = g_array_new(false, true, sizeof(AcpiIortSMMUv3Dev)); + GArray *rc_its_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping)); + +- AcpiTable table = { .sig = "IORT", .rev = 3, .oem_id = vms->oem_id, ++ AcpiTable table = { .sig = "IORT", .rev = 5, .oem_id = vms->oem_id, + .oem_table_id = vms->oem_table_id }; + /* Table 2 The IORT */ + acpi_table_begin(&table, table_data); +@@ -490,6 +577,13 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + nb_nodes++; /* ITS */ + rc_mapping_count += rc_its_idmaps->len; + } ++ /* Calculate RMR nodes required. One per SMMUv3 with accelerated mode */ ++ for (i = 0; i < num_smmus; i++) { ++ sdev = &g_array_index(smmuv3_devs, AcpiIortSMMUv3Dev, i); ++ if (sdev->accel) { ++ nb_nodes++; ++ } ++ } + } else { + if (vms->its) { + nb_nodes = 2; /* RC and ITS */ +@@ -562,7 +656,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + /* Array of ID mappings */ + if (smmu_mapping_count) { + /* Output IORT node is the ITS Group node (the first node). */ +- build_iort_id_mapping(table_data, 0, 0x10000, IORT_NODE_OFFSET); ++ build_iort_id_mapping(table_data, 0, 0x10000, IORT_NODE_OFFSET, 0); + } + } + +@@ -614,7 +708,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + AcpiIortIdMapping, j); + /* Output IORT node is the SMMUv3 node. */ + build_iort_id_mapping(table_data, range->input_base, +- range->id_count, sdev->offset); ++ range->id_count, sdev->offset, 0); + } + } + +@@ -627,7 +721,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + range = &g_array_index(rc_its_idmaps, AcpiIortIdMapping, i); + /* Output IORT node is the ITS Group node (the first node). */ + build_iort_id_mapping(table_data, range->input_base, +- range->id_count, IORT_NODE_OFFSET); ++ range->id_count, IORT_NODE_OFFSET, 0); + } + } + } else { +@@ -636,9 +730,10 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + * SMMU: RC -> ITS. + * Output IORT node is the ITS Group node (the first node). + */ +- build_iort_id_mapping(table_data, 0, 0x10000, IORT_NODE_OFFSET); ++ build_iort_id_mapping(table_data, 0, 0x10000, IORT_NODE_OFFSET, 0); + } + ++ build_iort_rmr_nodes(table_data, smmuv3_devs, &id); + acpi_table_end(linker, &table); + g_array_free(rc_its_idmaps, true); + for (i = 0; i < num_smmus; i++) { diff --git a/0252-tests-qtest-bios-tables-test-Update-IORT-blobs-after.patch b/0252-tests-qtest-bios-tables-test-Update-IORT-blobs-after.patch new file mode 100644 index 0000000..cec6a5b --- /dev/null +++ b/0252-tests-qtest-bios-tables-test-Update-IORT-blobs-after.patch @@ -0,0 +1,86 @@ +From 44d6899573fccd6c0d0a9b71be222f3af1cd196a Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:23 +0000 +Subject: [PATCH] tests/qtest/bios-tables-test: Update IORT blobs after + revision upgrade +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] c213d40934 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Update the reference IORT blobs after revision upgrade for RMR node +support. This affects the aarch64 'virt' IORT tests. + +IORT diff is the same for all the tests: + + /* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20230628 (64-bit version) + * Copyright (c) 2000 - 2023 Intel Corporation + * +- * Disassembly of tests/data/acpi/aarch64/virt/IORT, Mon Oct 20 14:42:41 2025 ++ * Disassembly of /tmp/aml-B4ZRE3, Mon Oct 20 14:42:41 2025 + * + * ACPI Data Table [IORT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex) + */ + + [000h 0000 004h] Signature : "IORT" [IO Remapping Table] + [004h 0004 004h] Table Length : 00000080 +-[008h 0008 001h] Revision : 03 +-[009h 0009 001h] Checksum : B3 ++[008h 0008 001h] Revision : 05 ++[009h 0009 001h] Checksum : B1 + [00Ah 0010 006h] Oem ID : "BOCHS " + [010h 0016 008h] Oem Table ID : "BXPC " + [018h 0024 004h] Oem Revision : 00000001 + [01Ch 0028 004h] Asl Compiler ID : "BXPC" + [020h 0032 004h] Asl Compiler Revision : 00000001 + ... + +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Signed-off-by: Shameer Kolothum +(cherry picked from commit b9d4954811d86996b6c8222524d85a03d722924c) +Signed-off-by: Eric Auger +--- + tests/data/acpi/aarch64/virt/IORT | Bin 128 -> 128 bytes + tests/data/acpi/aarch64/virt/IORT.its_off | Bin 172 -> 172 bytes + tests/data/acpi/aarch64/virt/IORT.smmuv3-dev | Bin 364 -> 364 bytes + tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy | Bin 276 -> 276 bytes + tests/qtest/bios-tables-test-allowed-diff.h | 4 ---- + 5 files changed, 4 deletions(-) + +diff --git a/tests/data/acpi/aarch64/virt/IORT b/tests/data/acpi/aarch64/virt/IORT +index 7efd0ce8a6..a234aae4c2 100644 +Binary files a/tests/data/acpi/aarch64/virt/IORT and b/tests/data/acpi/aarch64/virt/IORT differ +diff --git a/tests/data/acpi/aarch64/virt/IORT.its_off b/tests/data/acpi/aarch64/virt/IORT.its_off +index c10da4e61d..0cf52b52f6 100644 +Binary files a/tests/data/acpi/aarch64/virt/IORT.its_off and b/tests/data/acpi/aarch64/virt/IORT.its_off differ +diff --git a/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev b/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev +index 67be268f62..43a15fe2bf 100644 +Binary files a/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev and b/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev differ +diff --git a/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy b/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy +index 41981a449f..5779d0e225 100644 +Binary files a/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy and b/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy differ +diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h +index 3279638ad0..dfb8523c8b 100644 +--- a/tests/qtest/bios-tables-test-allowed-diff.h ++++ b/tests/qtest/bios-tables-test-allowed-diff.h +@@ -1,5 +1 @@ + /* List of comma-separated changed AML files to ignore */ +-"tests/data/acpi/aarch64/virt/IORT", +-"tests/data/acpi/aarch64/virt/IORT.its_off", +-"tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy", +-"tests/data/acpi/aarch64/virt/IORT.smmuv3-dev", diff --git a/0253-hw-arm-smmuv3-Block-migration-when-accel-is-enabled.patch b/0253-hw-arm-smmuv3-Block-migration-when-accel-is-enabled.patch new file mode 100644 index 0000000..53590ef --- /dev/null +++ b/0253-hw-arm-smmuv3-Block-migration-when-accel-is-enabled.patch @@ -0,0 +1,75 @@ +From f660f5597053ffed9db21a0bdc8778473036cf64 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:24 +0000 +Subject: [PATCH] hw/arm/smmuv3: Block migration when accel is enabled +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 0faf9e983f (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Conflicts: use hw/irq.h and hw/sysbus.h instead of hw/core/* +because we don't have +32222dc3bbd1 include: move hw/irq.h to hw/core/ nor +c755f3b95964 include: move hw/sysbus.h to hw/core/ + +Live migration is not supported when the SMMUv3 accelerator mode is +enabled. Add a migration blocker to prevent migration in this +configuration. + +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Tested-by: Zhangfei Gao +Reviewed-by: Jonathan Cameron +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 65ab51f65166742da2803805a937b05f3580bdf3) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3.c | 6 ++++++ + include/hw/arm/smmuv3.h | 1 + + 2 files changed, 7 insertions(+) + +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index dba5abc8d3..6faa660bab 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -20,6 +20,7 @@ + #include "qemu/bitops.h" + #include "hw/irq.h" + #include "hw/sysbus.h" ++#include "migration/blocker.h" + #include "migration/vmstate.h" + #include "hw/qdev-properties.h" + #include "hw/qdev-core.h" +@@ -1925,6 +1926,11 @@ static void smmu_realize(DeviceState *d, Error **errp) + + if (s->accel) { + smmuv3_accel_init(s); ++ error_setg(&s->migration_blocker, "Migration not supported with SMMUv3 " ++ "accelerator mode enabled"); ++ if (migrate_add_blocker(&s->migration_blocker, errp) < 0) { ++ return; ++ } + } + + c->parent_realize(d, &local_err); +diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h +index 5616a8a2be..9c39acd5ca 100644 +--- a/include/hw/arm/smmuv3.h ++++ b/include/hw/arm/smmuv3.h +@@ -68,6 +68,7 @@ struct SMMUv3State { + bool accel; + struct SMMUv3AccelState *s_accel; + uint64_t msi_gpa; ++ Error *migration_blocker; + }; + + typedef enum { diff --git a/0254-hw-arm-smmuv3-Add-accel-property-for-SMMUv3-device.patch b/0254-hw-arm-smmuv3-Add-accel-property-for-SMMUv3-device.patch new file mode 100644 index 0000000..4fbefbd --- /dev/null +++ b/0254-hw-arm-smmuv3-Add-accel-property-for-SMMUv3-device.patch @@ -0,0 +1,174 @@ +From 9db0a1c852e010938b0debdd74d4eff706795c64 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:25 +0000 +Subject: [PATCH] hw/arm/smmuv3: Add accel property for SMMUv3 device +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] c455ea4fd0 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Add an "accel" property to enable SMMUv3 accelerator mode. + +Accelerator mode relies on IORT RMR entries for MSI support and is +therefore not supported when booting with a device tree. + +In this mode, the host SMMUv3 operates in nested translation +(Stage-1 + Stage-2), with the guest owning the Stage-1 page tables. +Expose only Stage-1 to the guest to ensure it uses the correct page +table format + +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Tested-by: Zhangfei Gao +Reviewed-by: Jonathan Cameron +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 59cda444b2f4437fa7a1b3ff6c7bd3dcd2e5b824) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3.c | 32 ++++++++++++++++++++++++++++++++ + hw/arm/virt-acpi-build.c | 4 +--- + hw/arm/virt.c | 22 +++++++++++++--------- + 3 files changed, 46 insertions(+), 12 deletions(-) + +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index 6faa660bab..0d2f5a9b0c 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -1916,6 +1916,29 @@ static void smmu_reset_exit(Object *obj, ResetType type) + smmuv3_accel_reset(s); + } + ++static bool smmu_validate_property(SMMUv3State *s, Error **errp) ++{ ++#ifndef CONFIG_ARM_SMMUV3_ACCEL ++ if (s->accel) { ++ error_setg(errp, "accel=on support not compiled in"); ++ return false; ++ } ++#endif ++ ++ if (!s->accel) { ++ return true; ++ } ++ ++ /* If no stage specified, SMMUv3 defaults to stage 1 */ ++ if (s->stage && strcmp(s->stage, "1")) { ++ error_setg(errp, ++ "Only stage1 is supported for SMMUv3 with accel=on"); ++ return false; ++ } ++ ++ return true; ++} ++ + static void smmu_realize(DeviceState *d, Error **errp) + { + SMMUState *sys = ARM_SMMU(d); +@@ -1924,6 +1947,10 @@ static void smmu_realize(DeviceState *d, Error **errp) + SysBusDevice *dev = SYS_BUS_DEVICE(d); + Error *local_err = NULL; + ++ if (!smmu_validate_property(s, errp)) { ++ return; ++ } ++ + if (s->accel) { + smmuv3_accel_init(s); + error_setg(&s->migration_blocker, "Migration not supported with SMMUv3 " +@@ -2029,6 +2056,7 @@ static const Property smmuv3_properties[] = { + * Defaults to stage 1 + */ + DEFINE_PROP_STRING("stage", SMMUv3State, stage), ++ DEFINE_PROP_BOOL("accel", SMMUv3State, accel, false), + /* GPA of MSI doorbell, for SMMUv3 accel use. */ + DEFINE_PROP_UINT64("msi-gpa", SMMUv3State, msi_gpa, 0), + }; +@@ -2052,6 +2080,10 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data) + device_class_set_props(dc, smmuv3_properties); + dc->hotpluggable = false; + dc->user_creatable = true; ++ ++ object_class_property_set_description(klass, "accel", ++ "Enable SMMUv3 accelerator support. Allows host SMMUv3 to be " ++ "configured in nested mode for vfio-pci dev assignment"); + } + + static int smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu, +diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c +index 149f1e7b67..0532a280f6 100644 +--- a/hw/arm/virt-acpi-build.c ++++ b/hw/arm/virt-acpi-build.c +@@ -399,9 +399,7 @@ static int iort_smmuv3_devices(Object *obj, void *opaque) + } + + bus = PCI_BUS(object_property_get_link(obj, "primary-bus", &error_abort)); +- if (object_property_find(obj, "accel")) { +- sdev.accel = object_property_get_bool(obj, "accel", &error_abort); +- } ++ sdev.accel = object_property_get_bool(obj, "accel", &error_abort); + pbus = PLATFORM_BUS_DEVICE(vms->platform_bus_dev); + sbdev = SYS_BUS_DEVICE(obj); + sdev.base = platform_bus_get_mmio_addr(pbus, sbdev, 0); +diff --git a/hw/arm/virt.c b/hw/arm/virt.c +index 49009f99ed..3f498801b0 100644 +--- a/hw/arm/virt.c ++++ b/hw/arm/virt.c +@@ -1511,8 +1511,8 @@ static void create_smmuv3_dt_bindings(const VirtMachineState *vms, hwaddr base, + g_free(node); + } + +-static void create_smmuv3_dev_dtb(VirtMachineState *vms, +- DeviceState *dev, PCIBus *bus) ++static void create_smmuv3_dev_dtb(VirtMachineState *vms, DeviceState *dev, ++ PCIBus *bus, Error **errp) + { + PlatformBusDevice *pbus = PLATFORM_BUS_DEVICE(vms->platform_bus_dev); + SysBusDevice *sbdev = SYS_BUS_DEVICE(dev); +@@ -1520,10 +1520,15 @@ static void create_smmuv3_dev_dtb(VirtMachineState *vms, + hwaddr base = platform_bus_get_mmio_addr(pbus, sbdev, 0); + MachineState *ms = MACHINE(vms); + +- if (!(vms->bootinfo.firmware_loaded && virt_is_acpi_enabled(vms)) && +- strcmp("pcie.0", bus->qbus.name)) { +- warn_report("SMMUv3 device only supported with pcie.0 for DT"); +- return; ++ if (!(vms->bootinfo.firmware_loaded && virt_is_acpi_enabled(vms))) { ++ if (object_property_get_bool(OBJECT(dev), "accel", &error_abort)) { ++ error_setg(errp, "SMMUv3 with accel=on not supported for DT"); ++ return; ++ } ++ if (strcmp("pcie.0", bus->qbus.name)) { ++ warn_report("SMMUv3 device only supported with pcie.0 for DT"); ++ return; ++ } + } + base += vms->memmap[VIRT_PLATFORM_BUS].base; + irq += vms->irqmap[VIRT_PLATFORM_BUS]; +@@ -3100,8 +3105,7 @@ static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, + object_property_set_link(OBJECT(dev), "secure-memory", + OBJECT(vms->secure_sysmem), NULL); + } +- if (object_property_find(OBJECT(dev), "accel") && +- object_property_get_bool(OBJECT(dev), "accel", &error_abort)) { ++ if (object_property_get_bool(OBJECT(dev), "accel", &error_abort)) { + hwaddr db_start = 0; + + if (!kvm_enabled() || !kvm_irqchip_in_kernel()) { +@@ -3156,7 +3160,7 @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev, + return; + } + +- create_smmuv3_dev_dtb(vms, dev, bus); ++ create_smmuv3_dev_dtb(vms, dev, bus, errp); + } + } + diff --git a/0255-hw-arm-smmuv3-accel-Add-a-property-to-specify-RIL-su.patch b/0255-hw-arm-smmuv3-accel-Add-a-property-to-specify-RIL-su.patch new file mode 100644 index 0000000..adfc616 --- /dev/null +++ b/0255-hw-arm-smmuv3-accel-Add-a-property-to-specify-RIL-su.patch @@ -0,0 +1,144 @@ +From 35d00f0402a09fa29cbeb7dc07934152f1976d80 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:26 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Add a property to specify RIL support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] daaa6bac01 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Currently QEMU SMMUv3 has RIL support by default. But if accelerated mode +is enabled, RIL has to be compatible with host SMMUv3 support. + +Add a property so that the user can specify this. + +Reviewed-by: Jonathan Cameron +Tested-by: Zhangfei Gao +Reviewed-by: Eric Auger +Reviewed-by: Nicolin Chen +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 82d28bd423ba9b4faf24283effe96589687d777e) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 14 ++++++++++++-- + hw/arm/smmuv3-accel.h | 4 ++++ + hw/arm/smmuv3.c | 9 +++++++++ + include/hw/arm/smmuv3.h | 1 + + 4 files changed, 26 insertions(+), 2 deletions(-) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index 33011962e3..df82f1e32a 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -68,8 +68,8 @@ smmuv3_accel_check_hw_compatible(SMMUv3State *s, + return false; + } + +- /* QEMU SMMUv3 supports Range Invalidation by default */ +- if (FIELD_EX32(info->idr[3], IDR3, RIL) != ++ /* User can disable QEMU SMMUv3 Range Invalidation support */ ++ if (FIELD_EX32(info->idr[3], IDR3, RIL) < + FIELD_EX32(s->idr[3], IDR3, RIL)) { + error_setg(errp, "Host SMMUv3 doesn't support Range Invalidation"); + return false; +@@ -646,6 +646,16 @@ static const PCIIOMMUOps smmuv3_accel_ops = { + .get_msi_direct_gpa = smmuv3_accel_get_msi_gpa, + }; + ++void smmuv3_accel_idr_override(SMMUv3State *s) ++{ ++ if (!s->accel) { ++ return; ++ } ++ ++ /* By default QEMU SMMUv3 has RIL. Update IDR3 if user has disabled it */ ++ s->idr[3] = FIELD_DP32(s->idr[3], IDR3, RIL, s->ril); ++} ++ + /* Based on SMUUv3 GPBA.ABORT configuration, attach a corresponding HWPT */ + bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp) + { +diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h +index 41b37e3122..a8a64802ec 100644 +--- a/hw/arm/smmuv3-accel.h ++++ b/hw/arm/smmuv3-accel.h +@@ -49,6 +49,7 @@ bool smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range, + bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp); + bool smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev, + Error **errp); ++void smmuv3_accel_idr_override(SMMUv3State *s); + void smmuv3_accel_reset(SMMUv3State *s); + #else + static inline void smmuv3_accel_init(SMMUv3State *s) +@@ -76,6 +77,9 @@ smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev, + { + return true; + } ++static inline void smmuv3_accel_idr_override(SMMUv3State *s) ++{ ++} + static inline void smmuv3_accel_reset(SMMUv3State *s) + { + } +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index 0d2f5a9b0c..643706b29c 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -305,6 +305,7 @@ static void smmuv3_init_id_regs(SMMUv3State *s) + s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN16K, 1); + s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN64K, 1); + s->aidr = 0x1; ++ smmuv3_accel_idr_override(s); + } + + static void smmuv3_reset(SMMUv3State *s) +@@ -1926,6 +1927,10 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp) + #endif + + if (!s->accel) { ++ if (!s->ril) { ++ error_setg(errp, "ril can only be disabled if accel=on"); ++ return false; ++ } + return true; + } + +@@ -2059,6 +2064,8 @@ static const Property smmuv3_properties[] = { + DEFINE_PROP_BOOL("accel", SMMUv3State, accel, false), + /* GPA of MSI doorbell, for SMMUv3 accel use. */ + DEFINE_PROP_UINT64("msi-gpa", SMMUv3State, msi_gpa, 0), ++ /* RIL can be turned off for accel cases */ ++ DEFINE_PROP_BOOL("ril", SMMUv3State, ril, true), + }; + + static void smmuv3_instance_init(Object *obj) +@@ -2084,6 +2091,8 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data) + object_class_property_set_description(klass, "accel", + "Enable SMMUv3 accelerator support. Allows host SMMUv3 to be " + "configured in nested mode for vfio-pci dev assignment"); ++ object_class_property_set_description(klass, "ril", ++ "Disable range invalidation support (for accel=on)"); + } + + static int smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu, +diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h +index 9c39acd5ca..533a2182e8 100644 +--- a/include/hw/arm/smmuv3.h ++++ b/include/hw/arm/smmuv3.h +@@ -69,6 +69,7 @@ struct SMMUv3State { + struct SMMUv3AccelState *s_accel; + uint64_t msi_gpa; + Error *migration_blocker; ++ bool ril; + }; + + typedef enum { diff --git a/0256-hw-arm-smmuv3-accel-Add-support-for-ATS.patch b/0256-hw-arm-smmuv3-accel-Add-support-for-ATS.patch new file mode 100644 index 0000000..121633d --- /dev/null +++ b/0256-hw-arm-smmuv3-accel-Add-support-for-ATS.patch @@ -0,0 +1,183 @@ +From e16b4a6caf5d51295f8c88fbf060f7aae5da8a75 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:27 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Add support for ATS +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] fb9e2e0e17 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +QEMU SMMUv3 does not enable ATS (Address Translation Services) by default. +When accelerated mode is enabled and the host SMMUv3 supports ATS, it can +be useful to report ATS capability to the guest so it can take advantage +of it if the device also supports ATS. + +Note: ATS support cannot be reliably detected from the host SMMUv3 IDR +registers alone, as firmware ACPI IORT tables may override them. The +user must therefore ensure the support before enabling it. + +The ATS support enabled here is only relevant for vfio-pci endpoints, +as SMMUv3 accelerated mode does not support emulated endpoint devices. +QEMU’s SMMUv3 implementation still lacks support for handling ATS +translation requests, which would be required for emulated endpoints. + +Reviewed-by: Jonathan Cameron +Tested-by: Zhangfei Gao +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 0aaab6385ff18a3dbc27de3b87f546cec39603dc) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 3 +++ + hw/arm/smmuv3.c | 24 +++++++++++++++++++++++- + hw/arm/virt-acpi-build.c | 10 ++++++++-- + include/hw/arm/smmuv3.h | 1 + + 4 files changed, 35 insertions(+), 3 deletions(-) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index df82f1e32a..a97abc1f79 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -654,6 +654,9 @@ void smmuv3_accel_idr_override(SMMUv3State *s) + + /* By default QEMU SMMUv3 has RIL. Update IDR3 if user has disabled it */ + s->idr[3] = FIELD_DP32(s->idr[3], IDR3, RIL, s->ril); ++ ++ /* QEMU SMMUv3 has no ATS. Advertise ATS if opt-in by property */ ++ s->idr[0] = FIELD_DP32(s->idr[0], IDR0, ATS, s->ats); + } + + /* Based on SMUUv3 GPBA.ABORT configuration, attach a corresponding HWPT */ +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index 643706b29c..ead0785b2b 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -1498,13 +1498,27 @@ static int smmuv3_cmdq_consume(SMMUv3State *s, Error **errp) + */ + smmuv3_range_inval(bs, &cmd, SMMU_STAGE_2); + break; ++ case SMMU_CMD_ATC_INV: ++ { ++ SMMUDevice *sdev = smmu_find_sdev(bs, CMD_SID(&cmd)); ++ ++ if (!sdev || !s->ats) { ++ trace_smmuv3_unhandled_cmd(type); ++ break; ++ } ++ ++ if (!smmuv3_accel_issue_inv_cmd(s, &cmd, sdev, errp)) { ++ cmd_error = SMMU_CERROR_ILL; ++ break; ++ } ++ break; ++ } + case SMMU_CMD_TLBI_EL3_ALL: + case SMMU_CMD_TLBI_EL3_VA: + case SMMU_CMD_TLBI_EL2_ALL: + case SMMU_CMD_TLBI_EL2_ASID: + case SMMU_CMD_TLBI_EL2_VA: + case SMMU_CMD_TLBI_EL2_VAA: +- case SMMU_CMD_ATC_INV: + case SMMU_CMD_PRI_RESP: + case SMMU_CMD_RESUME: + case SMMU_CMD_STALL_TERM: +@@ -1931,6 +1945,10 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp) + error_setg(errp, "ril can only be disabled if accel=on"); + return false; + } ++ if (s->ats) { ++ error_setg(errp, "ats can only be enabled if accel=on"); ++ return false; ++ } + return true; + } + +@@ -2066,6 +2084,7 @@ static const Property smmuv3_properties[] = { + DEFINE_PROP_UINT64("msi-gpa", SMMUv3State, msi_gpa, 0), + /* RIL can be turned off for accel cases */ + DEFINE_PROP_BOOL("ril", SMMUv3State, ril, true), ++ DEFINE_PROP_BOOL("ats", SMMUv3State, ats, false), + }; + + static void smmuv3_instance_init(Object *obj) +@@ -2093,6 +2112,9 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data) + "configured in nested mode for vfio-pci dev assignment"); + object_class_property_set_description(klass, "ril", + "Disable range invalidation support (for accel=on)"); ++ object_class_property_set_description(klass, "ats", ++ "Enable/disable ATS support (for accel=on). Please ensure host " ++ "platform has ATS support before enabling this"); + } + + static int smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu, +diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c +index 0532a280f6..39b1b55b00 100644 +--- a/hw/arm/virt-acpi-build.c ++++ b/hw/arm/virt-acpi-build.c +@@ -345,6 +345,7 @@ typedef struct AcpiIortSMMUv3Dev { + /* Offset of the SMMUv3 IORT Node relative to the start of the IORT */ + size_t offset; + bool accel; ++ bool ats; + } AcpiIortSMMUv3Dev; + + /* +@@ -400,6 +401,7 @@ static int iort_smmuv3_devices(Object *obj, void *opaque) + + bus = PCI_BUS(object_property_get_link(obj, "primary-bus", &error_abort)); + sdev.accel = object_property_get_bool(obj, "accel", &error_abort); ++ sdev.ats = object_property_get_bool(obj, "ats", &error_abort); + pbus = PLATFORM_BUS_DEVICE(vms->platform_bus_dev); + sbdev = SYS_BUS_DEVICE(obj); + sdev.base = platform_bus_get_mmio_addr(pbus, sbdev, 0); +@@ -543,6 +545,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + int i, nb_nodes, rc_mapping_count; + AcpiIortSMMUv3Dev *sdev; + size_t node_size; ++ bool ats_needed = false; + int num_smmus = 0; + uint32_t id = 0; + int rc_smmu_idmaps_len = 0; +@@ -578,6 +581,9 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + /* Calculate RMR nodes required. One per SMMUv3 with accelerated mode */ + for (i = 0; i < num_smmus; i++) { + sdev = &g_array_index(smmuv3_devs, AcpiIortSMMUv3Dev, i); ++ if (sdev->ats) { ++ ats_needed = true; ++ } + if (sdev->accel) { + nb_nodes++; + } +@@ -677,8 +683,8 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + build_append_int_noprefix(table_data, 0, 2); /* Reserved */ + /* Table 15 Memory Access Flags */ + build_append_int_noprefix(table_data, 0x3 /* CCA = CPM = DACS = 1 */, 1); +- +- build_append_int_noprefix(table_data, 0, 4); /* ATS Attribute */ ++ /* ATS Attribute */ ++ build_append_int_noprefix(table_data, ats_needed, 4); + /* MCFG pci_segment */ + build_append_int_noprefix(table_data, 0, 4); /* PCI Segment number */ + +diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h +index 533a2182e8..242d6429ed 100644 +--- a/include/hw/arm/smmuv3.h ++++ b/include/hw/arm/smmuv3.h +@@ -70,6 +70,7 @@ struct SMMUv3State { + uint64_t msi_gpa; + Error *migration_blocker; + bool ril; ++ bool ats; + }; + + typedef enum { diff --git a/0257-hw-arm-smmuv3-accel-Add-property-to-specify-OAS-bits.patch b/0257-hw-arm-smmuv3-accel-Add-property-to-specify-OAS-bits.patch new file mode 100644 index 0000000..0f32282 --- /dev/null +++ b/0257-hw-arm-smmuv3-accel-Add-property-to-specify-OAS-bits.patch @@ -0,0 +1,178 @@ +From 2f26a8d4f704f2b278c36a791133a5f8f9582b10 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:28 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Add property to specify OAS bits +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] de193aa6ed (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +QEMU SMMUv3 currently sets the output address size (OAS) to 44 bits. +With accelerator mode enabled, a device may use SVA, where CPU page tables +are shared with the SMMU, requiring an OAS at least as large as the +CPU’s output address size. A user option is added to configure this. + +However, the OAS value advertised by the virtual SMMU must remain +compatible with the capabilities of the host SMMUv3. In accelerated +mode, the host SMMU performs stage-2 translation and must be able to +consume the intermediate physical addresses (IPA) produced by stage-1. + +The OAS exposed by the virtual SMMU defines the maximum IPA width that +stage-1 translations may generate. For AArch64 implementations, the +maximum usable IPA size on the host SMMU is determined by its own OAS. +Check that the configured OAS does not exceed what the host SMMU +can safely support. + +Tested-by: Zhangfei Gao +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Reviewed-by: Jonathan Cameron +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 06a1ecd388bb1825769c7fdce81274c9a0eefe12) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 22 ++++++++++++++++++++++ + hw/arm/smmuv3.c | 16 +++++++++++++++- + include/hw/arm/smmuv3-common.h | 5 ++++- + include/hw/arm/smmuv3.h | 1 + + 4 files changed, 42 insertions(+), 2 deletions(-) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index a97abc1f79..ea420afeb7 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -27,6 +27,14 @@ + static MemoryRegion root, sysmem; + static AddressSpace *shared_as_sysmem; + ++static int smmuv3_oas_bits(uint32_t oas) ++{ ++ static const int map[] = { 32, 36, 40, 42, 44, 48, 52, 56 }; ++ ++ g_assert(oas < ARRAY_SIZE(map)); ++ return map[oas]; ++} ++ + static bool + smmuv3_accel_check_hw_compatible(SMMUv3State *s, + struct iommu_hw_info_arm_smmuv3 *info, +@@ -74,6 +82,15 @@ smmuv3_accel_check_hw_compatible(SMMUv3State *s, + error_setg(errp, "Host SMMUv3 doesn't support Range Invalidation"); + return false; + } ++ /* Check OAS value opted is compatible with Host SMMUv3 IPA */ ++ if (FIELD_EX32(info->idr[5], IDR5, OAS) < ++ FIELD_EX32(s->idr[5], IDR5, OAS)) { ++ error_setg(errp, "Host SMMUv3 supports only %d-bit IPA, but the vSMMU " ++ "OAS implies %d-bit IPA", ++ smmuv3_oas_bits(FIELD_EX32(info->idr[5], IDR5, OAS)), ++ smmuv3_oas_bits(FIELD_EX32(s->idr[5], IDR5, OAS))); ++ return false; ++ } + + /* QEMU SMMUv3 supports GRAN4K/GRAN16K/GRAN64K translation granules */ + if (FIELD_EX32(info->idr[5], IDR5, GRAN4K) != +@@ -657,6 +674,11 @@ void smmuv3_accel_idr_override(SMMUv3State *s) + + /* QEMU SMMUv3 has no ATS. Advertise ATS if opt-in by property */ + s->idr[0] = FIELD_DP32(s->idr[0], IDR0, ATS, s->ats); ++ ++ /* Advertise 48-bit OAS in IDR5 when requested (default is 44 bits). */ ++ if (s->oas == SMMU_OAS_48BIT) { ++ s->idr[5] = FIELD_DP32(s->idr[5], IDR5, OAS, SMMU_IDR5_OAS_48); ++ } + } + + /* Based on SMUUv3 GPBA.ABORT configuration, attach a corresponding HWPT */ +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index ead0785b2b..ef75a9bec0 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -299,7 +299,8 @@ static void smmuv3_init_id_regs(SMMUv3State *s) + s->idr[3] = FIELD_DP32(s->idr[3], IDR3, RIL, 1); + s->idr[3] = FIELD_DP32(s->idr[3], IDR3, BBML, 2); + +- s->idr[5] = FIELD_DP32(s->idr[5], IDR5, OAS, SMMU_IDR5_OAS); /* 44 bits */ ++ /* OAS: 44 bits */ ++ s->idr[5] = FIELD_DP32(s->idr[5], IDR5, OAS, SMMU_IDR5_OAS_44); + /* 4K, 16K and 64K granule support */ + s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN4K, 1); + s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN16K, 1); +@@ -1949,6 +1950,10 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp) + error_setg(errp, "ats can only be enabled if accel=on"); + return false; + } ++ if (s->oas != SMMU_OAS_44BIT) { ++ error_setg(errp, "OAS must be 44 bits when accel=off"); ++ return false; ++ } + return true; + } + +@@ -1959,6 +1964,11 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp) + return false; + } + ++ if (s->oas != SMMU_OAS_44BIT && s->oas != SMMU_OAS_48BIT) { ++ error_setg(errp, "OAS can only be set to 44 or 48 bits"); ++ return false; ++ } ++ + return true; + } + +@@ -2085,6 +2095,7 @@ static const Property smmuv3_properties[] = { + /* RIL can be turned off for accel cases */ + DEFINE_PROP_BOOL("ril", SMMUv3State, ril, true), + DEFINE_PROP_BOOL("ats", SMMUv3State, ats, false), ++ DEFINE_PROP_UINT8("oas", SMMUv3State, oas, 44), + }; + + static void smmuv3_instance_init(Object *obj) +@@ -2115,6 +2126,9 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data) + object_class_property_set_description(klass, "ats", + "Enable/disable ATS support (for accel=on). Please ensure host " + "platform has ATS support before enabling this"); ++ object_class_property_set_description(klass, "oas", ++ "Specify Output Address Size (for accel=on). Supported values " ++ "are 44 or 48 bits. Defaults to 44 bits"); + } + + static int smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu, +diff --git a/include/hw/arm/smmuv3-common.h b/include/hw/arm/smmuv3-common.h +index 4d8af5736a..bc2d49ef4e 100644 +--- a/include/hw/arm/smmuv3-common.h ++++ b/include/hw/arm/smmuv3-common.h +@@ -342,7 +342,10 @@ REG32(IDR5, 0x14) + FIELD(IDR5, VAX, 10, 2); + FIELD(IDR5, STALL_MAX, 16, 16); + +-#define SMMU_IDR5_OAS 4 ++#define SMMU_OAS_44BIT 44 ++#define SMMU_OAS_48BIT 48 ++#define SMMU_IDR5_OAS_44 4 ++#define SMMU_IDR5_OAS_48 5 + + REG32(IIDR, 0x18) + REG32(AIDR, 0x1c) +diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h +index 242d6429ed..d488a39cd0 100644 +--- a/include/hw/arm/smmuv3.h ++++ b/include/hw/arm/smmuv3.h +@@ -71,6 +71,7 @@ struct SMMUv3State { + Error *migration_blocker; + bool ril; + bool ats; ++ uint8_t oas; + }; + + typedef enum { diff --git a/0258-backends-iommufd-Retrieve-PASID-width-from-iommufd_b.patch b/0258-backends-iommufd-Retrieve-PASID-width-from-iommufd_b.patch new file mode 100644 index 0000000..a313b84 --- /dev/null +++ b/0258-backends-iommufd-Retrieve-PASID-width-from-iommufd_b.patch @@ -0,0 +1,161 @@ +From d22255cd550ae308e52743c1116d49fadd90a874 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:29 +0000 +Subject: [PATCH] backends/iommufd: Retrieve PASID width from + iommufd_backend_get_device_info() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 3c12140e43 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Conflicts: contextual conflict in hw/vfio/iommufd.c +Add caps local variable and pass it in iommufd_backend_get_device_info() +This is due to the fcat we don't have +68d3a2a24d7c ("Workaround for ERRATA_772415_SPR17") + +Retrieve PASID width from iommufd_backend_get_device_info() and store it +in HostIOMMUDeviceCaps for later use. + +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Tested-by: Zhangfei Gao +Reviewed-by: Nicolin Chen +Reviewed-by: Cédric Le Goater +Tested-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit cd502a8017f8eb1c99063324e7c61e2eed3eed17) +Signed-off-by: Eric Auger +--- + backends/iommufd.c | 6 +++++- + hw/arm/smmuv3-accel.c | 3 ++- + hw/vfio/iommufd.c | 8 ++++++-- + include/system/host_iommu_device.h | 3 +++ + include/system/iommufd.h | 3 ++- + 5 files changed, 18 insertions(+), 5 deletions(-) + +diff --git a/backends/iommufd.c b/backends/iommufd.c +index e68a2c934f..6381f9664b 100644 +--- a/backends/iommufd.c ++++ b/backends/iommufd.c +@@ -388,7 +388,8 @@ bool iommufd_backend_get_dirty_bitmap(IOMMUFDBackend *be, + + bool iommufd_backend_get_device_info(IOMMUFDBackend *be, uint32_t devid, + uint32_t *type, void *data, uint32_t len, +- uint64_t *caps, Error **errp) ++ uint64_t *caps, uint8_t *max_pasid_log2, ++ Error **errp) + { + struct iommu_hw_info info = { + .size = sizeof(info), +@@ -407,6 +408,9 @@ bool iommufd_backend_get_device_info(IOMMUFDBackend *be, uint32_t devid, + g_assert(caps); + *caps = info.out_capabilities; + ++ if (max_pasid_log2) { ++ *max_pasid_log2 = info.out_max_pasid_log2; ++ } + return true; + } + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index ea420afeb7..342944da23 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -121,7 +121,8 @@ smmuv3_accel_hw_compatible(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + uint64_t caps; + + if (!iommufd_backend_get_device_info(idev->iommufd, idev->devid, &data_type, +- &info, sizeof(info), &caps, errp)) { ++ &info, sizeof(info), &caps, NULL, ++ errp)) { + return false; + } + +diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c +index ca8a6b7029..59dc17b166 100644 +--- a/hw/vfio/iommufd.c ++++ b/hw/vfio/iommufd.c +@@ -308,6 +308,7 @@ static bool iommufd_cdev_autodomains_get(VFIODevice *vbasedev, + VFIOContainer *bcontainer = VFIO_IOMMU(container); + uint32_t type, flags = 0; + uint64_t hw_caps; ++ VendorCaps caps; + VFIOIOASHwpt *hwpt; + uint32_t hwpt_id; + int ret; +@@ -353,7 +354,8 @@ static bool iommufd_cdev_autodomains_get(VFIODevice *vbasedev, + * instead. + */ + if (!iommufd_backend_get_device_info(vbasedev->iommufd, vbasedev->devid, +- &type, NULL, 0, &hw_caps, errp)) { ++ &type, &caps, sizeof(caps), &hw_caps, ++ NULL, errp)) { + return false; + } + +@@ -889,19 +891,21 @@ static bool hiod_iommufd_vfio_realize(HostIOMMUDevice *hiod, void *opaque, + HostIOMMUDeviceCaps *caps = &hiod->caps; + VendorCaps *vendor_caps = &caps->vendor_caps; + enum iommu_hw_info_type type; ++ uint8_t max_pasid_log2; + uint64_t hw_caps; + + hiod->agent = opaque; + + if (!iommufd_backend_get_device_info(vdev->iommufd, vdev->devid, &type, + vendor_caps, sizeof(*vendor_caps), +- &hw_caps, errp)) { ++ &hw_caps, &max_pasid_log2, errp)) { + return false; + } + + hiod->name = g_strdup(vdev->name); + caps->type = type; + caps->hw_caps = hw_caps; ++ caps->max_pasid_log2 = max_pasid_log2; + + idev = HOST_IOMMU_DEVICE_IOMMUFD(hiod); + idev->iommufd = vdev->iommufd; +diff --git a/include/system/host_iommu_device.h b/include/system/host_iommu_device.h +index ab849a4a82..bfb2b60478 100644 +--- a/include/system/host_iommu_device.h ++++ b/include/system/host_iommu_device.h +@@ -30,6 +30,8 @@ typedef union VendorCaps { + * @hw_caps: host platform IOMMU capabilities (e.g. on IOMMUFD this represents + * the @out_capabilities value returned from IOMMU_GET_HW_INFO ioctl) + * ++ * @max_pasid_log2: width of PASIDs supported by host IOMMU device ++ * + * @vendor_caps: host platform IOMMU vendor specific capabilities (e.g. on + * IOMMUFD this represents a user-space buffer filled by kernel + * with host IOMMU @type specific hardware information data) +@@ -37,6 +39,7 @@ typedef union VendorCaps { + typedef struct HostIOMMUDeviceCaps { + uint32_t type; + uint64_t hw_caps; ++ uint8_t max_pasid_log2; + VendorCaps vendor_caps; + } HostIOMMUDeviceCaps; + #endif +diff --git a/include/system/iommufd.h b/include/system/iommufd.h +index 41e216c677..aa78bf1e1d 100644 +--- a/include/system/iommufd.h ++++ b/include/system/iommufd.h +@@ -71,7 +71,8 @@ int iommufd_backend_unmap_dma(IOMMUFDBackend *be, uint32_t ioas_id, + hwaddr iova, uint64_t size); + bool iommufd_backend_get_device_info(IOMMUFDBackend *be, uint32_t devid, + uint32_t *type, void *data, uint32_t len, +- uint64_t *caps, Error **errp); ++ uint64_t *caps, uint8_t *max_pasid_log2, ++ Error **errp); + bool iommufd_backend_alloc_hwpt(IOMMUFDBackend *be, uint32_t dev_id, + uint32_t pt_id, uint32_t flags, + uint32_t data_type, uint32_t data_len, diff --git a/0259-backends-iommufd-Add-get_pasid_info-callback.patch b/0259-backends-iommufd-Add-get_pasid_info-callback.patch new file mode 100644 index 0000000..257a302 --- /dev/null +++ b/0259-backends-iommufd-Add-get_pasid_info-callback.patch @@ -0,0 +1,105 @@ +From 7de2be6f68aa75656a623a84f1a8d5f483720acc Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:30 +0000 +Subject: [PATCH] backends/iommufd: Add get_pasid_info() callback +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 58e16360a8 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +The get_pasid_info callback retrieves PASID capability information +when the HostIOMMUDevice backend supports it. Currently, only the +Linux IOMMUFD backend provides this information. + +This will be used by a subsequent patch to synthesize a PASID +capability for vfio-pci devices behind a vIOMMU that supports PASID. + +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Reviewed-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit 4b8aa525ecdbff55d96c8cf42496c1444fd4ecea) +Signed-off-by: Eric Auger +--- + backends/iommufd.c | 17 +++++++++++++++++ + include/system/host_iommu_device.h | 17 +++++++++++++++++ + 2 files changed, 34 insertions(+) + +diff --git a/backends/iommufd.c b/backends/iommufd.c +index 6381f9664b..f1707eadc6 100644 +--- a/backends/iommufd.c ++++ b/backends/iommufd.c +@@ -538,11 +538,28 @@ static int hiod_iommufd_get_cap(HostIOMMUDevice *hiod, int cap, Error **errp) + } + } + ++static bool hiod_iommufd_get_pasid_info(HostIOMMUDevice *hiod, ++ PasidInfo *pasid_info) ++{ ++ HostIOMMUDeviceCaps *caps = &hiod->caps; ++ ++ if (!caps->max_pasid_log2) { ++ return false; ++ } ++ ++ g_assert(pasid_info); ++ pasid_info->exec_perm = (caps->hw_caps & IOMMU_HW_CAP_PCI_PASID_EXEC); ++ pasid_info->priv_mod = (caps->hw_caps & IOMMU_HW_CAP_PCI_PASID_PRIV); ++ pasid_info->max_pasid_log2 = caps->max_pasid_log2; ++ return true; ++} ++ + static void hiod_iommufd_class_init(ObjectClass *oc, const void *data) + { + HostIOMMUDeviceClass *hioc = HOST_IOMMU_DEVICE_CLASS(oc); + + hioc->get_cap = hiod_iommufd_get_cap; ++ hioc->get_pasid_info = hiod_iommufd_get_pasid_info; + }; + + static const TypeInfo types[] = { +diff --git a/include/system/host_iommu_device.h b/include/system/host_iommu_device.h +index bfb2b60478..f000301583 100644 +--- a/include/system/host_iommu_device.h ++++ b/include/system/host_iommu_device.h +@@ -59,6 +59,12 @@ struct HostIOMMUDevice { + #endif + }; + ++typedef struct PasidInfo { ++ bool exec_perm; ++ bool priv_mod; ++ uint8_t max_pasid_log2; ++} PasidInfo; ++ + /** + * struct HostIOMMUDeviceClass - The base class for all host IOMMU devices. + * +@@ -116,6 +122,17 @@ struct HostIOMMUDeviceClass { + * @hiod: handle to the host IOMMU device + */ + uint64_t (*get_page_size_mask)(HostIOMMUDevice *hiod); ++ /** ++ * @get_pasid_info: Return the PASID information associated with the ++ * @hiod Host IOMMU device. ++ * ++ * @hiod: handle to the host IOMMU device ++ * ++ * @pasid_info: If success, returns the PASID related information. ++ * ++ * Returns: true on success, false on failure. ++ */ ++ bool (*get_pasid_info)(HostIOMMUDevice *hiod, PasidInfo *pasid_info); + }; + + /* diff --git a/0260-hw-pci-Add-helper-to-insert-PCIe-extended-capability.patch b/0260-hw-pci-Add-helper-to-insert-PCIe-extended-capability.patch new file mode 100644 index 0000000..125f4c3 --- /dev/null +++ b/0260-hw-pci-Add-helper-to-insert-PCIe-extended-capability.patch @@ -0,0 +1,138 @@ +From 46049877050141c9daceddd5f47ab1f866df5da3 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:31 +0000 +Subject: [PATCH] hw/pci: Add helper to insert PCIe extended capability at a + fixed offset +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 577b63bdab (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Add pcie_insert_capability(), a helper to insert a PCIe extended +capability into an existing extended capability list at a caller +specified offset. + +Unlike pcie_add_capability(), which always appends a capability to the +end of the list, this helper preserves the existing list ordering while +allowing insertion at an arbitrary offset. + +The helper only validates that the insertion does not overwrite an +existing PCIe extended capability header, since corrupting a header +would break the extended capability linked list. Validation of overlaps +with other configuration space registers or capability-specific +register blocks is left to the caller. + +Reviewed-by: Michael S. Tsirkin +Reviewed-by: Eric Auger +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Reviewed-by: Jonathan Cameron +Signed-off-by: Shameer Kolothum +(cherry picked from commit 0f27e9478c3644ca3fe14d0306b75568f1872418) +Signed-off-by: Eric Auger +--- + hw/pci/pcie.c | 69 +++++++++++++++++++++++++++++++++++++++++++ + include/hw/pci/pcie.h | 2 ++ + 2 files changed, 71 insertions(+) + +diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c +index eaeb68894e..348b26e4f1 100644 +--- a/hw/pci/pcie.c ++++ b/hw/pci/pcie.c +@@ -1050,6 +1050,75 @@ static void pcie_ext_cap_set_next(PCIDevice *dev, uint16_t pos, uint16_t next) + pci_set_long(dev->config + pos, header); + } + ++/* ++ * Insert a PCIe extended capability at a given offset. ++ * ++ * This helper only validates that the insertion does not overwrite an ++ * existing PCIe extended capability header, as corrupting a header would ++ * break the extended capability linked list. ++ * ++ * The caller must ensure that (offset, size) does not overlap with other ++ * registers or capability-specific register blocks. Overlaps with ++ * capability-specific registers are not checked and are considered a ++ * user-controlled override. ++ * ++ * Note: Best effort helper. The PCIe spec does not require extended ++ * capabilities to be ordered, but most devices use a forward-linked list. ++ * Devices that do not consistently use a forward-linked list may cause ++ * insertion to fail. ++ */ ++bool pcie_insert_capability(PCIDevice *dev, uint16_t cap_id, uint8_t cap_ver, ++ uint16_t offset, uint16_t size) ++{ ++ uint16_t pos = PCI_CONFIG_SPACE_SIZE, prev = 0; ++ uint32_t header; ++ ++ assert(pci_is_express(dev)); ++ ++ if (!QEMU_IS_ALIGNED(offset, PCI_EXT_CAP_ALIGN) || ++ size < 8 || ++ offset < PCI_CONFIG_SPACE_SIZE || ++ offset >= PCIE_CONFIG_SPACE_SIZE || ++ offset + size > PCIE_CONFIG_SPACE_SIZE) { ++ return false; ++ } ++ ++ header = pci_get_long(dev->config + pos); ++ if (!header) { ++ /* No extended capability present, insertion must be at the ECAP head */ ++ if (offset != pos) { ++ return false; ++ } ++ pci_set_long(dev->config + pos, PCI_EXT_CAP(cap_id, cap_ver, 0)); ++ goto out; ++ } ++ ++ while (header && pos && offset >= pos) { ++ uint16_t next = PCI_EXT_CAP_NEXT(header); ++ ++ /* Reject insertion inside an existing ECAP header (4 bytes) */ ++ if (offset < pos + PCI_EXT_CAP_ALIGN) { ++ return false; ++ } ++ ++ prev = pos; ++ pos = next; ++ header = pos ? pci_get_long(dev->config + pos) : 0; ++ } ++ ++ pci_set_long(dev->config + offset, PCI_EXT_CAP(cap_id, cap_ver, pos)); ++ if (prev) { ++ pcie_ext_cap_set_next(dev, prev, offset); ++ } ++ ++out: ++ /* Make capability read-only by default */ ++ memset(dev->wmask + offset, 0, size); ++ memset(dev->w1cmask + offset, 0, size); ++ /* Check capability by default */ ++ memset(dev->cmask + offset, 0xFF, size); ++ return true; ++} + /* + * Caller must supply valid (offset, size) such that the range wouldn't + * overlap with other capability or other registers. +diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h +index ff6ce08e13..3d01718c96 100644 +--- a/include/hw/pci/pcie.h ++++ b/include/hw/pci/pcie.h +@@ -133,6 +133,8 @@ uint16_t pcie_find_capability(PCIDevice *dev, uint16_t cap_id); + void pcie_add_capability(PCIDevice *dev, + uint16_t cap_id, uint8_t cap_ver, + uint16_t offset, uint16_t size); ++bool pcie_insert_capability(PCIDevice *dev, uint16_t cap_id, uint8_t cap_ver, ++ uint16_t offset, uint16_t size); + void pcie_sync_bridge_lnk(PCIDevice *dev); + + void pcie_acs_init(PCIDevice *dev, uint16_t offset); diff --git a/0261-hw-pci-Factor-out-common-PASID-capability-initializa.patch b/0261-hw-pci-Factor-out-common-PASID-capability-initializa.patch new file mode 100644 index 0000000..7c26191 --- /dev/null +++ b/0261-hw-pci-Factor-out-common-PASID-capability-initializa.patch @@ -0,0 +1,94 @@ +From 61e981067a2d5bf122181e26e2b2e1140b2a7861 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:32 +0000 +Subject: [PATCH] hw/pci: Factor out common PASID capability initialization +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] ae53b4000d (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Refactor PCIe PASID capability initialization by moving the common +register init into a new helper, pcie_pasid_common_init(). + +Subsequent patch to synthesize a vPASID will make use of this +helper. + +No functional change intended. + +Cc: Michael S. Tsirkin +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Reviewed-by: Michael S. Tsirkin +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Signed-off-by: Shameer Kolothum +(cherry picked from commit 95719854875e5fd32ab51c411e76a9447fad53eb) +Signed-off-by: Eric Auger +--- + hw/pci/pcie.c | 19 ++++++++++++------- + include/hw/pci/pcie.h | 2 ++ + 2 files changed, 14 insertions(+), 7 deletions(-) + +diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c +index 348b26e4f1..40242fead2 100644 +--- a/hw/pci/pcie.c ++++ b/hw/pci/pcie.c +@@ -1284,18 +1284,13 @@ void pcie_acs_reset(PCIDevice *dev) + } + } + +-/* PASID */ +-void pcie_pasid_init(PCIDevice *dev, uint16_t offset, uint8_t pasid_width, +- bool exec_perm, bool priv_mod) ++void pcie_pasid_common_init(PCIDevice *dev, uint16_t offset, ++ uint8_t pasid_width, bool exec_perm, bool priv_mod) + { + static const uint16_t control_reg_rw_mask = 0x07; + uint16_t capability_reg; + + assert(pasid_width <= PCI_EXT_CAP_PASID_MAX_WIDTH); +- +- pcie_add_capability(dev, PCI_EXT_CAP_ID_PASID, PCI_PASID_VER, offset, +- PCI_EXT_CAP_PASID_SIZEOF); +- + capability_reg = ((uint16_t)pasid_width) << PCI_PASID_CAP_WIDTH_SHIFT; + capability_reg |= exec_perm ? PCI_PASID_CAP_EXEC : 0; + capability_reg |= priv_mod ? PCI_PASID_CAP_PRIV : 0; +@@ -1307,6 +1302,16 @@ void pcie_pasid_init(PCIDevice *dev, uint16_t offset, uint8_t pasid_width, + pci_set_word(dev->wmask + offset + PCI_PASID_CTRL, control_reg_rw_mask); + + dev->exp.pasid_cap = offset; ++ ++} ++ ++/* PASID */ ++void pcie_pasid_init(PCIDevice *dev, uint16_t offset, uint8_t pasid_width, ++ bool exec_perm, bool priv_mod) ++{ ++ pcie_add_capability(dev, PCI_EXT_CAP_ID_PASID, PCI_PASID_VER, offset, ++ PCI_EXT_CAP_PASID_SIZEOF); ++ pcie_pasid_common_init(dev, offset, pasid_width, exec_perm, priv_mod); + } + + /* PRI */ +diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h +index 3d01718c96..029a809ae2 100644 +--- a/include/hw/pci/pcie.h ++++ b/include/hw/pci/pcie.h +@@ -155,6 +155,8 @@ void pcie_cap_slot_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, + void pcie_cap_slot_unplug_request_cb(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp); + ++void pcie_pasid_common_init(PCIDevice *dev, uint16_t offset, ++ uint8_t pasid_width, bool exec_perm, bool priv_mod); + void pcie_pasid_init(PCIDevice *dev, uint16_t offset, uint8_t pasid_width, + bool exec_perm, bool priv_mod); + void pcie_pri_init(PCIDevice *dev, uint16_t offset, uint32_t outstanding_pr_cap, diff --git a/0262-hw-vfio-pci-Synthesize-PASID-capability-for-vfio-pci.patch b/0262-hw-vfio-pci-Synthesize-PASID-capability-for-vfio-pci.patch new file mode 100644 index 0000000..59157e0 --- /dev/null +++ b/0262-hw-vfio-pci-Synthesize-PASID-capability-for-vfio-pci.patch @@ -0,0 +1,207 @@ +From b6a537b7856055d9c2630e6f40540924101ce0cd Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:33 +0000 +Subject: [PATCH] hw/vfio/pci: Synthesize PASID capability for vfio-pci devices +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 51ca4e4f84 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +Conflicts: hw/vfio/pci.c keep using hw/hw.h instead of hw/core/hw-error.h +because we don't have 048a23851cd4 ("include: move hw/hw.h to hw/core/, +rename") + +Add support for synthesizing a PCIe PASID extended capability for +vfio-pci devices when PASID is enabled via a vIOMMU and supported by +the host IOMMU backend. + +PASID capability parameters are retrieved via IOMMUFD APIs and the +capability is inserted into the PCIe extended capability list using +the insertion helper. A new x-vpasid-cap-offset property allows +explicit control over the placement; by default the capability is +placed at the end of the PCIe extended configuration space. + +If the kernel does not expose PASID information or insertion fails, +the device continues without PASID support. + +Reviewed-by: Jonathan Cameron +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Reviewed-by: Cédric Le Goater +Signed-off-by: Shameer Kolothum +(cherry picked from commit f9060222e570b09750fde21544bf67107806f8fd) +Signed-off-by: Eric Auger +--- + hw/vfio/pci.c | 75 +++++++++++++++++++++++++++++++++++++++++ + hw/vfio/pci.h | 1 + + hw/vfio/trace-events | 1 + + include/hw/core/iommu.h | 1 + + 4 files changed, 78 insertions(+) + +diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c +index 378b475b2c..6eb7d1a513 100644 +--- a/hw/vfio/pci.c ++++ b/hw/vfio/pci.c +@@ -24,6 +24,7 @@ + #include + + #include "hw/hw.h" ++#include "hw/core/iommu.h" + #include "hw/pci/msi.h" + #include "hw/pci/msix.h" + #include "hw/pci/pci_bridge.h" +@@ -2501,9 +2502,62 @@ static int vfio_setup_rebar_ecap(VFIOPCIDevice *vdev, uint16_t pos) + return 0; + } + ++/* ++ * Try to retrieve PASID capability information via IOMMUFD APIs and, ++ * if supported, synthesize a PASID PCIe extended capability for the ++ * VFIO device. ++ * ++ * Use user-specified PASID capability offset if provided, otherwise ++ * place it at the end of the PCIe extended configuration space. ++ */ ++static bool vfio_pci_synthesize_pasid_cap(VFIOPCIDevice *vdev, Error **errp) ++{ ++ HostIOMMUDevice *hiod = vdev->vbasedev.hiod; ++ HostIOMMUDeviceClass *hiodc; ++ PasidInfo pasid_info; ++ PCIDevice *pdev = PCI_DEVICE(vdev); ++ uint16_t pasid_offset; ++ ++ if (!hiod) { ++ return true; ++ } ++ ++ hiodc = HOST_IOMMU_DEVICE_GET_CLASS(hiod); ++ if (!hiodc || !hiodc->get_pasid_info || ++ !hiodc->get_pasid_info(hiod, &pasid_info) || ++ !(pci_device_get_viommu_flags(pdev) & VIOMMU_FLAG_PASID_SUPPORTED)) { ++ return true; ++ } ++ ++ /* Use user-specified offset if set, otherwise place PASID at the end. */ ++ if (vdev->vpasid_cap_offset) { ++ pasid_offset = vdev->vpasid_cap_offset; ++ } else { ++ pasid_offset = PCIE_CONFIG_SPACE_SIZE - PCI_EXT_CAP_PASID_SIZEOF; ++ } ++ ++ if (!pcie_insert_capability(pdev, PCI_EXT_CAP_ID_PASID, PCI_PASID_VER, ++ pasid_offset, PCI_EXT_CAP_PASID_SIZEOF)) { ++ error_setg(errp, "vfio: Placing PASID capability at offset 0x%x failed", ++ pasid_offset); ++ return false; ++ } ++ trace_vfio_pci_synthesize_pasid_cap(vdev->vbasedev.name, pasid_offset); ++ ++ pcie_pasid_common_init(pdev, pasid_offset, pasid_info.max_pasid_log2, ++ pasid_info.exec_perm, pasid_info.priv_mod); ++ ++ /* PASID capability is fully emulated by QEMU */ ++ memset(vdev->emulated_config_bits + pdev->exp.pasid_cap, 0xff, ++ PCI_EXT_CAP_PASID_SIZEOF); ++ return true; ++} ++ + static void vfio_add_ext_cap(VFIOPCIDevice *vdev) + { + PCIDevice *pdev = PCI_DEVICE(vdev); ++ bool pasid_cap_added = false; ++ Error *err = NULL; + uint32_t header; + uint16_t cap_id, next, size; + uint8_t cap_ver; +@@ -2581,12 +2635,24 @@ static void vfio_add_ext_cap(VFIOPCIDevice *vdev) + pcie_add_capability(pdev, cap_id, cap_ver, next, size); + } + break; ++ /* ++ * VFIO kernel does not expose the PASID CAP today. We may synthesize ++ * one later through IOMMUFD APIs. If VFIO ever starts exposing it, ++ * record its presence here so we do not create a duplicate CAP. ++ */ ++ case PCI_EXT_CAP_ID_PASID: ++ pasid_cap_added = true; ++ /* fallthrough */ + default: + pcie_add_capability(pdev, cap_id, cap_ver, next, size); + } + + } + ++ if (!pasid_cap_added && !vfio_pci_synthesize_pasid_cap(vdev, &err)) { ++ error_report_err(err); ++ } ++ + /* Cleanup chain head ID if necessary */ + if (pci_get_word(pdev->config + PCI_CONFIG_SPACE_SIZE) == 0xFFFF) { + pci_set_word(pdev->config + PCI_CONFIG_SPACE_SIZE, 0); +@@ -3778,6 +3844,8 @@ static const Property vfio_pci_properties[] = { + TYPE_IOMMUFD_BACKEND, IOMMUFDBackend *), + #endif + DEFINE_PROP_BOOL("skip-vsc-check", VFIOPCIDevice, skip_vsc_check, true), ++ DEFINE_PROP_UINT16("x-vpasid-cap-offset", VFIOPCIDevice, ++ vpasid_cap_offset, 0), + }; + + #ifdef CONFIG_IOMMUFD +@@ -3935,6 +4003,13 @@ static void vfio_pci_class_init(ObjectClass *klass, const void *data) + "destination when doing live " + "migration of device state via " + "multifd channels"); ++ object_class_property_set_description(klass, /* 11.0 */ ++ "x-vpasid-cap-offset", ++ "PCIe extended configuration space offset at which to place a " ++ "synthetic PASID extended capability when PASID is enabled via " ++ "a vIOMMU. A value of 0 (default) places the capability at the " ++ "end of the extended configuration space. The offset must be " ++ "4-byte aligned and within the PCIe extended configuration space"); + } + + static const TypeInfo vfio_pci_info = { +diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h +index 975836945a..c1c59e4092 100644 +--- a/hw/vfio/pci.h ++++ b/hw/vfio/pci.h +@@ -188,6 +188,7 @@ struct VFIOPCIDevice { + bool defer_kvm_irq_routing; + bool clear_parent_atomics_on_exit; + bool skip_vsc_check; ++ uint16_t vpasid_cap_offset; + VFIODisplay *dpy; + Notifier irqchip_change_notifier; + VFIOPCICPR cpr; +diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events +index 592a0349d4..82abfc99ae 100644 +--- a/hw/vfio/trace-events ++++ b/hw/vfio/trace-events +@@ -40,6 +40,7 @@ vfio_pci_hot_reset_result(const char *name, const char *result) "%s hot reset: % + vfio_pci_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device '%s' config: size: 0x%lx, offset: 0x%lx, flags: 0x%lx" + vfio_pci_populate_device_get_irq_info_failure(const char *errstr) "VFIO_DEVICE_GET_IRQ_INFO failure: %s" + vfio_mdev(const char *name, bool is_mdev) " (%s) is_mdev %d" ++vfio_pci_synthesize_pasid_cap(const char *name, uint16_t offset) "%s offset: 0x%x" + vfio_add_ext_cap_dropped(const char *name, uint16_t cap, uint16_t offset) "%s 0x%x@0x%x" + vfio_pci_reset(const char *name) " (%s)" + vfio_pci_reset_flr(const char *name) "%s FLR/VFIO_DEVICE_RESET" +diff --git a/include/hw/core/iommu.h b/include/hw/core/iommu.h +index d5401a397b..86af315c15 100644 +--- a/include/hw/core/iommu.h ++++ b/include/hw/core/iommu.h +@@ -20,6 +20,7 @@ + enum viommu_flags { + /* vIOMMU needs nesting parent HWPT to create nested HWPT */ + VIOMMU_FLAG_WANT_NESTING_PARENT = BIT_ULL(0), ++ VIOMMU_FLAG_PASID_SUPPORTED = BIT_ULL(1), + }; + + /* Host IOMMU quirks. Extracted from host IOMMU capabilities */ diff --git a/0263-hw-arm-smmuv3-accel-Make-SubstreamID-support-configu.patch b/0263-hw-arm-smmuv3-accel-Make-SubstreamID-support-configu.patch new file mode 100644 index 0000000..50c7911 --- /dev/null +++ b/0263-hw-arm-smmuv3-accel-Make-SubstreamID-support-configu.patch @@ -0,0 +1,180 @@ +From e66bfb03dd544121a45e1834579b88fdf66dd045 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 26 Jan 2026 10:43:34 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Make SubstreamID support configurable +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 95c0563fcb (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-16 +UPSTREAM: target-arm.next, v9 + +QEMU SMMUv3 currently reports no SubstreamID support, forcing SSID to +zero. This prevents accelerated use cases such as Shared Virtual +Addressing (SVA), which require multiple Stage-1 context descriptors +indexed by SubstreamID. + +Add a new "ssidsize" property to explicitly configure the number of bits +used for SubstreamIDs. A value greater than zero enables SubstreamID +support and advertises PASID capability to the vIOMMU. + +The requested SSIDSIZE is validated against host SMMUv3 capabilities and +is only supported when accel=on. + +Reviewed-by: Jonathan Cameron +Reviewed-by: Eric Auger +Reviewed-by: Nicolin Chen +Tested-by: Eric Auger +Tested-by: Zhangfei Gao +Signed-off-by: Shameer Kolothum +(cherry picked from commit c2484ea0dd10a21b81f14869a7d4ab9d84bfdb03) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 25 ++++++++++++++++++++++++- + hw/arm/smmuv3.c | 22 ++++++++++++++++++++-- + include/hw/arm/smmuv3-common.h | 1 + + include/hw/arm/smmuv3.h | 1 + + 4 files changed, 46 insertions(+), 3 deletions(-) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index 342944da23..f5cd4df336 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -76,6 +76,16 @@ smmuv3_accel_check_hw_compatible(SMMUv3State *s, + return false; + } + ++ /* Check SSIDSIZE value opted-in is compatible with Host SMMUv3 SSIDSIZE */ ++ if (FIELD_EX32(info->idr[1], IDR1, SSIDSIZE) < ++ FIELD_EX32(s->idr[1], IDR1, SSIDSIZE)) { ++ error_setg(errp, "Host SMMUv3 SSIDSIZE not compatible " ++ "(host=%u, QEMU=%u)", ++ FIELD_EX32(info->idr[1], IDR1, SSIDSIZE), ++ FIELD_EX32(s->idr[1], IDR1, SSIDSIZE)); ++ return false; ++ } ++ + /* User can disable QEMU SMMUv3 Range Invalidation support */ + if (FIELD_EX32(info->idr[3], IDR3, RIL) < + FIELD_EX32(s->idr[3], IDR3, RIL)) { +@@ -652,7 +662,14 @@ static uint64_t smmuv3_accel_get_viommu_flags(void *opaque) + * The real HW nested support should be reported from host SMMUv3 and if + * it doesn't, the nesting parent allocation will fail anyway in VFIO core. + */ +- return VIOMMU_FLAG_WANT_NESTING_PARENT; ++ uint64_t flags = VIOMMU_FLAG_WANT_NESTING_PARENT; ++ SMMUState *bs = opaque; ++ SMMUv3State *s = ARM_SMMUV3(bs); ++ ++ if (s->ssidsize) { ++ flags |= VIOMMU_FLAG_PASID_SUPPORTED; ++ } ++ return flags; + } + + static const PCIIOMMUOps smmuv3_accel_ops = { +@@ -680,6 +697,12 @@ void smmuv3_accel_idr_override(SMMUv3State *s) + if (s->oas == SMMU_OAS_48BIT) { + s->idr[5] = FIELD_DP32(s->idr[5], IDR5, OAS, SMMU_IDR5_OAS_48); + } ++ ++ /* ++ * By default QEMU SMMUv3 has no SubstreamID support. Update IDR1 if user ++ * has enabled it. ++ */ ++ s->idr[1] = FIELD_DP32(s->idr[1], IDR1, SSIDSIZE, s->ssidsize); + } + + /* Based on SMUUv3 GPBA.ABORT configuration, attach a corresponding HWPT */ +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index ef75a9bec0..49311f5bbf 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -611,9 +611,11 @@ static int decode_ste(SMMUv3State *s, SMMUTransCfg *cfg, + } + } + +- if (STE_S1CDMAX(ste) != 0) { ++ /* Multiple context descriptors require SubstreamID support */ ++ if (!s->ssidsize && STE_S1CDMAX(ste) != 0) { + qemu_log_mask(LOG_UNIMP, +- "SMMUv3 does not support multiple context descriptors yet\n"); ++ "SMMUv3: multiple S1 context descriptors require SubstreamID support. " ++ "Configure ssidsize > 0 (requires accel=on)\n"); + goto bad_ste; + } + +@@ -1954,6 +1956,10 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp) + error_setg(errp, "OAS must be 44 bits when accel=off"); + return false; + } ++ if (s->ssidsize) { ++ error_setg(errp, "ssidsize can only be set if accel=on"); ++ return false; ++ } + return true; + } + +@@ -1968,6 +1974,11 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp) + error_setg(errp, "OAS can only be set to 44 or 48 bits"); + return false; + } ++ if (s->ssidsize > SMMU_SSID_MAX_BITS) { ++ error_setg(errp, "ssidsize must be in the range 0 to %d", ++ SMMU_SSID_MAX_BITS); ++ return false; ++ } + + return true; + } +@@ -2096,6 +2107,7 @@ static const Property smmuv3_properties[] = { + DEFINE_PROP_BOOL("ril", SMMUv3State, ril, true), + DEFINE_PROP_BOOL("ats", SMMUv3State, ats, false), + DEFINE_PROP_UINT8("oas", SMMUv3State, oas, 44), ++ DEFINE_PROP_UINT8("ssidsize", SMMUv3State, ssidsize, 0), + }; + + static void smmuv3_instance_init(Object *obj) +@@ -2129,6 +2141,12 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data) + object_class_property_set_description(klass, "oas", + "Specify Output Address Size (for accel=on). Supported values " + "are 44 or 48 bits. Defaults to 44 bits"); ++ object_class_property_set_description(klass, "ssidsize", ++ "Number of bits used to represent SubstreamIDs (SSIDs). " ++ "A value of N allows SSIDs in the range [0 .. 2^N - 1]. " ++ "Valid range is 0-20, where 0 disables SubstreamID support. " ++ "Defaults to 0. A value greater than 0 is required to enable " ++ "PASID support."); + } + + static int smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu, +diff --git a/include/hw/arm/smmuv3-common.h b/include/hw/arm/smmuv3-common.h +index bc2d49ef4e..4b764ed125 100644 +--- a/include/hw/arm/smmuv3-common.h ++++ b/include/hw/arm/smmuv3-common.h +@@ -311,6 +311,7 @@ REG32(IDR1, 0x4) + FIELD(IDR1, TABLES_PRESET, 30, 1) + FIELD(IDR1, ECMDQ, 31, 1) + ++#define SMMU_SSID_MAX_BITS 20 + #define SMMU_IDR1_SIDSIZE 16 + #define SMMU_CMDQS 19 + #define SMMU_EVENTQS 19 +diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h +index d488a39cd0..26b2fc42fd 100644 +--- a/include/hw/arm/smmuv3.h ++++ b/include/hw/arm/smmuv3.h +@@ -72,6 +72,7 @@ struct SMMUv3State { + bool ril; + bool ats; + uint8_t oas; ++ uint8_t ssidsize; + }; + + typedef enum { diff --git a/0264-backends-iommufd-Introduce-iommufd_backend_alloc_vev.patch b/0264-backends-iommufd-Introduce-iommufd_backend_alloc_vev.patch new file mode 100644 index 0000000..38c2afd --- /dev/null +++ b/0264-backends-iommufd-Introduce-iommufd_backend_alloc_vev.patch @@ -0,0 +1,113 @@ +From a44dada2e1ca16de58133cc0afc9f2c7b723772c Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Thu, 4 Dec 2025 09:22:38 +0000 +Subject: [PATCH] backends/iommufd: Introduce iommufd_backend_alloc_veventq +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 6a3791f647 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-17 +UPSTREAM: no, v4 + +Add a new helper for IOMMU_VEVENTQ_ALLOC ioctl to allocate a virtual event +queue (vEVENTQ) for a vIOMMU object. + +Signed-off-by: Nicolin Chen +Tested-by: Nicolin Chen +Reviewed-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit 6c6a1b1d1f38ef83b4087c66e73754fda4d46d2c) +Signed-off-by: Eric Auger +--- + backends/iommufd.c | 31 +++++++++++++++++++++++++++++++ + backends/trace-events | 1 + + include/system/iommufd.h | 12 ++++++++++++ + 3 files changed, 44 insertions(+) + +diff --git a/backends/iommufd.c b/backends/iommufd.c +index f1707eadc6..5b919e4be9 100644 +--- a/backends/iommufd.c ++++ b/backends/iommufd.c +@@ -503,6 +503,37 @@ bool iommufd_backend_alloc_vdev(IOMMUFDBackend *be, uint32_t dev_id, + return true; + } + ++bool iommufd_backend_alloc_veventq(IOMMUFDBackend *be, uint32_t viommu_id, ++ uint32_t type, uint32_t depth, ++ uint32_t *out_veventq_id, ++ uint32_t *out_veventq_fd, Error **errp) ++{ ++ int ret; ++ struct iommu_veventq_alloc alloc_veventq = { ++ .size = sizeof(alloc_veventq), ++ .flags = 0, ++ .type = type, ++ .veventq_depth = depth, ++ .viommu_id = viommu_id, ++ }; ++ ++ ret = ioctl(be->fd, IOMMU_VEVENTQ_ALLOC, &alloc_veventq); ++ ++ trace_iommufd_viommu_alloc_eventq(be->fd, viommu_id, type, ++ alloc_veventq.out_veventq_id, ++ alloc_veventq.out_veventq_fd, ret); ++ if (ret) { ++ error_setg_errno(errp, errno, "IOMMU_VEVENTQ_ALLOC failed"); ++ return false; ++ } ++ ++ g_assert(out_veventq_id); ++ g_assert(out_veventq_fd); ++ *out_veventq_id = alloc_veventq.out_veventq_id; ++ *out_veventq_fd = alloc_veventq.out_veventq_fd; ++ return true; ++} ++ + bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *idev, + uint32_t hwpt_id, Error **errp) + { +diff --git a/backends/trace-events b/backends/trace-events +index 8408dc8701..5afa7a40be 100644 +--- a/backends/trace-events ++++ b/backends/trace-events +@@ -23,3 +23,4 @@ iommufd_backend_get_dirty_bitmap(int iommufd, uint32_t hwpt_id, uint64_t iova, u + iommufd_backend_invalidate_cache(int iommufd, uint32_t id, uint32_t data_type, uint32_t entry_len, uint32_t entry_num, uint32_t done_num, uint64_t data_ptr, int ret) " iommufd=%d id=%u data_type=%u entry_len=%u entry_num=%u done_num=%u data_ptr=0x%"PRIx64" (%d)" + iommufd_backend_alloc_viommu(int iommufd, uint32_t dev_id, uint32_t type, uint32_t hwpt_id, uint32_t viommu_id, int ret) " iommufd=%d type=%u dev_id=%u hwpt_id=%u viommu_id=%u (%d)" + iommufd_backend_alloc_vdev(int iommufd, uint32_t dev_id, uint32_t viommu_id, uint64_t virt_id, uint32_t vdev_id, int ret) " iommufd=%d dev_id=%u viommu_id=%u virt_id=0x%"PRIx64" vdev_id=%u (%d)" ++iommufd_viommu_alloc_eventq(int iommufd, uint32_t viommu_id, uint32_t type, uint32_t veventq_id, uint32_t veventq_fd, int ret) " iommufd=%d viommu_id=%u type=%u veventq_id=%u veventq_fd=%u (%d)" +diff --git a/include/system/iommufd.h b/include/system/iommufd.h +index aa78bf1e1d..9770ff1484 100644 +--- a/include/system/iommufd.h ++++ b/include/system/iommufd.h +@@ -56,6 +56,13 @@ typedef struct IOMMUFDVdev { + uint32_t virt_id; /* virtual device ID */ + } IOMMUFDVdev; + ++/* Virtual event queue interface for a vIOMMU */ ++typedef struct IOMMUFDVeventq { ++ IOMMUFDViommu *viommu; ++ uint32_t veventq_id; ++ uint32_t veventq_fd; ++} IOMMUFDVeventq; ++ + bool iommufd_backend_connect(IOMMUFDBackend *be, Error **errp); + void iommufd_backend_disconnect(IOMMUFDBackend *be); + +@@ -86,6 +93,11 @@ bool iommufd_backend_alloc_vdev(IOMMUFDBackend *be, uint32_t dev_id, + uint32_t viommu_id, uint64_t virt_id, + uint32_t *out_vdev_id, Error **errp); + ++bool iommufd_backend_alloc_veventq(IOMMUFDBackend *be, uint32_t viommu_id, ++ uint32_t type, uint32_t depth, ++ uint32_t *out_veventq_id, ++ uint32_t *out_veventq_fd, Error **errp); ++ + bool iommufd_backend_set_dirty_tracking(IOMMUFDBackend *be, uint32_t hwpt_id, + bool start, Error **errp); + bool iommufd_backend_get_dirty_bitmap(IOMMUFDBackend *be, uint32_t hwpt_id, diff --git a/0265-hw-arm-smmuv3-accel-Add-viommu-free-helper.patch b/0265-hw-arm-smmuv3-accel-Add-viommu-free-helper.patch new file mode 100644 index 0000000..520ef95 --- /dev/null +++ b/0265-hw-arm-smmuv3-accel-Add-viommu-free-helper.patch @@ -0,0 +1,66 @@ +From cf8628dbf093c7b80d86c4302d17dbef6d6b3b3b Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Wed, 4 Feb 2026 14:59:25 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Add viommu free helper +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] f39909afda (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-17 +UPSTREAM: no, v4 + +Move viommu teardown into a helper function and use it from the +last device removal path. No functional change. + +Signed-off-by: Shameer Kolothum +(cherry picked from commit d4fd0eecce0b25d44afb884cda5e91766e05e063) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 21 +++++++++++++++------ + 1 file changed, 15 insertions(+), 6 deletions(-) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index f5cd4df336..c19c526fca 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -390,6 +390,20 @@ bool smmuv3_accel_issue_inv_cmd(SMMUv3State *bs, void *cmd, SMMUDevice *sdev, + sizeof(Cmd), &entry_num, cmd, errp); + } + ++static void smmuv3_accel_free_viommu(SMMUv3AccelState *accel) ++{ ++ IOMMUFDViommu *viommu = accel->viommu; ++ ++ if (!viommu) { ++ return; ++ } ++ iommufd_backend_free_id(viommu->iommufd, accel->bypass_hwpt_id); ++ iommufd_backend_free_id(viommu->iommufd, accel->abort_hwpt_id); ++ iommufd_backend_free_id(viommu->iommufd, accel->viommu->viommu_id); ++ g_free(viommu); ++ accel->viommu = NULL; ++} ++ + static bool + smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + Error **errp) +@@ -549,12 +563,7 @@ static void smmuv3_accel_unset_iommu_device(PCIBus *bus, void *opaque, + trace_smmuv3_accel_unset_iommu_device(devfn, idev->devid); + + if (QLIST_EMPTY(&accel->device_list)) { +- iommufd_backend_free_id(accel->viommu->iommufd, accel->bypass_hwpt_id); +- iommufd_backend_free_id(accel->viommu->iommufd, accel->abort_hwpt_id); +- iommufd_backend_free_id(accel->viommu->iommufd, +- accel->viommu->viommu_id); +- g_free(accel->viommu); +- accel->viommu = NULL; ++ smmuv3_accel_free_viommu(accel); + } + } + diff --git a/0266-hw-arm-smmuv3-accel-Allocate-vEVENTQ-for-accelerated.patch b/0266-hw-arm-smmuv3-accel-Allocate-vEVENTQ-for-accelerated.patch new file mode 100644 index 0000000..2a4a86b --- /dev/null +++ b/0266-hw-arm-smmuv3-accel-Allocate-vEVENTQ-for-accelerated.patch @@ -0,0 +1,203 @@ +From de8887aadbe19ed9d489729184fab18cdfdd7ec5 Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Thu, 4 Dec 2025 09:22:39 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Allocate vEVENTQ for accelerated SMMUv3 + devices +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 02d9b37575 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-17 +UPSTREAM: no, v4 + +When the guest enables the Event Queue and a vIOMMU is present, allocate a +vEVENTQ object so that host-side events related to the vIOMMU can be +received and propagated back to the guest. + +For cold-plugged devices using SMMUv3 acceleration, the vIOMMU is created +before the guest boots. In this case, the vEVENTQ is allocated when the +guest writes to SMMU_CR0 and sets EVENTQEN = 1. + +If no cold-plugged device exists at boot (i.e. no vIOMMU initially), the +vEVENTQ is allocated when a vIOMMU is created, i.e. during the first +device hot-plug. + +Event read and propagation will be added in a later patch. + +Signed-off-by: Nicolin Chen +Tested-by: Nicolin Chen +Reviewed-by: Eric Auger +Signed-off-by: Shameer Kolothum +(cherry picked from commit b86f943f8d37560757dcf2a79c47fe04918975f4) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 61 +++++++++++++++++++++++++++++++++++++++++-- + hw/arm/smmuv3-accel.h | 6 +++++ + hw/arm/smmuv3.c | 4 +++ + 3 files changed, 69 insertions(+), 2 deletions(-) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index c19c526fca..2ca0d1deac 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -390,6 +390,19 @@ bool smmuv3_accel_issue_inv_cmd(SMMUv3State *bs, void *cmd, SMMUDevice *sdev, + sizeof(Cmd), &entry_num, cmd, errp); + } + ++static void smmuv3_accel_free_veventq(SMMUv3AccelState *accel) ++{ ++ IOMMUFDVeventq *veventq = accel->veventq; ++ ++ if (!veventq) { ++ return; ++ } ++ close(veventq->veventq_fd); ++ iommufd_backend_free_id(accel->viommu->iommufd, veventq->veventq_id); ++ g_free(veventq); ++ accel->veventq = NULL; ++} ++ + static void smmuv3_accel_free_viommu(SMMUv3AccelState *accel) + { + IOMMUFDViommu *viommu = accel->viommu; +@@ -397,6 +410,7 @@ static void smmuv3_accel_free_viommu(SMMUv3AccelState *accel) + if (!viommu) { + return; + } ++ smmuv3_accel_free_veventq(accel); + iommufd_backend_free_id(viommu->iommufd, accel->bypass_hwpt_id); + iommufd_backend_free_id(viommu->iommufd, accel->abort_hwpt_id); + iommufd_backend_free_id(viommu->iommufd, accel->viommu->viommu_id); +@@ -404,6 +418,41 @@ static void smmuv3_accel_free_viommu(SMMUv3AccelState *accel) + accel->viommu = NULL; + } + ++bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp) ++{ ++ SMMUv3AccelState *accel = s->s_accel; ++ IOMMUFDVeventq *veventq; ++ uint32_t veventq_id; ++ uint32_t veventq_fd; ++ ++ if (!accel->viommu) { ++ return true; ++ } ++ ++ if (accel->veventq) { ++ return true; ++ } ++ ++ if (!smmuv3_eventq_enabled(s)) { ++ return true; ++ } ++ ++ if (!iommufd_backend_alloc_veventq(accel->viommu->iommufd, ++ accel->viommu->viommu_id, ++ IOMMU_VEVENTQ_TYPE_ARM_SMMUV3, ++ 1 << s->eventq.log2size, &veventq_id, ++ &veventq_fd, errp)) { ++ return false; ++ } ++ ++ veventq = g_new(IOMMUFDVeventq, 1); ++ veventq->veventq_id = veventq_id; ++ veventq->veventq_fd = veventq_fd; ++ veventq->viommu = accel->viommu; ++ accel->veventq = veventq; ++ return true; ++} ++ + static bool + smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + Error **errp) +@@ -429,6 +478,7 @@ smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + viommu->viommu_id = viommu_id; + viommu->s2_hwpt_id = s2_hwpt_id; + viommu->iommufd = idev->iommufd; ++ accel->viommu = viommu; + + /* + * Pre-allocate HWPTs for S1 bypass and abort cases. These will be attached +@@ -448,14 +498,20 @@ smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + goto free_abort_hwpt; + } + ++ /* Allocate a vEVENTQ if guest has enabled event queue */ ++ if (!smmuv3_accel_alloc_veventq(s, errp)) { ++ goto free_bypass_hwpt; ++ } ++ + /* Attach a HWPT based on SMMUv3 GBPA.ABORT value */ + hwpt_id = smmuv3_accel_gbpa_hwpt(s, accel); + if (!host_iommu_device_iommufd_attach_hwpt(idev, hwpt_id, errp)) { +- goto free_bypass_hwpt; ++ goto free_veventq; + } +- accel->viommu = viommu; + return true; + ++free_veventq: ++ smmuv3_accel_free_veventq(accel); + free_bypass_hwpt: + iommufd_backend_free_id(idev->iommufd, accel->bypass_hwpt_id); + free_abort_hwpt: +@@ -463,6 +519,7 @@ free_abort_hwpt: + free_viommu: + iommufd_backend_free_id(idev->iommufd, viommu->viommu_id); + g_free(viommu); ++ accel->viommu = NULL; + return false; + } + +diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h +index a8a64802ec..dba6c71de5 100644 +--- a/hw/arm/smmuv3-accel.h ++++ b/hw/arm/smmuv3-accel.h +@@ -22,6 +22,7 @@ + */ + typedef struct SMMUv3AccelState { + IOMMUFDViommu *viommu; ++ IOMMUFDVeventq *veventq; + uint32_t bypass_hwpt_id; + uint32_t abort_hwpt_id; + QLIST_HEAD(, SMMUv3AccelDevice) device_list; +@@ -50,6 +51,7 @@ bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp); + bool smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev, + Error **errp); + void smmuv3_accel_idr_override(SMMUv3State *s); ++bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp); + void smmuv3_accel_reset(SMMUv3State *s); + #else + static inline void smmuv3_accel_init(SMMUv3State *s) +@@ -80,6 +82,10 @@ smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev, + static inline void smmuv3_accel_idr_override(SMMUv3State *s) + { + } ++static inline bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp) ++{ ++ return true; ++} + static inline void smmuv3_accel_reset(SMMUv3State *s) + { + } +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index 49311f5bbf..3bcf74597d 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -1605,6 +1605,10 @@ static MemTxResult smmu_writel(SMMUv3State *s, hwaddr offset, + s->cr0ack = data & ~SMMU_CR0_RESERVED; + /* in case the command queue has been enabled */ + smmuv3_cmdq_consume(s, &local_err); ++ /* Allocate vEVENTQ if EventQ is enabled and a vIOMMU is available */ ++ if (local_err == NULL) { ++ smmuv3_accel_alloc_veventq(s, &local_err); ++ } + break; + case A_CR1: + s->cr[1] = data; diff --git a/0267-hw-arm-smmuv3-Introduce-a-helper-function-for-event-.patch b/0267-hw-arm-smmuv3-Introduce-a-helper-function-for-event-.patch new file mode 100644 index 0000000..7b17c34 --- /dev/null +++ b/0267-hw-arm-smmuv3-Introduce-a-helper-function-for-event-.patch @@ -0,0 +1,110 @@ +From 4c4f753763e39e0798b7d09ea64281933c74e2d3 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Thu, 4 Dec 2025 09:22:40 +0000 +Subject: [PATCH] hw/arm/smmuv3: Introduce a helper function for event + propagation +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 0a20aa1563 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-17 +UPSTREAM: no, v4 + +Factor out the code that propagates event records to the guest into a +helper function. The accelerated SMMUv3 path can use this to propagate +host events in a subsequent patch. + +Since this helper may be called from outside the SMMUv3 core, take the +mutex before accessing the Event Queue. + +No functional change intended. + +Reviewed-by: Nicolin Chen +Reviewed-by: Eric Auger +Tested-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit d134e3e2b641676576b864bae6af8db3daeed34a) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-internal.h | 4 ++++ + hw/arm/smmuv3.c | 21 +++++++++++++++------ + hw/arm/trace-events | 2 +- + 3 files changed, 20 insertions(+), 7 deletions(-) + +diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h +index 998d30473d..466bfd390e 100644 +--- a/hw/arm/smmuv3-internal.h ++++ b/hw/arm/smmuv3-internal.h +@@ -352,7 +352,11 @@ typedef struct SMMUEventInfo { + (x)->word[6] = (uint32_t)(addr & 0xffffffff); \ + } while (0) + ++#define EVT_GET_TYPE(x) extract32((x)->word[0], 0, 8) ++#define EVT_GET_SID(x) ((x)->word[1]) ++ + void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *event); ++void smmuv3_propagate_event(SMMUv3State *s, Evt *evt); + int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste, SMMUEventInfo *event); + + static inline int oas2bits(int oas_field) +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index 3bcf74597d..b3d4b536aa 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -168,10 +168,23 @@ static MemTxResult smmuv3_write_eventq(SMMUv3State *s, Evt *evt) + return MEMTX_OK; + } + ++void smmuv3_propagate_event(SMMUv3State *s, Evt *evt) ++{ ++ MemTxResult r; ++ ++ trace_smmuv3_propagate_event(smmu_event_string(EVT_GET_TYPE(evt)), ++ EVT_GET_SID(evt)); ++ qemu_mutex_lock(&s->mutex); ++ r = smmuv3_write_eventq(s, evt); ++ if (r != MEMTX_OK) { ++ smmuv3_trigger_irq(s, SMMU_IRQ_GERROR, R_GERROR_EVENTQ_ABT_ERR_MASK); ++ } ++ qemu_mutex_unlock(&s->mutex); ++} ++ + void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *info) + { + Evt evt = {}; +- MemTxResult r; + + if (!smmuv3_eventq_enabled(s)) { + return; +@@ -251,11 +264,7 @@ void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *info) + g_assert_not_reached(); + } + +- trace_smmuv3_record_event(smmu_event_string(info->type), info->sid); +- r = smmuv3_write_eventq(s, &evt); +- if (r != MEMTX_OK) { +- smmuv3_trigger_irq(s, SMMU_IRQ_GERROR, R_GERROR_EVENTQ_ABT_ERR_MASK); +- } ++ smmuv3_propagate_event(s, &evt); + info->recorded = true; + } + +diff --git a/hw/arm/trace-events b/hw/arm/trace-events +index 8135c0c734..3457536fb0 100644 +--- a/hw/arm/trace-events ++++ b/hw/arm/trace-events +@@ -40,7 +40,7 @@ smmuv3_cmdq_opcode(const char *opcode) "<--- %s" + smmuv3_cmdq_consume_out(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "prod:%d, cons:%d, prod_wrap:%d, cons_wrap:%d " + smmuv3_cmdq_consume_error(const char *cmd_name, uint8_t cmd_error) "Error on %s command execution: %d" + smmuv3_write_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d)" +-smmuv3_record_event(const char *type, uint32_t sid) "%s sid=0x%x" ++smmuv3_propagate_event(const char *type, uint32_t sid) "%s sid=0x%x" + smmuv3_find_ste(uint16_t sid, uint32_t features, uint16_t sid_split) "sid=0x%x features:0x%x, sid_split:0x%x" + smmuv3_find_ste_2lvl(uint64_t strtab_base, uint64_t l1ptr, int l1_ste_offset, uint64_t l2ptr, int l2_ste_offset, int max_l2_ste) "strtab_base:0x%"PRIx64" l1ptr:0x%"PRIx64" l1_off:0x%x, l2ptr:0x%"PRIx64" l2_off:0x%x max_l2_ste:%d" + smmuv3_get_ste(uint64_t addr) "STE addr: 0x%"PRIx64 diff --git a/0268-hw-arm-smmuv3-accel-Read-and-propagate-host-vIOMMU-e.patch b/0268-hw-arm-smmuv3-accel-Read-and-propagate-host-vIOMMU-e.patch new file mode 100644 index 0000000..b608b1e --- /dev/null +++ b/0268-hw-arm-smmuv3-accel-Read-and-propagate-host-vIOMMU-e.patch @@ -0,0 +1,145 @@ +From 04b7b6a059fbcb75e8cde6713ab758dcb1df15b7 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Thu, 4 Dec 2025 09:22:41 +0000 +Subject: [PATCH] hw/arm/smmuv3-accel: Read and propagate host vIOMMU events +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] d6fc3d499f (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-17 +UPSTREAM: no, v4 + +Install an event handler on the vEVENTQ fd to read and propagate host +generated vIOMMU events to the guest. + +The handler runs in QEMU’s main loop, using a non-blocking fd registered +via qemu_set_fd_handler(). + +Tested-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit fbc991bc9e9da32066ee88d46289f2859f451eda) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 62 +++++++++++++++++++++++++++++++++++++++++++ + hw/arm/smmuv3-accel.h | 2 ++ + 2 files changed, 64 insertions(+) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index 2ca0d1deac..beffb8aa94 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -390,6 +390,48 @@ bool smmuv3_accel_issue_inv_cmd(SMMUv3State *bs, void *cmd, SMMUDevice *sdev, + sizeof(Cmd), &entry_num, cmd, errp); + } + ++static void smmuv3_accel_event_read(void *opaque) ++{ ++ SMMUv3State *s = opaque; ++ SMMUv3AccelState *accel = s->s_accel; ++ struct { ++ struct iommufd_vevent_header hdr; ++ struct iommu_vevent_arm_smmuv3 vevent; ++ } buf; ++ uint32_t last_seq = accel->last_event_seq; ++ ssize_t bytes; ++ ++ bytes = read(accel->veventq->veventq_fd, &buf, sizeof(buf)); ++ if (bytes <= 0) { ++ if (errno == EAGAIN || errno == EINTR) { ++ return; ++ } ++ error_report_once("vEVENTQ: read failed (%m)"); ++ return; ++ } ++ ++ if (bytes == sizeof(buf.hdr) && ++ (buf.hdr.flags & IOMMU_VEVENTQ_FLAG_LOST_EVENTS)) { ++ error_report_once("vEVENTQ has lost events"); ++ accel->event_start = false; ++ return; ++ } ++ if (bytes < sizeof(buf)) { ++ error_report_once("vEVENTQ: incomplete read (%zd/%zd bytes)", ++ bytes, sizeof(buf)); ++ return; ++ } ++ ++ /* Check sequence in hdr for lost events if any */ ++ if (accel->event_start && (buf.hdr.sequence - last_seq != 1)) { ++ error_report_once("vEVENTQ: detected lost %u event(s)", ++ buf.hdr.sequence - last_seq - 1); ++ } ++ accel->last_event_seq = buf.hdr.sequence; ++ accel->event_start = true; ++ smmuv3_propagate_event(s, (Evt *)&buf.vevent); ++} ++ + static void smmuv3_accel_free_veventq(SMMUv3AccelState *accel) + { + IOMMUFDVeventq *veventq = accel->veventq; +@@ -397,6 +439,7 @@ static void smmuv3_accel_free_veventq(SMMUv3AccelState *accel) + if (!veventq) { + return; + } ++ qemu_set_fd_handler(veventq->veventq_fd, NULL, NULL, NULL); + close(veventq->veventq_fd); + iommufd_backend_free_id(accel->viommu->iommufd, veventq->veventq_id); + g_free(veventq); +@@ -424,6 +467,7 @@ bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp) + IOMMUFDVeventq *veventq; + uint32_t veventq_id; + uint32_t veventq_fd; ++ int flags; + + if (!accel->viommu) { + return true; +@@ -445,12 +489,30 @@ bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp) + return false; + } + ++ flags = fcntl(veventq_fd, F_GETFL); ++ if (flags < 0) { ++ error_setg(errp, "Failed to get flags for vEVENTQ fd"); ++ goto free_veventq; ++ } ++ if (fcntl(veventq_fd, F_SETFL, O_NONBLOCK | flags) < 0) { ++ error_setg(errp, "Failed to set O_NONBLOCK on vEVENTQ fd"); ++ goto free_veventq; ++ } ++ + veventq = g_new(IOMMUFDVeventq, 1); + veventq->veventq_id = veventq_id; + veventq->veventq_fd = veventq_fd; + veventq->viommu = accel->viommu; + accel->veventq = veventq; ++ ++ /* Set up event handler for veventq fd */ ++ qemu_set_fd_handler(veventq_fd, smmuv3_accel_event_read, NULL, s); + return true; ++ ++free_veventq: ++ close(veventq_fd); ++ iommufd_backend_free_id(accel->viommu->iommufd, veventq_id); ++ return false; + } + + static bool +diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h +index dba6c71de5..c9c10e55c3 100644 +--- a/hw/arm/smmuv3-accel.h ++++ b/hw/arm/smmuv3-accel.h +@@ -23,6 +23,8 @@ + typedef struct SMMUv3AccelState { + IOMMUFDViommu *viommu; + IOMMUFDVeventq *veventq; ++ uint32_t last_event_seq; ++ bool event_start; + uint32_t bypass_hwpt_id; + uint32_t abort_hwpt_id; + QLIST_HEAD(, SMMUv3AccelDevice) device_list; diff --git a/0269-hw-arm-smmuv3-accel-Check-accel-in-smmuv3_accel_allo.patch b/0269-hw-arm-smmuv3-accel-Check-accel-in-smmuv3_accel_allo.patch new file mode 100644 index 0000000..c5366c1 --- /dev/null +++ b/0269-hw-arm-smmuv3-accel-Check-accel-in-smmuv3_accel_allo.patch @@ -0,0 +1,45 @@ +From d994795e7e108edb311202d2af97621947dcbf6f Mon Sep 17 00:00:00 2001 +From: Eric Auger +Date: Thu, 5 Feb 2026 09:18:49 -0500 +Subject: [PATCH] hw/arm/smmuv3-accel: Check !accel in + smmuv3_accel_alloc_veventq() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 278896c681 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-17 VOYAGER-48 +UPSTREAM: no, v4, fix + +smmuv3_accel_alloc_veventq() gets called from smmuv3 +smmu_writel() on CR0 write. However in non accelerated mode +accel is not allocated and without !accel check we +get a SIGSEV. This was reported upstream in +https://lore.kernel.org/all/c9f00721-d36e-4a76-a5c5-9f23ffa62080@redhat.com/ + +Fixes: 02d9b37575f1 ("hw/arm/smmuv3-accel: Allocate vEVENTQ for accelerated SMMUv3 devices") +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3-accel.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index beffb8aa94..359b1c1f37 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -469,6 +469,10 @@ bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp) + uint32_t veventq_fd; + int flags; + ++ if (!accel) { ++ return true; ++ } ++ + if (!accel->viommu) { + return true; + } diff --git a/0270-backends-iommufd-Update-iommufd_backend_get_device_i.patch b/0270-backends-iommufd-Update-iommufd_backend_get_device_i.patch new file mode 100644 index 0000000..e2a190f --- /dev/null +++ b/0270-backends-iommufd-Update-iommufd_backend_get_device_i.patch @@ -0,0 +1,105 @@ +From 8bf63636a6eff84b3b40b8627a40fece6be2119b Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 21 Jul 2025 21:59:35 +0000 +Subject: [PATCH] backends/iommufd: Update iommufd_backend_get_device_info +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 48c2023949 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +The updated IOMMUFD uAPI introduces the ability for userspace to request +a specific hardware info data type via IOMMU_GET_HW_INFO. Update +iommufd_backend_get_device_info() to set IOMMU_HW_INFO_FLAG_INPUT_TYPE +when a non-zero type is supplied, and adjust all callers to pass an +explicitly initialised type value. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit 404683bcc211d529017492988d551b500b93bde8) +Signed-off-by: Eric Auger +--- + backends/iommufd.c | 7 +++++++ + hw/arm/smmuv3-accel.c | 2 +- + hw/vfio/iommufd.c | 6 ++---- + 3 files changed, 10 insertions(+), 5 deletions(-) + +diff --git a/backends/iommufd.c b/backends/iommufd.c +index 5b919e4be9..416e193751 100644 +--- a/backends/iommufd.c ++++ b/backends/iommufd.c +@@ -386,16 +386,23 @@ bool iommufd_backend_get_dirty_bitmap(IOMMUFDBackend *be, + return true; + } + ++/* ++ * @type can carry a desired HW info type defined in the uapi headers. If caller ++ * doesn't have one, indicating it wants the default type, then @type should be ++ * zeroed (i.e. IOMMU_HW_INFO_TYPE_DEFAULT). ++ */ + bool iommufd_backend_get_device_info(IOMMUFDBackend *be, uint32_t devid, + uint32_t *type, void *data, uint32_t len, + uint64_t *caps, uint8_t *max_pasid_log2, + Error **errp) + { + struct iommu_hw_info info = { ++ .flags = (*type) ? IOMMU_HW_INFO_FLAG_INPUT_TYPE : 0, + .size = sizeof(info), + .dev_id = devid, + .data_len = len, + .data_uptr = (uintptr_t)data, ++ .in_data_type = *type, + }; + + if (ioctl(be->fd, IOMMU_GET_HW_INFO, &info)) { +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index 359b1c1f37..19a1e67b0d 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -127,7 +127,7 @@ smmuv3_accel_hw_compatible(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + Error **errp) + { + struct iommu_hw_info_arm_smmuv3 info; +- uint32_t data_type; ++ uint32_t data_type = 0; + uint64_t caps; + + if (!iommufd_backend_get_device_info(idev->iommufd, idev->devid, &data_type, +diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c +index 59dc17b166..43d26bb411 100644 +--- a/hw/vfio/iommufd.c ++++ b/hw/vfio/iommufd.c +@@ -306,7 +306,7 @@ static bool iommufd_cdev_autodomains_get(VFIODevice *vbasedev, + ERRP_GUARD(); + IOMMUFDBackend *iommufd = vbasedev->iommufd; + VFIOContainer *bcontainer = VFIO_IOMMU(container); +- uint32_t type, flags = 0; ++ uint32_t type = 0, flags = 0; + uint64_t hw_caps; + VendorCaps caps; + VFIOIOASHwpt *hwpt; +@@ -632,8 +632,6 @@ skip_ioas_alloc: + bcontainer->initialized = true; + + found_container: +- vbasedev->cpr.ioas_id = container->ioas_id; +- + ret = ioctl(devfd, VFIO_DEVICE_GET_INFO, &dev_info); + if (ret) { + error_setg_errno(errp, errno, "error getting device info"); +@@ -890,7 +888,7 @@ static bool hiod_iommufd_vfio_realize(HostIOMMUDevice *hiod, void *opaque, + HostIOMMUDeviceIOMMUFD *idev; + HostIOMMUDeviceCaps *caps = &hiod->caps; + VendorCaps *vendor_caps = &caps->vendor_caps; +- enum iommu_hw_info_type type; ++ enum iommu_hw_info_type type = 0; + uint8_t max_pasid_log2; + uint64_t hw_caps; + diff --git a/0271-backends-iommufd-Update-iommufd_backend_alloc_viommu.patch b/0271-backends-iommufd-Update-iommufd_backend_alloc_viommu.patch new file mode 100644 index 0000000..7d57893 --- /dev/null +++ b/0271-backends-iommufd-Update-iommufd_backend_alloc_viommu.patch @@ -0,0 +1,83 @@ +From fcb8dada3ff14206bc741931d75b82fc0f5d8768 Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Tue, 15 Jul 2025 00:55:39 +0000 +Subject: [PATCH] backends/iommufd: Update iommufd_backend_alloc_viommu to + allow user ptr +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] d8a51031a0 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +The updated IOMMUFD VIOMMU_ALLOC uAPI allows userspace to provide a data +buffer when creating a vIOMMU (e.g. for Tegra241 CMDQV). Extend +iommufd_backend_alloc_viommu() to pass a user pointer and size to the +kernel. + +Update the caller accordingly. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit e55f68005e3be7992d76db6e408262911713b642) +Signed-off-by: Eric Auger +--- + backends/iommufd.c | 3 +++ + hw/arm/smmuv3-accel.c | 4 ++-- + include/system/iommufd.h | 1 + + 3 files changed, 6 insertions(+), 2 deletions(-) + +diff --git a/backends/iommufd.c b/backends/iommufd.c +index 416e193751..4f95ba7915 100644 +--- a/backends/iommufd.c ++++ b/backends/iommufd.c +@@ -459,6 +459,7 @@ bool iommufd_backend_invalidate_cache(IOMMUFDBackend *be, uint32_t id, + + bool iommufd_backend_alloc_viommu(IOMMUFDBackend *be, uint32_t dev_id, + uint32_t viommu_type, uint32_t hwpt_id, ++ void *data_ptr, uint32_t len, + uint32_t *out_viommu_id, Error **errp) + { + int ret; +@@ -467,6 +468,8 @@ bool iommufd_backend_alloc_viommu(IOMMUFDBackend *be, uint32_t dev_id, + .type = viommu_type, + .dev_id = dev_id, + .hwpt_id = hwpt_id, ++ .data_len = len, ++ .data_uptr = (uintptr_t)data_ptr, + }; + + ret = ioctl(be->fd, IOMMU_VIOMMU_ALLOC, &alloc_viommu); +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index 19a1e67b0d..b44348e50d 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -535,8 +535,8 @@ smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + IOMMUFDViommu *viommu; + + if (!iommufd_backend_alloc_viommu(idev->iommufd, idev->devid, +- IOMMU_VIOMMU_TYPE_ARM_SMMUV3, +- s2_hwpt_id, &viommu_id, errp)) { ++ IOMMU_VIOMMU_TYPE_ARM_SMMUV3, s2_hwpt_id, ++ NULL, 0, &viommu_id, errp)) { + return false; + } + +diff --git a/include/system/iommufd.h b/include/system/iommufd.h +index 9770ff1484..a3e8087b3a 100644 +--- a/include/system/iommufd.h ++++ b/include/system/iommufd.h +@@ -87,6 +87,7 @@ bool iommufd_backend_alloc_hwpt(IOMMUFDBackend *be, uint32_t dev_id, + Error **errp); + bool iommufd_backend_alloc_viommu(IOMMUFDBackend *be, uint32_t dev_id, + uint32_t viommu_type, uint32_t hwpt_id, ++ void *data_ptr, uint32_t len, + uint32_t *out_hwpt, Error **errp); + + bool iommufd_backend_alloc_vdev(IOMMUFDBackend *be, uint32_t dev_id, diff --git a/0272-backends-iommufd-Introduce-iommufd_backend_alloc_hw_.patch b/0272-backends-iommufd-Introduce-iommufd_backend_alloc_hw_.patch new file mode 100644 index 0000000..e34e8f6 --- /dev/null +++ b/0272-backends-iommufd-Introduce-iommufd_backend_alloc_hw_.patch @@ -0,0 +1,112 @@ +From 8e6df64df2705bfcab1fb4bdd6af1e9aee046581 Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Sat, 13 Apr 2024 00:18:29 +0000 +Subject: [PATCH] backends/iommufd: Introduce iommufd_backend_alloc_hw_queue +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 6436de9e1c (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Add a helper to allocate an iommufd backed HW queue for a vIOMMU. + +While at it, define a struct IOMMUFDHWqueue for use by vendor +implementations. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit 1c28f3e325b923f769b54af93ccde3003165984d) +Signed-off-by: Eric Auger +--- + backends/iommufd.c | 31 +++++++++++++++++++++++++++++++ + backends/trace-events | 1 + + include/system/iommufd.h | 11 +++++++++++ + 3 files changed, 43 insertions(+) + +diff --git a/backends/iommufd.c b/backends/iommufd.c +index 4f95ba7915..c8482d885e 100644 +--- a/backends/iommufd.c ++++ b/backends/iommufd.c +@@ -544,6 +544,37 @@ bool iommufd_backend_alloc_veventq(IOMMUFDBackend *be, uint32_t viommu_id, + return true; + } + ++bool iommufd_backend_alloc_hw_queue(IOMMUFDBackend *be, uint32_t viommu_id, ++ uint32_t data_type, uint32_t index, ++ uint64_t addr, uint64_t length, ++ uint32_t *out_hw_queue_id, Error **errp) ++{ ++ int ret; ++ struct iommu_hw_queue_alloc alloc_hw_queue = { ++ .size = sizeof(alloc_hw_queue), ++ .flags = 0, ++ .viommu_id = viommu_id, ++ .type = data_type, ++ .index = index, ++ .nesting_parent_iova = addr, ++ .length = length, ++ }; ++ ++ ret = ioctl(be->fd, IOMMU_HW_QUEUE_ALLOC, &alloc_hw_queue); ++ ++ trace_iommufd_backend_alloc_hw_queue(be->fd, viommu_id, data_type, ++ index, addr, length, ++ alloc_hw_queue.out_hw_queue_id, ret); ++ if (ret) { ++ error_setg_errno(errp, errno, "IOMMU_HW_QUEUE_ALLOC failed"); ++ return false; ++ } ++ ++ g_assert(out_hw_queue_id); ++ *out_hw_queue_id = alloc_hw_queue.out_hw_queue_id; ++ return true; ++} ++ + bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *idev, + uint32_t hwpt_id, Error **errp) + { +diff --git a/backends/trace-events b/backends/trace-events +index 5afa7a40be..a22ad30e55 100644 +--- a/backends/trace-events ++++ b/backends/trace-events +@@ -24,3 +24,4 @@ iommufd_backend_invalidate_cache(int iommufd, uint32_t id, uint32_t data_type, u + iommufd_backend_alloc_viommu(int iommufd, uint32_t dev_id, uint32_t type, uint32_t hwpt_id, uint32_t viommu_id, int ret) " iommufd=%d type=%u dev_id=%u hwpt_id=%u viommu_id=%u (%d)" + iommufd_backend_alloc_vdev(int iommufd, uint32_t dev_id, uint32_t viommu_id, uint64_t virt_id, uint32_t vdev_id, int ret) " iommufd=%d dev_id=%u viommu_id=%u virt_id=0x%"PRIx64" vdev_id=%u (%d)" + iommufd_viommu_alloc_eventq(int iommufd, uint32_t viommu_id, uint32_t type, uint32_t veventq_id, uint32_t veventq_fd, int ret) " iommufd=%d viommu_id=%u type=%u veventq_id=%u veventq_fd=%u (%d)" ++iommufd_backend_alloc_hw_queue(int iommufd, uint32_t viommu_id, uint32_t vqueue_type, uint32_t index, uint64_t addr, uint64_t size, uint32_t vqueue_id, int ret) " iommufd=%d viommu_id=%u vqueue_type=%u index=%u addr=0x%"PRIx64" size=0x%"PRIx64" vqueue_id=%u (%d)" +diff --git a/include/system/iommufd.h b/include/system/iommufd.h +index a3e8087b3a..9b8602a558 100644 +--- a/include/system/iommufd.h ++++ b/include/system/iommufd.h +@@ -63,6 +63,12 @@ typedef struct IOMMUFDVeventq { + uint32_t veventq_fd; + } IOMMUFDVeventq; + ++/* HW queue object for a vIOMMU-specific HW-accelerated queue */ ++typedef struct IOMMUFDHWqueue { ++ IOMMUFDViommu *viommu; ++ uint32_t hw_queue_id; ++} IOMMUFDHWqueue; ++ + bool iommufd_backend_connect(IOMMUFDBackend *be, Error **errp); + void iommufd_backend_disconnect(IOMMUFDBackend *be); + +@@ -99,6 +105,11 @@ bool iommufd_backend_alloc_veventq(IOMMUFDBackend *be, uint32_t viommu_id, + uint32_t *out_veventq_id, + uint32_t *out_veventq_fd, Error **errp); + ++bool iommufd_backend_alloc_hw_queue(IOMMUFDBackend *be, uint32_t viommu_id, ++ uint32_t data_type, uint32_t index, ++ uint64_t addr, uint64_t length, ++ uint32_t *out_hw_queue_id, Error **errp); ++ + bool iommufd_backend_set_dirty_tracking(IOMMUFDBackend *be, uint32_t hwpt_id, + bool start, Error **errp); + bool iommufd_backend_get_dirty_bitmap(IOMMUFDBackend *be, uint32_t hwpt_id, diff --git a/0273-backends-iommufd-Introduce-iommufd_backend_viommu_mm.patch b/0273-backends-iommufd-Introduce-iommufd_backend_viommu_mm.patch new file mode 100644 index 0000000..731a11a --- /dev/null +++ b/0273-backends-iommufd-Introduce-iommufd_backend_viommu_mm.patch @@ -0,0 +1,92 @@ +From c1381effcf0ff362b944298af32361fa35276a30 Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Sat, 13 Apr 2024 00:25:40 +0000 +Subject: [PATCH] backends/iommufd: Introduce iommufd_backend_viommu_mmap +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] a267a35e5e (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Add a backend helper to mmap hardware MMIO regions exposed via iommufd for +a vIOMMU instance. This allows user space to access HW-accelerated MMIO +pages provided by the vIOMMU. + +The caller is responsible for unmapping the returned region. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit db1f3f5beb0258227ee5891be4c456bb9727feb3) +Signed-off-by: Eric Auger +--- + backends/iommufd.c | 24 ++++++++++++++++++++++++ + backends/trace-events | 1 + + include/system/iommufd.h | 4 ++++ + 3 files changed, 29 insertions(+) + +diff --git a/backends/iommufd.c b/backends/iommufd.c +index c8482d885e..bbde61dd60 100644 +--- a/backends/iommufd.c ++++ b/backends/iommufd.c +@@ -575,6 +575,30 @@ bool iommufd_backend_alloc_hw_queue(IOMMUFDBackend *be, uint32_t viommu_id, + return true; + } + ++/* ++ * Helper to mmap HW MMIO regions exposed via iommufd for a vIOMMU instance. ++ * The caller is responsible for unmapping the mapped region. ++ */ ++bool iommufd_backend_viommu_mmap(IOMMUFDBackend *be, uint32_t viommu_id, ++ uint64_t size, off_t offset, void **out_ptr, ++ Error **errp) ++{ ++ g_assert(viommu_id); ++ g_assert(out_ptr); ++ ++ *out_ptr = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, be->fd, ++ offset); ++ if (*out_ptr == MAP_FAILED) { ++ error_setg_errno(errp, errno, "failed to mmap (size=0x%" PRIx64 ++ " offset=0x%" PRIx64 ") for viommu (id=%d)", ++ size, offset, viommu_id); ++ return false; ++ } ++ ++ trace_iommufd_backend_viommu_mmap(be->fd, viommu_id, size, offset); ++ return true; ++} ++ + bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *idev, + uint32_t hwpt_id, Error **errp) + { +diff --git a/backends/trace-events b/backends/trace-events +index a22ad30e55..046f453caa 100644 +--- a/backends/trace-events ++++ b/backends/trace-events +@@ -25,3 +25,4 @@ iommufd_backend_alloc_viommu(int iommufd, uint32_t dev_id, uint32_t type, uint32 + iommufd_backend_alloc_vdev(int iommufd, uint32_t dev_id, uint32_t viommu_id, uint64_t virt_id, uint32_t vdev_id, int ret) " iommufd=%d dev_id=%u viommu_id=%u virt_id=0x%"PRIx64" vdev_id=%u (%d)" + iommufd_viommu_alloc_eventq(int iommufd, uint32_t viommu_id, uint32_t type, uint32_t veventq_id, uint32_t veventq_fd, int ret) " iommufd=%d viommu_id=%u type=%u veventq_id=%u veventq_fd=%u (%d)" + iommufd_backend_alloc_hw_queue(int iommufd, uint32_t viommu_id, uint32_t vqueue_type, uint32_t index, uint64_t addr, uint64_t size, uint32_t vqueue_id, int ret) " iommufd=%d viommu_id=%u vqueue_type=%u index=%u addr=0x%"PRIx64" size=0x%"PRIx64" vqueue_id=%u (%d)" ++iommufd_backend_viommu_mmap(int iommufd, uint32_t viommu_id, uint64_t size, uint64_t offset) " iommufd=%d viommu_id=%u size=0x%"PRIx64" offset=0x%"PRIx64 +diff --git a/include/system/iommufd.h b/include/system/iommufd.h +index 9b8602a558..e3905c9a40 100644 +--- a/include/system/iommufd.h ++++ b/include/system/iommufd.h +@@ -110,6 +110,10 @@ bool iommufd_backend_alloc_hw_queue(IOMMUFDBackend *be, uint32_t viommu_id, + uint64_t addr, uint64_t length, + uint32_t *out_hw_queue_id, Error **errp); + ++bool iommufd_backend_viommu_mmap(IOMMUFDBackend *be, uint32_t viommu_id, ++ uint64_t size, off_t offset, void **out_ptr, ++ Error **errp); ++ + bool iommufd_backend_set_dirty_tracking(IOMMUFDBackend *be, uint32_t hwpt_id, + bool start, Error **errp); + bool iommufd_backend_get_dirty_bitmap(IOMMUFDBackend *be, uint32_t hwpt_id, diff --git a/0274-hw-arm-tegra241-cmdqv-Add-initial-Tegra241-CMDQ-Virt.patch b/0274-hw-arm-tegra241-cmdqv-Add-initial-Tegra241-CMDQ-Virt.patch new file mode 100644 index 0000000..2905182 --- /dev/null +++ b/0274-hw-arm-tegra241-cmdqv-Add-initial-Tegra241-CMDQ-Virt.patch @@ -0,0 +1,267 @@ +From 55ae29b02a60dd221fd9f02907f05a4e52354478 Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 8 Dec 2025 15:45:37 +0000 +Subject: [PATCH] hw/arm/tegra241-cmdqv: Add initial Tegra241 + CMDQ-Virtualisation support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 5a5b3f586a (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Conflicts: contextual conflict: ssidsize instead of pasid and rebase on +top of more recent code + hw/arm/smmuv3-accel.c + include/hw/arm/smmuv3.h + +Introduce initial support for NVIDIA Tegra241 CMDQ-Virtualisation (CMDQV), +an extension to SMMUv3 providing virtualizable hardware command queues. +This adds the basic MMIO handling, and integration hooks in the SMMUv3 +accelerated path. When enabled, the SMMUv3 backend allocates a Tegra241 +specific vIOMMU object via IOMMUFD and exposes a CMDQV MMIO region and +IRQ to the guest. + +The "tegra241-cmdqv" property isn't user visible yet and it will be +introduced in a later patch once all the supporting pieces are ready. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit 5980b8c743df36b62cb60a2ee7b0a835ecdf5d2e) +Signed-off-by: Eric Auger +--- + hw/arm/Kconfig | 5 ++++ + hw/arm/meson.build | 1 + + hw/arm/smmuv3-accel.c | 10 +++++-- + hw/arm/smmuv3.c | 4 +++ + hw/arm/tegra241-cmdqv.c | 65 +++++++++++++++++++++++++++++++++++++++++ + hw/arm/tegra241-cmdqv.h | 40 +++++++++++++++++++++++++ + include/hw/arm/smmuv3.h | 3 ++ + 7 files changed, 126 insertions(+), 2 deletions(-) + create mode 100644 hw/arm/tegra241-cmdqv.c + create mode 100644 hw/arm/tegra241-cmdqv.h + +diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig +index 1f49550c61..caf02460eb 100644 +--- a/hw/arm/Kconfig ++++ b/hw/arm/Kconfig +@@ -36,6 +36,7 @@ config ARM_VIRT + select VIRTIO_MEM_SUPPORTED + select ACPI_CXL + select ACPI_HMAT ++ select TEGRA241_CMDQV + + config CUBIEBOARD + bool +@@ -630,6 +631,10 @@ config ARM_SMMUV3 + bool + select ARM_SMMUV3_ACCEL if IOMMUFD + ++config TEGRA241_CMDQV ++ bool ++ depends on ARM_SMMUV3_ACCEL ++ + config FSL_IMX6UL + bool + default y +diff --git a/hw/arm/meson.build b/hw/arm/meson.build +index bcb27c0bf6..55d4106be6 100644 +--- a/hw/arm/meson.build ++++ b/hw/arm/meson.build +@@ -63,6 +63,7 @@ arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP', if_true: files('fsl-imx8mp.c')) + arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP_EVK', if_true: files('imx8mp-evk.c')) + arm_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c')) + arm_ss.add(when: 'CONFIG_ARM_SMMUV3_ACCEL', if_true: files('smmuv3-accel.c')) ++arm_ss.add(when: 'CONFIG_TEGRA241_CMDQV', if_true: files('tegra241-cmdqv.c')) + arm_common_ss.add(when: 'CONFIG_FSL_IMX6UL', if_true: files('fsl-imx6ul.c', 'mcimx6ul-evk.c')) + arm_common_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c')) + arm_ss.add(when: 'CONFIG_XEN', if_true: files( +diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c +index b44348e50d..462cdaa046 100644 +--- a/hw/arm/smmuv3-accel.c ++++ b/hw/arm/smmuv3-accel.c +@@ -18,6 +18,7 @@ + + #include "smmuv3-internal.h" + #include "smmuv3-accel.h" ++#include "tegra241-cmdqv.h" + + /* + * The root region aliases the global system memory, and shared_as_sysmem +@@ -531,10 +532,15 @@ smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + .ste = { SMMU_STE_VALID, 0x0ULL }, + }; + uint32_t s2_hwpt_id = idev->hwpt_id; +- uint32_t viommu_id, hwpt_id; ++ uint32_t viommu_id = 0, hwpt_id; + IOMMUFDViommu *viommu; + +- if (!iommufd_backend_alloc_viommu(idev->iommufd, idev->devid, ++ if (s->tegra241_cmdqv && !tegra241_cmdqv_alloc_viommu(s, idev, &viommu_id, ++ errp)) { ++ return false; ++ } ++ ++ if (!viommu_id && !iommufd_backend_alloc_viommu(idev->iommufd, idev->devid, + IOMMU_VIOMMU_TYPE_ARM_SMMUV3, s2_hwpt_id, + NULL, 0, &viommu_id, errp)) { + return false; +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index b3d4b536aa..bab195d047 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -36,6 +36,7 @@ + #include "smmuv3-accel.h" + #include "smmuv3-internal.h" + #include "smmu-internal.h" ++#include "tegra241-cmdqv.h" + + #define PTW_RECORD_FAULT(ptw_info, cfg) (((ptw_info).stage == SMMU_STAGE_1 && \ + (cfg)->record_faults) || \ +@@ -2034,6 +2035,9 @@ static void smmu_realize(DeviceState *d, Error **errp) + + smmu_init_irq(s, dev); + smmuv3_init_id_regs(s); ++ if (s->tegra241_cmdqv) { ++ tegra241_cmdqv_init(s); ++ } + } + + static const VMStateDescription vmstate_smmuv3_queue = { +diff --git a/hw/arm/tegra241-cmdqv.c b/hw/arm/tegra241-cmdqv.c +new file mode 100644 +index 0000000000..899325877e +--- /dev/null ++++ b/hw/arm/tegra241-cmdqv.c +@@ -0,0 +1,65 @@ ++/* ++ * Copyright (C) 2025, NVIDIA CORPORATION ++ * NVIDIA Tegra241 CMDQ-Virtualization extension for SMMUv3 ++ * ++ * Written by Nicolin Chen, Shameer Kolothum ++ * ++ * SPDX-License-Identifier: GPL-2.0-or-later ++ */ ++ ++#include "qemu/osdep.h" ++ ++#include "hw/arm/smmuv3.h" ++#include "smmuv3-accel.h" ++#include "tegra241-cmdqv.h" ++ ++static uint64_t tegra241_cmdqv_read(void *opaque, hwaddr offset, unsigned size) ++{ ++ return 0; ++} ++ ++static void tegra241_cmdqv_write(void *opaque, hwaddr offset, uint64_t value, ++ unsigned size) ++{ ++} ++ ++static const MemoryRegionOps mmio_cmdqv_ops = { ++ .read = tegra241_cmdqv_read, ++ .write = tegra241_cmdqv_write, ++ .endianness = DEVICE_LITTLE_ENDIAN, ++}; ++ ++bool tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, ++ uint32_t *out_viommu_id, Error **errp) ++{ ++ Tegra241CMDQV *cmdqv = s->cmdqv; ++ ++ if (!iommufd_backend_alloc_viommu(idev->iommufd, idev->devid, ++ IOMMU_VIOMMU_TYPE_TEGRA241_CMDQV, ++ idev->hwpt_id, &cmdqv->cmdqv_data, ++ sizeof(cmdqv->cmdqv_data), out_viommu_id, ++ errp)) { ++ error_append_hint(errp, "NVIDIA Tegra241 CMDQV is unsupported"); ++ s->tegra241_cmdqv = false; ++ return false; ++ } ++ return true; ++} ++ ++void tegra241_cmdqv_init(SMMUv3State *s) ++{ ++ SysBusDevice *sbd = SYS_BUS_DEVICE(OBJECT(s)); ++ Tegra241CMDQV *cmdqv; ++ ++ if (!s->tegra241_cmdqv) { ++ return; ++ } ++ ++ cmdqv = g_new0(Tegra241CMDQV, 1); ++ memory_region_init_io(&cmdqv->mmio_cmdqv, OBJECT(s), &mmio_cmdqv_ops, cmdqv, ++ "tegra241-cmdqv", TEGRA241_CMDQV_IO_LEN); ++ sysbus_init_mmio(sbd, &cmdqv->mmio_cmdqv); ++ sysbus_init_irq(sbd, &cmdqv->irq); ++ cmdqv->smmu = s; ++ s->cmdqv = cmdqv; ++} +diff --git a/hw/arm/tegra241-cmdqv.h b/hw/arm/tegra241-cmdqv.h +new file mode 100644 +index 0000000000..9bc72b24d9 +--- /dev/null ++++ b/hw/arm/tegra241-cmdqv.h +@@ -0,0 +1,40 @@ ++/* ++ * Copyright (C) 2025, NVIDIA CORPORATION ++ * NVIDIA Tegra241 CMDQ-Virtualiisation extension for SMMUv3 ++ * ++ * Written by Nicolin Chen, Shameer Kolothum ++ * ++ * SPDX-License-Identifier: GPL-2.0-or-later ++ */ ++ ++#ifndef HW_TEGRA241_CMDQV_H ++#define HW_TEGRA241_CMDQV_H ++ ++#include CONFIG_DEVICES ++ ++#define TEGRA241_CMDQV_IO_LEN 0x50000 ++ ++typedef struct Tegra241CMDQV { ++ struct iommu_viommu_tegra241_cmdqv cmdqv_data; ++ SMMUv3State *smmu; ++ MemoryRegion mmio_cmdqv; ++ qemu_irq irq; ++} Tegra241CMDQV; ++ ++#ifdef CONFIG_TEGRA241_CMDQV ++bool tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, ++ uint32_t *out_viommu_id, Error **errp); ++void tegra241_cmdqv_init(SMMUv3State *s); ++#else ++static inline void tegra241_cmdqv_init(SMMUv3State *s) ++{ ++} ++static inline bool ++tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, ++ uint32_t *out_viommu_id, Error **errp) ++{ ++ return true; ++} ++#endif ++ ++#endif /* HW_TEGRA241_CMDQV_H */ +diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h +index 26b2fc42fd..6df588d0a2 100644 +--- a/include/hw/arm/smmuv3.h ++++ b/include/hw/arm/smmuv3.h +@@ -73,6 +73,9 @@ struct SMMUv3State { + bool ats; + uint8_t oas; + uint8_t ssidsize; ++ /* Support for NVIDIA Tegra241 SMMU CMDQV extension */ ++ struct Tegra241CMDQV *cmdqv; ++ bool tegra241_cmdqv; + }; + + typedef enum { diff --git a/0275-hw-arm-tegra241-cmdqv-Map-VINTF-Page0-into-guest.patch b/0275-hw-arm-tegra241-cmdqv-Map-VINTF-Page0-into-guest.patch new file mode 100644 index 0000000..58f5e88 --- /dev/null +++ b/0275-hw-arm-tegra241-cmdqv-Map-VINTF-Page0-into-guest.patch @@ -0,0 +1,141 @@ +From 9fd191c850dc1e214bae6805c80a1c259da66037 Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 8 Dec 2025 15:47:43 +0000 +Subject: [PATCH] hw/arm/tegra241-cmdqv: Map VINTF Page0 into guest +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 50fa8dc681 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Conflicts: in tegra241-cmdqv.c fixed +../hw/arm/tegra241-cmdqv.c:27:12: error: assignment to ‘IOMMUFDViommu *’ from incompatible pointer type ‘IOMMUFDViommu **’ [-Wincompatible-pointer-types] + 27 | viommu = &s_accel->viommu; + +Tegra241 CMDQV assigns each VINTF a 128KB MMIO region split into two +64 KB pages: + - Page0: guest accessible control/status registers for all VCMDQs + - Page1: configuration registers (queue GPA/size) that must be trapped + by the VMM and translated before programming the HW queue. + +This patch implements the Page0 handling in QEMU. Using the vintf offset +returned by IOMMUFD during VIOMMU allocation, QEMU maps Page0 into +guest physical address space and exposes it via two guest MMIO windows: + - 0x10000 :VCMDQ register + - 0x30000 :VINTF register + +The mapping is lazily initialized on first read/write. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit 80d46f457cd1f859bafae28c0b5323a8971a732c) +Signed-off-by: Eric Auger +--- + hw/arm/tegra241-cmdqv.c | 60 +++++++++++++++++++++++++++++++++++++++++ + hw/arm/tegra241-cmdqv.h | 5 ++++ + 2 files changed, 65 insertions(+) + +diff --git a/hw/arm/tegra241-cmdqv.c b/hw/arm/tegra241-cmdqv.c +index 899325877e..6ae205bcd1 100644 +--- a/hw/arm/tegra241-cmdqv.c ++++ b/hw/arm/tegra241-cmdqv.c +@@ -13,14 +13,74 @@ + #include "smmuv3-accel.h" + #include "tegra241-cmdqv.h" + ++static bool tegra241_cmdqv_init_vcmdq_page0(Tegra241CMDQV *cmdqv, Error **errp) ++{ ++ SMMUv3State *smmu = cmdqv->smmu; ++ SMMUv3AccelState *s_accel = smmu->s_accel; ++ IOMMUFDViommu *viommu; ++ char *name; ++ ++ if (!s_accel) { ++ return true; ++ } ++ ++ viommu = s_accel->viommu; ++ if (!iommufd_backend_viommu_mmap(viommu->iommufd, viommu->viommu_id, ++ VCMDQ_REG_PAGE_SIZE, ++ cmdqv->cmdqv_data.out_vintf_mmap_offset, ++ &cmdqv->vcmdq_page0, errp)) { ++ cmdqv->vcmdq_page0 = NULL; ++ return false; ++ } ++ ++ name = g_strdup_printf("%s vcmdq", memory_region_name(&cmdqv->mmio_cmdqv)); ++ memory_region_init_ram_device_ptr(&cmdqv->mmio_vcmdq_page, ++ memory_region_owner(&cmdqv->mmio_cmdqv), ++ name, 0x10000, cmdqv->vcmdq_page0); ++ memory_region_add_subregion_overlap(&cmdqv->mmio_cmdqv, 0x10000, ++ &cmdqv->mmio_vcmdq_page, 1); ++ g_free(name); ++ ++ name = g_strdup_printf("%s vintf", memory_region_name(&cmdqv->mmio_cmdqv)); ++ memory_region_init_ram_device_ptr(&cmdqv->mmio_vintf_page, ++ memory_region_owner(&cmdqv->mmio_cmdqv), ++ name, 0x10000, cmdqv->vcmdq_page0); ++ memory_region_add_subregion_overlap(&cmdqv->mmio_cmdqv, 0x30000, ++ &cmdqv->mmio_vintf_page, 1); ++ g_free(name); ++ ++ return true; ++} ++ + static uint64_t tegra241_cmdqv_read(void *opaque, hwaddr offset, unsigned size) + { ++ Tegra241CMDQV *cmdqv = (Tegra241CMDQV *)opaque; ++ Error *local_err = NULL; ++ ++ if (!cmdqv->vcmdq_page0) { ++ tegra241_cmdqv_init_vcmdq_page0(cmdqv, &local_err); ++ if (local_err) { ++ error_report_err(local_err); ++ local_err = NULL; ++ } ++ } ++ + return 0; + } + + static void tegra241_cmdqv_write(void *opaque, hwaddr offset, uint64_t value, + unsigned size) + { ++ Tegra241CMDQV *cmdqv = (Tegra241CMDQV *)opaque; ++ Error *local_err = NULL; ++ ++ if (!cmdqv->vcmdq_page0) { ++ tegra241_cmdqv_init_vcmdq_page0(cmdqv, &local_err); ++ if (local_err) { ++ error_report_err(local_err); ++ local_err = NULL; ++ } ++ } + } + + static const MemoryRegionOps mmio_cmdqv_ops = { +diff --git a/hw/arm/tegra241-cmdqv.h b/hw/arm/tegra241-cmdqv.h +index 9bc72b24d9..ccdf0651be 100644 +--- a/hw/arm/tegra241-cmdqv.h ++++ b/hw/arm/tegra241-cmdqv.h +@@ -19,8 +19,13 @@ typedef struct Tegra241CMDQV { + SMMUv3State *smmu; + MemoryRegion mmio_cmdqv; + qemu_irq irq; ++ MemoryRegion mmio_vcmdq_page; ++ MemoryRegion mmio_vintf_page; ++ void *vcmdq_page0; + } Tegra241CMDQV; + ++#define VCMDQ_REG_PAGE_SIZE 0x10000 ++ + #ifdef CONFIG_TEGRA241_CMDQV + bool tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + uint32_t *out_viommu_id, Error **errp); diff --git a/0276-hw-arm-tegra241-cmdqv-Add-read-emulation-support-for.patch b/0276-hw-arm-tegra241-cmdqv-Add-read-emulation-support-for.patch new file mode 100644 index 0000000..05f4b82 --- /dev/null +++ b/0276-hw-arm-tegra241-cmdqv-Add-read-emulation-support-for.patch @@ -0,0 +1,510 @@ +From a3e2108529358d3111380ffb3472068c4d865f24 Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 8 Dec 2025 15:49:27 +0000 +Subject: [PATCH] hw/arm/tegra241-cmdqv: Add read emulation support for + registers +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] aa1f1ed5f8 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Implement read support for Tegra241 CMDQV register blocks, including VINTF +and per VCMDQ register regions. The patch decodes offsets, extracts queue +indices, and returns the corresponding cached register state. + +Subsequent patch will add write support. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit cf6cd2a2700eb5fdd66b73630c7606f72ee1300b) +Signed-off-by: Eric Auger +--- + hw/arm/tegra241-cmdqv.c | 144 +++++++++++++++++++- + hw/arm/tegra241-cmdqv.h | 282 ++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 425 insertions(+), 1 deletion(-) + +diff --git a/hw/arm/tegra241-cmdqv.c b/hw/arm/tegra241-cmdqv.c +index 6ae205bcd1..83f4e4b2d0 100644 +--- a/hw/arm/tegra241-cmdqv.c ++++ b/hw/arm/tegra241-cmdqv.c +@@ -8,6 +8,7 @@ + */ + + #include "qemu/osdep.h" ++#include "qemu/log.h" + + #include "hw/arm/smmuv3.h" + #include "smmuv3-accel.h" +@@ -52,10 +53,94 @@ static bool tegra241_cmdqv_init_vcmdq_page0(Tegra241CMDQV *cmdqv, Error **errp) + return true; + } + ++/* Note that offset aligns down to 0x1000 */ ++static uint64_t tegra241_cmdqv_read_vintf(Tegra241CMDQV *cmdqv, hwaddr offset) ++{ ++ int i; ++ ++ switch (offset) { ++ case A_VINTF0_CONFIG: ++ return cmdqv->vintf_config; ++ case A_VINTF0_STATUS: ++ return cmdqv->vintf_status; ++ case A_VINTF0_LVCMDQ_ERR_MAP_0 ... A_VINTF0_LVCMDQ_ERR_MAP_3: ++ i = (offset - A_VINTF0_LVCMDQ_ERR_MAP_0) / 4; ++ return cmdqv->vintf_cmdq_err_map[i]; ++ default: ++ qemu_log_mask(LOG_UNIMP, "%s unhandled read access at 0x%" PRIx64 "\n", ++ __func__, offset); ++ return 0; ++ } ++} ++ ++/* Note that offset aligns down to 0x10000 */ ++static uint64_t tegra241_cmdqv_read_vcmdq(Tegra241CMDQV *cmdqv, hwaddr offset, ++ int index) ++{ ++ uint32_t *ptr = NULL; ++ uint64_t off; ++ ++ /* ++ * Each VCMDQ instance occupies a 128 byte region (0x80). ++ * The hardware layout is: ++ * vcmdq_page0 + (index * 0x80) + (offset - 0x10000) ++ */ ++ if (cmdqv->vcmdq_page0) { ++ off = (0x80 * index) + (offset - 0x10000); ++ ptr = (uint32_t *)(cmdqv->vcmdq_page0 + off); ++ } ++ ++ switch (offset) { ++ case A_VCMDQ0_CONS_INDX: ++ if (ptr) { ++ cmdqv->vcmdq_cons_indx[index] = *ptr; ++ } ++ return cmdqv->vcmdq_cons_indx[index]; ++ case A_VCMDQ0_PROD_INDX: ++ if (ptr) { ++ cmdqv->vcmdq_prod_indx[index] = *ptr; ++ } ++ return cmdqv->vcmdq_prod_indx[index]; ++ case A_VCMDQ0_CONFIG: ++ if (ptr) { ++ cmdqv->vcmdq_config[index] = *ptr; ++ } ++ return cmdqv->vcmdq_config[index]; ++ case A_VCMDQ0_STATUS: ++ if (ptr) { ++ cmdqv->vcmdq_status[index] = *ptr; ++ } ++ return cmdqv->vcmdq_status[index]; ++ case A_VCMDQ0_GERROR: ++ if (ptr) { ++ cmdqv->vcmdq_gerror[index] = *ptr; ++ } ++ return cmdqv->vcmdq_gerror[index]; ++ case A_VCMDQ0_GERRORN: ++ if (ptr) { ++ cmdqv->vcmdq_gerrorn[index] = *ptr; ++ } ++ return cmdqv->vcmdq_gerrorn[index]; ++ case A_VCMDQ0_BASE_L: ++ return cmdqv->vcmdq_base[index]; ++ case A_VCMDQ0_BASE_H: ++ return cmdqv->vcmdq_base[index] >> 32; ++ case A_VCMDQ0_CONS_INDX_BASE_DRAM_L: ++ return cmdqv->vcmdq_cons_indx_base[index]; ++ case A_VCMDQ0_CONS_INDX_BASE_DRAM_H: ++ return cmdqv->vcmdq_cons_indx_base[index] >> 32; ++ default: ++ qemu_log_mask(LOG_UNIMP, ++ "%s unhandled read access at 0x%" PRIx64 "\n", ++ __func__, offset); ++ return 0; ++ } ++} + static uint64_t tegra241_cmdqv_read(void *opaque, hwaddr offset, unsigned size) + { + Tegra241CMDQV *cmdqv = (Tegra241CMDQV *)opaque; + Error *local_err = NULL; ++ int index; + + if (!cmdqv->vcmdq_page0) { + tegra241_cmdqv_init_vcmdq_page0(cmdqv, &local_err); +@@ -65,7 +150,64 @@ static uint64_t tegra241_cmdqv_read(void *opaque, hwaddr offset, unsigned size) + } + } + +- return 0; ++ if (offset > TEGRA241_CMDQV_IO_LEN) { ++ qemu_log_mask(LOG_UNIMP, ++ "%s offset 0x%" PRIx64 " off limit (0x50000)\n", __func__, ++ offset); ++ return 0; ++ } ++ ++ /* Fallback to cached register values */ ++ switch (offset) { ++ case A_CONFIG: ++ return cmdqv->config; ++ case A_PARAM: ++ return cmdqv->param; ++ case A_STATUS: ++ return cmdqv->status; ++ case A_VI_ERR_MAP ... A_VI_ERR_MAP_1: ++ return cmdqv->vi_err_map[(offset - A_VI_ERR_MAP) / 4]; ++ case A_VI_INT_MASK ... A_VI_INT_MASK_1: ++ return cmdqv->vi_int_mask[(offset - A_VI_INT_MASK) / 4]; ++ case A_CMDQ_ERR_MAP ... A_CMDQ_ERR_MAP_3: ++ return cmdqv->cmdq_err_map[(offset - A_CMDQ_ERR_MAP) / 4]; ++ case A_CMDQ_ALLOC_MAP_0 ... A_CMDQ_ALLOC_MAP_127: ++ return cmdqv->cmdq_alloc_map[(offset - A_CMDQ_ALLOC_MAP_0) / 4]; ++ case A_VINTF0_CONFIG ... A_VINTF0_LVCMDQ_ERR_MAP_3: ++ return tegra241_cmdqv_read_vintf(cmdqv, offset); ++ case A_VI_VCMDQ0_CONS_INDX ... A_VI_VCMDQ127_GERRORN: ++ offset -= 0x20000; ++ QEMU_FALLTHROUGH; ++ case A_VCMDQ0_CONS_INDX ... A_VCMDQ127_GERRORN: ++ /* ++ * Align offset down to 0x10000 while extracting the index: ++ * VCMDQ0_CONS_INDX (0x10000) => 0x10000, 0 ++ * VCMDQ1_CONS_INDX (0x10080) => 0x10000, 1 ++ * VCMDQ2_CONS_INDX (0x10100) => 0x10000, 2 ++ * ... ++ * VCMDQ127_CONS_INDX (0x13f80) => 0x10000, 127 ++ */ ++ index = (offset - 0x10000) / 0x80; ++ return tegra241_cmdqv_read_vcmdq(cmdqv, offset - 0x80 * index, index); ++ case A_VI_VCMDQ0_BASE_L ... A_VI_VCMDQ127_CONS_INDX_BASE_DRAM_H: ++ offset -= 0x20000; ++ QEMU_FALLTHROUGH; ++ case A_VCMDQ0_BASE_L ... A_VCMDQ127_CONS_INDX_BASE_DRAM_H: ++ /* ++ * Align offset down to 0x20000 while extracting the index: ++ * VCMDQ0_BASE_L (0x20000) => 0x20000, 0 ++ * VCMDQ1_BASE_L (0x20080) => 0x20000, 1 ++ * VCMDQ2_BASE_L (0x20100) => 0x20000, 2 ++ * ... ++ * VCMDQ127_BASE_L (0x23f80) => 0x20000, 127 ++ */ ++ index = (offset - 0x20000) / 0x80; ++ return tegra241_cmdqv_read_vcmdq(cmdqv, offset - 0x80 * index, index); ++ default: ++ qemu_log_mask(LOG_UNIMP, "%s unhandled read access at 0x%" PRIx64 "\n", ++ __func__, offset); ++ return 0; ++ } + } + + static void tegra241_cmdqv_write(void *opaque, hwaddr offset, uint64_t value, +diff --git a/hw/arm/tegra241-cmdqv.h b/hw/arm/tegra241-cmdqv.h +index ccdf0651be..4972e367f6 100644 +--- a/hw/arm/tegra241-cmdqv.h ++++ b/hw/arm/tegra241-cmdqv.h +@@ -10,6 +10,7 @@ + #ifndef HW_TEGRA241_CMDQV_H + #define HW_TEGRA241_CMDQV_H + ++#include "hw/registerfields.h" + #include CONFIG_DEVICES + + #define TEGRA241_CMDQV_IO_LEN 0x50000 +@@ -22,10 +23,291 @@ typedef struct Tegra241CMDQV { + MemoryRegion mmio_vcmdq_page; + MemoryRegion mmio_vintf_page; + void *vcmdq_page0; ++ IOMMUFDHWqueue *vcmdq[128]; ++ ++ /* Register Cache */ ++ uint32_t config; ++ uint32_t param; ++ uint32_t status; ++ uint32_t vi_err_map[2]; ++ uint32_t vi_int_mask[2]; ++ uint32_t cmdq_err_map[4]; ++ uint32_t cmdq_alloc_map[128]; ++ uint32_t vintf_config; ++ uint32_t vintf_status; ++ uint32_t vintf_cmdq_err_map[4]; ++ uint32_t vcmdq_cons_indx[128]; ++ uint32_t vcmdq_prod_indx[128]; ++ uint32_t vcmdq_config[128]; ++ uint32_t vcmdq_status[128]; ++ uint32_t vcmdq_gerror[128]; ++ uint32_t vcmdq_gerrorn[128]; ++ uint64_t vcmdq_base[128]; ++ uint64_t vcmdq_cons_indx_base[128]; + } Tegra241CMDQV; + ++/* MMIO Registers */ ++REG32(CONFIG, 0x0) ++FIELD(CONFIG, CMDQV_EN, 0, 1) ++FIELD(CONFIG, CMDQV_PER_CMD_OFFSET, 1, 3) ++FIELD(CONFIG, CMDQ_MAX_CLK_BATCH, 4, 8) ++FIELD(CONFIG, CMDQ_MAX_CMD_BATCH, 12, 8) ++FIELD(CONFIG, CONS_DRAM_EN, 20, 1) ++ ++#define V_CONFIG_RESET 0x00020403 ++ ++REG32(PARAM, 0x4) ++FIELD(PARAM, CMDQV_VER, 0, 4) ++FIELD(PARAM, CMDQV_NUM_CMDQ_LOG2, 4, 4) ++FIELD(PARAM, CMDQV_NUM_VM_LOG2, 8, 4) ++FIELD(PARAM, CMDQV_NUM_SID_PER_VM_LOG2, 12, 4) ++ ++#define V_PARAM_RESET 0x00004011 ++ ++REG32(STATUS, 0x8) ++FIELD(STATUS, CMDQV_ENABLED, 0, 1) ++ ++#define A_VI_ERR_MAP 0x14 ++#define A_VI_ERR_MAP_1 0x18 ++#define V_VI_ERR_MAP_NO_ERROR (0) ++#define V_VI_ERR_MAP_ERROR (1) ++ ++#define A_VI_INT_MASK 0x1c ++#define A_VI_INT_MASK_1 0x20 ++#define V_VI_INT_MASK_NOT_MASKED (0) ++#define V_VI_INT_MASK_MASKED (1) ++ ++#define A_CMDQ_ERR_MAP 0x24 ++#define A_CMDQ_ERR_MAP_1 0x28 ++#define A_CMDQ_ERR_MAP_2 0x2c ++#define A_CMDQ_ERR_MAP_3 0x30 ++ ++/* i = [0, 127] */ ++#define A_CMDQ_ALLOC_MAP_(i) \ ++ REG32(CMDQ_ALLOC_MAP_##i, 0x200 + i * 4) \ ++ FIELD(CMDQ_ALLOC_MAP_##i, ALLOC, 0, 1) \ ++ FIELD(CMDQ_ALLOC_MAP_##i, LVCMDQ, 1, 7) \ ++ FIELD(CMDQ_ALLOC_MAP_##i, VIRT_INTF_INDX, 15, 6) ++ ++A_CMDQ_ALLOC_MAP_(0) ++/* Omitting 1~126 as not being directly called */ ++A_CMDQ_ALLOC_MAP_(127) ++ ++/* i = [0, 0] */ ++#define A_VINTFi_CONFIG(i) \ ++ REG32(VINTF##i##_CONFIG, 0x1000 + i * 0x100) \ ++ FIELD(VINTF##i##_CONFIG, ENABLE, 0, 1) \ ++ FIELD(VINTF##i##_CONFIG, VMID, 1, 16) \ ++ FIELD(VINTF##i##_CONFIG, HYP_OWN, 17, 1) ++ ++A_VINTFi_CONFIG(0) ++ ++#define A_VINTFi_STATUS(i) \ ++ REG32(VINTF##i##_STATUS, 0x1004 + i * 0x100) \ ++ FIELD(VINTF##i##_STATUS, ENABLE_OK, 0, 1) \ ++ FIELD(VINTF##i##_STATUS, STATUS, 1, 3) \ ++ FIELD(VINTF##i##_STATUS, VI_NUM_LVCMDQ, 16, 8) ++ ++ A_VINTFi_STATUS(0) ++ ++#define V_VINTF_STATUS_NO_ERROR (0 << 1) ++#define V_VINTF_STATUS_VCMDQ_EROR (1 << 1) ++ ++/* i = [0, 0], j = [0, 3] */ ++#define A_VINTFi_LVCMDQ_ERR_MAP_(i, j) \ ++ REG32(VINTF##i##_LVCMDQ_ERR_MAP_##j, 0x10c0 + j * 4 + i * 0x100) \ ++ FIELD(VINTF##i##_LVCMDQ_ERR_MAP_##j, LVCMDQ_ERR_MAP, 0, 32) ++ ++ A_VINTFi_LVCMDQ_ERR_MAP_(0, 0) ++ /* Omitting [0][1~2] as not being directly called */ ++ A_VINTFi_LVCMDQ_ERR_MAP_(0, 3) ++ ++/* VCMDQ registers -- starting from 0x10000 with size 64KB * 2 (0x20000) */ ++#define VCMDQ_REG_OFFSET 0x10000 + #define VCMDQ_REG_PAGE_SIZE 0x10000 + ++#define A_VCMDQi_CONS_INDX(i) \ ++ REG32(VCMDQ##i##_CONS_INDX, 0x10000 + i * 0x80) \ ++ FIELD(VCMDQ##i##_CONS_INDX, RD, 0, 20) \ ++ FIELD(VCMDQ##i##_CONS_INDX, ERR, 24, 7) ++ ++ A_VCMDQi_CONS_INDX(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VCMDQi_CONS_INDX(127) ++ ++#define V_VCMDQ_CONS_INDX_ERR_CERROR_NONE 0 ++#define V_VCMDQ_CONS_INDX_ERR_CERROR_ILL_OPCODE 1 ++#define V_VCMDQ_CONS_INDX_ERR_CERROR_ABT 2 ++#define V_VCMDQ_CONS_INDX_ERR_CERROR_ATC_INV_SYNC 3 ++#define V_VCMDQ_CONS_INDX_ERR_CERROR_ILL_ACCESS 4 ++ ++#define A_VCMDQi_PROD_INDX(i) \ ++ REG32(VCMDQ##i##_PROD_INDX, 0x10000 + 0x4 + i * 0x80) \ ++ FIELD(VCMDQ##i##_PROD_INDX, WR, 0, 20) ++ ++ A_VCMDQi_PROD_INDX(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VCMDQi_PROD_INDX(127) ++ ++#define A_VCMDQi_CONFIG(i) \ ++ REG32(VCMDQ##i##_CONFIG, 0x10000 + 0x8 + i * 0x80) \ ++ FIELD(VCMDQ##i##_CONFIG, CMDQ_EN, 0, 1) ++ ++ A_VCMDQi_CONFIG(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VCMDQi_CONFIG(127) ++ ++#define A_VCMDQi_STATUS(i) \ ++ REG32(VCMDQ##i##_STATUS, 0x10000 + 0xc + i * 0x80) \ ++ FIELD(VCMDQ##i##_STATUS, CMDQ_EN_OK, 0, 1) ++ ++ A_VCMDQi_STATUS(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VCMDQi_STATUS(127) ++ ++#define A_VCMDQi_GERROR(i) \ ++ REG32(VCMDQ##i##_GERROR, 0x10000 + 0x10 + i * 0x80) \ ++ FIELD(VCMDQ##i##_GERROR, CMDQ_ERR, 0, 1) \ ++ FIELD(VCMDQ##i##_GERROR, CONS_DRAM_WR_ABT_ERR, 1, 1) \ ++ FIELD(VCMDQ##i##_GERROR, CMDQ_INIT_ERR, 2, 1) ++ ++ A_VCMDQi_GERROR(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VCMDQi_GERROR(127) ++ ++#define A_VCMDQi_GERRORN(i) \ ++ REG32(VCMDQ##i##_GERRORN, 0x10000 + 0x14 + i * 0x80) \ ++ FIELD(VCMDQ##i##_GERRORN, CMDQ_ERR, 0, 1) \ ++ FIELD(VCMDQ##i##_GERRORN, CONS_DRAM_WR_ABT_ERR, 1, 1) \ ++ FIELD(VCMDQ##i##_GERRORN, CMDQ_INIT_ERR, 2, 1) ++ ++ A_VCMDQi_GERRORN(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VCMDQi_GERRORN(127) ++ ++#define A_VCMDQi_BASE_L(i) \ ++ REG32(VCMDQ##i##_BASE_L, 0x20000 + i * 0x80) \ ++ FIELD(VCMDQ##i##_BASE_L, LOG2SIZE, 0, 5) \ ++ FIELD(VCMDQ##i##_BASE_L, ADDR, 5, 27) ++ ++ A_VCMDQi_BASE_L(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VCMDQi_BASE_L(127) ++ ++#define A_VCMDQi_BASE_H(i) \ ++ REG32(VCMDQ##i##_BASE_H, 0x20000 + 0x4 + i * 0x80) \ ++ FIELD(VCMDQ##i##_BASE_H, ADDR, 0, 16) ++ ++ A_VCMDQi_BASE_H(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VCMDQi_BASE_H(127) ++ ++#define A_VCMDQi_CONS_INDX_BASE_DRAM_L(i) \ ++ REG32(VCMDQ##i##_CONS_INDX_BASE_DRAM_L, 0x20000 + 0x8 + i * 0x80) \ ++ FIELD(VCMDQ##i##_CONS_INDX_BASE_DRAM_L, ADDR, 0, 32) ++ ++ A_VCMDQi_CONS_INDX_BASE_DRAM_L(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VCMDQi_CONS_INDX_BASE_DRAM_L(127) ++ ++#define A_VCMDQi_CONS_INDX_BASE_DRAM_H(i) \ ++ REG32(VCMDQ##i##_CONS_INDX_BASE_DRAM_H, 0x20000 + 0xc + i * 0x80) \ ++ FIELD(VCMDQ##i##_CONS_INDX_BASE_DRAM_H, ADDR, 0, 16) ++ ++ A_VCMDQi_CONS_INDX_BASE_DRAM_H(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VCMDQi_CONS_INDX_BASE_DRAM_H(127) ++ ++/* ++ * VINTF VI_VCMDQ registers -- starting from 0x30000 with size 64KB * 2 ++ * (0x20000) ++ */ ++#define A_VI_VCMDQi_CONS_INDX(i) \ ++ REG32(VI_VCMDQ##i##_CONS_INDX, 0x30000 + i * 0x80) \ ++ FIELD(VI_VCMDQ##i##_CONS_INDX, RD, 0, 20) \ ++ FIELD(VI_VCMDQ##i##_CONS_INDX, ERR, 24, 7) ++ ++ A_VI_VCMDQi_CONS_INDX(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VI_VCMDQi_CONS_INDX(127) ++ ++#define A_VI_VCMDQi_PROD_INDX(i) \ ++ REG32(VI_VCMDQ##i##_PROD_INDX, 0x30000 + 0x4 + i * 0x80) \ ++ FIELD(VI_VCMDQ##i##_PROD_INDX, WR, 0, 20) ++ ++ A_VI_VCMDQi_PROD_INDX(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VI_VCMDQi_PROD_INDX(127) ++ ++#define A_VI_VCMDQi_CONFIG(i) \ ++ REG32(VI_VCMDQ##i##_CONFIG, 0x30000 + 0x8 + i * 0x80) \ ++ FIELD(VI_VCMDQ##i##_CONFIG, CMDQ_EN, 0, 1) ++ ++ A_VI_VCMDQi_CONFIG(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VI_VCMDQi_CONFIG(127) ++ ++#define A_VI_VCMDQi_STATUS(i) \ ++ REG32(VI_VCMDQ##i##_STATUS, 0x30000 + 0xc + i * 0x80) \ ++ FIELD(VI_VCMDQ##i##_STATUS, CMDQ_EN_OK, 0, 1) ++ ++ A_VI_VCMDQi_STATUS(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VI_VCMDQi_STATUS(127) ++ ++#define A_VI_VCMDQi_GERROR(i) \ ++ REG32(VI_VCMDQ##i##_GERROR, 0x30000 + 0x10 + i * 0x80) \ ++ FIELD(VI_VCMDQ##i##_GERROR, CMDQ_ERR, 0, 1) \ ++ FIELD(VI_VCMDQ##i##_GERROR, CONS_DRAM_WR_ABT_ERR, 1, 1) \ ++ FIELD(VI_VCMDQ##i##_GERROR, CMDQ_INIT_ERR, 2, 1) ++ ++ A_VI_VCMDQi_GERROR(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VI_VCMDQi_GERROR(127) ++ ++#define A_VI_VCMDQi_GERRORN(i) \ ++ REG32(VI_VCMDQ##i##_GERRORN, 0x30000 + 0x14 + i * 0x80) \ ++ FIELD(VI_VCMDQ##i##_GERRORN, CMDQ_ERR, 0, 1) \ ++ FIELD(VI_VCMDQ##i##_GERRORN, CONS_DRAM_WR_ABT_ERR, 1, 1) \ ++ FIELD(VI_VCMDQ##i##_GERRORN, CMDQ_INIT_ERR, 2, 1) ++ ++ A_VI_VCMDQi_GERRORN(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VI_VCMDQi_GERRORN(127) ++ ++#define A_VI_VCMDQi_BASE_L(i) \ ++ REG32(VI_VCMDQ##i##_BASE_L, 0x40000 + i * 0x80) \ ++ FIELD(VI_VCMDQ##i##_BASE_L, LOG2SIZE, 0, 5) \ ++ FIELD(VI_VCMDQ##i##_BASE_L, ADDR, 5, 27) ++ ++ A_VI_VCMDQi_BASE_L(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VI_VCMDQi_BASE_L(127) ++ ++#define A_VI_VCMDQi_BASE_H(i) \ ++ REG32(VI_VCMDQ##i##_BASE_H, 0x40000 + 0x4 + i * 0x80) \ ++ FIELD(VI_VCMDQ##i##_BASE_H, ADDR, 0, 16) ++ ++ A_VI_VCMDQi_BASE_H(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VI_VCMDQi_BASE_H(127) ++ ++#define A_VI_VCMDQi_CONS_INDX_BASE_DRAM_L(i) \ ++ REG32(VI_VCMDQ##i##_CONS_INDX_BASE_DRAM_L, 0x40000 + 0x8 + i * 0x80) \ ++ FIELD(VI_VCMDQ##i##_CONS_INDX_BASE_DRAM_L, ADDR, 0, 32) ++ ++ A_VI_VCMDQi_CONS_INDX_BASE_DRAM_L(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VI_VCMDQi_CONS_INDX_BASE_DRAM_L(127) ++ ++#define A_VI_VCMDQi_CONS_INDX_BASE_DRAM_H(i) \ ++ REG32(VI_VCMDQ##i##_CONS_INDX_BASE_DRAM_H, 0x40000 + 0xc + i * 0x80) \ ++ FIELD(VI_VCMDQ##i##_CONS_INDX_BASE_DRAM_H, ADDR, 0, 16) ++ ++ A_VI_VCMDQi_CONS_INDX_BASE_DRAM_H(0) ++ /* Omitting [1~126] as not being directly called */ ++ A_VI_VCMDQi_CONS_INDX_BASE_DRAM_H(127) ++ + #ifdef CONFIG_TEGRA241_CMDQV + bool tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + uint32_t *out_viommu_id, Error **errp); diff --git a/0277-system-memory-Factor-address_space_is_io-out.patch b/0277-system-memory-Factor-address_space_is_io-out.patch new file mode 100644 index 0000000..a9a2845 --- /dev/null +++ b/0277-system-memory-Factor-address_space_is_io-out.patch @@ -0,0 +1,91 @@ +From c79ceb7550d2d5fefccc8031baa3e1783702304e Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= +Date: Mon, 29 Sep 2025 14:36:19 +0200 +Subject: [PATCH] system/memory: Factor address_space_is_io() out +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 9672225184 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Factor address_space_is_io() out of cpu_physical_memory_is_io(). + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Thomas Huth +Reviewed-by: Richard Henderson +Message-Id: <20251002084203.63899-3-philmd@linaro.org> +(cherry picked from commit 839976e9da4b577aca284847b7e965332f2ca687) +Signed-off-by: Eric Auger +(cherry picked from commit 5af7875d26f71ca810865dc5d3130d73a8e463c8) +Signed-off-by: Eric Auger +--- + include/system/memory.h | 9 +++++++++ + system/physmem.c | 21 ++++++++++++--------- + 2 files changed, 21 insertions(+), 9 deletions(-) + +diff --git a/include/system/memory.h b/include/system/memory.h +index e2cd6ed126..4913206c8c 100644 +--- a/include/system/memory.h ++++ b/include/system/memory.h +@@ -3017,6 +3017,15 @@ static inline MemoryRegion *address_space_translate(AddressSpace *as, + bool address_space_access_valid(AddressSpace *as, hwaddr addr, hwaddr len, + bool is_write, MemTxAttrs attrs); + ++/** ++ * address_space_is_io: check whether an guest physical addresses ++ * whithin an address space is I/O memory. ++ * ++ * @as: #AddressSpace to be accessed ++ * @addr: address within that address space ++ */ ++bool address_space_is_io(AddressSpace *as, hwaddr addr); ++ + /* address_space_map: map a physical memory region into a host virtual address + * + * May map a subset of the requested range, given by and returned in @plen. +diff --git a/system/physmem.c b/system/physmem.c +index e5dd760e0b..2e34205ad7 100644 +--- a/system/physmem.c ++++ b/system/physmem.c +@@ -3376,6 +3376,17 @@ bool address_space_access_valid(AddressSpace *as, hwaddr addr, + return flatview_access_valid(fv, addr, len, is_write, attrs); + } + ++bool address_space_is_io(AddressSpace *as, hwaddr addr) ++{ ++ MemoryRegion *mr; ++ ++ RCU_READ_LOCK_GUARD(); ++ mr = address_space_translate(as, addr, &addr, NULL, false, ++ MEMTXATTRS_UNSPECIFIED); ++ ++ return !(memory_region_is_ram(mr) || memory_region_is_romd(mr)); ++} ++ + static hwaddr + flatview_extend_translation(FlatView *fv, hwaddr addr, + hwaddr target_len, +@@ -3772,15 +3783,7 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, + + bool cpu_physical_memory_is_io(hwaddr phys_addr) + { +- MemoryRegion*mr; +- hwaddr l = 1; +- +- RCU_READ_LOCK_GUARD(); +- mr = address_space_translate(&address_space_memory, +- phys_addr, &phys_addr, &l, false, +- MEMTXATTRS_UNSPECIFIED); +- +- return !(memory_region_is_ram(mr) || memory_region_is_romd(mr)); ++ return address_space_is_io(&address_space_memory, phys_addr); + } + + int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque) diff --git a/0278-target-i386-arch_memory_mapping-Use-address_space_me.patch b/0278-target-i386-arch_memory_mapping-Use-address_space_me.patch new file mode 100644 index 0000000..faed2aa --- /dev/null +++ b/0278-target-i386-arch_memory_mapping-Use-address_space_me.patch @@ -0,0 +1,82 @@ +From 889cc43414ee5566f190592ac72e930186ee4759 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= +Date: Mon, 29 Sep 2025 15:35:28 +0200 +Subject: [PATCH] target/i386/arch_memory_mapping: Use + address_space_memory_is_io() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] a9a798e201 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Since all functions have an address space argument, it is +trivial to replace cpu_physical_memory_is_io() by +address_space_memory_is_io(). + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Richard Henderson +Message-Id: <20251002084203.63899-4-philmd@linaro.org> +(cherry picked from commit 6ffaa9219616d12bc6c3e7cb26a77f7432ac0c70) +Signed-off-by: Eric Auger +(cherry picked from commit 2fdfa02a343c4187e468f4b4bd2d92411d03fa05) +Signed-off-by: Eric Auger +--- + target/i386/arch_memory_mapping.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/target/i386/arch_memory_mapping.c b/target/i386/arch_memory_mapping.c +index a2398c2173..560f4689ab 100644 +--- a/target/i386/arch_memory_mapping.c ++++ b/target/i386/arch_memory_mapping.c +@@ -35,7 +35,7 @@ static void walk_pte(MemoryMappingList *list, AddressSpace *as, + } + + start_paddr = (pte & ~0xfff) & ~(0x1ULL << 63); +- if (cpu_physical_memory_is_io(start_paddr)) { ++ if (address_space_is_io(as, start_paddr)) { + /* I/O region */ + continue; + } +@@ -65,7 +65,7 @@ static void walk_pte2(MemoryMappingList *list, AddressSpace *as, + } + + start_paddr = pte & ~0xfff; +- if (cpu_physical_memory_is_io(start_paddr)) { ++ if (address_space_is_io(as, start_paddr)) { + /* I/O region */ + continue; + } +@@ -100,7 +100,7 @@ static void walk_pde(MemoryMappingList *list, AddressSpace *as, + if (pde & PG_PSE_MASK) { + /* 2 MB page */ + start_paddr = (pde & ~0x1fffff) & ~(0x1ULL << 63); +- if (cpu_physical_memory_is_io(start_paddr)) { ++ if (address_space_is_io(as, start_paddr)) { + /* I/O region */ + continue; + } +@@ -142,7 +142,7 @@ static void walk_pde2(MemoryMappingList *list, AddressSpace *as, + */ + high_paddr = ((hwaddr)(pde & 0x1fe000) << 19); + start_paddr = (pde & ~0x3fffff) | high_paddr; +- if (cpu_physical_memory_is_io(start_paddr)) { ++ if (address_space_is_io(as, start_paddr)) { + /* I/O region */ + continue; + } +@@ -203,7 +203,7 @@ static void walk_pdpe(MemoryMappingList *list, AddressSpace *as, + if (pdpe & PG_PSE_MASK) { + /* 1 GB page */ + start_paddr = (pdpe & ~0x3fffffff) & ~(0x1ULL << 63); +- if (cpu_physical_memory_is_io(start_paddr)) { ++ if (address_space_is_io(as, start_paddr)) { + /* I/O region */ + continue; + } diff --git a/0279-hw-s390x-sclp-Use-address_space_memory_is_io-in-sclp.patch b/0279-hw-s390x-sclp-Use-address_space_memory_is_io-in-sclp.patch new file mode 100644 index 0000000..e559e2e --- /dev/null +++ b/0279-hw-s390x-sclp-Use-address_space_memory_is_io-in-sclp.patch @@ -0,0 +1,61 @@ +From 000afc0f98479a289c8af761c5d24d341a6c3d97 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= +Date: Mon, 29 Sep 2025 15:28:06 +0200 +Subject: [PATCH] hw/s390x/sclp: Use address_space_memory_is_io() in + sclp_service_call() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 61af36d53e (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +When cpu_address_space_init() isn't called during vCPU creation, +its single address space is the global &address_space_memory. + +As s390x boards don't call cpu_address_space_init(), cpu->as +points to &address_space_memory. + +We can then replace cpu_physical_memory_is_io() by the semantically +equivalent address_space_memory_is_io() call. + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Thomas Huth +Reviewed-by: Richard Henderson +Reviewed-by: Eric Farman +Message-Id: <20251002084203.63899-5-philmd@linaro.org> +(cherry picked from commit 1e440937d699514207946c36c353a7a616f8b805) +Signed-off-by: Eric Auger +(cherry picked from commit 95750690327f5ea87d0681bc55bdd040d9759547) +Signed-off-by: Eric Auger +--- + hw/s390x/sclp.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c +index 9718564fa4..16057356b1 100644 +--- a/hw/s390x/sclp.c ++++ b/hw/s390x/sclp.c +@@ -16,6 +16,7 @@ + #include "qemu/units.h" + #include "qapi/error.h" + #include "hw/boards.h" ++#include "system/memory.h" + #include "hw/s390x/sclp.h" + #include "hw/s390x/event-facility.h" + #include "hw/s390x/s390-pci-bus.h" +@@ -308,7 +309,7 @@ int sclp_service_call(S390CPU *cpu, uint64_t sccb, uint32_t code) + if (env->psw.mask & PSW_MASK_PSTATE) { + return -PGM_PRIVILEGED; + } +- if (cpu_physical_memory_is_io(sccb)) { ++ if (address_space_is_io(CPU(cpu)->as, sccb)) { + return -PGM_ADDRESSING; + } + if ((sccb & ~0x1fffUL) == 0 || (sccb & ~0x1fffUL) == env->psa diff --git a/0280-system-physmem-Remove-cpu_physical_memory_is_io.patch b/0280-system-physmem-Remove-cpu_physical_memory_is_io.patch new file mode 100644 index 0000000..3f3b547 --- /dev/null +++ b/0280-system-physmem-Remove-cpu_physical_memory_is_io.patch @@ -0,0 +1,61 @@ +From 61c147b261c0664fecdc5a029b8a32985257b5cb Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= +Date: Mon, 29 Sep 2025 15:36:08 +0200 +Subject: [PATCH] system/physmem: Remove cpu_physical_memory_is_io() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] b2f53e91ef (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +There are no more uses of the legacy cpu_physical_memory_is_io() +method. Remove it. + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Richard Henderson +Message-Id: <20251002084203.63899-6-philmd@linaro.org> +(cherry picked from commit ec1eb357cb86eee74d63940154db1e1bfa86026a) +Signed-off-by: Eric Auger +(cherry picked from commit 0001320757027f9d4417ddf8cf0f4f9a9075295d) +Signed-off-by: Eric Auger +--- + include/exec/cpu-common.h | 2 -- + system/physmem.c | 5 ----- + 2 files changed, 7 deletions(-) + +diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h +index 9b658a3f48..7ac061bfcb 100644 +--- a/include/exec/cpu-common.h ++++ b/include/exec/cpu-common.h +@@ -149,8 +149,6 @@ void *cpu_physical_memory_map(hwaddr addr, + void cpu_physical_memory_unmap(void *buffer, hwaddr len, + bool is_write, hwaddr access_len); + +-bool cpu_physical_memory_is_io(hwaddr phys_addr); +- + /* Coalesced MMIO regions are areas where write operations can be reordered. + * This usually implies that write operations are side-effect free. This allows + * batching which can make a major impact on performance when using +diff --git a/system/physmem.c b/system/physmem.c +index 2e34205ad7..4a1294f8a0 100644 +--- a/system/physmem.c ++++ b/system/physmem.c +@@ -3781,11 +3781,6 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, + return 0; + } + +-bool cpu_physical_memory_is_io(hwaddr phys_addr) +-{ +- return address_space_is_io(&address_space_memory, phys_addr); +-} +- + int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque) + { + RAMBlock *block; diff --git a/0281-system-physmem-Add-helper-to-check-whether-a-guest-P.patch b/0281-system-physmem-Add-helper-to-check-whether-a-guest-P.patch new file mode 100644 index 0000000..2c582c1 --- /dev/null +++ b/0281-system-physmem-Add-helper-to-check-whether-a-guest-P.patch @@ -0,0 +1,72 @@ +From e6b44be3196106abbf73acfa99ee63462ab5821b Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 8 Dec 2025 15:53:14 +0000 +Subject: [PATCH] system/physmem: Add helper to check whether a guest PA maps + to RAM +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] b1dee5e717 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Introduce cpu_physical_memory_is_ram(), a helper that performs an +address_space translation and returns whether the resolved MemoryRegion is +backed by RAM. + +This will be used by the upcoming Tegra241 CMDQV support to validate +guest provided VCMDQ buffer addresses. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit 86221ddcb4b9c06fa987242efa4f4ffe72c35888) +Signed-off-by: Eric Auger +(cherry picked from commit 948fd36cc725cf89825f609ed74dc2f8f7c24287) +Signed-off-by: Eric Auger +--- + include/exec/cpu-common.h | 2 ++ + system/physmem.c | 12 ++++++++++++ + 2 files changed, 14 insertions(+) + +diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h +index 7ac061bfcb..89308a2502 100644 +--- a/include/exec/cpu-common.h ++++ b/include/exec/cpu-common.h +@@ -160,6 +160,8 @@ void cpu_flush_icache_range(hwaddr start, hwaddr len); + + typedef int (RAMBlockIterFunc)(RAMBlock *rb, void *opaque); + ++bool cpu_physical_memory_is_ram(hwaddr phys_addr); ++ + int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque); + int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length); + int ram_block_discard_guest_memfd_range(RAMBlock *rb, uint64_t start, +diff --git a/system/physmem.c b/system/physmem.c +index 4a1294f8a0..ccdfed3f25 100644 +--- a/system/physmem.c ++++ b/system/physmem.c +@@ -3781,6 +3781,18 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, + return 0; + } + ++bool cpu_physical_memory_is_ram(hwaddr phys_addr) ++{ ++ MemoryRegion *mr; ++ hwaddr l = 1; ++ ++ RCU_READ_LOCK_GUARD(); ++ mr = address_space_translate(&address_space_memory, phys_addr, &phys_addr, ++ &l, false, MEMTXATTRS_UNSPECIFIED); ++ ++ return memory_region_is_ram(mr); ++} ++ + int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque) + { + RAMBlock *block; diff --git a/0282-hw-arm-tegra241-cmdqv-Add-write-emulation-for-regist.patch b/0282-hw-arm-tegra241-cmdqv-Add-write-emulation-for-regist.patch new file mode 100644 index 0000000..9c4fb8e --- /dev/null +++ b/0282-hw-arm-tegra241-cmdqv-Add-write-emulation-for-regist.patch @@ -0,0 +1,277 @@ +From 46b2dd986297de408b618c31f377dc7cf48cb8a2 Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 8 Dec 2025 15:54:15 +0000 +Subject: [PATCH] hw/arm/tegra241-cmdqv:: Add write emulation for registers +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] b076b7cade (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Conflicts: fixed +../hw/arm/tegra241-cmdqv.c:257:48: error: ‘s_accel->viommu’ is a pointer; did you mean to use ‘->’? + 257 | iommufd_backend_free_id(s_accel->viommu.iommufd, vcmdq->hw_queue_id); + | ^ + | -> +../hw/arm/tegra241-cmdqv.c:262:12: error: assignment to ‘IOMMUFDViommu *’ from incompatible pointer type ‘IOMMUFDViommu **’ [-Wincompatible-pointer-types] + 262 | viommu = &s_accel->viommu; + | + +Introduces write handling for VINTF and VCMDQ MMIO regions, including +status/config updates, queue index tracking, and BASE_L/BASE_H +processing. Writes to VCMDQ BASE_L/BASE_H trigger allocation or +teardown of an IOMMUFD HW queue. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit 4a4bf9c98ade1b8909eb6731875cec8a6565aeee) +Signed-off-by: Eric Auger +(cherry picked from commit 381d101f384e31f8c29a9fe3f927f0ce35b8221e) +Signed-off-by: Eric Auger +--- + hw/arm/tegra241-cmdqv.c | 213 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 213 insertions(+) + +diff --git a/hw/arm/tegra241-cmdqv.c b/hw/arm/tegra241-cmdqv.c +index 83f4e4b2d0..b383c3c8bf 100644 +--- a/hw/arm/tegra241-cmdqv.c ++++ b/hw/arm/tegra241-cmdqv.c +@@ -210,11 +210,158 @@ static uint64_t tegra241_cmdqv_read(void *opaque, hwaddr offset, unsigned size) + } + } + ++/* Note that offset aligns down to 0x1000 */ ++static void tegra241_cmdqv_write_vintf(Tegra241CMDQV *cmdqv, hwaddr offset, ++ uint64_t value, unsigned size) ++{ ++ switch (offset) { ++ case A_VINTF0_CONFIG: ++ /* Strip off HYP_OWN setting from guest kernel */ ++ value &= ~R_VINTF0_CONFIG_HYP_OWN_MASK; ++ ++ cmdqv->vintf_config = value; ++ if (value & R_VINTF0_CONFIG_ENABLE_MASK) { ++ cmdqv->vintf_status |= R_VINTF0_STATUS_ENABLE_OK_MASK; ++ } else { ++ cmdqv->vintf_status &= ~R_VINTF0_STATUS_ENABLE_OK_MASK; ++ } ++ break; ++ default: ++ qemu_log_mask(LOG_UNIMP, "%s unhandled write access at 0x%" PRIx64 "\n", ++ __func__, offset); ++ return; ++ } ++} ++ ++static bool tegra241_cmdqv_setup_vcmdq(Tegra241CMDQV *cmdqv, int index, ++ Error **errp) ++{ ++ SMMUv3State *smmu = cmdqv->smmu; ++ SMMUv3AccelState *s_accel = smmu->s_accel; ++ uint64_t base_mask = (uint64_t)R_VCMDQ0_BASE_L_ADDR_MASK | ++ (uint64_t)R_VCMDQ0_BASE_H_ADDR_MASK << 32; ++ uint64_t addr = cmdqv->vcmdq_base[index] & base_mask; ++ uint64_t log2 = cmdqv->vcmdq_base[index] & R_VCMDQ0_BASE_L_LOG2SIZE_MASK; ++ uint64_t size = 1ULL << (log2 + 4); ++ IOMMUFDHWqueue *vcmdq = cmdqv->vcmdq[index]; ++ IOMMUFDViommu *viommu; ++ IOMMUFDHWqueue *hw_queue; ++ uint32_t hw_queue_id; ++ ++ /* Ignore any invalid address. This may come as part of reset etc */ ++ if (!cpu_physical_memory_is_ram(addr)) { ++ return true; ++ } ++ ++ if (vcmdq) { ++ iommufd_backend_free_id(s_accel->viommu->iommufd, vcmdq->hw_queue_id); ++ cmdqv->vcmdq[index] = NULL; ++ g_free(vcmdq); ++ } ++ ++ viommu = s_accel->viommu; ++ if (!iommufd_backend_alloc_hw_queue(viommu->iommufd, viommu->viommu_id, ++ IOMMU_HW_QUEUE_TYPE_TEGRA241_CMDQV, ++ index, addr, size, &hw_queue_id, ++ errp)) { ++ return false; ++ } ++ hw_queue = g_new(IOMMUFDHWqueue, 1); ++ hw_queue->hw_queue_id = hw_queue_id; ++ hw_queue->viommu = viommu; ++ ++ cmdqv->vcmdq[index] = hw_queue; ++ return true; ++} ++ ++/* Note that offset aligns down to 0x10000 */ ++static void ++tegra241_cmdqv_write_vcmdq(Tegra241CMDQV *cmdqv, hwaddr offset, int index, ++ uint64_t value, unsigned size, Error **errp) ++{ ++ uint32_t *ptr = NULL; ++ uint64_t off; ++ ++ if (cmdqv->vcmdq_page0) { ++ off = (0x80 * index) + (offset - 0x10000); ++ ptr = (uint32_t *)(cmdqv->vcmdq_page0 + off); ++ } ++ ++ switch (offset) { ++ case A_VCMDQ0_CONS_INDX: ++ if (ptr) { ++ *ptr = value; ++ } ++ cmdqv->vcmdq_cons_indx[index] = value; ++ return; ++ case A_VCMDQ0_PROD_INDX: ++ if (ptr) { ++ *ptr = value; ++ } ++ cmdqv->vcmdq_prod_indx[index] = (uint32_t)value; ++ return; ++ case A_VCMDQ0_CONFIG: ++ if (ptr) { ++ *ptr = (uint32_t)value; ++ } else { ++ if (value & R_VCMDQ0_CONFIG_CMDQ_EN_MASK) { ++ cmdqv->vcmdq_status[index] |= R_VCMDQ0_STATUS_CMDQ_EN_OK_MASK; ++ } else { ++ cmdqv->vcmdq_status[index] &= ~R_VCMDQ0_STATUS_CMDQ_EN_OK_MASK; ++ } ++ } ++ cmdqv->vcmdq_config[index] = (uint32_t)value; ++ return; ++ case A_VCMDQ0_GERRORN: ++ if (ptr) { ++ *ptr = (uint32_t)value; ++ } ++ cmdqv->vcmdq_gerrorn[index] = (uint32_t)value; ++ return; ++ case A_VCMDQ0_BASE_L: ++ if (size == 8) { ++ cmdqv->vcmdq_base[index] = value; ++ } else if (size == 4) { ++ cmdqv->vcmdq_base[index] = ++ (cmdqv->vcmdq_base[index] & 0xffffffff00000000ULL) | ++ (value & 0xffffffffULL); ++ } ++ tegra241_cmdqv_setup_vcmdq(cmdqv, index, errp); ++ return; ++ case A_VCMDQ0_BASE_H: ++ cmdqv->vcmdq_base[index] = ++ (cmdqv->vcmdq_base[index] & 0xffffffffULL) | ++ ((uint64_t)value << 32); ++ tegra241_cmdqv_setup_vcmdq(cmdqv, index, errp); ++ return; ++ case A_VCMDQ0_CONS_INDX_BASE_DRAM_L: ++ if (size == 8) { ++ cmdqv->vcmdq_cons_indx_base[index] = value; ++ } else if (size == 4) { ++ cmdqv->vcmdq_cons_indx_base[index] = ++ (cmdqv->vcmdq_cons_indx_base[index] & 0xffffffff00000000ULL) | ++ (value & 0xffffffffULL); ++ } ++ return; ++ case A_VCMDQ0_CONS_INDX_BASE_DRAM_H: ++ cmdqv->vcmdq_cons_indx_base[index] = ++ (cmdqv->vcmdq_cons_indx_base[index] & 0xffffffffULL) | ++ ((uint64_t)value << 32); ++ return; ++ default: ++ qemu_log_mask(LOG_UNIMP, ++ "%s unhandled write access at 0x%" PRIx64 "\n", ++ __func__, offset); ++ return; ++ } ++} ++ + static void tegra241_cmdqv_write(void *opaque, hwaddr offset, uint64_t value, + unsigned size) + { + Tegra241CMDQV *cmdqv = (Tegra241CMDQV *)opaque; + Error *local_err = NULL; ++ int index; + + if (!cmdqv->vcmdq_page0) { + tegra241_cmdqv_init_vcmdq_page0(cmdqv, &local_err); +@@ -223,6 +370,72 @@ static void tegra241_cmdqv_write(void *opaque, hwaddr offset, uint64_t value, + local_err = NULL; + } + } ++ ++ if (offset > TEGRA241_CMDQV_IO_LEN) { ++ qemu_log_mask(LOG_UNIMP, ++ "%s offset 0x%" PRIx64 " off limit (0x50000)\n", __func__, ++ offset); ++ return; ++ } ++ ++ switch (offset) { ++ case A_CONFIG: ++ cmdqv->config = value; ++ if (value & R_CONFIG_CMDQV_EN_MASK) { ++ cmdqv->status |= R_STATUS_CMDQV_ENABLED_MASK; ++ } else { ++ cmdqv->status &= ~R_STATUS_CMDQV_ENABLED_MASK; ++ } ++ break; ++ case A_VI_INT_MASK ... A_VI_INT_MASK_1: ++ cmdqv->vi_int_mask[(offset - A_VI_INT_MASK) / 4] = value; ++ break; ++ case A_CMDQ_ALLOC_MAP_0 ... A_CMDQ_ALLOC_MAP_127: ++ cmdqv->cmdq_alloc_map[(offset - A_CMDQ_ALLOC_MAP_0) / 4] = value; ++ break; ++ case A_VINTF0_CONFIG ... A_VINTF0_LVCMDQ_ERR_MAP_3: ++ tegra241_cmdqv_write_vintf(cmdqv, offset, value, size); ++ break; ++ case A_VI_VCMDQ0_CONS_INDX ... A_VI_VCMDQ127_GERRORN: ++ offset -= 0x20000; ++ QEMU_FALLTHROUGH; ++ case A_VCMDQ0_CONS_INDX ... A_VCMDQ127_GERRORN: ++ /* ++ * Align offset down to 0x10000 while extracting the index: ++ * VCMDQ0_CONS_INDX (0x10000) => 0x10000, 0 ++ * VCMDQ1_CONS_INDX (0x10080) => 0x10000, 1 ++ * VCMDQ2_CONS_INDX (0x10100) => 0x10000, 2 ++ * ... ++ * VCMDQ127_CONS_INDX (0x13f80) => 0x10000, 127 ++ */ ++ index = (offset - 0x10000) / 0x80; ++ tegra241_cmdqv_write_vcmdq(cmdqv, offset - 0x80 * index, index, value, ++ size, &local_err); ++ break; ++ case A_VI_VCMDQ0_BASE_L ... A_VI_VCMDQ127_CONS_INDX_BASE_DRAM_H: ++ offset -= 0x20000; ++ QEMU_FALLTHROUGH; ++ case A_VCMDQ0_BASE_L ... A_VCMDQ127_CONS_INDX_BASE_DRAM_H: ++ /* ++ * Align offset down to 0x20000 while extracting the index: ++ * VCMDQ0_BASE_L (0x20000) => 0x20000, 0 ++ * VCMDQ1_BASE_L (0x20080) => 0x20000, 1 ++ * VCMDQ2_BASE_L (0x20100) => 0x20000, 2 ++ * ... ++ * VCMDQ127_BASE_L (0x23f80) => 0x20000, 127 ++ */ ++ index = (offset - 0x20000) / 0x80; ++ tegra241_cmdqv_write_vcmdq(cmdqv, offset - 0x80 * index, index, value, ++ size, &local_err); ++ break; ++ default: ++ qemu_log_mask(LOG_UNIMP, "%s unhandled write access at 0x%" PRIx64 "\n", ++ __func__, offset); ++ } ++ ++ if (local_err) { ++ error_report_err(local_err); ++ } + } + + static const MemoryRegionOps mmio_cmdqv_ops = { diff --git a/0283-hw-arm-tegra241-cmdqv-Allocate-vEVENTQ-object.patch b/0283-hw-arm-tegra241-cmdqv-Allocate-vEVENTQ-object.patch new file mode 100644 index 0000000..8866b36 --- /dev/null +++ b/0283-hw-arm-tegra241-cmdqv-Allocate-vEVENTQ-object.patch @@ -0,0 +1,121 @@ +From 3d4251540e03bee9c9c3f9f3860cba60be72bf55 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 8 Dec 2025 15:56:25 +0000 +Subject: [PATCH] hw/arm/tegra241-cmdqv: Allocate vEVENTQ object +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] faae60d90c (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Conflicts: contextual conflit in + hw/arm/tegra241-cmdqv.c due to viommu = &s_accel->viommu change + +Allocate a Tegra241 CMDQV type vEVENTQ object so that any host side errors +related to the CMDQV can be received and propagated back to the guest. + +Event read and propagation will be added in a later patch. + +Signed-off-by: Shameer Kolothum +(cherry picked from commit a60c0ef780fb7cfacbb5e429e0a689718128ff77) +Signed-off-by: Eric Auger +(cherry picked from commit 99c731ec38db45c48a51a76d4a25a54f5905f27f) +Signed-off-by: Eric Auger +--- + hw/arm/tegra241-cmdqv.c | 51 +++++++++++++++++++++++++++++++++++++++++ + hw/arm/tegra241-cmdqv.h | 1 + + 2 files changed, 52 insertions(+) + +diff --git a/hw/arm/tegra241-cmdqv.c b/hw/arm/tegra241-cmdqv.c +index b383c3c8bf..21afd41e47 100644 +--- a/hw/arm/tegra241-cmdqv.c ++++ b/hw/arm/tegra241-cmdqv.c +@@ -136,6 +136,52 @@ static uint64_t tegra241_cmdqv_read_vcmdq(Tegra241CMDQV *cmdqv, hwaddr offset, + return 0; + } + } ++ ++static void tegra241_cmdqv_free_veventq(Tegra241CMDQV *cmdqv) ++{ ++ SMMUv3State *smmu = cmdqv->smmu; ++ SMMUv3AccelState *s_accel = smmu->s_accel; ++ IOMMUFDViommu *viommu = &s_accel->viommu; ++ IOMMUFDVeventq *veventq = cmdqv->veventq; ++ ++ if (!veventq) { ++ return; ++ } ++ ++ iommufd_backend_free_id(viommu->iommufd, veventq->veventq_id); ++ g_free(veventq); ++ cmdqv->veventq = NULL; ++} ++ ++static bool tegra241_cmdqv_alloc_veventq(Tegra241CMDQV *cmdqv, Error **errp) ++{ ++ SMMUv3State *smmu = cmdqv->smmu; ++ SMMUv3AccelState *s_accel = smmu->s_accel; ++ IOMMUFDViommu *viommu = &s_accel->viommu; ++ IOMMUFDVeventq *veventq; ++ uint32_t veventq_id; ++ uint32_t veventq_fd; ++ ++ if (cmdqv->veventq) { ++ return true; ++ } ++ ++ if (!iommufd_backend_alloc_veventq(viommu->iommufd, viommu->viommu_id, ++ IOMMU_VEVENTQ_TYPE_TEGRA241_CMDQV, ++ 1 << 16, &veventq_id, &veventq_fd, ++ errp)) { ++ error_append_hint(errp, "Tegra241 CMDQV: failed to alloc veventq"); ++ return false; ++ } ++ ++ veventq = g_new(IOMMUFDVeventq, 1); ++ veventq->veventq_id = veventq_id; ++ veventq->veventq_fd = veventq_fd; ++ veventq->viommu = viommu; ++ cmdqv->veventq = veventq; ++ return true; ++} ++ + static uint64_t tegra241_cmdqv_read(void *opaque, hwaddr offset, unsigned size) + { + Tegra241CMDQV *cmdqv = (Tegra241CMDQV *)opaque; +@@ -259,11 +305,16 @@ static bool tegra241_cmdqv_setup_vcmdq(Tegra241CMDQV *cmdqv, int index, + g_free(vcmdq); + } + ++ if (!tegra241_cmdqv_alloc_veventq(cmdqv, errp)) { ++ return false; ++ } ++ + viommu = s_accel->viommu; + if (!iommufd_backend_alloc_hw_queue(viommu->iommufd, viommu->viommu_id, + IOMMU_HW_QUEUE_TYPE_TEGRA241_CMDQV, + index, addr, size, &hw_queue_id, + errp)) { ++ tegra241_cmdqv_free_veventq(cmdqv); + return false; + } + hw_queue = g_new(IOMMUFDHWqueue, 1); +diff --git a/hw/arm/tegra241-cmdqv.h b/hw/arm/tegra241-cmdqv.h +index 4972e367f6..ba7f2a0b1b 100644 +--- a/hw/arm/tegra241-cmdqv.h ++++ b/hw/arm/tegra241-cmdqv.h +@@ -24,6 +24,7 @@ typedef struct Tegra241CMDQV { + MemoryRegion mmio_vintf_page; + void *vcmdq_page0; + IOMMUFDHWqueue *vcmdq[128]; ++ IOMMUFDVeventq *veventq; + + /* Register Cache */ + uint32_t config; diff --git a/0284-hw-arm-tegra241-cmdqv-Read-and-propagate-Tegra241-CM.patch b/0284-hw-arm-tegra241-cmdqv-Read-and-propagate-Tegra241-CM.patch new file mode 100644 index 0000000..9fb5d64 --- /dev/null +++ b/0284-hw-arm-tegra241-cmdqv-Read-and-propagate-Tegra241-CM.patch @@ -0,0 +1,186 @@ +From 8367c38dfc99f69cc5b853b7a12dca044836f5ff Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Sun, 7 Dec 2025 18:52:35 +0000 +Subject: [PATCH] hw/arm/tegra241-cmdqv: Read and propagate Tegra241 CMDQV + errors +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] e2f8a45037 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC +Conflicts: viommu = &s_accel->viommu change in hw/arm/tegra241-cmdqv.c + +Install an event handler on the CMDQV vEVENTQ fd to read and propagate +host received CMDQV errors to the guest. + +The handler runs in QEMU’s main loop, using a non-blocking fd registered +via qemu_set_fd_handler(). + +Signed-off-by: Shameer Kolothum +(cherry picked from commit 3e7e3eb3d256107a6b3d2e5ed6c724e0a6583b29) +Signed-off-by: Eric Auger +(cherry picked from commit c128e11031eca7077d2a4312b3464f63799488ff) +Signed-off-by: Eric Auger +--- + hw/arm/tegra241-cmdqv.c | 84 ++++++++++++++++++++++++++++++++++++++++- + hw/arm/tegra241-cmdqv.h | 2 + + hw/arm/trace-events | 3 ++ + 3 files changed, 87 insertions(+), 2 deletions(-) + +diff --git a/hw/arm/tegra241-cmdqv.c b/hw/arm/tegra241-cmdqv.c +index 21afd41e47..4d23350a8d 100644 +--- a/hw/arm/tegra241-cmdqv.c ++++ b/hw/arm/tegra241-cmdqv.c +@@ -8,9 +8,12 @@ + */ + + #include "qemu/osdep.h" ++#include "qemu/error-report.h" + #include "qemu/log.h" ++#include "trace.h" + + #include "hw/arm/smmuv3.h" ++#include "hw/irq.h" + #include "smmuv3-accel.h" + #include "tegra241-cmdqv.h" + +@@ -137,11 +140,84 @@ static uint64_t tegra241_cmdqv_read_vcmdq(Tegra241CMDQV *cmdqv, hwaddr offset, + } + } + ++static void tegra241_cmdqv_event_read(void *opaque) ++{ ++ Tegra241CMDQV *cmdqv = opaque; ++ struct { ++ struct iommufd_vevent_header hdr; ++ struct iommu_vevent_tegra241_cmdqv vevent; ++ } buf; ++ ssize_t readsz = sizeof(buf); ++ uint32_t last_seq = cmdqv->last_event_seq; ++ ssize_t bytes; ++ ++ bytes = read(cmdqv->veventq->veventq_fd, &buf, readsz); ++ if (bytes <= 0) { ++ if (errno == EAGAIN || errno == EINTR) { ++ return; ++ } ++ error_report("Tegra241 CMDQV: vEVENTQ: read failed (%s)", ++ strerror(errno)); ++ return; ++ } ++ ++ if (bytes < readsz) { ++ error_report("Tegra241 CMDQV: vEVENTQ: incomplete read (%zd/%zd bytes)", ++ bytes, readsz); ++ return; ++ } ++ ++ if (buf.hdr.flags & IOMMU_VEVENTQ_FLAG_LOST_EVENTS) { ++ error_report("Tegra241 CMDQV: vEVENTQ has lost events"); ++ return; ++ } ++ ++ /* Check sequence in hdr for lost events if any */ ++ if (cmdqv->event_start) { ++ uint32_t expected = (last_seq == INT_MAX) ? 0 : last_seq + 1; ++ ++ if (buf.hdr.sequence != expected) { ++ uint32_t delta; ++ ++ if (buf.hdr.sequence >= last_seq) { ++ delta = buf.hdr.sequence - last_seq; ++ } else { ++ /* Handle wraparound from INT_MAX */ ++ delta = (INT_MAX - last_seq) + buf.hdr.sequence + 1; ++ } ++ error_report("Tegra241 CMDQV: vEVENTQ: detected lost %u event(s)", ++ delta - 1); ++ } ++ } ++ ++ if (buf.vevent.lvcmdq_err_map[0] || buf.vevent.lvcmdq_err_map[1]) { ++ cmdqv->vintf_cmdq_err_map[0] = ++ buf.vevent.lvcmdq_err_map[0] & 0xffffffff; ++ cmdqv->vintf_cmdq_err_map[1] = ++ (buf.vevent.lvcmdq_err_map[0] >> 32) & 0xffffffff; ++ cmdqv->vintf_cmdq_err_map[2] = ++ buf.vevent.lvcmdq_err_map[1] & 0xffffffff; ++ cmdqv->vintf_cmdq_err_map[3] = ++ (buf.vevent.lvcmdq_err_map[1] >> 32) & 0xffffffff; ++ for (int i = 0; i < 4; i++) { ++ cmdqv->cmdq_err_map[i] = cmdqv->vintf_cmdq_err_map[i]; ++ } ++ cmdqv->vi_err_map[0] |= 0x1; ++ qemu_irq_pulse(cmdqv->irq); ++ trace_tegra241_cmdqv_err_map( ++ cmdqv->vintf_cmdq_err_map[3], cmdqv->vintf_cmdq_err_map[2], ++ cmdqv->vintf_cmdq_err_map[1], cmdqv->vintf_cmdq_err_map[0]); ++ } ++ ++ cmdqv->last_event_seq = buf.hdr.sequence; ++ cmdqv->event_start = true; ++} ++ + static void tegra241_cmdqv_free_veventq(Tegra241CMDQV *cmdqv) + { + SMMUv3State *smmu = cmdqv->smmu; + SMMUv3AccelState *s_accel = smmu->s_accel; +- IOMMUFDViommu *viommu = &s_accel->viommu; ++ IOMMUFDViommu *viommu = s_accel->viommu; + IOMMUFDVeventq *veventq = cmdqv->veventq; + + if (!veventq) { +@@ -157,7 +233,7 @@ static bool tegra241_cmdqv_alloc_veventq(Tegra241CMDQV *cmdqv, Error **errp) + { + SMMUv3State *smmu = cmdqv->smmu; + SMMUv3AccelState *s_accel = smmu->s_accel; +- IOMMUFDViommu *viommu = &s_accel->viommu; ++ IOMMUFDViommu *viommu = s_accel->viommu; + IOMMUFDVeventq *veventq; + uint32_t veventq_id; + uint32_t veventq_fd; +@@ -179,6 +255,10 @@ static bool tegra241_cmdqv_alloc_veventq(Tegra241CMDQV *cmdqv, Error **errp) + veventq->veventq_fd = veventq_fd; + veventq->viommu = viommu; + cmdqv->veventq = veventq; ++ ++ /* Set up event handler for veventq fd */ ++ fcntl(veventq_fd, F_SETFL, O_NONBLOCK); ++ qemu_set_fd_handler(veventq_fd, tegra241_cmdqv_event_read, NULL, cmdqv); + return true; + } + +diff --git a/hw/arm/tegra241-cmdqv.h b/hw/arm/tegra241-cmdqv.h +index ba7f2a0b1b..97eaef8a72 100644 +--- a/hw/arm/tegra241-cmdqv.h ++++ b/hw/arm/tegra241-cmdqv.h +@@ -25,6 +25,8 @@ typedef struct Tegra241CMDQV { + void *vcmdq_page0; + IOMMUFDHWqueue *vcmdq[128]; + IOMMUFDVeventq *veventq; ++ uint32_t last_event_seq; ++ bool event_start; + + /* Register Cache */ + uint32_t config; +diff --git a/hw/arm/trace-events b/hw/arm/trace-events +index 3457536fb0..76bda0efef 100644 +--- a/hw/arm/trace-events ++++ b/hw/arm/trace-events +@@ -72,6 +72,9 @@ smmuv3_accel_unset_iommu_device(int devfn, uint32_t devid) "devfn=0x%x (idev dev + smmuv3_accel_translate_ste(uint32_t vsid, uint32_t hwpt_id, uint64_t ste_1, uint64_t ste_0) "vSID=0x%x hwpt_id=0x%x ste=%"PRIx64":%"PRIx64 + smmuv3_accel_install_ste(uint32_t vsid, const char * type, uint32_t hwpt_id) "vSID=0x%x ste type=%s hwpt_id=0x%x" + ++# tegra241-cmdqv ++tegra241_cmdqv_err_map(uint32_t map3, uint32_t map2, uint32_t map1, uint32_t map0) "hw irq received. error (hex) maps: %04X:%04X:%04X:%04X" ++ + # strongarm.c + strongarm_uart_update_parameters(const char *label, int speed, char parity, int data_bits, int stop_bits) "%s speed=%d parity=%c data=%d stop=%d" + strongarm_ssp_read_underrun(void) "SSP rx underrun" diff --git a/0285-hw-arm-tegra241-cmdqv-Add-reset-handler.patch b/0285-hw-arm-tegra241-cmdqv-Add-reset-handler.patch new file mode 100644 index 0000000..1b206b4 --- /dev/null +++ b/0285-hw-arm-tegra241-cmdqv-Add-reset-handler.patch @@ -0,0 +1,209 @@ +From 8975c09670cfbe9da7b54554aa9a31c3b3323b05 Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 8 Dec 2025 16:12:49 +0000 +Subject: [PATCH] hw/arm/tegra241-cmdqv: Add reset handler +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] c5f439a9f6 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC +Conflicts: hw/arm/tegra241-cmdqv.c change related to s_accel->viommu.iommufd + +Introduce a reset handler for the Tegra241 CMDQV and initialize its +register state. + +CMDQV gets initialized early during guest boot, hence the handler verifies +that at least one cold-plugged device is attached to the associated vIOMMU +before proceeding. This is required to retrieve host CMDQV info and +to validate it against the QEMU implementation support. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit 8eca321c00d1a38fb0ebef392baed0f363478faa) +Signed-off-by: Eric Auger +(cherry picked from commit e8beea3e7195759104d81d4c84d602819e0e6e87) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3.c | 1 + + hw/arm/tegra241-cmdqv.c | 105 ++++++++++++++++++++++++++++++++++++++++ + hw/arm/tegra241-cmdqv.h | 7 +++ + hw/arm/trace-events | 1 + + 4 files changed, 114 insertions(+) + +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index bab195d047..4b57ec4e9a 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -1946,6 +1946,7 @@ static void smmu_reset_exit(Object *obj, ResetType type) + + smmuv3_reset(s); + smmuv3_accel_reset(s); ++ tegra241_cmdqv_reset(s); + } + + static bool smmu_validate_property(SMMUv3State *s, Error **errp) +diff --git a/hw/arm/tegra241-cmdqv.c b/hw/arm/tegra241-cmdqv.c +index 4d23350a8d..3b86a348fb 100644 +--- a/hw/arm/tegra241-cmdqv.c ++++ b/hw/arm/tegra241-cmdqv.c +@@ -592,6 +592,111 @@ bool tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + return true; + } + ++static void tegra241_cmdqv_init_regs(SMMUv3State *s, Tegra241CMDQV *cmdqv) ++{ ++ SMMUv3AccelState *s_accel = s->s_accel; ++ uint32_t data_type = IOMMU_HW_INFO_TYPE_TEGRA241_CMDQV; ++ struct iommu_hw_info_tegra241_cmdqv cmdqv_info; ++ SMMUv3AccelDevice *accel_dev; ++ Error *local_err = NULL; ++ uint64_t caps; ++ int i; ++ ++ if (QLIST_EMPTY(&s_accel->device_list)) { ++ error_report("tegra241-cmdqv=on: requires at least one cold-plugged " ++ "vfio-pci device"); ++ goto out_err; ++ } ++ ++ accel_dev = QLIST_FIRST(&s_accel->device_list); ++ if (!iommufd_backend_get_device_info(accel_dev->idev->iommufd, ++ accel_dev->idev->devid, ++ &data_type, &cmdqv_info, ++ sizeof(cmdqv_info), &caps, ++ NULL, &local_err)) { ++ error_append_hint(&local_err, "Failed to get Host CMDQV device info"); ++ error_report_err(local_err); ++ goto out_err; ++ } ++ ++ if (data_type != IOMMU_HW_INFO_TYPE_TEGRA241_CMDQV) { ++ error_report("Wrong data type (%d) from Host CMDQV device info", ++ data_type); ++ goto out_err; ++ } ++ if (cmdqv_info.version != TEGRA241_CMDQV_VERSION) { ++ error_report("Wrong version (%d) from Host CMDQV device info", ++ cmdqv_info.version); ++ goto out_err; ++ } ++ if (cmdqv_info.log2vcmdqs != TEGRA241_CMDQV_NUM_CMDQ_LOG2) { ++ error_report("Wrong num of cmdqs (%d) from Host CMDQV device info", ++ cmdqv_info.version); ++ goto out_err; ++ } ++ if (cmdqv_info.log2vsids != TEGRA241_CMDQV_NUM_SID_PER_VM_LOG2) { ++ error_report("Wrong num of SID per VM (%d) from Host CMDQV device info", ++ cmdqv_info.version); ++ goto out_err; ++ } ++ ++ cmdqv->config = V_CONFIG_RESET; ++ cmdqv->param = ++ FIELD_DP32(cmdqv->param, PARAM, CMDQV_VER, TEGRA241_CMDQV_VERSION); ++ cmdqv->param = FIELD_DP32(cmdqv->param, PARAM, CMDQV_NUM_CMDQ_LOG2, ++ TEGRA241_CMDQV_NUM_CMDQ_LOG2); ++ cmdqv->param = FIELD_DP32(cmdqv->param, PARAM, CMDQV_NUM_SID_PER_VM_LOG2, ++ TEGRA241_CMDQV_NUM_SID_PER_VM_LOG2); ++ trace_tegra241_cmdqv_init_regs(cmdqv->param); ++ cmdqv->status = R_STATUS_CMDQV_ENABLED_MASK; ++ for (i = 0; i < 2; i++) { ++ cmdqv->vi_err_map[i] = 0; ++ cmdqv->vi_int_mask[i] = 0; ++ cmdqv->cmdq_err_map[i] = 0; ++ } ++ cmdqv->vintf_config = 0; ++ cmdqv->vintf_status = 0; ++ for (i = 0; i < 4; i++) { ++ cmdqv->vintf_cmdq_err_map[i] = 0; ++ } ++ for (i = 0; i < 128; i++) { ++ cmdqv->cmdq_alloc_map[i] = 0; ++ cmdqv->vcmdq_cons_indx[i] = 0; ++ cmdqv->vcmdq_prod_indx[i] = 0; ++ cmdqv->vcmdq_config[i] = 0; ++ cmdqv->vcmdq_status[i] = 0; ++ cmdqv->vcmdq_gerror[i] = 0; ++ cmdqv->vcmdq_gerrorn[i] = 0; ++ cmdqv->vcmdq_base[i] = 0; ++ cmdqv->vcmdq_cons_indx_base[i] = 0; ++ } ++ return; ++ ++out_err: ++ exit(1); ++} ++ ++void tegra241_cmdqv_reset(SMMUv3State *s) ++{ ++ SMMUv3AccelState *s_accel = s->s_accel; ++ Tegra241CMDQV *cmdqv = s->cmdqv; ++ int i; ++ ++ if (!s_accel || !cmdqv) { ++ return; ++ } ++ ++ for (i = 127; i >= 0; i--) { ++ if (cmdqv->vcmdq[i]) { ++ iommufd_backend_free_id(s_accel->viommu->iommufd, ++ cmdqv->vcmdq[i]->hw_queue_id); ++ g_free(cmdqv->vcmdq[i]); ++ cmdqv->vcmdq[i] = NULL; ++ } ++ } ++ tegra241_cmdqv_init_regs(s, cmdqv); ++} ++ + void tegra241_cmdqv_init(SMMUv3State *s) + { + SysBusDevice *sbd = SYS_BUS_DEVICE(OBJECT(s)); +diff --git a/hw/arm/tegra241-cmdqv.h b/hw/arm/tegra241-cmdqv.h +index 97eaef8a72..0e8729c0b0 100644 +--- a/hw/arm/tegra241-cmdqv.h ++++ b/hw/arm/tegra241-cmdqv.h +@@ -13,6 +13,9 @@ + #include "hw/registerfields.h" + #include CONFIG_DEVICES + ++#define TEGRA241_CMDQV_VERSION 0x1 ++#define TEGRA241_CMDQV_NUM_CMDQ_LOG2 0x1 ++#define TEGRA241_CMDQV_NUM_SID_PER_VM_LOG2 0x4 + #define TEGRA241_CMDQV_IO_LEN 0x50000 + + typedef struct Tegra241CMDQV { +@@ -314,11 +317,15 @@ A_VINTFi_CONFIG(0) + #ifdef CONFIG_TEGRA241_CMDQV + bool tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + uint32_t *out_viommu_id, Error **errp); ++void tegra241_cmdqv_reset(SMMUv3State *s); + void tegra241_cmdqv_init(SMMUv3State *s); + #else + static inline void tegra241_cmdqv_init(SMMUv3State *s) + { + } ++static inline void tegra241_cmdqv_reset(SMMUv3State *s) ++{ ++} + static inline bool + tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + uint32_t *out_viommu_id, Error **errp) +diff --git a/hw/arm/trace-events b/hw/arm/trace-events +index 76bda0efef..ef495c040c 100644 +--- a/hw/arm/trace-events ++++ b/hw/arm/trace-events +@@ -74,6 +74,7 @@ smmuv3_accel_install_ste(uint32_t vsid, const char * type, uint32_t hwpt_id) "vS + + # tegra241-cmdqv + tegra241_cmdqv_err_map(uint32_t map3, uint32_t map2, uint32_t map1, uint32_t map0) "hw irq received. error (hex) maps: %04X:%04X:%04X:%04X" ++tegra241_cmdqv_init_regs(uint32_t param) "hw info received. param: 0x%04X" + + # strongarm.c + strongarm_uart_update_parameters(const char *label, int speed, char parity, int data_bits, int stop_bits) "%s speed=%d parity=%c data=%d stop=%d" diff --git a/0286-hw-arm-tegra241-cmdqv-Limit-queue-size-based-on-back.patch b/0286-hw-arm-tegra241-cmdqv-Limit-queue-size-based-on-back.patch new file mode 100644 index 0000000..265acdd --- /dev/null +++ b/0286-hw-arm-tegra241-cmdqv-Limit-queue-size-based-on-back.patch @@ -0,0 +1,119 @@ +From 83a5784248b2601c9e91bff50f311bd0e7fe6caf Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 8 Dec 2025 16:15:04 +0000 +Subject: [PATCH] hw/arm/tegra241-cmdqv: Limit queue size based on backend page + size +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 433cff801f (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +CMDQ-V HW reads guest queue memory in its host physical address setup via +IOMUUFD. This requires the guest queue memory isn't only contiguous in +guest PA space but also in host PA space. With Tegra241 CMDQV enabled, we +must only advertise a CMDQV size that the host can safely back with +physically contiguous memory. Allowing a CMDQV larger than the host page +size could cause the hardware to DMA across page boundaries leading to +faults. + +Limit IDR1.CMDQS so the guest cannot configure a CMDQV that exceeds the +host’s contiguous backing. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit 903ebd69cedaaf81f097d3954ecd84207bf8f4e0) +Signed-off-by: Eric Auger +(cherry picked from commit 864c01f6e6a81f041cd95d36d0474b6acfc60bcb) +Signed-off-by: Eric Auger +--- + hw/arm/tegra241-cmdqv.c | 43 +++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 43 insertions(+) + +diff --git a/hw/arm/tegra241-cmdqv.c b/hw/arm/tegra241-cmdqv.c +index 3b86a348fb..2b8b36868f 100644 +--- a/hw/arm/tegra241-cmdqv.c ++++ b/hw/arm/tegra241-cmdqv.c +@@ -11,10 +11,14 @@ + #include "qemu/error-report.h" + #include "qemu/log.h" + #include "trace.h" ++#include + + #include "hw/arm/smmuv3.h" + #include "hw/irq.h" + #include "smmuv3-accel.h" ++#include "smmuv3-internal.h" ++#include "system/ramblock.h" ++#include "exec/ramlist.h" + #include "tegra241-cmdqv.h" + + static bool tegra241_cmdqv_init_vcmdq_page0(Tegra241CMDQV *cmdqv, Error **errp) +@@ -592,6 +596,33 @@ bool tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, + return true; + } + ++static size_t tegra241_cmdqv_min_ram_pagesize(void) ++{ ++ RAMBlock *rb; ++ size_t pg, min_pg = SIZE_MAX; ++ ++ RAMBLOCK_FOREACH(rb) { ++ MemoryRegion *mr = rb->mr; ++ ++ /* Only consider real RAM regions */ ++ if (!mr || !memory_region_is_ram(mr)) { ++ continue; ++ } ++ ++ /* Skip RAM regions that are not backed by a memory-backend */ ++ if (!object_dynamic_cast(mr->owner, TYPE_MEMORY_BACKEND)) { ++ continue; ++ } ++ ++ pg = qemu_ram_pagesize(rb); ++ if (pg && pg < min_pg) { ++ min_pg = pg; ++ } ++ } ++ ++ return (min_pg == SIZE_MAX) ? qemu_real_host_page_size() : min_pg; ++} ++ + static void tegra241_cmdqv_init_regs(SMMUv3State *s, Tegra241CMDQV *cmdqv) + { + SMMUv3AccelState *s_accel = s->s_accel; +@@ -599,7 +630,9 @@ static void tegra241_cmdqv_init_regs(SMMUv3State *s, Tegra241CMDQV *cmdqv) + struct iommu_hw_info_tegra241_cmdqv cmdqv_info; + SMMUv3AccelDevice *accel_dev; + Error *local_err = NULL; ++ size_t pgsize; + uint64_t caps; ++ uint32_t val; + int i; + + if (QLIST_EMPTY(&s_accel->device_list)) { +@@ -670,6 +703,16 @@ static void tegra241_cmdqv_init_regs(SMMUv3State *s, Tegra241CMDQV *cmdqv) + cmdqv->vcmdq_base[i] = 0; + cmdqv->vcmdq_cons_indx_base[i] = 0; + } ++ ++ /* ++ * CMDQ must not cross a physical RAM backend page. Adjust CMDQS so the ++ * queue fits entirely within the smallest backend page size. ++ * FIXME: Migration support requires this to be taken care. ++ */ ++ pgsize = tegra241_cmdqv_min_ram_pagesize(); ++ val = FIELD_EX32(s->idr[1], IDR1, CMDQS); ++ s->idr[1] = FIELD_DP32(s->idr[1], IDR1, CMDQS, MIN(log2(pgsize) - 4, val)); ++ + return; + + out_err: diff --git a/0287-virt-acpi-build-Rename-AcpiIortSMMUv3Dev-to-AcpiSMMU.patch b/0287-virt-acpi-build-Rename-AcpiIortSMMUv3Dev-to-AcpiSMMU.patch new file mode 100644 index 0000000..a488311 --- /dev/null +++ b/0287-virt-acpi-build-Rename-AcpiIortSMMUv3Dev-to-AcpiSMMU.patch @@ -0,0 +1,180 @@ +From 5ec6ff514e4b3e15fd17aab85fa69a083c9a4a2d Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Thu, 4 Dec 2025 21:33:27 +0000 +Subject: [PATCH] virt-acpi-build: Rename AcpiIortSMMUv3Dev to AcpiSMMUv3Dev +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 9e66bfa387 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Conflicts: Contextual conflicts in hw/arm/virt-acpi-build.c + related to sdev init/declaration + +Rename struct AcpiIortSMMUv3Dev to AcpiSMMUv3Dev so that it is not +specific to IORT. Subsequent Tegra241 CMDQV support patch will use the +same struct to build CMDQV DSDT support as well. + +No functional changes intended. + +Signed-off-by: Shameer Kolothum +(cherry picked from commit 6aba5930068cc1549b02cb2ae25bdfae2eca4ca9) +Signed-off-by: Eric Auger +(cherry picked from commit 1db4b93f1f59f0e38f14ff472356a3b990cbb3b3) +Signed-off-by: Eric Auger +--- + hw/arm/virt-acpi-build.c | 36 ++++++++++++++++++------------------ + 1 file changed, 18 insertions(+), 18 deletions(-) + +diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c +index 39b1b55b00..8f18347407 100644 +--- a/hw/arm/virt-acpi-build.c ++++ b/hw/arm/virt-acpi-build.c +@@ -338,7 +338,7 @@ static int iort_idmap_compare(gconstpointer a, gconstpointer b) + return idmap_a->input_base - idmap_b->input_base; + } + +-typedef struct AcpiIortSMMUv3Dev { ++typedef struct AcpiSMMUv3Dev { + int irq; + hwaddr base; + GArray *rc_smmu_idmaps; +@@ -346,16 +346,16 @@ typedef struct AcpiIortSMMUv3Dev { + size_t offset; + bool accel; + bool ats; +-} AcpiIortSMMUv3Dev; ++} AcpiSMMUv3Dev; + + /* +- * Populate the struct AcpiIortSMMUv3Dev for the legacy SMMUv3 and ++ * Populate the struct AcpiSMMUv3Dev for the legacy SMMUv3 and + * return the total number of associated idmaps. + */ + static int populate_smmuv3_legacy_dev(GArray *sdev_blob) + { + VirtMachineState *vms = VIRT_MACHINE(qdev_get_machine()); +- AcpiIortSMMUv3Dev sdev = {0}; ++ AcpiSMMUv3Dev sdev = {0}; + + sdev.rc_smmu_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping)); + object_child_foreach_recursive(object_get_root(), iort_host_bridges, +@@ -375,8 +375,8 @@ static int populate_smmuv3_legacy_dev(GArray *sdev_blob) + + static int smmuv3_dev_idmap_compare(gconstpointer a, gconstpointer b) + { +- AcpiIortSMMUv3Dev *sdev_a = (AcpiIortSMMUv3Dev *)a; +- AcpiIortSMMUv3Dev *sdev_b = (AcpiIortSMMUv3Dev *)b; ++ AcpiSMMUv3Dev *sdev_a = (AcpiSMMUv3Dev *)a; ++ AcpiSMMUv3Dev *sdev_b = (AcpiSMMUv3Dev *)b; + AcpiIortIdMapping *map_a = &g_array_index(sdev_a->rc_smmu_idmaps, + AcpiIortIdMapping, 0); + AcpiIortIdMapping *map_b = &g_array_index(sdev_b->rc_smmu_idmaps, +@@ -387,7 +387,7 @@ static int smmuv3_dev_idmap_compare(gconstpointer a, gconstpointer b) + static int iort_smmuv3_devices(Object *obj, void *opaque) + { + VirtMachineState *vms = VIRT_MACHINE(qdev_get_machine()); +- AcpiIortSMMUv3Dev sdev = {0}; ++ AcpiSMMUv3Dev sdev = {0}; + GArray *sdev_blob = opaque; + AcpiIortIdMapping idmap; + PlatformBusDevice *pbus; +@@ -420,7 +420,7 @@ static int iort_smmuv3_devices(Object *obj, void *opaque) + } + + /* +- * Populate the struct AcpiIortSMMUv3Dev for all SMMUv3 devices and ++ * Populate the struct AcpiSMMUv3Dev for all SMMUv3 devices and + * return the total number of idmaps. + */ + static int populate_smmuv3_dev(GArray *sdev_blob) +@@ -441,10 +441,10 @@ static void create_rc_its_idmaps(GArray *its_idmaps, GArray *smmuv3_devs) + { + AcpiIortIdMapping *idmap; + AcpiIortIdMapping next_range = {0}; +- AcpiIortSMMUv3Dev *sdev; ++ AcpiSMMUv3Dev *sdev; + + for (int i = 0; i < smmuv3_devs->len; i++) { +- sdev = &g_array_index(smmuv3_devs, AcpiIortSMMUv3Dev, i); ++ sdev = &g_array_index(smmuv3_devs, AcpiSMMUv3Dev, i); + /* + * Based on the RID ranges that are directed to the SMMU, determine the + * bypassed RID ranges, i.e., the ones that are directed to the ITS +@@ -478,7 +478,7 @@ static void create_rc_its_idmaps(GArray *its_idmaps, GArray *smmuv3_devs) + static void + build_iort_rmr_nodes(GArray *table_data, GArray *smmuv3_devices, uint32_t *id) + { +- AcpiIortSMMUv3Dev *sdev; ++ AcpiSMMUv3Dev *sdev; + AcpiIortIdMapping *idmap; + int i; + +@@ -486,7 +486,7 @@ build_iort_rmr_nodes(GArray *table_data, GArray *smmuv3_devices, uint32_t *id) + uint16_t rmr_len; + int bdf; + +- sdev = &g_array_index(smmuv3_devices, AcpiIortSMMUv3Dev, i); ++ sdev = &g_array_index(smmuv3_devices, AcpiSMMUv3Dev, i); + if (!sdev->accel) { + continue; + } +@@ -543,13 +543,13 @@ static void + build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + { + int i, nb_nodes, rc_mapping_count; +- AcpiIortSMMUv3Dev *sdev; ++ AcpiSMMUv3Dev *sdev; + size_t node_size; + bool ats_needed = false; + int num_smmus = 0; + uint32_t id = 0; + int rc_smmu_idmaps_len = 0; +- GArray *smmuv3_devs = g_array_new(false, true, sizeof(AcpiIortSMMUv3Dev)); ++ GArray *smmuv3_devs = g_array_new(false, true, sizeof(AcpiSMMUv3Dev)); + GArray *rc_its_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping)); + + AcpiTable table = { .sig = "IORT", .rev = 5, .oem_id = vms->oem_id, +@@ -580,7 +580,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + } + /* Calculate RMR nodes required. One per SMMUv3 with accelerated mode */ + for (i = 0; i < num_smmus; i++) { +- sdev = &g_array_index(smmuv3_devs, AcpiIortSMMUv3Dev, i); ++ sdev = &g_array_index(smmuv3_devs, AcpiSMMUv3Dev, i); + if (sdev->ats) { + ats_needed = true; + } +@@ -619,7 +619,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + } + + for (i = 0; i < num_smmus; i++) { +- sdev = &g_array_index(smmuv3_devs, AcpiIortSMMUv3Dev, i); ++ sdev = &g_array_index(smmuv3_devs, AcpiSMMUv3Dev, i); + int smmu_mapping_count, offset_to_id_array; + int irq = sdev->irq; + +@@ -698,7 +698,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + AcpiIortIdMapping *range; + + for (i = 0; i < num_smmus; i++) { +- sdev = &g_array_index(smmuv3_devs, AcpiIortSMMUv3Dev, i); ++ sdev = &g_array_index(smmuv3_devs, AcpiSMMUv3Dev, i); + + /* + * Map RIDs (input) from RC to SMMUv3 nodes: RC -> SMMUv3. +@@ -741,7 +741,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + acpi_table_end(linker, &table); + g_array_free(rc_its_idmaps, true); + for (i = 0; i < num_smmus; i++) { +- sdev = &g_array_index(smmuv3_devs, AcpiIortSMMUv3Dev, i); ++ sdev = &g_array_index(smmuv3_devs, AcpiSMMUv3Dev, i); + g_array_free(sdev->rc_smmu_idmaps, true); + } + g_array_free(smmuv3_devs, true); diff --git a/0288-hw-arm-virt-acpi-Advertise-Tegra241-CMDQV-nodes-in-D.patch b/0288-hw-arm-virt-acpi-Advertise-Tegra241-CMDQV-nodes-in-D.patch new file mode 100644 index 0000000..aca5ee7 --- /dev/null +++ b/0288-hw-arm-virt-acpi-Advertise-Tegra241-CMDQV-nodes-in-D.patch @@ -0,0 +1,149 @@ +From cc0f8cd370536acfc6a1cffa4fccfb284a6e6c4b Mon Sep 17 00:00:00 2001 +From: Nicolin Chen +Date: Mon, 8 Dec 2025 16:19:09 +0000 +Subject: [PATCH] hw/arm/virt-acpi: Advertise Tegra241 CMDQV nodes in DSDT +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 7f9e900561 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Add ACPI DSDT support for Tegra241 CMDQV when the SMMUv3 instance is +created with tegra241-cmdqv=on. + +Signed-off-by: Nicolin Chen +Signed-off-by: Shameer Kolothum +(cherry picked from commit c97f1a000f460b50006fa60d1c4dc11c6eaffe02) +Signed-off-by: Eric Auger +(cherry picked from commit 193d25e3b612a59b24bf430fc85ce31a894154a7) +Signed-off-by: Eric Auger +--- + hw/arm/trace-events | 1 + + hw/arm/virt-acpi-build.c | 74 ++++++++++++++++++++++++++++++++++++++++ + include/hw/arm/virt.h | 2 ++ + 3 files changed, 77 insertions(+) + +diff --git a/hw/arm/trace-events b/hw/arm/trace-events +index ef495c040c..e7e3ccfe9f 100644 +--- a/hw/arm/trace-events ++++ b/hw/arm/trace-events +@@ -9,6 +9,7 @@ omap1_lpg_led(const char *onoff) "omap1 LPG: LED is %s" + + # virt-acpi-build.c + virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out." ++virt_acpi_dsdt_tegra241_cmdqv(int smmu_id, uint64_t base, uint32_t irq) "DSDT: add cmdqv node for (id=%d), base=0x%" PRIx64 ", irq=%d" + + # smmu-common.c + smmu_add_mr(const char *name) "%s" +diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c +index 8f18347407..4b0891d9a0 100644 +--- a/hw/arm/virt-acpi-build.c ++++ b/hw/arm/virt-acpi-build.c +@@ -1114,6 +1114,78 @@ static void build_fadt_rev6(GArray *table_data, BIOSLinker *linker, + build_fadt(table_data, linker, &fadt, vms->oem_id, vms->oem_table_id); + } + ++static int smmuv3_cmdqv_devices(Object *obj, void *opaque) ++{ ++ VirtMachineState *vms = VIRT_MACHINE(qdev_get_machine()); ++ GArray *sdev_blob = opaque; ++ PlatformBusDevice *pbus; ++ AcpiSMMUv3Dev sdev; ++ SysBusDevice *sbdev; ++ ++ if (!object_dynamic_cast(obj, TYPE_ARM_SMMUV3)) { ++ return 0; ++ } ++ ++ if (!object_property_get_bool(obj, "tegra241-cmdqv", NULL)) { ++ return 0; ++ } ++ ++ pbus = PLATFORM_BUS_DEVICE(vms->platform_bus_dev); ++ sbdev = SYS_BUS_DEVICE(obj); ++ sdev.base = platform_bus_get_mmio_addr(pbus, sbdev, 1); ++ sdev.base += vms->memmap[VIRT_PLATFORM_BUS].base; ++ sdev.irq = platform_bus_get_irqn(pbus, sbdev, NUM_SMMU_IRQS); ++ sdev.irq += vms->irqmap[VIRT_PLATFORM_BUS]; ++ sdev.irq += ARM_SPI_BASE; ++ g_array_append_val(sdev_blob, sdev); ++ return 0; ++} ++ ++static void acpi_dsdt_add_tegra241_cmdqv(Aml *scope, VirtMachineState *vms) ++{ ++ GArray *smmuv3_devs = g_array_new(false, true, sizeof(AcpiSMMUv3Dev)); ++ int i; ++ ++ if (vms->legacy_smmuv3_present) { ++ return; ++ } ++ ++ object_child_foreach_recursive(object_get_root(), smmuv3_cmdqv_devices, ++ smmuv3_devs); ++ ++ for (i = 0; i < smmuv3_devs->len; i++) { ++ uint32_t identifier = i; ++ AcpiSMMUv3Dev *sdev; ++ Aml *dev, *crs, *addr; ++ ++ sdev = &g_array_index(smmuv3_devs, AcpiSMMUv3Dev, i); ++ ++ dev = aml_device("CV%.02u", identifier); ++ aml_append(dev, aml_name_decl("_HID", aml_string("NVDA200C"))); ++ if (vms->its) { ++ identifier++; ++ } ++ aml_append(dev, aml_name_decl("_UID", aml_int(identifier))); ++ aml_append(dev, aml_name_decl("_CCA", aml_int(1))); ++ ++ crs = aml_resource_template(); ++ addr = aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED, ++ AML_CACHEABLE, AML_READ_WRITE, 0x0, sdev->base, ++ sdev->base + TEGRA241_CMDQV_IO_LEN - 0x1, 0x0, ++ TEGRA241_CMDQV_IO_LEN); ++ aml_append(crs, addr); ++ aml_append(crs, aml_interrupt(AML_CONSUMER, AML_EDGE, ++ AML_ACTIVE_HIGH, AML_EXCLUSIVE, ++ (uint32_t *)&sdev->irq, 1)); ++ aml_append(dev, aml_name_decl("_CRS", crs)); ++ ++ aml_append(scope, dev); ++ ++ trace_virt_acpi_dsdt_tegra241_cmdqv(identifier, sdev->base, sdev->irq); ++ } ++ g_array_free(smmuv3_devs, true); ++} ++ + /* DSDT */ + static void + build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) +@@ -1177,6 +1249,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) + acpi_dsdt_add_tpm(scope, vms); + #endif + ++ acpi_dsdt_add_tegra241_cmdqv(scope, vms); ++ + aml_append(dsdt, scope); + + pci0_scope = aml_scope("\\_SB.PCI0"); +diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h +index b6d696e8ce..ecea53b811 100644 +--- a/include/hw/arm/virt.h ++++ b/include/hw/arm/virt.h +@@ -45,6 +45,8 @@ + #define NUM_VIRTIO_TRANSPORTS 32 + #define NUM_SMMU_IRQS 4 + ++#define TEGRA241_CMDQV_IO_LEN 0x50000 ++ + /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */ + #define PVTIME_SIZE_PER_CPU 64 + diff --git a/0289-hw-arm-smmuv3-Add-tegra241-cmdqv-property-for-SMMUv3.patch b/0289-hw-arm-smmuv3-Add-tegra241-cmdqv-property-for-SMMUv3.patch new file mode 100644 index 0000000..908bcbd --- /dev/null +++ b/0289-hw-arm-smmuv3-Add-tegra241-cmdqv-property-for-SMMUv3.patch @@ -0,0 +1,77 @@ +From 5cd4eafa90e5e508b3ebb8620aaeed7ee46bb138 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Mon, 8 Dec 2025 16:31:43 +0000 +Subject: [PATCH] hw/arm/smmuv3: Add tegra241-cmdqv property for SMMUv3 device +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] c1a3592d40 (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Conflicts: hw/arm/smmuv3.c +rebase after ssidsize introduction instead of pasid + +Introduce a “tegra241-cmdqv” property to enable Tegra241 CMDQV +support. This is only enabled for accelerated SMMUv3 devices. + +Signed-off-by: Shameer Kolothum +(cherry picked from commit 2c5dce924daf978cdf2c807a4cc97dad1a9edab6) +Signed-off-by: Eric Auger +(cherry picked from commit 15e2eb2be8d802ef999f3f52995f3ccf3837c189) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index 4b57ec4e9a..39995c9ca2 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -1958,6 +1958,12 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp) + } + #endif + ++#ifndef CONFIG_TEGRA241_CMDQ ++ if (s->tegra241_cmdqv) { ++ error_setg(errp, "tegra241_cmdqv=on support not compiled in"); ++ return false; ++ } ++#endif + if (!s->accel) { + if (!s->ril) { + error_setg(errp, "ril can only be disabled if accel=on"); +@@ -1975,6 +1981,10 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp) + error_setg(errp, "ssidsize can only be set if accel=on"); + return false; + } ++ if (s->tegra241_cmdqv) { ++ error_setg(errp, "tegra241_cmdqv can only be enabled if accel=on"); ++ return false; ++ } + return true; + } + +@@ -2126,6 +2136,7 @@ static const Property smmuv3_properties[] = { + DEFINE_PROP_BOOL("ats", SMMUv3State, ats, false), + DEFINE_PROP_UINT8("oas", SMMUv3State, oas, 44), + DEFINE_PROP_UINT8("ssidsize", SMMUv3State, ssidsize, 0), ++ DEFINE_PROP_BOOL("tegra241-cmdqv", SMMUv3State, tegra241_cmdqv, false), + }; + + static void smmuv3_instance_init(Object *obj) +@@ -2165,6 +2176,8 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data) + "Valid range is 0-20, where 0 disables SubstreamID support. " + "Defaults to 0. A value greater than 0 is required to enable " + "PASID support."); ++ object_class_property_set_description(klass, "tegra241-cmdqv", ++ "Enable/disable Tegra241 CMDQ-Virtualisation support (for accel=on)"); + } + + static int smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu, diff --git a/0290-hw-arm-smmuv3-Correct-TEGRA241_CMDQV-config-name.patch b/0290-hw-arm-smmuv3-Correct-TEGRA241_CMDQV-config-name.patch new file mode 100644 index 0000000..2f1d149 --- /dev/null +++ b/0290-hw-arm-smmuv3-Correct-TEGRA241_CMDQV-config-name.patch @@ -0,0 +1,39 @@ +From 071e875f645c86ee5732b2da3cf4e7a0c6eee718 Mon Sep 17 00:00:00 2001 +From: Shameer Kolothum +Date: Wed, 17 Dec 2025 19:27:13 +0000 +Subject: [PATCH] hw/arm/smmuv3: Correct TEGRA241_CMDQV config name +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Eric Auger +RH-MergeRequest: 459: Accelerated SMMU device for GH GPU passthrough +RH-Jira: VOYAGER-16 VOYAGER-17 VOYAGER-48 VOYAGER-5 +RH-Acked-by: Cédric Le Goater +RH-Commit: [1/174] 42da6e03ff (eauger1/centos-qemu-kvm) + +JIRA: VOYAGER-5 +UPSTREAM: no, RFC + +Signed-off-by: Shameer Kolothum +(cherry picked from commit 491d7f08d3712baede49aa3b4c7ba2b3ff3c3d01) +Signed-off-by: Eric Auger +(cherry picked from commit c609c6e86454aa305ebb8c1a6f41d334a4182548) +Signed-off-by: Eric Auger +--- + hw/arm/smmuv3.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c +index 39995c9ca2..76528e3d8d 100644 +--- a/hw/arm/smmuv3.c ++++ b/hw/arm/smmuv3.c +@@ -1958,7 +1958,7 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp) + } + #endif + +-#ifndef CONFIG_TEGRA241_CMDQ ++#ifndef CONFIG_TEGRA241_CMDQV + if (s->tegra241_cmdqv) { + error_setg(errp, "tegra241_cmdqv=on support not compiled in"); + return false; diff --git a/qemu-kvm.spec b/qemu-kvm.spec index 154ae6d..39ccc15 100644 --- a/qemu-kvm.spec +++ b/qemu-kvm.spec @@ -147,7 +147,7 @@ Release: 12%{?rcrel}%{?dist}%{?cc_suffix} # Epoch because we pushed a qemu-1.0 package. AIUI this can't ever be dropped # Epoch 15 used for RHEL 8 # Epoch 17 used for RHEL 9 (due to release versioning offset in RHEL 8.5) -Epoch: 18 +Epoch: 19 License: GPL-2.0-only AND GPL-2.0-or-later AND CC-BY-3.0 URL: http://www.qemu.org/ ExclusiveArch: x86_64 %{power64} aarch64 s390x riscv64 @@ -166,233 +166,406 @@ Source28: 95-kvm-memlock.conf Source30: kvm-s390x.conf Source31: kvm-x86.conf Source36: README.tests +Patch1: 0001-Initial-redhat-build.patch +Patch2: 0002-Enable-disable-devices-for-RHEL.patch +Patch3: 0003-Machine-type-related-general-changes.patch +Patch4: 0004-meson-temporarily-disable-Wunused-function.patch +Patch5: 0005-Remove-upstream-machine-types-for-aarch64-s390x-and-.patch +Patch6: 0006-Adapt-versioned-machine-type-macros-for-RHEL.patch +Patch7: 0007-Increase-deletion-schedule-to-4-releases.patch +Patch8: 0008-Add-downstream-aarch64-versioned-virt-machine-types.patch +Patch9: 0009-Add-downstream-s390x-versioned-s390-ccw-virtio-machi.patch +Patch10: 0010-Add-downstream-x86_64-versioned-pc-q35-machine-types.patch +Patch11: 0011-Disable-virtio-net-pci-romfile-loading-on-riscv64.patch +Patch12: 0012-Revert-meson-temporarily-disable-Wunused-function.patch +Patch13: 0013-Enable-make-check.patch +Patch14: 0014-vfio-cap-number-of-devices-that-can-be-assigned.patch +Patch15: 0015-Add-support-statement-to-help-output.patch +Patch16: 0016-Use-qemu-kvm-in-documentation-instead-of-qemu-system.patch +Patch17: 0017-qcow2-Deprecation-warning-when-opening-v2-images-rw.patch +Patch18: 0018-file-posix-Define-DM_MPATH_PROBE_PATHS.patch +Patch19: 0019-e1000e-Prevent-crash-from-legacy-interrupt-firing-af.patch +Patch20: 0020-arm-kvm-report-registers-we-failed-to-set.patch +Patch21: 0021-pcie_sriov-make-pcie_sriov_pf_exit-safe-on-non-SR-IO.patch +Patch22: 0022-target-i386-add-compatibility-property-for-arch_capa.patch +Patch23: 0023-target-i386-add-compatibility-property-for-pdcm-feat.patch +Patch24: 0024-qapi-machine-s390x-add-QAPI-event-SCLP_CPI_INFO_AVAI.patch +Patch25: 0025-tests-functional-add-tests-for-SCLP-event-CPI.patch +Patch26: 0026-redhat-Add-new-rhel9.8.0-and-rhel10.2.0-machine-type.patch +Patch27: 0027-vfio-rename-field-to-num_initial_regions.patch +Patch28: 0028-vfio-only-check-region-info-cache-for-initial-region.patch +Patch29: 0029-arm-create-new-rhel-10.2-specific-virt-machine-type.patch +Patch30: 0030-arm-create-new-rhel-9.8-specific-virt-machine-type.patch +Patch31: 0031-x86-create-new-rhel-10.2-specific-pc-q35-machine-typ.patch +Patch32: 0032-x86-create-new-rhel-9.8-specific-pc-q35-machine-type.patch +Patch33: 0033-rh-enable-CONFIG_USB_STORAGE_BOT.patch +Patch34: 0034-io-move-websock-resource-release-to-close-method.patch +Patch35: 0035-io-fix-use-after-free-in-websocket-handshake-code.patch +Patch36: 0036-vfio-Disable-VFIO-migration-with-MultiFD-support.patch +Patch37: 0037-hw-arm-virt-Use-ACPI-PCI-hotplug-by-default-from-10..patch +Patch38: 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0126-vfio-container-set-error-on-cpr-failure.patch +Patch127: 0127-vfio-Report-an-error-when-the-dma_max_mappings-limit.patch +Patch128: 0128-hw-vfio-user-add-x-pci-class-code.patch +Patch129: 0129-vfio-Introduce-helper-vfio_pci_from_vfio_device.patch +Patch130: 0130-vfio-vfio-container-base.h-update-VFIOContainerBase-.patch +Patch131: 0131-vfio-vfio-container.h-update-VFIOContainer-declarati.patch +Patch132: 0132-hw-vfio-cpr-legacy.c-use-QOM-casts-where-appropriate.patch +Patch133: 0133-hw-vfio-container.c-use-QOM-casts-where-appropriate.patch +Patch134: 0134-vfio-spapr.c-use-QOM-casts-where-appropriate.patch +Patch135: 0135-vfio-vfio-container.h-rename-VFIOContainer-bcontaine.patch +Patch136: 0136-vfio-user-container.h-update-VFIOUserContainer-decla.patch +Patch137: 0137-vfio-container.c-use-QOM-casts-where-appropriate.patch +Patch138: 0138-vfio-user-container.h-rename-VFIOUserContainer-bcont.patch +Patch139: 0139-vfio-user-pci.c-update-VFIOUserPCIDevice-declaration.patch +Patch140: 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0154-include-hw-vfio-vfio-container.h-rename-file-to-vfio.patch +Patch155: 0155-include-hw-vfio-vfio-container-base.h-rename-file-to.patch +Patch156: 0156-hw-vfio-container.c-rename-file-to-container-legacy..patch +Patch157: 0157-hw-vfio-container-base.c-rename-file-to-container.c.patch +Patch158: 0158-vfio-iommufd.c-use-QOM-casts-where-appropriate.patch +Patch159: 0159-vfio-cpr-iommufd.c-use-QOM-casts-where-appropriate.patch +Patch160: 0160-vfio-vfio-iommufd.h-rename-VFIOContainer-bcontainer-.patch +Patch161: 0161-vfio-spapr.c-use-QOM-casts-where-appropriate.patch +Patch162: 0162-vfio-spapr.c-rename-VFIOContainer-bcontainer-field-t.patch +Patch163: 0163-vfio-pci.c-rename-vfio_instance_init-to-vfio_pci_ini.patch +Patch164: 0164-vfio-pci.c-rename-vfio_instance_finalize-to-vfio_pci.patch +Patch165: 0165-vfio-pci.c-rename-vfio_pci_dev_class_init-to-vfio_pc.patch +Patch166: 0166-vfio-pci.c-rename-vfio_pci_dev_info-to-vfio_pci_info.patch +Patch167: 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0224-hw-arm-smmuv3-accel-Introduce-smmuv3-accel-device.patch +Patch225: 0225-hw-arm-smmuv3-accel-Initialize-shared-system-address.patch +Patch226: 0226-hw-pci-pci-Move-pci_init_bus_master-after-adding-dev.patch +Patch227: 0227-hw-pci-Export-pci_device_get_iommu_bus_devfn-and-ret.patch +Patch228: 0228-hw-pci-pci-Add-optional-supports_address_space-callb.patch +Patch229: 0229-hw-pci-bridge-pci_expander_bridge-Move-TYPE_PXB_PCIE.patch +Patch230: 0230-hw-arm-smmuv3-accel-Restrict-accelerated-SMMUv3-to-v.patch +Patch231: 0231-hw-pci-Introduce-pci_device_get_viommu_flags.patch +Patch232: 0232-vfio-iommufd-Force-creating-nesting-parent-HWPT.patch +Patch233: 0233-hw-pci-Introduce-pci_device_get_host_iommu_quirks.patch +Patch234: 0234-hw-arm-smmuv3-Implement-get_viommu_cap-callback.patch +Patch235: 0235-hw-arm-smmuv3-common-Define-STE-CD-fields-via-regist.patch +Patch236: 0236-hw-arm-smmuv3-common-Add-NSCFG-bit-definition-for-CD.patch +Patch237: 0237-hw-arm-smmuv3-common-Add-STE-CD-set-helpers-for-repe.patch +Patch238: 0238-hw-arm-smmuv3-accel-Add-set-unset_iommu_device-callb.patch +Patch239: 0239-hw-arm-smmuv3-propagate-smmuv3_cmdq_consume-errors-t.patch +Patch240: 0240-hw-arm-smmuv3-accel-Add-nested-vSTE-install-uninstal.patch +Patch241: 0241-hw-arm-smmuv3-accel-Install-SMMUv3-GBPA-based-hwpt.patch +Patch242: 0242-hw-pci-pci-Introduce-a-callback-to-retrieve-the-MSI-.patch +Patch243: 0243-hw-arm-smmuv3-accel-Implement-get_msi_direct_gpa-cal.patch +Patch244: 0244-hw-arm-virt-Set-msi-gpa-property.patch +Patch245: 0245-hw-arm-smmuv3-accel-Add-support-to-issue-invalidatio.patch +Patch246: 0246-hw-arm-smmuv3-Initialize-ID-registers-early-during-r.patch +Patch247: 0247-hw-arm-smmuv3-accel-Get-host-SMMUv3-hw-info-and-vali.patch +Patch248: 0248-hw-pci-host-gpex-Allow-to-generate-preserve-boot-con.patch +Patch249: 0249-hw-arm-virt-Set-PCI-preserve_config-for-accel-SMMUv3.patch +Patch250: 0250-tests-qtest-bios-tables-test-Prepare-for-IORT-reviso.patch +Patch251: 0251-hw-arm-virt-acpi-build-Add-IORT-RMR-regions-to-handl.patch +Patch252: 0252-tests-qtest-bios-tables-test-Update-IORT-blobs-after.patch +Patch253: 0253-hw-arm-smmuv3-Block-migration-when-accel-is-enabled.patch +Patch254: 0254-hw-arm-smmuv3-Add-accel-property-for-SMMUv3-device.patch +Patch255: 0255-hw-arm-smmuv3-accel-Add-a-property-to-specify-RIL-su.patch +Patch256: 0256-hw-arm-smmuv3-accel-Add-support-for-ATS.patch +Patch257: 0257-hw-arm-smmuv3-accel-Add-property-to-specify-OAS-bits.patch +Patch258: 0258-backends-iommufd-Retrieve-PASID-width-from-iommufd_b.patch +Patch259: 0259-backends-iommufd-Add-get_pasid_info-callback.patch +Patch260: 0260-hw-pci-Add-helper-to-insert-PCIe-extended-capability.patch +Patch261: 0261-hw-pci-Factor-out-common-PASID-capability-initializa.patch +Patch262: 0262-hw-vfio-pci-Synthesize-PASID-capability-for-vfio-pci.patch +Patch263: 0263-hw-arm-smmuv3-accel-Make-SubstreamID-support-configu.patch +Patch264: 0264-backends-iommufd-Introduce-iommufd_backend_alloc_vev.patch +Patch265: 0265-hw-arm-smmuv3-accel-Add-viommu-free-helper.patch +Patch266: 0266-hw-arm-smmuv3-accel-Allocate-vEVENTQ-for-accelerated.patch +Patch267: 0267-hw-arm-smmuv3-Introduce-a-helper-function-for-event-.patch +Patch268: 0268-hw-arm-smmuv3-accel-Read-and-propagate-host-vIOMMU-e.patch +Patch269: 0269-hw-arm-smmuv3-accel-Check-accel-in-smmuv3_accel_allo.patch +Patch270: 0270-backends-iommufd-Update-iommufd_backend_get_device_i.patch +Patch271: 0271-backends-iommufd-Update-iommufd_backend_alloc_viommu.patch +Patch272: 0272-backends-iommufd-Introduce-iommufd_backend_alloc_hw_.patch +Patch273: 0273-backends-iommufd-Introduce-iommufd_backend_viommu_mm.patch +Patch274: 0274-hw-arm-tegra241-cmdqv-Add-initial-Tegra241-CMDQ-Virt.patch +Patch275: 0275-hw-arm-tegra241-cmdqv-Map-VINTF-Page0-into-guest.patch +Patch276: 0276-hw-arm-tegra241-cmdqv-Add-read-emulation-support-for.patch +Patch277: 0277-system-memory-Factor-address_space_is_io-out.patch +Patch278: 0278-target-i386-arch_memory_mapping-Use-address_space_me.patch +Patch279: 0279-hw-s390x-sclp-Use-address_space_memory_is_io-in-sclp.patch +Patch280: 0280-system-physmem-Remove-cpu_physical_memory_is_io.patch +Patch281: 0281-system-physmem-Add-helper-to-check-whether-a-guest-P.patch +Patch282: 0282-hw-arm-tegra241-cmdqv-Add-write-emulation-for-regist.patch +Patch283: 0283-hw-arm-tegra241-cmdqv-Allocate-vEVENTQ-object.patch +Patch284: 0284-hw-arm-tegra241-cmdqv-Read-and-propagate-Tegra241-CM.patch +Patch285: 0285-hw-arm-tegra241-cmdqv-Add-reset-handler.patch +Patch286: 0286-hw-arm-tegra241-cmdqv-Limit-queue-size-based-on-back.patch +Patch287: 0287-virt-acpi-build-Rename-AcpiIortSMMUv3Dev-to-AcpiSMMU.patch +Patch288: 0288-hw-arm-virt-acpi-Advertise-Tegra241-CMDQV-nodes-in-D.patch +Patch289: 0289-hw-arm-smmuv3-Add-tegra241-cmdqv-property-for-SMMUv3.patch +Patch290: 0290-hw-arm-smmuv3-Correct-TEGRA241_CMDQV-config-name.patch -Patch0004: 0004-Initial-redhat-build.patch -Patch0005: 0005-Enable-disable-devices-for-RHEL.patch -Patch0006: 0006-Machine-type-related-general-changes.patch -Patch0007: 0007-meson-temporarily-disable-Wunused-function.patch -Patch0008: 0008-Remove-upstream-machine-types-for-aarch64-s390x-and-.patch -Patch0009: 0009-Adapt-versioned-machine-type-macros-for-RHEL.patch -Patch0010: 0010-Increase-deletion-schedule-to-4-releases.patch -Patch0011: 0011-Add-downstream-aarch64-versioned-virt-machine-types.patch -Patch0012: 0012-Add-downstream-s390x-versioned-s390-ccw-virtio-machi.patch -Patch0013: 0013-Add-downstream-x86_64-versioned-pc-q35-machine-types.patch -Patch0014: 0014-Disable-virtio-net-pci-romfile-loading-on-riscv64.patch -Patch0015: 0015-Revert-meson-temporarily-disable-Wunused-function.patch -Patch0016: 0016-Enable-make-check.patch -Patch0017: 0017-vfio-cap-number-of-devices-that-can-be-assigned.patch -Patch0018: 0018-Add-support-statement-to-help-output.patch -Patch0019: 0019-Use-qemu-kvm-in-documentation-instead-of-qemu-system.patch -Patch0020: 0020-qcow2-Deprecation-warning-when-opening-v2-images-rw.patch -Patch0021: 0021-file-posix-Define-DM_MPATH_PROBE_PATHS.patch # For RHEL-112882 - [DEV Task]: Assertion `core->delayed_causes == 0' failed with e1000e NIC -Patch22: kvm-e1000e-Prevent-crash-from-legacy-interrupt-firing-af.patch # For RHEL-119368 - [rhel10] Backport "arm/kvm: report registers we failed to set" -Patch23: kvm-arm-kvm-report-registers-we-failed-to-set.patch # For RHEL-116443 - qemu crash after hot-unplug disk from the multifunction enabled bus,crash point PCIDevice *vf = dev->exp.sriov_pf.vf[i] -Patch24: kvm-pcie_sriov-make-pcie_sriov_pf_exit-safe-on-non-SR-IO.patch # For RHEL-120253 - Backport fixes for PDCM and ARCH_CAPABILITIES migration incompatibility -Patch25: kvm-target-i386-add-compatibility-property-for-arch_capa.patch # For RHEL-120253 - Backport fixes for PDCM and ARCH_CAPABILITIES migration incompatibility -Patch26: kvm-target-i386-add-compatibility-property-for-pdcm-feat.patch # For RHEL-104009 - [IBM 10.2 FEAT] KVM: Enhance machine type definition to include CPI and PCI passthru capabilities (qemu) # For RHEL-105823 - Add new -rhel10.2.0 machine type to qemu-kvm [s390x] # For RHEL-73008 - [IBM 10.2 FEAT] KVM: Implement Control Program Identification (qemu) -Patch27: kvm-qapi-machine-s390x-add-QAPI-event-SCLP_CPI_INFO_AVAI.patch # For RHEL-104009 - [IBM 10.2 FEAT] KVM: Enhance machine type definition to include CPI and PCI passthru capabilities (qemu) # For RHEL-105823 - Add new -rhel10.2.0 machine type to qemu-kvm [s390x] # For RHEL-73008 - [IBM 10.2 FEAT] KVM: Implement Control Program Identification (qemu) -Patch28: kvm-tests-functional-add-tests-for-SCLP-event-CPI.patch # For RHEL-104009 - [IBM 10.2 FEAT] KVM: Enhance machine type definition to include CPI and PCI passthru capabilities (qemu) # For RHEL-105823 - Add new -rhel10.2.0 machine type to qemu-kvm [s390x] # For RHEL-73008 - [IBM 10.2 FEAT] KVM: Implement Control Program Identification (qemu) -Patch29: kvm-redhat-Add-new-rhel9.8.0-and-rhel10.2.0-machine-type.patch # For RHEL-118810 - [RHEL 10.2] Windows 11 VM fails to boot up with ramfb='on' with QEMU 10.1 -Patch30: kvm-vfio-rename-field-to-num_initial_regions.patch # For RHEL-118810 - [RHEL 10.2] Windows 11 VM fails to boot up with ramfb='on' with QEMU 10.1 -Patch31: kvm-vfio-only-check-region-info-cache-for-initial-region.patch # For RHEL-105826 - Add new -rhel10.2.0 machine type to qemu-kvm [aarch64] # For RHEL-105828 - Add new -rhel10.2.0 machine type to qemu-kvm [x86_64] -Patch32: kvm-arm-create-new-rhel-10.2-specific-virt-machine-type.patch # For RHEL-105826 - Add new -rhel10.2.0 machine type to qemu-kvm [aarch64] # For RHEL-105828 - Add new -rhel10.2.0 machine type to qemu-kvm [x86_64] -Patch33: kvm-arm-create-new-rhel-9.8-specific-virt-machine-type.patch # For RHEL-105826 - Add new -rhel10.2.0 machine type to qemu-kvm [aarch64] # For RHEL-105828 - Add new -rhel10.2.0 machine type to qemu-kvm [x86_64] -Patch34: kvm-x86-create-new-rhel-10.2-specific-pc-q35-machine-typ.patch # For RHEL-105826 - Add new -rhel10.2.0 machine type to qemu-kvm [aarch64] # For RHEL-105828 - Add new -rhel10.2.0 machine type to qemu-kvm [x86_64] -Patch35: kvm-x86-create-new-rhel-9.8-specific-pc-q35-machine-type.patch # For RHEL-101929 - enable 'usb-bot' device for proper support of USB CD-ROM drives via libvirt -Patch36: kvm-rh-enable-CONFIG_USB_STORAGE_BOT.patch # For RHEL-120116 - CVE-2025-11234 qemu-kvm: VNC WebSocket handshake use-after-free [rhel-10.2] -Patch37: kvm-io-move-websock-resource-release-to-close-method.patch # For RHEL-120116 - CVE-2025-11234 qemu-kvm: VNC WebSocket handshake use-after-free [rhel-10.2] -Patch38: kvm-io-fix-use-after-free-in-websocket-handshake-code.patch # For RHEL-126573 - VFIO migration using multifd should be disabled by default -Patch39: kvm-vfio-Disable-VFIO-migration-with-MultiFD-support.patch # For RHEL-67323 - [aarch64] Support ACPI based PCI hotplug on ARM -Patch40: kvm-hw-arm-virt-Use-ACPI-PCI-hotplug-by-default-from-10..patch # For RHEL-73800 - NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1 -Patch41: kvm-hw-arm-smmu-common-Check-SMMU-has-PCIe-Root-Complex-.patch # For RHEL-73800 - NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1 -Patch42: kvm-hw-arm-virt-acpi-build-Re-arrange-SMMUv3-IORT-build.patch # For RHEL-73800 - NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1 -Patch43: kvm-hw-arm-virt-acpi-build-Update-IORT-for-multiple-smmu.patch # For RHEL-73800 - NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1 -Patch44: kvm-hw-arm-virt-Factor-out-common-SMMUV3-dt-bindings-cod.patch # For RHEL-73800 - NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1 -Patch45: kvm-hw-arm-virt-Add-an-SMMU_IO_LEN-macro.patch # For RHEL-73800 - NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1 -Patch46: kvm-hw-pci-Introduce-pci_setup_iommu_per_bus-for-per-bus.patch # For RHEL-73800 - NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1 -Patch47: kvm-hw-arm-virt-Allow-user-creatable-SMMUv3-dev-instanti.patch # For RHEL-73800 - NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1 -Patch48: kvm-qemu-options.hx-Document-the-arm-smmuv3-device.patch # For RHEL-73800 - NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1 -Patch49: kvm-bios-tables-test-Allow-for-smmuv3-test-data.patch # For RHEL-73800 - NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1 -Patch50: kvm-qtest-bios-tables-test-Add-tests-for-legacy-smmuv3-a.patch # For RHEL-73800 - NVIDIA:Grace-Hopper:Backport support for user-creatable nested SMMUv3 - RHEL 10.1 -Patch51: kvm-qtest-bios-tables-test-Update-tables-for-smmuv3-test.patch -Patch52: kvm-qtest-Do-not-run-bios-tables-test-on-aarch64.patch # For RHEL-126708 - [RHEL 10]snp guest fail to boot with hugepage -Patch53: kvm-ram-block-attributes-fix-interaction-with-hugetlb-me.patch # For RHEL-126708 - [RHEL 10]snp guest fail to boot with hugepage -Patch54: kvm-ram-block-attributes-Unify-the-retrieval-of-the-bloc.patch # For RHEL-128085 - VM crashes during boot when virtio device is attached through vfio_ccw -Patch55: kvm-hw-s390x-Fix-a-possible-crash-with-passed-through-vi.patch # For RHEL-130704 - [rhel10] Fix the typo under vfio-pci device's enable-migration option -Patch56: kvm-Fix-the-typo-of-vfio-pci-device-s-enable-migration-o.patch # For RHEL-120115 - The vf nic created using the IGB emulated nic can not obtain ip address -Patch57: kvm-pcie_sriov-Fix-broken-MMIO-accesses-from-SR-IOV-VFs.patch # For RHEL-130478 - Migration from RHEL 10.2 to RHEL 10.1 with virt-rhel10.0.0 machine type fails on Grace -Patch58: kvm-arm-fix-oob-access-in-compat-handling.patch # For RHEL-129540 - Assertion failure on drain with iothread and I/O load -Patch59: kvm-block-backend-Fix-race-when-resuming-queued-requests.patch # For RHEL-121543 - The VM hit io error when do S3-PR integration on the pass-through failover multipath device -Patch60: kvm-file-posix-Handle-suspended-dm-multipath-better-for-.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch61: kvm-accel-Add-Meson-and-config-support-for-MSHV-accelera.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch62: kvm-target-i386-emulate-Allow-instruction-decoding-from-.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch63: kvm-target-i386-mshv-Add-x86-decoder-emu-implementation.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch64: kvm-hw-intc-Generalize-APIC-helper-names-from-kvm_-to-ac.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch65: kvm-include-hw-hyperv-Add-MSHV-ABI-header-definitions.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch66: kvm-linux-headers-linux-Add-mshv.h-headers.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch67: kvm-accel-mshv-Add-accelerator-skeleton.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch68: kvm-accel-mshv-Register-memory-region-listeners.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch69: kvm-accel-mshv-Initialize-VM-partition.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch70: kvm-treewide-rename-qemu_wait_io_event-qemu_wait_io_even.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch71: kvm-accel-mshv-Add-vCPU-creation-and-execution-loop.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch72: kvm-accel-mshv-Add-vCPU-signal-handling.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch73: kvm-target-i386-mshv-Add-CPU-create-and-remove-logic.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch74: kvm-target-i386-mshv-Implement-mshv_store_regs.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch75: kvm-target-i386-mshv-Implement-mshv_get_standard_regs.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch76: kvm-target-i386-mshv-Implement-mshv_get_special_regs.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch77: kvm-target-i386-mshv-Implement-mshv_arch_put_registers.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch78: kvm-target-i386-mshv-Set-local-interrupt-controller-stat.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch79: kvm-target-i386-mshv-Register-CPUID-entries-with-MSHV.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch80: kvm-target-i386-mshv-Register-MSRs-with-MSHV.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch81: kvm-target-i386-mshv-Integrate-x86-instruction-decoder-e.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch82: kvm-target-i386-mshv-Write-MSRs-to-the-hypervisor.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch83: kvm-target-i386-mshv-Implement-mshv_vcpu_run.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch84: kvm-accel-mshv-Handle-overlapping-mem-mappings.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch85: kvm-qapi-accel-Allow-to-query-mshv-capabilities.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch86: kvm-target-i386-mshv-Use-preallocated-page-for-hvcall.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch87: kvm-docs-Add-mshv-to-documentation.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch88: kvm-MAINTAINERS-Add-maintainers-for-mshv-accelerator.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch89: kvm-accel-mshv-initialize-thread-name.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch90: kvm-accel-mshv-use-return-value-of-handle_pio_str_read.patch # For RHEL-134212 - [RHEL10.2] L1VH qemu downstream initial merge RHEL10.2 -Patch91: kvm-monitor-generalize-query-mshv-info-mshv-to-query-acc.patch # For RHEL-110003 - Expose block limits of block nodes in QMP and qemu-img -Patch92: kvm-block-Improve-comments-in-BlockLimits.patch # For RHEL-110003 - Expose block limits of block nodes in QMP and qemu-img -Patch93: kvm-block-Expose-block-limits-for-images-in-QMP.patch # For RHEL-110003 - Expose block limits of block nodes in QMP and qemu-img -Patch94: kvm-qemu-img-info-Optionally-show-block-limits.patch # For RHEL-110003 - Expose block limits of block nodes in QMP and qemu-img -Patch95: kvm-qemu-img-info-Add-cache-mode-option.patch # For RHEL-111853 - [Intel 10.0 FEAT] [SPR] TDX: Virt-QEMU: QEMU Support [rhel-10] -Patch96: kvm-rh-configs-enable-CONFIG_TDX-for-x86_64.patch # For RHEL-108142 - QEMU crashes when stopping source VM during live migration -Patch97: kvm-block-Fix-BDS-use-after-free-during-shutdown.patch # For RHEL-126707 - [qemu, rhel-10] increase default TSEG size -Patch98: kvm-fix-pc_rhel_10_2_compat_len.patch # For RHEL-126707 - [qemu, rhel-10] increase default TSEG size -Patch99: kvm-q35-increase-default-tseg-size.patch # For RHEL-139028 - Intel IOMMU VM freezes: "call_irq_handler: 3.37 No irq handler for vector"[rhel-10.2] -Patch100: kvm-hw-intc-ioapic-Fix-ACCEL_KERNEL_GSI_IRQFD_POSSIBLE-t.patch # For RHEL-111853 - [Intel 10.0 FEAT] [SPR] TDX: Virt-QEMU: QEMU Support [rhel-10] -Patch101: kvm-redhat-allow-5-level-paging-for-TDX-VMs.patch # For RHEL-79118 - [network-storage][rbd][core-dump]installation of guest failed sometimes with multiqueue enabled [rhel10] -Patch102: kvm-rbd-Run-co-BH-CB-in-the-coroutine-s-AioContext.patch # For RHEL-79118 - [network-storage][rbd][core-dump]installation of guest failed sometimes with multiqueue enabled [rhel10] -Patch103: kvm-curl-Fix-coroutine-waking.patch # For RHEL-79118 - [network-storage][rbd][core-dump]installation of guest failed sometimes with multiqueue enabled [rhel10] -Patch104: kvm-block-io-Take-reqs_lock-for-tracked_requests.patch # For RHEL-79118 - [network-storage][rbd][core-dump]installation of guest failed sometimes with multiqueue enabled [rhel10] -Patch105: kvm-qcow2-Re-initialize-lock-in-invalidate_cache.patch # For RHEL-79118 - [network-storage][rbd][core-dump]installation of guest failed sometimes with multiqueue enabled [rhel10] -Patch106: kvm-qcow2-Fix-cache_clean_timer.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch107: kvm-net-bundle-all-offloads-in-a-single-struct.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch108: kvm-linux-headers-deal-with-counted_by-annotation.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch109: kvm-linux-headers-Update-to-Linux-v6.17-rc1.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch110: kvm-virtio-introduce-extended-features-type.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch111: kvm-virtio-serialize-extended-features-state.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch112: kvm-virtio-add-support-for-negotiating-extended-features.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch113: kvm-virtio-pci-implement-support-for-extended-features.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch114: kvm-vhost-add-support-for-negotiating-extended-features.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch115: kvm-qmp-update-virtio-features-map-to-support-extended-f.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch116: kvm-vhost-backend-implement-extended-features-support.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch117: kvm-vhost-net-implement-extended-features-support.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch118: kvm-virtio-net-implement-extended-features-support.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch119: kvm-net-implement-tunnel-probing.patch # For RHEL-143785 - backport support for GSO over UDP tunnel offload -Patch120: kvm-net-implement-UDP-tunnel-features-offloading.patch %if %{have_clang} BuildRequires: clang @@ -1472,6 +1645,22 @@ useradd -r -u 107 -g qemu -G kvm -d / -s /sbin/nologin \ %endif %changelog +* Tue Feb 17 2026 Miroslav Rezanina - 10.1.0-12.el10nv +- Add DMABUF support [VOYAGER-19 VOYAGER-53] +- Accelerated SMMU device for GH GPU passthrough [VOYAGER-5 VOYAGER-16 VOYAGER-17 VOYAGER-48] +- Resolves: VOYAGER-5 + (Backport CMDQV support) +- Resolves: VOYAGER-16 + (Backport HW accelerated nesting support for arm SMMUv3) +- Resolves: VOYAGER-17 + (Backport vEVENTQ support for smmuv3) +- Resolves: VOYAGER-19 + (Backport vfio: Add DMABUF support for PCI BAR regions - qemu-kvm) +- Resolves: VOYAGER-48 + (qemu-kvm coredump when using traditional smmuv3 device without any GPU device) +- Resolves: VOYAGER-53 + (qemu-kvm coredump when hotunplug NIC VF interface without smmuv3) + * Mon Feb 02 2026 Miroslav Rezanina - 10.1.0-12 - kvm-rbd-Run-co-BH-CB-in-the-coroutine-s-AioContext.patch [RHEL-79118] - kvm-curl-Fix-coroutine-waking.patch [RHEL-79118]