diff --git a/kvm-Revert-i386-Add-CPUID-bit-for-PCONFIG.patch b/kvm-Revert-i386-Add-CPUID-bit-for-PCONFIG.patch new file mode 100644 index 0000000..6e0906c --- /dev/null +++ b/kvm-Revert-i386-Add-CPUID-bit-for-PCONFIG.patch @@ -0,0 +1,57 @@ +From da2d528c3cffe22bd1b90b446a045376e4370845 Mon Sep 17 00:00:00 2001 +From: Paolo Bonzini +Date: Sat, 16 Feb 2019 00:00:50 +0000 +Subject: [PATCH 4/4] Revert "i386: Add CPUID bit for PCONFIG" + +RH-Author: Paolo Bonzini +Message-id: <1550275250-41719-4-git-send-email-pbonzini@redhat.com> +Patchwork-id: 84524 +O-Subject: [rhel-av-8.0.0 qemu-kvm PATCH 3/3] Revert "i386: Add CPUID bit for PCONFIG" +Bugzilla: 1661515 +RH-Acked-by: Dr. David Alan Gilbert +RH-Acked-by: Igor Mammedov +RH-Acked-by: Stefano Garzarella + +From: Robert Hoo + +This reverts commit 5131dc433df54b37e8e918d8fba7fe10344e7a7b. +For new instruction 'PCONFIG' will not be exposed to guest. + +Signed-off-by: Robert Hoo +Message-Id: <1545227081-213696-3-git-send-email-robert.hu@linux.intel.com> +Signed-off-by: Paolo Bonzini +(cherry picked from commit 712f807e1965c8f1f1da5bbec2b92a8c540e6631) +Signed-off-by: Danilo C. L. de Paula +--- + target/i386/cpu.c | 2 +- + target/i386/cpu.h | 1 - + 2 files changed, 1 insertion(+), 2 deletions(-) + +diff --git a/target/i386/cpu.c b/target/i386/cpu.c +index 169a2ce..d990070 100644 +--- a/target/i386/cpu.c ++++ b/target/i386/cpu.c +@@ -1077,7 +1077,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, +- NULL, NULL, "pconfig", NULL, ++ NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, "spec-ctrl", NULL, + NULL, "arch-capabilities", NULL, "ssbd", +diff --git a/target/i386/cpu.h b/target/i386/cpu.h +index dd88151..26412f1 100644 +--- a/target/i386/cpu.h ++++ b/target/i386/cpu.h +@@ -692,7 +692,6 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; + + #define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */ + #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */ +-#define CPUID_7_0_EDX_PCONFIG (1U << 18) /* Platform Configuration */ + #define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */ + #define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29) /*Arch Capabilities*/ + #define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass Disable */ +-- +1.8.3.1 + diff --git a/kvm-i386-remove-the-INTEL_PT-CPUID-bit-from-named-CPU-mo.patch b/kvm-i386-remove-the-INTEL_PT-CPUID-bit-from-named-CPU-mo.patch new file mode 100644 index 0000000..2370ef4 --- /dev/null +++ b/kvm-i386-remove-the-INTEL_PT-CPUID-bit-from-named-CPU-mo.patch @@ -0,0 +1,64 @@ +From adf78309059e3346dddac518601f88f348ec7758 Mon Sep 17 00:00:00 2001 +From: Paolo Bonzini +Date: Sat, 16 Feb 2019 00:00:49 +0000 +Subject: [PATCH 3/4] i386: remove the 'INTEL_PT' CPUID bit from named CPU + models + +RH-Author: Paolo Bonzini +Message-id: <1550275250-41719-3-git-send-email-pbonzini@redhat.com> +Patchwork-id: 84522 +O-Subject: [rhel-av-8.0.0 qemu-kvm PATCH 2/3] i386: remove the 'INTEL_PT' CPUID bit from named CPU models +Bugzilla: 1661515 +RH-Acked-by: Dr. David Alan Gilbert +RH-Acked-by: Igor Mammedov +RH-Acked-by: Stefano Garzarella + +Processor tracing is not yet implemented for KVM and it will be an +opt in feature requiring a special module parameter. +Disable it, because it is wrong to enable it by default and +it is impossible that no one has ever used it. + +Cc: qemu-stable@nongnu.org +Signed-off-by: Paolo Bonzini +(cherry picked from commit 4c257911dcc7c4189768e9651755c849ce9db4e8) +Signed-off-by: Danilo C. L. de Paula +--- + target/i386/cpu.c | 8 +++----- + 1 file changed, 3 insertions(+), 5 deletions(-) + +diff --git a/target/i386/cpu.c b/target/i386/cpu.c +index 7b63900..169a2ce 100644 +--- a/target/i386/cpu.c ++++ b/target/i386/cpu.c +@@ -2555,8 +2555,7 @@ static X86CPUDefinition builtin_x86_defs[] = { + CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB | + CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ | + CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD | +- CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT | +- CPUID_7_0_EBX_INTEL_PT, ++ CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT, + .features[FEAT_7_0_ECX] = + CPUID_7_0_ECX_PKU | CPUID_7_0_ECX_OSPKE | + CPUID_7_0_ECX_AVX512VNNI, +@@ -2608,7 +2607,7 @@ static X86CPUDefinition builtin_x86_defs[] = { + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | +- CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_INTEL_PT, ++ CPUID_7_0_EBX_SMAP, + .features[FEAT_7_0_ECX] = + CPUID_7_0_ECX_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX_PKU | + CPUID_7_0_ECX_OSPKE | CPUID_7_0_ECX_VBMI2 | CPUID_7_0_ECX_GFNI | +@@ -2666,8 +2665,7 @@ static X86CPUDefinition builtin_x86_defs[] = { + CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB | + CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ | + CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD | +- CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT | +- CPUID_7_0_EBX_INTEL_PT, ++ CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT, + .features[FEAT_7_0_ECX] = + CPUID_7_0_ECX_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX_PKU | + CPUID_7_0_ECX_OSPKE | CPUID_7_0_ECX_VBMI2 | CPUID_7_0_ECX_GFNI | +-- +1.8.3.1 + diff --git a/kvm-i386-remove-the-new-CPUID-PCONFIG-from-Icelake-Serve.patch b/kvm-i386-remove-the-new-CPUID-PCONFIG-from-Icelake-Serve.patch new file mode 100644 index 0000000..dc9dee0 --- /dev/null +++ b/kvm-i386-remove-the-new-CPUID-PCONFIG-from-Icelake-Serve.patch @@ -0,0 +1,48 @@ +From 9fc28ea52c88d603e85fa806a708b53b373f511e Mon Sep 17 00:00:00 2001 +From: Paolo Bonzini +Date: Sat, 16 Feb 2019 00:00:48 +0000 +Subject: [PATCH 2/4] i386: remove the new CPUID 'PCONFIG' from Icelake-Server + CPU model + +RH-Author: Paolo Bonzini +Message-id: <1550275250-41719-2-git-send-email-pbonzini@redhat.com> +Patchwork-id: 84526 +O-Subject: [rhel-av-8.0.0 qemu-kvm PATCH 1/3] i386: remove the new CPUID 'PCONFIG' from Icelake-Server CPU model +Bugzilla: 1661515 +RH-Acked-by: Dr. David Alan Gilbert +RH-Acked-by: Igor Mammedov +RH-Acked-by: Stefano Garzarella + +From: Robert Hoo + +PCONFIG is not available to guests; it must be specifically enabled +using the PCONFIG_ENABLE execution control. Disable it, because +no one can ever use it. + +Signed-off-by: Robert Hoo +Message-Id: <1545227081-213696-2-git-send-email-robert.hu@linux.intel.com> +Cc: qemu-stable@nongnu.org +Signed-off-by: Paolo Bonzini +(cherry picked from commit 76e5a4d58357b9d077afccf7f7c82e17f733b722) +Signed-off-by: Danilo C. L. de Paula +--- + target/i386/cpu.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/target/i386/cpu.c b/target/i386/cpu.c +index dbcf632..7b63900 100644 +--- a/target/i386/cpu.c ++++ b/target/i386/cpu.c +@@ -2675,8 +2675,7 @@ static X86CPUDefinition builtin_x86_defs[] = { + CPUID_7_0_ECX_AVX512VNNI | CPUID_7_0_ECX_AVX512BITALG | + CPUID_7_0_ECX_AVX512_VPOPCNTDQ | CPUID_7_0_ECX_LA57, + .features[FEAT_7_0_EDX] = +- CPUID_7_0_EDX_PCONFIG | CPUID_7_0_EDX_SPEC_CTRL | +- CPUID_7_0_EDX_SPEC_CTRL_SSBD, ++ CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD, + /* Missing: XSAVES (not supported by some Linux versions, + * including v4.1 to v4.12). + * KVM doesn't yet expose any XSAVES state save component, +-- +1.8.3.1 + diff --git a/kvm-target-i386-Disable-MPX-support-on-named-CPU-models.patch b/kvm-target-i386-Disable-MPX-support-on-named-CPU-models.patch new file mode 100644 index 0000000..03d72b1 --- /dev/null +++ b/kvm-target-i386-Disable-MPX-support-on-named-CPU-models.patch @@ -0,0 +1,153 @@ +From 18cf0d751c615e83243e13f3170508289cd78457 Mon Sep 17 00:00:00 2001 +From: Paolo Bonzini +Date: Sat, 16 Feb 2019 00:01:45 +0000 +Subject: [PATCH 1/4] target/i386: Disable MPX support on named CPU models +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Paolo Bonzini +Message-id: <1550275305-42020-1-git-send-email-pbonzini@redhat.com> +Patchwork-id: 84525 +O-Subject: [rhel-av-8.0.0 qemu-kvm PATCH] target/i386: Disable MPX support on named CPU models +Bugzilla: 1661030 +RH-Acked-by: Dr. David Alan Gilbert +RH-Acked-by: Igor Mammedov +RH-Acked-by: Stefano Garzarella + +Bugzilla: 1661030 + +Brew build: http://brewweb.devel.redhat.com/brew/taskinfo?taskID=20232369 + +MPX support is being phased out by Intel; GCC has dropped it, Linux +is also going to do that. Even though KVM will have special code +to support MPX after the kernel proper stops enabling it in XCR0, +we probably also want to deprecate that in a few years. As a start, +do not enable it by default for any named CPU model starting with +the 4.0 machine types; this include Skylake, Icelake and Cascadelake. + +Signed-off-by: Paolo Bonzini +Message-Id: <20181220121100.21554-1-pbonzini@redhat.com> +Reviewed-by:   Wainer dos Santos Moschetta +Signed-off-by: Eduardo Habkost +(cherry picked from commit ecb85fe48cacb2f8740186e81f2f38a2e02bd963) +Signed-off-by: Danilo C. L. de Paula + +Conflicts: + hw/i386/pc.c [old-style global properties] + +Signed-off-by: Danilo C. L. de Paula +--- + include/hw/i386/pc.h | 28 ++++++++++++++++++++++++++++ + target/i386/cpu.c | 14 +++++++------- + 2 files changed, 35 insertions(+), 7 deletions(-) + +diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h +index 426a975..782d728 100644 +--- a/include/hw/i386/pc.h ++++ b/include/hw/i386/pc.h +@@ -1022,6 +1022,34 @@ extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); + .driver = TYPE_X86_CPU,\ + .property = "x-migrate-smi-count",\ + .value = "off",\ ++ },{ /* PC_RHEL7_6_COMPAT from pc_compat_3_1 */ \ ++ .driver = "Skylake-Client" "-" TYPE_X86_CPU,\ ++ .property = "mpx",\ ++ .value = "on",\ ++ },{ /* PC_RHEL7_6_COMPAT from pc_compat_3_1 */ \ ++ .driver = "Skylake-Client-IBRS" "-" TYPE_X86_CPU,\ ++ .property = "mpx",\ ++ .value = "on",\ ++ },{ /* PC_RHEL7_6_COMPAT from pc_compat_3_1 */ \ ++ .driver = "Skylake-Server" "-" TYPE_X86_CPU,\ ++ .property = "mpx",\ ++ .value = "on",\ ++ },{ /* PC_RHEL7_6_COMPAT from pc_compat_3_1 */ \ ++ .driver = "Skylake-Server-IBRS" "-" TYPE_X86_CPU,\ ++ .property = "mpx",\ ++ .value = "on",\ ++ },{ /* PC_RHEL7_6_COMPAT from pc_compat_3_1 */ \ ++ .driver = "Cascadelake-Server" "-" TYPE_X86_CPU,\ ++ .property = "mpx",\ ++ .value = "on",\ ++ },{ /* PC_RHEL7_6_COMPAT from pc_compat_3_1 */ \ ++ .driver = "Icelake-Client" "-" TYPE_X86_CPU,\ ++ .property = "mpx",\ ++ .value = "on",\ ++ },{ /* PC_RHEL7_6_COMPAT from pc_compat_3_1 */ \ ++ .driver = "Icelake-Server" "-" TYPE_X86_CPU,\ ++ .property = "mpx",\ ++ .value = "on",\ + }, + + /* Similar to PC_COMPAT_2_11 + PC_COMPAT_2_10, but: +diff --git a/target/i386/cpu.c b/target/i386/cpu.c +index 8570b25..dbcf632 100644 +--- a/target/i386/cpu.c ++++ b/target/i386/cpu.c +@@ -2358,7 +2358,7 @@ static X86CPUDefinition builtin_x86_defs[] = { + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | +- CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX, ++ CPUID_7_0_EBX_SMAP, + /* Missing: XSAVES (not supported by some Linux versions, + * including v4.1 to v4.12). + * KVM doesn't yet expose any XSAVES state save component, +@@ -2405,7 +2405,7 @@ static X86CPUDefinition builtin_x86_defs[] = { + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | +- CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX, ++ CPUID_7_0_EBX_SMAP, + /* Missing: XSAVES (not supported by some Linux versions, + * including v4.1 to v4.12). + * KVM doesn't yet expose any XSAVES state save component, +@@ -2450,7 +2450,7 @@ static X86CPUDefinition builtin_x86_defs[] = { + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | +- CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_CLWB | ++ CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB | + CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ | + CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD | + CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT, +@@ -2502,7 +2502,7 @@ static X86CPUDefinition builtin_x86_defs[] = { + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | +- CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_CLWB | ++ CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB | + CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ | + CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD | + CPUID_7_0_EBX_AVX512VL, +@@ -2552,7 +2552,7 @@ static X86CPUDefinition builtin_x86_defs[] = { + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | +- CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_CLWB | ++ CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB | + CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ | + CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD | + CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT | +@@ -2608,7 +2608,7 @@ static X86CPUDefinition builtin_x86_defs[] = { + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | +- CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_INTEL_PT, ++ CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_INTEL_PT, + .features[FEAT_7_0_ECX] = + CPUID_7_0_ECX_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX_PKU | + CPUID_7_0_ECX_OSPKE | CPUID_7_0_ECX_VBMI2 | CPUID_7_0_ECX_GFNI | +@@ -2663,7 +2663,7 @@ static X86CPUDefinition builtin_x86_defs[] = { + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | +- CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_CLWB | ++ CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB | + CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ | + CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD | + CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT | +-- +1.8.3.1 + diff --git a/qemu-kvm.spec b/qemu-kvm.spec index ca5bb95..5a43298 100644 --- a/qemu-kvm.spec +++ b/qemu-kvm.spec @@ -68,7 +68,7 @@ Obsoletes: %1-rhev Summary: QEMU is a machine emulator and virtualizer Name: qemu-kvm Version: 3.1.0 -Release: 17%{?dist} +Release: 18%{?dist} # Epoch because we pushed a qemu-1.0 package. AIUI this can't ever be dropped Epoch: 15 License: GPLv2 and GPLv2+ and CC-BY @@ -208,6 +208,14 @@ Patch60: kvm-fdc-Revert-downstream-disablement-of-device-floppy.patch Patch61: kvm-fdc-Restrict-floppy-controllers-to-RHEL-7-machine-ty.patch # For bz#1678968 - -blockdev: auto-read-only is ineffective for drivers on read-only whitelist Patch62: kvm-block-Apply-auto-read-only-for-ro-whitelist-drivers.patch +# For bz#1661030 - Remove MPX support from 8.0 machine types +Patch63: kvm-target-i386-Disable-MPX-support-on-named-CPU-models.patch +# For bz#1661515 - Remove PCONFIG and INTEL_PT from Icelake-* CPU models +Patch64: kvm-i386-remove-the-new-CPUID-PCONFIG-from-Icelake-Serve.patch +# For bz#1661515 - Remove PCONFIG and INTEL_PT from Icelake-* CPU models +Patch65: kvm-i386-remove-the-INTEL_PT-CPUID-bit-from-named-CPU-mo.patch +# For bz#1661515 - Remove PCONFIG and INTEL_PT from Icelake-* CPU models +Patch66: kvm-Revert-i386-Add-CPUID-bit-for-PCONFIG.patch BuildRequires: zlib-devel BuildRequires: glib2-devel @@ -1100,6 +1108,16 @@ useradd -r -u 107 -g qemu -G kvm -d / -s /sbin/nologin \ %changelog +* Tue Feb 26 2019 Danilo Cesar Lemes de Paula - 3.1.0-18.el8 +- kvm-target-i386-Disable-MPX-support-on-named-CPU-models.patch [bz#1661030] +- kvm-i386-remove-the-new-CPUID-PCONFIG-from-Icelake-Serve.patch [bz#1661515] +- kvm-i386-remove-the-INTEL_PT-CPUID-bit-from-named-CPU-mo.patch [bz#1661515] +- kvm-Revert-i386-Add-CPUID-bit-for-PCONFIG.patch [bz#1661515] +- Resolves: bz#1661030 + (Remove MPX support from 8.0 machine types) +- Resolves: bz#1661515 + (Remove PCONFIG and INTEL_PT from Icelake-* CPU models) + * Tue Feb 26 2019 Danilo Cesar Lemes de Paula - 3.1.0-17.el8 - kvm-block-Apply-auto-read-only-for-ro-whitelist-drivers.patch [bz#1678968] - Resolves: bz#1678968