diff --git a/kvm-docs-specs-tpm-document-PPI-support-on-ARM64-virt.patch b/kvm-docs-specs-tpm-document-PPI-support-on-ARM64-virt.patch new file mode 100644 index 0000000..e1d574b --- /dev/null +++ b/kvm-docs-specs-tpm-document-PPI-support-on-ARM64-virt.patch @@ -0,0 +1,74 @@ +From 5386583d1150ea010b4e7c57d6ff23b2eb4582ea Mon Sep 17 00:00:00 2001 +From: Mohammadfaiz Bawa +Date: Thu, 7 May 2026 15:36:58 +0530 +Subject: [PATCH 7/9] docs/specs/tpm: document PPI support on ARM64 virt +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Mohammadfaiz Bawa +RH-MergeRequest: 485: hw/tpm: add PPI support to tpm-tis-device for ARM64 virt +RH-Jira: RHEL-112608 +RH-Acked-by: Gavin Shan +RH-Acked-by: Eric Auger +RH-Commit: [6/8] f9c4890c23d5b26789da5a95a2e5075924e0b416 (faizb/qemu-kvm) + +JIRA: https://redhat.atlassian.net/browse/RHEL-112608 + +Document that tpm-tis-device on the ARM virt machine supports PPI +with dynamically allocated MMIO via the platform bus, unlike x86 +where PPI is at the fixed address 0xFED45000. + +Also add hw/arm/virt-acpi-build.c and hw/acpi/tpm.c to the list +of files related to TPM ACPI tables. + +Reviewed-by: Stefan Berger +Signed-off-by: Mohammadfaiz Bawa +Message-ID: <20260327173209.148180-2-mbawa@redhat.com> +Signed-off-by: Philippe Mathieu-Daudé +(cherry picked from commit ffdd1949a159502d4e85d76e27b51020929a9d1c) +Signed-off-by: Mohammadfaiz Bawa +--- + docs/specs/tpm.rst | 24 ++++++++++++++++++++++++ + 1 file changed, 24 insertions(+) + +diff --git a/docs/specs/tpm.rst b/docs/specs/tpm.rst +index b630a351b4..ba2b0d7267 100644 +--- a/docs/specs/tpm.rst ++++ b/docs/specs/tpm.rst +@@ -187,8 +187,32 @@ The location of the table is given by the fw_cfg ``tpmppi_address`` + field. The PPI memory region size is 0x400 (``TPM_PPI_ADDR_SIZE``) to + leave enough room for future updates. + ++PPI on ARM64 virt ++----------------- ++ ++The ARM virt machine supports PPI for ``tpm-tis-device`` as defined ++in the `PPI specification`_. ++ ++Unlike the x86 TIS device where the PPI memory region is mapped at ++the fixed address ``0xFED45000`` (within the TIS MMIO range), the ++ARM64 sysbus device registers PPI memory as a second MMIO region ++on the platform bus. The platform bus assigns the guest physical ++address dynamically at device plug time. The ACPI ``_DSM`` method ++and PPI operation regions reference this dynamically resolved ++address. ++ ++PPI is controlled by the ``ppi`` property (default ``on``):: ++ ++ -device tpm-tis-device,tpmdev=tpm0,ppi=on ++ ++Without PPI, guest operating systems such as Windows 11 ++ARM64 will log errors when attempting to query TPM Physical ++Presence capabilities via the ACPI ``_DSM`` method. ++ + QEMU files related to TPM ACPI tables: + - ``hw/i386/acpi-build.c`` ++ - ``hw/arm/virt-acpi-build.c`` ++ - ``hw/acpi/tpm.c`` + - ``include/hw/acpi/tpm.h`` + + TPM backend devices +-- +2.52.0 + diff --git a/kvm-hw-acpi-tpm-parameterize-PPI-base-address-in-tpm_bui.patch b/kvm-hw-acpi-tpm-parameterize-PPI-base-address-in-tpm_bui.patch new file mode 100644 index 0000000..6d2a7c1 --- /dev/null +++ b/kvm-hw-acpi-tpm-parameterize-PPI-base-address-in-tpm_bui.patch @@ -0,0 +1,130 @@ +From d6915cae3f12625851154ddc936e1ca4ebf4b44a Mon Sep 17 00:00:00 2001 +From: Mohammadfaiz Bawa +Date: Thu, 7 May 2026 15:37:00 +0530 +Subject: [PATCH 8/9] hw/acpi/tpm: parameterize PPI base address in + tpm_build_ppi_acpi +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Mohammadfaiz Bawa +RH-MergeRequest: 485: hw/tpm: add PPI support to tpm-tis-device for ARM64 virt +RH-Jira: RHEL-112608 +RH-Acked-by: Gavin Shan +RH-Acked-by: Eric Auger +RH-Commit: [7/8] c6ee1f0245e11a9768533bab054b96acfff3e366 (faizb/qemu-kvm) + +JIRA: https://redhat.atlassian.net/browse/RHEL-112608 + +Add a ppi_base parameter to tpm_build_ppi_acpi() instead of +hardcoding TPM_PPI_ADDR_BASE. This prepares for ARM64 support where +PPI memory is dynamically allocated by the platform bus and the +address is not known at compile time. + +Update the x86 callers (ISA TIS and CRB) to pass TPM_PPI_ADDR_BASE +explicitly. No behavioral change. + +Reviewed-by: Stefan Berger +Signed-off-by: Mohammadfaiz Bawa +Reviewed-by: Philippe Mathieu-Daudé +Message-ID: <20260327173209.148180-3-mbawa@redhat.com> +Signed-off-by: Philippe Mathieu-Daudé +(cherry picked from commit 859252e13bb5a84bb9d25490168ec37e621ab92a) +Signed-off-by: Mohammadfaiz Bawa +--- + hw/acpi/tpm.c | 8 ++++---- + hw/i386/acpi-build.c | 2 +- + hw/tpm/tpm_tis_isa.c | 2 +- + include/hw/acpi/tpm.h | 3 ++- + 4 files changed, 8 insertions(+), 7 deletions(-) + +diff --git a/hw/acpi/tpm.c b/hw/acpi/tpm.c +index 5fe95f2e3f..e703775984 100644 +--- a/hw/acpi/tpm.c ++++ b/hw/acpi/tpm.c +@@ -20,7 +20,7 @@ + #include "qapi/error.h" + #include "hw/acpi/tpm.h" + +-void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) ++void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev, hwaddr ppi_base) + { + Aml *method, *field, *ifctx, *ifctx2, *ifctx3, *func_mask, + *not_implemented, *pak, *tpm2, *tpm3, *pprm, *pprq, *zero, *one; +@@ -40,7 +40,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) + */ + aml_append(dev, + aml_operation_region("TPP2", AML_SYSTEM_MEMORY, +- aml_int(TPM_PPI_ADDR_BASE + 0x100), ++ aml_int(ppi_base + 0x100), + 0x5A)); + field = aml_field("TPP2", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE); + aml_append(field, aml_named_field("PPIN", 8)); +@@ -56,7 +56,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) + aml_append(dev, + aml_operation_region( + "TPP3", AML_SYSTEM_MEMORY, +- aml_int(TPM_PPI_ADDR_BASE + ++ aml_int(ppi_base + + 0x15a /* movv, docs/specs/tpm.rst */), + 0x1)); + field = aml_field("TPP3", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); +@@ -78,7 +78,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) + + aml_append(method, + aml_operation_region("TPP1", AML_SYSTEM_MEMORY, +- aml_add(aml_int(TPM_PPI_ADDR_BASE), op, NULL), 0x1)); ++ aml_add(aml_int(ppi_base), op, NULL), 0x1)); + field = aml_field("TPP1", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); + aml_append(field, aml_named_field("TPPF", 8)); + aml_append(method, field); +diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c +index f97d7b9f0c..7ad7941aba 100644 +--- a/hw/i386/acpi-build.c ++++ b/hw/i386/acpi-build.c +@@ -1220,7 +1220,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, + aml_append(dev, aml_name_decl("_STA", aml_int(0xf))); + aml_append(dev, aml_name_decl("_UID", aml_int(1))); + +- tpm_build_ppi_acpi(tpm, dev); ++ tpm_build_ppi_acpi(tpm, dev, TPM_PPI_ADDR_BASE); + + aml_append(sb_scope, dev); + } +diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c +index e481c174e1..835006a2f4 100644 +--- a/hw/tpm/tpm_tis_isa.c ++++ b/hw/tpm/tpm_tis_isa.c +@@ -159,7 +159,7 @@ static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, Aml *scope) + */ + /* aml_append(crs, aml_irq_no_flags(isadev->state.irq_num)); */ + aml_append(dev, aml_name_decl("_CRS", crs)); +- tpm_build_ppi_acpi(ti, dev); ++ tpm_build_ppi_acpi(ti, dev, TPM_PPI_ADDR_BASE); + aml_append(scope, dev); + } + +diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h +index 9d0fe6f2f9..798f77592d 100644 +--- a/include/hw/acpi/tpm.h ++++ b/include/hw/acpi/tpm.h +@@ -20,6 +20,7 @@ + #include "hw/registerfields.h" + #include "hw/acpi/aml-build.h" + #include "system/tpm.h" ++#include "exec/hwaddr.h" + + #ifdef CONFIG_TPM + +@@ -250,7 +251,7 @@ REG32(CRB_DATA_BUFFER, 0x80) + */ + #define TPM_I2C_INT_ENABLE_MASK 0x0 + +-void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev); ++void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev, hwaddr ppi_base); + + #endif /* CONFIG_TPM */ + +-- +2.52.0 + diff --git a/kvm-hw-tpm-Add-TPMIfClass-ppi_enabled-field.patch b/kvm-hw-tpm-Add-TPMIfClass-ppi_enabled-field.patch new file mode 100644 index 0000000..3f2473b --- /dev/null +++ b/kvm-hw-tpm-Add-TPMIfClass-ppi_enabled-field.patch @@ -0,0 +1,60 @@ +From 63f69cde15a373b9423f7b57663e6907031e4d4d Mon Sep 17 00:00:00 2001 +From: Mohammadfaiz Bawa +Date: Thu, 7 May 2026 15:36:51 +0530 +Subject: [PATCH 3/9] hw/tpm: Add TPMIfClass::ppi_enabled field +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Mohammadfaiz Bawa +RH-MergeRequest: 485: hw/tpm: add PPI support to tpm-tis-device for ARM64 virt +RH-Jira: RHEL-112608 +RH-Acked-by: Gavin Shan +RH-Acked-by: Eric Auger +RH-Commit: [2/8] 04bf1203950bf118ef75cdfd0954b194fc761359 (faizb/qemu-kvm) + +JIRA: https://redhat.atlassian.net/browse/RHEL-112608 + +Each TPM derived device has a @ppi_enabled field, itself +exposed as a QOM property. External layers (like the ACPI +subsystem) wanting to know whether a device implements PPI +has to check for the QOM property available. This can be +simplified by declaring a single field in the TPM interface. + +Here we add such field to TPMIfClass, before converting each +TPM devices to use it in the following commits. + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Stefan Berger +Message-Id: <20260317120241.16320-3-philmd@linaro.org> +(cherry picked from commit 6f4a9599521a9a2feded3e0eaa000546fc9d9e77) +Signed-off-by: Mohammadfaiz Bawa +--- + include/system/tpm.h | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/include/system/tpm.h b/include/system/tpm.h +index b90dd4e8cb..9458ad6668 100644 +--- a/include/system/tpm.h ++++ b/include/system/tpm.h +@@ -43,6 +43,7 @@ struct TPMIfClass { + enum TpmModel model; + void (*request_completed)(TPMIf *obj, int ret); + enum TPMVersion (*get_version)(TPMIf *obj); ++ bool ppi_enabled; + }; + + #define TYPE_TPM_TIS_ISA "tpm-tis" +@@ -84,6 +85,9 @@ static inline bool tpm_ppi_enabled(TPMIf *ti) + if (!ti) { + return false; + } ++ if (TPM_IF_GET_CLASS(ti)->ppi_enabled) { ++ return true; ++ } + return object_property_get_bool(OBJECT(ti), "ppi", &error_abort); + } + +-- +2.52.0 + diff --git a/kvm-hw-tpm-Factor-tpm_ppi_enabled-out.patch b/kvm-hw-tpm-Factor-tpm_ppi_enabled-out.patch new file mode 100644 index 0000000..a882390 --- /dev/null +++ b/kvm-hw-tpm-Factor-tpm_ppi_enabled-out.patch @@ -0,0 +1,86 @@ +From 90f8689a9e63aa1bc2e5fc1513c1a83dad59b8bb Mon Sep 17 00:00:00 2001 +From: Mohammadfaiz Bawa +Date: Thu, 7 May 2026 15:36:48 +0530 +Subject: [PATCH 2/9] hw/tpm: Factor tpm_ppi_enabled() out +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Mohammadfaiz Bawa +RH-MergeRequest: 485: hw/tpm: add PPI support to tpm-tis-device for ARM64 virt +RH-Jira: RHEL-112608 +RH-Acked-by: Gavin Shan +RH-Acked-by: Eric Auger +RH-Commit: [1/8] cd42765aadffad8c155789613f604ab32ff51b9a (faizb/qemu-kvm) + +JIRA: https://redhat.atlassian.net/browse/RHEL-112608 + +Factor out tpm_ppi_enabled() before modifying it in a unique place. + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Stefan Berger +Message-Id: <20260317120241.16320-2-philmd@linaro.org> +(cherry picked from commit 60ab4a04379632294a57ed1878371bbfba418568) +Signed-off-by: Mohammadfaiz Bawa +--- + hw/acpi/tpm.c | 2 +- + hw/i386/acpi-build.c | 2 +- + include/system/tpm.h | 9 +++++++++ + 3 files changed, 11 insertions(+), 2 deletions(-) + +diff --git a/hw/acpi/tpm.c b/hw/acpi/tpm.c +index cdc0227536..5fe95f2e3f 100644 +--- a/hw/acpi/tpm.c ++++ b/hw/acpi/tpm.c +@@ -25,7 +25,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) + Aml *method, *field, *ifctx, *ifctx2, *ifctx3, *func_mask, + *not_implemented, *pak, *tpm2, *tpm3, *pprm, *pprq, *zero, *one; + +- if (!object_property_get_bool(OBJECT(tpm), "ppi", &error_abort)) { ++ if (!tpm_ppi_enabled(tpm)) { + return; + } + +diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c +index 423c4959fe..f97d7b9f0c 100644 +--- a/hw/i386/acpi-build.c ++++ b/hw/i386/acpi-build.c +@@ -2215,7 +2215,7 @@ void acpi_setup(void) + tables.tcpalog->data, acpi_data_len(tables.tcpalog)); + + tpm = tpm_find(); +- if (tpm && object_property_get_bool(OBJECT(tpm), "ppi", &error_abort)) { ++ if (tpm_ppi_enabled(tpm)) { + tpm_config = (FwCfgTPMConfig) { + .tpmppi_address = cpu_to_le32(TPM_PPI_ADDR_BASE), + .tpm_version = tpm_get_version(tpm), +diff --git a/include/system/tpm.h b/include/system/tpm.h +index 1ee568b3b6..b90dd4e8cb 100644 +--- a/include/system/tpm.h ++++ b/include/system/tpm.h +@@ -13,6 +13,7 @@ + #define QEMU_TPM_H + + #include "qapi/qapi-types-tpm.h" ++#include "qapi/error.h" + #include "qom/object.h" + + #ifdef CONFIG_TPM +@@ -78,6 +79,14 @@ static inline TPMVersion tpm_get_version(TPMIf *ti) + return TPM_IF_GET_CLASS(ti)->get_version(ti); + } + ++static inline bool tpm_ppi_enabled(TPMIf *ti) ++{ ++ if (!ti) { ++ return false; ++ } ++ return object_property_get_bool(OBJECT(ti), "ppi", &error_abort); ++} ++ + #else /* CONFIG_TPM */ + + #define tpm_init() (0) +-- +2.52.0 + diff --git a/kvm-hw-tpm-Propagate-ppi_enabled-to-tpm_tis_reset-and-re.patch b/kvm-hw-tpm-Propagate-ppi_enabled-to-tpm_tis_reset-and-re.patch new file mode 100644 index 0000000..84696ea --- /dev/null +++ b/kvm-hw-tpm-Propagate-ppi_enabled-to-tpm_tis_reset-and-re.patch @@ -0,0 +1,151 @@ +From 1e4ed1782cf15da3b302150d70b8f2b6cd005d10 Mon Sep 17 00:00:00 2001 +From: Mohammadfaiz Bawa +Date: Thu, 7 May 2026 15:36:55 +0530 +Subject: [PATCH 5/9] hw/tpm: Propagate @ppi_enabled to tpm_tis_reset() and + remove in TPMState +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Mohammadfaiz Bawa +RH-MergeRequest: 485: hw/tpm: add PPI support to tpm-tis-device for ARM64 virt +RH-Jira: RHEL-112608 +RH-Acked-by: Gavin Shan +RH-Acked-by: Eric Auger +RH-Commit: [4/8] b49b1b914105cc87d79823c2f97712e81a17983b (faizb/qemu-kvm) + +JIRA: https://redhat.atlassian.net/browse/RHEL-112608 + +Of the TPM devices using FIFO mode, only the ISA variant has +PPI, and calls tpm_ppi_init() to initialize the PPI state. +Propagate @ppi_enabled to tpm_tis_reset() so it only resets +the PPI part when requested (ISA case) otherwise the PPI is in +uninitialized state. Remove the now unused TPMState::ppi_enabled +field. Set the generic TPMIfClass::ppi_enabled so ACPI subsystem +can keep checking its availability. + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Stefan Berger +Message-Id: <20260317120241.16320-5-philmd@linaro.org> +(cherry picked from commit 0a4682368b75bdc584bc3aae99c1fd3f6d735546) +Signed-off-by: Mohammadfaiz Bawa +--- + hw/tpm/tpm_tis.h | 3 +-- + hw/tpm/tpm_tis_common.c | 4 ++-- + hw/tpm/tpm_tis_i2c.c | 2 +- + hw/tpm/tpm_tis_isa.c | 10 ++++------ + hw/tpm/tpm_tis_sysbus.c | 2 +- + 5 files changed, 9 insertions(+), 12 deletions(-) + +diff --git a/hw/tpm/tpm_tis.h b/hw/tpm/tpm_tis.h +index 184632ff66..1531620bf9 100644 +--- a/hw/tpm/tpm_tis.h ++++ b/hw/tpm/tpm_tis.h +@@ -75,7 +75,6 @@ typedef struct TPMState { + + size_t be_buffer_size; + +- bool ppi_enabled; + TPMPPI ppi; + } TPMState; + +@@ -83,7 +82,7 @@ extern const VMStateDescription vmstate_locty; + extern const MemoryRegionOps tpm_tis_memory_ops; + + int tpm_tis_pre_save(TPMState *s); +-void tpm_tis_reset(TPMState *s); ++void tpm_tis_reset(TPMState *s, bool ppi_enabled); + enum TPMVersion tpm_tis_get_tpm_version(TPMState *s); + void tpm_tis_request_completed(TPMState *s, int ret); + uint32_t tpm_tis_read_data(TPMState *s, hwaddr addr, unsigned size); +diff --git a/hw/tpm/tpm_tis_common.c b/hw/tpm/tpm_tis_common.c +index cdd0df1137..bbed8726ae 100644 +--- a/hw/tpm/tpm_tis_common.c ++++ b/hw/tpm/tpm_tis_common.c +@@ -813,7 +813,7 @@ enum TPMVersion tpm_tis_get_tpm_version(TPMState *s) + * This function is called when the machine starts, resets or due to + * S3 resume. + */ +-void tpm_tis_reset(TPMState *s) ++void tpm_tis_reset(TPMState *s, bool ppi_enabled) + { + int c; + +@@ -821,7 +821,7 @@ void tpm_tis_reset(TPMState *s) + s->be_buffer_size = MIN(tpm_backend_get_buffer_size(s->be_driver), + TPM_TIS_BUFFER_MAX); + +- if (s->ppi_enabled) { ++ if (ppi_enabled) { + tpm_ppi_reset(&s->ppi); + } + tpm_backend_reset(s->be_driver); +diff --git a/hw/tpm/tpm_tis_i2c.c b/hw/tpm/tpm_tis_i2c.c +index 5ce84dc7a4..737f288f00 100644 +--- a/hw/tpm/tpm_tis_i2c.c ++++ b/hw/tpm/tpm_tis_i2c.c +@@ -523,7 +523,7 @@ static void tpm_tis_i2c_reset(DeviceState *dev) + i2cst->csum_enable = 0; + i2cst->loc_sel = 0x00; + +- return tpm_tis_reset(s); ++ return tpm_tis_reset(s, false); + } + + static void tpm_tis_i2c_class_init(ObjectClass *klass, const void *data) +diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c +index dce83057a9..e481c174e1 100644 +--- a/hw/tpm/tpm_tis_isa.c ++++ b/hw/tpm/tpm_tis_isa.c +@@ -88,13 +88,12 @@ static void tpm_tis_isa_reset(DeviceState *dev) + TPMStateISA *isadev = TPM_TIS_ISA(dev); + TPMState *s = &isadev->state; + +- return tpm_tis_reset(s); ++ return tpm_tis_reset(s, true); + } + + static const Property tpm_tis_isa_properties[] = { + DEFINE_PROP_UINT32("irq", TPMStateISA, state.irq_num, TPM_TIS_IRQ), + DEFINE_PROP_TPMBE("tpmdev", TPMStateISA, state.be_driver), +- DEFINE_PROP_BOOL("ppi", TPMStateISA, state.ppi_enabled, true), + }; + + static void tpm_tis_isa_initfn(Object *obj) +@@ -132,10 +131,8 @@ static void tpm_tis_isa_realizefn(DeviceState *dev, Error **errp) + memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)), + TPM_TIS_ADDR_BASE, &s->mmio); + +- if (s->ppi_enabled) { +- tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)), +- TPM_PPI_ADDR_BASE, OBJECT(dev)); +- } ++ tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)), ++ TPM_PPI_ADDR_BASE, OBJECT(dev)); + } + + static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, Aml *scope) +@@ -175,6 +172,7 @@ static void tpm_tis_isa_class_init(ObjectClass *klass, const void *data) + device_class_set_props(dc, tpm_tis_isa_properties); + dc->vmsd = &vmstate_tpm_tis_isa; + tc->model = TPM_MODEL_TPM_TIS; ++ tc->ppi_enabled = true; + dc->realize = tpm_tis_isa_realizefn; + device_class_set_legacy_reset(dc, tpm_tis_isa_reset); + tc->request_completed = tpm_tis_isa_request_completed; +diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c +index 2ffa85852a..287380c676 100644 +--- a/hw/tpm/tpm_tis_sysbus.c ++++ b/hw/tpm/tpm_tis_sysbus.c +@@ -87,7 +87,7 @@ static void tpm_tis_sysbus_reset(DeviceState *dev) + TPMStateSysBus *sbdev = TPM_TIS_SYSBUS(dev); + TPMState *s = &sbdev->state; + +- return tpm_tis_reset(s); ++ return tpm_tis_reset(s, false); + } + + static const Property tpm_tis_sysbus_properties[] = { +-- +2.52.0 + diff --git a/kvm-hw-tpm-Remove-CRBState-ppi_enabled-field.patch b/kvm-hw-tpm-Remove-CRBState-ppi_enabled-field.patch new file mode 100644 index 0000000..5425f36 --- /dev/null +++ b/kvm-hw-tpm-Remove-CRBState-ppi_enabled-field.patch @@ -0,0 +1,90 @@ +From 76abf2879263ce6e8c1a08441fc62d88be8d3f58 Mon Sep 17 00:00:00 2001 +From: Mohammadfaiz Bawa +Date: Thu, 7 May 2026 15:36:52 +0530 +Subject: [PATCH 4/9] hw/tpm: Remove CRBState::ppi_enabled field +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Mohammadfaiz Bawa +RH-MergeRequest: 485: hw/tpm: add PPI support to tpm-tis-device for ARM64 virt +RH-Jira: RHEL-112608 +RH-Acked-by: Gavin Shan +RH-Acked-by: Eric Auger +RH-Commit: [3/8] be4e2dfd89f6b5c07f0418c7e339b91b295057ce (faizb/qemu-kvm) + +JIRA: https://redhat.atlassian.net/browse/RHEL-112608 + +The CRBState::ppi_enabled boolean was only set in the +hw_compat_3_1[] array, via the 'ppi=false' property. +We removed all machines using that array, and the array +itself in commit a861ffef237 ("hw/core/machine: Remove +the hw_compat_3_1[] array"). We can safely remove the +now unused property. Since CRB devices always use PPI, +simplify removing the CRBState::ppi_enabled field. +Set the generic TPMIfClass::ppi_enabled so ACPI subsystem +can keep checking its availability. + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Stefan Berger +Message-Id: <20260317120241.16320-4-philmd@linaro.org> +(cherry picked from commit 46427d53eb9551e947242fd10451acc4000c5cac) +Signed-off-by: Mohammadfaiz Bawa +--- + hw/tpm/tpm_crb.c | 13 ++++--------- + 1 file changed, 4 insertions(+), 9 deletions(-) + +diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c +index bc7a78f898..3c4c97eccd 100644 +--- a/hw/tpm/tpm_crb.c ++++ b/hw/tpm/tpm_crb.c +@@ -43,7 +43,6 @@ struct CRBState { + + size_t be_buffer_size; + +- bool ppi_enabled; + TPMPPI ppi; + }; + typedef struct CRBState CRBState; +@@ -228,16 +227,13 @@ static const VMStateDescription vmstate_tpm_crb = { + + static const Property tpm_crb_properties[] = { + DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe), +- DEFINE_PROP_BOOL("ppi", CRBState, ppi_enabled, true), + }; + + static void tpm_crb_reset(void *dev) + { + CRBState *s = CRB(dev); + +- if (s->ppi_enabled) { +- tpm_ppi_reset(&s->ppi); +- } ++ tpm_ppi_reset(&s->ppi); + tpm_backend_reset(s->tpmbe); + + memset(s->regs, 0, sizeof(s->regs)); +@@ -303,10 +299,8 @@ static void tpm_crb_realize(DeviceState *dev, Error **errp) + memory_region_add_subregion(get_system_memory(), + TPM_CRB_ADDR_BASE + sizeof(s->regs), &s->cmdmem); + +- if (s->ppi_enabled) { +- tpm_ppi_init(&s->ppi, get_system_memory(), +- TPM_PPI_ADDR_BASE, OBJECT(s)); +- } ++ tpm_ppi_init(&s->ppi, get_system_memory(), ++ TPM_PPI_ADDR_BASE, OBJECT(s)); + + if (xen_enabled()) { + tpm_crb_reset(dev); +@@ -325,6 +319,7 @@ static void tpm_crb_class_init(ObjectClass *klass, const void *data) + dc->vmsd = &vmstate_tpm_crb; + dc->user_creatable = true; + tc->model = TPM_MODEL_TPM_CRB; ++ tc->ppi_enabled = true; + tc->get_version = tpm_crb_get_version; + tc->request_completed = tpm_crb_request_completed; + +-- +2.52.0 + diff --git a/kvm-hw-tpm-Simplify-tpm_ppi_enabled.patch b/kvm-hw-tpm-Simplify-tpm_ppi_enabled.patch new file mode 100644 index 0000000..4625aed --- /dev/null +++ b/kvm-hw-tpm-Simplify-tpm_ppi_enabled.patch @@ -0,0 +1,56 @@ +From 79d4b64857908d6e54c633c1d81fb9fd36ebb4fa Mon Sep 17 00:00:00 2001 +From: Mohammadfaiz Bawa +Date: Thu, 7 May 2026 15:36:57 +0530 +Subject: [PATCH 6/9] hw/tpm: Simplify tpm_ppi_enabled() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Mohammadfaiz Bawa +RH-MergeRequest: 485: hw/tpm: add PPI support to tpm-tis-device for ARM64 virt +RH-Jira: RHEL-112608 +RH-Acked-by: Gavin Shan +RH-Acked-by: Eric Auger +RH-Commit: [5/8] f8acb6c9d4307caa23c2da28f09212f09c3a0832 (faizb/qemu-kvm) + +JIRA: https://redhat.atlassian.net/browse/RHEL-112608 + +TPM instances don't expose any "ppi" property anymore, +remove that dead code. + +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Stefan Berger +Message-Id: <20260317120241.16320-6-philmd@linaro.org> +(cherry picked from commit 3912e312ae8486eb00bf4c4a1e0048dbc976e19e) +Signed-off-by: Mohammadfaiz Bawa +--- + include/system/tpm.h | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +diff --git a/include/system/tpm.h b/include/system/tpm.h +index 9458ad6668..874068d19a 100644 +--- a/include/system/tpm.h ++++ b/include/system/tpm.h +@@ -13,7 +13,6 @@ + #define QEMU_TPM_H + + #include "qapi/qapi-types-tpm.h" +-#include "qapi/error.h" + #include "qom/object.h" + + #ifdef CONFIG_TPM +@@ -85,10 +84,7 @@ static inline bool tpm_ppi_enabled(TPMIf *ti) + if (!ti) { + return false; + } +- if (TPM_IF_GET_CLASS(ti)->ppi_enabled) { +- return true; +- } +- return object_property_get_bool(OBJECT(ti), "ppi", &error_abort); ++ return TPM_IF_GET_CLASS(ti)->ppi_enabled; + } + + #else /* CONFIG_TPM */ +-- +2.52.0 + diff --git a/kvm-hw-tpm-add-PPI-support-to-tpm-tis-device-for-ARM64-v.patch b/kvm-hw-tpm-add-PPI-support-to-tpm-tis-device-for-ARM64-v.patch new file mode 100644 index 0000000..3f189ec --- /dev/null +++ b/kvm-hw-tpm-add-PPI-support-to-tpm-tis-device-for-ARM64-v.patch @@ -0,0 +1,113 @@ +From dd4cb34048d74a0d3adb1bd5f3f2c27ef4b60517 Mon Sep 17 00:00:00 2001 +From: Mohammadfaiz Bawa +Date: Thu, 7 May 2026 15:37:01 +0530 +Subject: [PATCH 9/9] hw/tpm: add PPI support to tpm-tis-device for ARM64 virt +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +RH-Author: Mohammadfaiz Bawa +RH-MergeRequest: 485: hw/tpm: add PPI support to tpm-tis-device for ARM64 virt +RH-Jira: RHEL-112608 +RH-Acked-by: Gavin Shan +RH-Acked-by: Eric Auger +RH-Commit: [8/8] ea524a056891d87697427d7d05f7b5ffa58eb5c5 (faizb/qemu-kvm) + +JIRA: https://redhat.atlassian.net/browse/RHEL-112608 + +Add PPI memory region and ACPI _STA, _DSM to tpm-tis-sysbus so +Windows 11 ARM64 guests no longer log Event ID 15 errors from +tpm.sys on every boot. + +Reviewed-by: Stefan Berger +Signed-off-by: Mohammadfaiz Bawa +Reviewed-by: Philippe Mathieu-Daudé +Message-ID: <20260327173209.148180-4-mbawa@redhat.com> +Signed-off-by: Philippe Mathieu-Daudé +(cherry picked from commit 46cd2c1050f0fde1a384234264ff8afdcb42d82f) +Signed-off-by: Mohammadfaiz Bawa +--- + hw/arm/virt-acpi-build.c | 9 ++++++++- + hw/tpm/tpm_tis_sysbus.c | 11 +++++++++++ + 2 files changed, 19 insertions(+), 1 deletion(-) + +diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c +index 96830f7c4e..5a642abac6 100644 +--- a/hw/arm/virt-acpi-build.c ++++ b/hw/arm/virt-acpi-build.c +@@ -231,7 +231,8 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms) + Aml *dev = aml_device("TPM0"); + aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101"))); + aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device"))); +- aml_append(dev, aml_name_decl("_UID", aml_int(0))); ++ aml_append(dev, aml_name_decl("_UID", aml_int(1))); ++ aml_append(dev, aml_name_decl("_STA", aml_int(0xF))); + + Aml *crs = aml_resource_template(); + aml_append(crs, +@@ -239,6 +240,12 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms) + (uint32_t)memory_region_size(sbdev_mr), + AML_READ_WRITE)); + aml_append(dev, aml_name_decl("_CRS", crs)); ++ ++ hwaddr ppi_base = platform_bus_get_mmio_addr(pbus, sbdev, 1); ++ if (ppi_base != -1) { ++ ppi_base += pbus_base; ++ tpm_build_ppi_acpi(TPM_IF(sbdev), dev, ppi_base); ++ } + aml_append(scope, dev); + } + #endif +diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c +index 287380c676..3bea7cd16c 100644 +--- a/hw/tpm/tpm_tis_sysbus.c ++++ b/hw/tpm/tpm_tis_sysbus.c +@@ -30,6 +30,7 @@ + #include "hw/sysbus.h" + #include "tpm_tis.h" + #include "qom/object.h" ++#include "qemu/memalign.h" + + struct TPMStateSysBus { + /*< private >*/ +@@ -99,6 +100,7 @@ static void tpm_tis_sysbus_initfn(Object *obj) + { + TPMStateSysBus *sbdev = TPM_TIS_SYSBUS(obj); + TPMState *s = &sbdev->state; ++ size_t host_page_size = qemu_real_host_page_size(); + + memory_region_init_io(&s->mmio, obj, &tpm_tis_memory_ops, + s, "tpm-tis-mmio", +@@ -106,6 +108,12 @@ static void tpm_tis_sysbus_initfn(Object *obj) + + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); + sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); ++ ++ s->ppi.buf = qemu_memalign(host_page_size, ++ ROUND_UP(TPM_PPI_ADDR_SIZE, host_page_size)); ++ memory_region_init_ram_device_ptr(&s->ppi.ram, obj, "tpm-ppi", ++ TPM_PPI_ADDR_SIZE, s->ppi.buf); ++ sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->ppi.ram); + } + + static void tpm_tis_sysbus_realizefn(DeviceState *dev, Error **errp) +@@ -122,6 +130,8 @@ static void tpm_tis_sysbus_realizefn(DeviceState *dev, Error **errp) + error_setg(errp, "'tpmdev' property is required"); + return; + } ++ ++ vmstate_register_ram(&s->ppi.ram, dev); + } + + static void tpm_tis_sysbus_class_init(ObjectClass *klass, const void *data) +@@ -132,6 +142,7 @@ static void tpm_tis_sysbus_class_init(ObjectClass *klass, const void *data) + device_class_set_props(dc, tpm_tis_sysbus_properties); + dc->vmsd = &vmstate_tpm_tis_sysbus; + tc->model = TPM_MODEL_TPM_TIS; ++ tc->ppi_enabled = true; + dc->realize = tpm_tis_sysbus_realizefn; + device_class_set_legacy_reset(dc, tpm_tis_sysbus_reset); + tc->request_completed = tpm_tis_sysbus_request_completed; +-- +2.52.0 + diff --git a/kvm-scsi-Don-t-consider-LOGICAL-UNIT-NOT-SUPPORTED-guest.patch b/kvm-scsi-Don-t-consider-LOGICAL-UNIT-NOT-SUPPORTED-guest.patch new file mode 100644 index 0000000..bf8ff48 --- /dev/null +++ b/kvm-scsi-Don-t-consider-LOGICAL-UNIT-NOT-SUPPORTED-guest.patch @@ -0,0 +1,61 @@ +From e77566291defe7b992bc17fa04907ec0d9b2b279 Mon Sep 17 00:00:00 2001 +From: Kevin Wolf +Date: Mon, 30 Mar 2026 14:16:35 +0200 +Subject: [PATCH 1/9] scsi: Don't consider LOGICAL UNIT NOT SUPPORTED guest + recoverable + +RH-Author: Kevin Wolf +RH-MergeRequest: 482: scsi: Don't consider LOGICAL UNIT NOT SUPPORTED guest recoverable +RH-Jira: RHEL-158212 +RH-Acked-by: Stefan Hajnoczi +RH-Acked-by: Hanna Czenczek +RH-Commit: [1/1] 3ddb962c6255b588e33f8f6d80dd9d785498e342 (kmwolf/centos-qemu-kvm) + +When commit bdf9613b introduced scsi_sense_buf_is_guest_recoverable(), +it included LOGICAL UNIT NOT SUPPORTED in the list of guest recoverable +sense codes. It doesn't really explain how the codes to be in the list +were selected. + +As the LUN doesn't come from the guest, but from the block backend +(usually the SCSI device on the host that was opened with host_device, +but it could also be the iscsi block driver), there is really no way the +guest could influence this. + +It seems that on some storage arrays, LOGICAL UNIT NOT SUPPORTED can +happen during failover operations. When combined with multipath, the +request should be retried on another path instead of being reported to +the guest, which would offline the filesystem in response. + +Simply returning false in scsi_sense_buf_is_guest_recoverable() will +enable the retry logic in file-posix, and will also make sure that if +the error persists, the configured error policy is respected so that the +VM can be stopped. + +Buglink: https://redhat.atlassian.net/browse/RHEL-158212 +Fixes: bdf9613b7f87 ('scsi: explicitly list guest-recoverable sense codes') +Signed-off-by: Kevin Wolf +Message-ID: <20260330121635.49205-1-kwolf@redhat.com> +Reviewed-by: Paolo Bonzini +Reviewed-by: Stefan Hajnoczi +Signed-off-by: Kevin Wolf +(cherry picked from commit ccc613f96c66eb5401185ff6eeba18143892055d) +Signed-off-by: Kevin Wolf +--- + scsi/utils.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/scsi/utils.c b/scsi/utils.c +index 545956f4f9..daee90ecf0 100644 +--- a/scsi/utils.c ++++ b/scsi/utils.c +@@ -373,7 +373,6 @@ static bool scsi_sense_is_guest_recoverable(int key, int asc, int ascq) + case 0x1a00: /* PARAMETER LIST LENGTH ERROR */ + case 0x2000: /* INVALID OPERATION CODE */ + case 0x2400: /* INVALID FIELD IN CDB */ +- case 0x2500: /* LOGICAL UNIT NOT SUPPORTED */ + case 0x2600: /* INVALID FIELD IN PARAMETER LIST */ + + case 0x2104: /* UNALIGNED WRITE COMMAND */ +-- +2.52.0 + diff --git a/qemu-kvm.spec b/qemu-kvm.spec index 0f2cd2c..24b6e23 100644 --- a/qemu-kvm.spec +++ b/qemu-kvm.spec @@ -143,7 +143,7 @@ Obsoletes: %{name}-block-ssh <= %{epoch}:%{version} \ Summary: QEMU is a machine emulator and virtualizer Name: qemu-kvm Version: 10.1.0 -Release: 17%{?rcrel}%{?dist}%{?cc_suffix} +Release: 18%{?rcrel}%{?dist}%{?cc_suffix} # Epoch because we pushed a qemu-1.0 package. AIUI this can't ever be dropped # Epoch 15 used for RHEL 8 # Epoch 17 used for RHEL 9 (due to release versioning offset in RHEL 8.5) @@ -426,6 +426,24 @@ Patch134: kvm-io-uring-Resubmit-tails-of-short-writes.patch Patch135: kvm-block-enable-stats-intervals-for-storage-devices.patch # For RHEL-114231 - Add stats-intervals support to --blockdev Patch136: kvm-qdev-Free-property-array-on-release.patch +# For RHEL-158212 - qemu-kvm doesn't retry SG-IO on 05/25/00 (ILLEGAL REQUEST / LOGICAL UNIT NOT SUPPORTED) [rhel-10.3] +Patch137: kvm-scsi-Don-t-consider-LOGICAL-UNIT-NOT-SUPPORTED-guest.patch +# For RHEL-112608 - [ARM64] Windows 11 VM should install without TPM Bypass +Patch138: kvm-hw-tpm-Factor-tpm_ppi_enabled-out.patch +# For RHEL-112608 - [ARM64] Windows 11 VM should install without TPM Bypass +Patch139: kvm-hw-tpm-Add-TPMIfClass-ppi_enabled-field.patch +# For RHEL-112608 - [ARM64] Windows 11 VM should install without TPM Bypass +Patch140: kvm-hw-tpm-Remove-CRBState-ppi_enabled-field.patch +# For RHEL-112608 - [ARM64] Windows 11 VM should install without TPM Bypass +Patch141: kvm-hw-tpm-Propagate-ppi_enabled-to-tpm_tis_reset-and-re.patch +# For RHEL-112608 - [ARM64] Windows 11 VM should install without TPM Bypass +Patch142: kvm-hw-tpm-Simplify-tpm_ppi_enabled.patch +# For RHEL-112608 - [ARM64] Windows 11 VM should install without TPM Bypass +Patch143: kvm-docs-specs-tpm-document-PPI-support-on-ARM64-virt.patch +# For RHEL-112608 - [ARM64] Windows 11 VM should install without TPM Bypass +Patch144: kvm-hw-acpi-tpm-parameterize-PPI-base-address-in-tpm_bui.patch +# For RHEL-112608 - [ARM64] Windows 11 VM should install without TPM Bypass +Patch145: kvm-hw-tpm-add-PPI-support-to-tpm-tis-device-for-ARM64-v.patch %if %{have_clang} BuildRequires: clang @@ -1505,6 +1523,21 @@ useradd -r -u 107 -g qemu -G kvm -d / -s /sbin/nologin \ %endif %changelog +* Mon May 11 2026 Miroslav Rezanina - 10.1.0-18 +- kvm-scsi-Don-t-consider-LOGICAL-UNIT-NOT-SUPPORTED-guest.patch [RHEL-158212] +- kvm-hw-tpm-Factor-tpm_ppi_enabled-out.patch [RHEL-112608] +- kvm-hw-tpm-Add-TPMIfClass-ppi_enabled-field.patch [RHEL-112608] +- kvm-hw-tpm-Remove-CRBState-ppi_enabled-field.patch [RHEL-112608] +- kvm-hw-tpm-Propagate-ppi_enabled-to-tpm_tis_reset-and-re.patch [RHEL-112608] +- kvm-hw-tpm-Simplify-tpm_ppi_enabled.patch [RHEL-112608] +- kvm-docs-specs-tpm-document-PPI-support-on-ARM64-virt.patch [RHEL-112608] +- kvm-hw-acpi-tpm-parameterize-PPI-base-address-in-tpm_bui.patch [RHEL-112608] +- kvm-hw-tpm-add-PPI-support-to-tpm-tis-device-for-ARM64-v.patch [RHEL-112608] +- Resolves: RHEL-158212 + (qemu-kvm doesn't retry SG-IO on 05/25/00 (ILLEGAL REQUEST / LOGICAL UNIT NOT SUPPORTED) [rhel-10.3]) +- Resolves: RHEL-112608 + ([ARM64] Windows 11 VM should install without TPM Bypass) + * Tue Apr 21 2026 Miroslav Rezanina - 10.1.0-17 - kvm-block-enable-stats-intervals-for-storage-devices.patch [RHEL-114231] - kvm-qdev-Free-property-array-on-release.patch [RHEL-114231]