72 lines
2.7 KiB
Diff
72 lines
2.7 KiB
Diff
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From 5840880e2ed3747464242e0559a6cf7ec4e55a11 Mon Sep 17 00:00:00 2001
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From: "plai@redhat.com" <plai@redhat.com>
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Date: Thu, 21 Jan 2021 17:43:53 -0500
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Subject: [PATCH 3/5] x86/cpu: Add AVX512_FP16 cpu feature
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RH-Author: plai@redhat.com
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Message-id: <20210121174353.16032-1-plai@redhat.com>
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Patchwork-id: 100758
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O-Subject: [RHEL8.4 AV qemu-kvm PATCH] x86/cpu: Add AVX512_FP16 cpu feature
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Bugzilla: 1838738
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RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
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RH-Acked-by: Michael S. Tsirkin <mst@redhat.com>
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RH-Acked-by: Bandan Das <bsd@redhat.com>
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From: Cathy Zhang <cathy.zhang@intel.com>
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BZ https://bugzilla.redhat.com/show_bug.cgi?id=1838738
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Brew: https://brewweb.engineering.redhat.com/brew/taskinfo?taskID=34299228
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x86 https://brewweb.engineering.redhat.com/brew/taskinfo?taskID=34299267
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Branch rhel-av-8.4.0
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Tested on intel-eaglestream-spr-01.khw1.lab.eng.bos.redhat.com.
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All flags found as expected
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avx512_vp2intersect, serialize, and avx512_fp16
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except:
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tsxldtrk
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Cpuid reports CPUID.(7.0).EDX[16] isn't enabled on this CPU.
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Leaf Subleaf EAX EBX ECX EDX
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00000007 00000000: 00000001 .... f3bfbfef .... fa417f5e ^.A. ff8c4532 2E..
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Already in rhel-av-8.4.0 (rebased to v5.2.0 ):
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353f98c9a x86/cpu: Enable AVX512_VP2INTERSECT cpu feature
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5dd13f2a5 target/i386: Add SERIALIZE cpu feature
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b3c7344e3 target/i386: Enable TSX Suspend Load Address Tracking feature
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Signed-off-by: Eduardo Lima (Etrunko) <etrunko@redhat.com>
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---
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target/i386/cpu.c | 2 +-
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target/i386/cpu.h | 2 ++
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2 files changed, 3 insertions(+), 1 deletion(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index dc592e990e..f944b41573 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -977,7 +977,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"avx512-vp2intersect", NULL, "md-clear", NULL,
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NULL, NULL, "serialize", NULL,
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"tsx-ldtrk", NULL, NULL /* pconfig */, NULL,
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- NULL, NULL, NULL, NULL,
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+ NULL, NULL, NULL, "avx512-fp16",
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NULL, NULL, "spec-ctrl", "stibp",
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NULL, "arch-capabilities", "core-capability", "ssbd",
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},
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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index 88e8586f8f..a3db7e3c6c 100644
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--- a/target/i386/cpu.h
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+++ b/target/i386/cpu.h
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@@ -783,6 +783,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
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#define CPUID_7_0_EDX_SERIALIZE (1U << 14)
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/* TSX Suspend Load Address Tracking instruction */
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#define CPUID_7_0_EDX_TSX_LDTRK (1U << 16)
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+/* AVX512_FP16 instruction */
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+#define CPUID_7_0_EDX_AVX512_FP16 (1U << 23)
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/* Speculation Control */
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#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26)
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/* Single Thread Indirect Branch Predictors */
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--
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2.18.4
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