85 lines
3.6 KiB
Diff
85 lines
3.6 KiB
Diff
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From 7f5289f426b25cf1113a450a3aa311170ac30397 Mon Sep 17 00:00:00 2001
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From: Peter Xu <peterx@redhat.com>
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Date: Mon, 26 Sep 2022 11:32:06 -0400
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Subject: [PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration
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checks"
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RH-Author: Peter Xu <peterx@redhat.com>
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RH-MergeRequest: 121: Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"
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RH-Bugzilla: 2126095
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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RH-Acked-by: Jason Wang <jasowang@redhat.com>
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RH-Commit: [1/1] 6218c5f81c205ab160f4ccdb203ae39d4af3339e (peterx/qemu-kvm)
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It's true that when vcpus<=255 we don't require the length of 32bit APIC
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IDs. However here since we already have EIM=ON it means the hypervisor
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will declare the VM as x2apic supported (e.g. VT-d ECAP register will have
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EIM bit 4 set), so the guest should assume the APIC IDs are 32bits width
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even if vcpus<=255. In short, commit 77250171bdc breaks any simple cmdline
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that wants to boot a VM with >=9 but <=255 vcpus with:
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-device intel-iommu,intremap=on
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For anyone who does not want to enable x2apic, we can use eim=off in the
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intel-iommu parameters to skip enabling KVM x2apic.
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This partly reverts commit 77250171bdc02aee106083fd2a068147befa1a38, while
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keeping the valid bit on checking split irqchip, but revert the other change.
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One thing to mention is that this patch may break migration compatibility
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of such VM, however that's probably the best thing we can do, because the
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old behavior was simply wrong and not working for >8 vcpus. For <=8 vcpus,
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there could be a light guest ABI change (by enabling KVM x2apic after this
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patch), but logically it shouldn't affect the migration from working.
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Also, this is not the 1st commit to change x2apic behavior. Igor provided
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a full history of how this evolved for the past few years:
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https://lore.kernel.org/qemu-devel/20220922154617.57d1a1fb@redhat.com/
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Relevant commits for reference:
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fb506e701e ("intel_iommu: reject broken EIM", 2016-10-17)
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c1bb5418e3 ("target/i386: Support up to 32768 CPUs without IRQ remapping", 2020-12-10)
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77250171bd ("intel_iommu: Fix irqchip / X2APIC configuration checks", 2022-05-16)
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dc89f32d92 ("target/i386: Fix sanity check on max APIC ID / X2APIC enablement", 2022-05-16)
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We may want to have this for stable too (mostly for 7.1.0 only). Adding a
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fixes tag.
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Cc: David Woodhouse <dwmw2@infradead.org>
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Cc: Claudio Fontana <cfontana@suse.de>
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Cc: Igor Mammedov <imammedo@redhat.com>
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Fixes: 77250171bd ("intel_iommu: Fix irqchip / X2APIC configuration checks")
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Signed-off-by: Peter Xu <peterx@redhat.com>
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Message-Id: <20220926153206.10881-1-peterx@redhat.com>
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Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
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Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Reviewed-by: Igor Mammedov <imammedo@redhat.com>
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(cherry picked from commit 20ca47429e96df84e7b2e741f740bfce8a813fb2)
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Signed-off-by: Peter Xu <peterx@redhat.com>
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---
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hw/i386/intel_iommu.c | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
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index 05d53a1aa9..6524c2ee32 100644
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--- a/hw/i386/intel_iommu.c
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+++ b/hw/i386/intel_iommu.c
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@@ -3818,6 +3818,11 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp)
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error_setg(errp, "eim=on requires accel=kvm,kernel-irqchip=split");
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return false;
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}
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+ if (!kvm_enable_x2apic()) {
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+ error_setg(errp, "eim=on requires support on the KVM side"
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+ "(X2APIC_API, first shipped in v4.7)");
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+ return false;
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+ }
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}
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/* Currently only address widths supported are 39 and 48 bits */
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--
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2.31.1
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