From 90185e83f1098e752388e6c35e717eb363bb7f46 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Petr=20P=C3=ADsa=C5=99?= Date: Thu, 3 Jan 2019 14:56:29 +0100 Subject: [PATCH] Fix OpenPOWER 64-bit ELFv2 ABI detection and an undefined behavior in aarch64 JIT compiler --- pcre2-10.32-JIT-compiler-update.patch | 139 ++++++++++++++++++++++++++ pcre2.spec | 7 ++ 2 files changed, 146 insertions(+) create mode 100644 pcre2-10.32-JIT-compiler-update.patch diff --git a/pcre2-10.32-JIT-compiler-update.patch b/pcre2-10.32-JIT-compiler-update.patch new file mode 100644 index 0000000..c757256 --- /dev/null +++ b/pcre2-10.32-JIT-compiler-update.patch @@ -0,0 +1,139 @@ +From b0b9531ac4b12f4127f67d8ad050d8d527b67981 Mon Sep 17 00:00:00 2001 +From: zherczeg +Date: Thu, 3 Jan 2019 09:34:42 +0000 +Subject: [PATCH] JIT compiler update. +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +git-svn-id: svn://vcs.exim.org/pcre2/code/trunk@1057 6239d852-aaf2-0410-a92c-79f79f948069 +Signed-off-by: Petr Písař +--- + src/sljit/sljitConfigInternal.h | 2 +- + src/sljit/sljitNativeARM_64.c | 20 ++++++++++---------- + src/sljit/sljitNativePPC_common.c | 2 +- + 3 files changed, 12 insertions(+), 12 deletions(-) + +diff --git a/src/sljit/sljitConfigInternal.h b/src/sljit/sljitConfigInternal.h +index f5703e8..ba60311 100644 +--- a/src/sljit/sljitConfigInternal.h ++++ b/src/sljit/sljitConfigInternal.h +@@ -530,7 +530,7 @@ typedef double sljit_f64; + #endif /* !SLJIT_FUNC */ + + #ifndef SLJIT_INDIRECT_CALL +-#if ((defined SLJIT_CONFIG_PPC_64 && SLJIT_CONFIG_PPC_64) && (defined SLJIT_BIG_ENDIAN && SLJIT_BIG_ENDIAN)) \ ++#if ((defined SLJIT_CONFIG_PPC_64 && SLJIT_CONFIG_PPC_64) && (!defined _CALL_ELF || _CALL_ELF == 1)) \ + || ((defined SLJIT_CONFIG_PPC_32 && SLJIT_CONFIG_PPC_32) && defined _AIX) + /* It seems certain ppc compilers use an indirect addressing for functions + which makes things complicated. */ +diff --git a/src/sljit/sljitNativeARM_64.c b/src/sljit/sljitNativeARM_64.c +index 27af741..b015695 100644 +--- a/src/sljit/sljitNativeARM_64.c ++++ b/src/sljit/sljitNativeARM_64.c +@@ -51,7 +51,7 @@ static const sljit_u8 freg_map[SLJIT_NUMBER_OF_FLOAT_REGISTERS + 3] = { + 0, 0, 1, 2, 3, 4, 5, 6, 7 + }; + +-#define W_OP (1 << 31) ++#define W_OP (1u << 31) + #define RD(rd) (reg_map[rd]) + #define RT(rt) (reg_map[rt]) + #define RN(rn) (reg_map[rn] << 5) +@@ -560,7 +560,7 @@ static sljit_s32 emit_op_imm(struct sljit_compiler *compiler, sljit_s32 flags, s + /* dst must be register, TMP_REG1 + arg1 must be register, TMP_REG1, imm + arg2 must be register, TMP_REG2, imm */ +- sljit_ins inv_bits = (flags & INT_OP) ? (1 << 31) : 0; ++ sljit_ins inv_bits = (flags & INT_OP) ? W_OP : 0; + sljit_ins inst_bits; + sljit_s32 op = (flags & 0xffff); + sljit_s32 reg; +@@ -710,7 +710,7 @@ static sljit_s32 emit_op_imm(struct sljit_compiler *compiler, sljit_s32 flags, s + return push_inst(compiler, ORR | RD(dst) | RN(TMP_ZERO) | RM(arg2)); + case SLJIT_MOV_U8: + SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1); +- return push_inst(compiler, (UBFM ^ (1 << 31)) | RD(dst) | RN(arg2) | (7 << 10)); ++ return push_inst(compiler, (UBFM ^ W_OP) | RD(dst) | RN(arg2) | (7 << 10)); + case SLJIT_MOV_S8: + SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1); + if (!(flags & INT_OP)) +@@ -718,7 +718,7 @@ static sljit_s32 emit_op_imm(struct sljit_compiler *compiler, sljit_s32 flags, s + return push_inst(compiler, (SBFM ^ inv_bits) | RD(dst) | RN(arg2) | (7 << 10)); + case SLJIT_MOV_U16: + SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1); +- return push_inst(compiler, (UBFM ^ (1 << 31)) | RD(dst) | RN(arg2) | (15 << 10)); ++ return push_inst(compiler, (UBFM ^ W_OP) | RD(dst) | RN(arg2) | (15 << 10)); + case SLJIT_MOV_S16: + SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1); + if (!(flags & INT_OP)) +@@ -728,7 +728,7 @@ static sljit_s32 emit_op_imm(struct sljit_compiler *compiler, sljit_s32 flags, s + SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1); + if ((flags & INT_OP) && dst == arg2) + return SLJIT_SUCCESS; +- return push_inst(compiler, (ORR ^ (1 << 31)) | RD(dst) | RN(TMP_ZERO) | RM(arg2)); ++ return push_inst(compiler, (ORR ^ W_OP) | RD(dst) | RN(TMP_ZERO) | RM(arg2)); + case SLJIT_MOV_S32: + SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1); + if ((flags & INT_OP) && dst == arg2) +@@ -1080,7 +1080,7 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_return(struct sljit_compiler *comp + + SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op0(struct sljit_compiler *compiler, sljit_s32 op) + { +- sljit_ins inv_bits = (op & SLJIT_I32_OP) ? (1 << 31) : 0; ++ sljit_ins inv_bits = (op & SLJIT_I32_OP) ? W_OP : 0; + + CHECK_ERROR(); + CHECK(check_sljit_emit_op0(compiler, op)); +@@ -1360,7 +1360,7 @@ static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_sw_from_f64(struct sljit_comp + sljit_ins inv_bits = (op & SLJIT_F32_OP) ? (1 << 22) : 0; + + if (GET_OPCODE(op) == SLJIT_CONV_S32_FROM_F64) +- inv_bits |= (1 << 31); ++ inv_bits |= W_OP; + + if (src & SLJIT_MEM) { + emit_fop_mem(compiler, (op & SLJIT_F32_OP) ? INT_SIZE : WORD_SIZE, TMP_FREG1, src, srcw); +@@ -1382,7 +1382,7 @@ static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_f64_from_sw(struct sljit_comp + sljit_ins inv_bits = (op & SLJIT_F32_OP) ? (1 << 22) : 0; + + if (GET_OPCODE(op) == SLJIT_CONV_F64_FROM_S32) +- inv_bits |= (1 << 31); ++ inv_bits |= W_OP; + + if (src & SLJIT_MEM) { + emit_op_mem(compiler, ((GET_OPCODE(op) == SLJIT_CONV_F64_FROM_S32) ? INT_SIZE : WORD_SIZE), TMP_REG1, src, srcw, TMP_REG1); +@@ -1662,7 +1662,7 @@ static SLJIT_INLINE struct sljit_jump* emit_cmp_to0(struct sljit_compiler *compi + sljit_s32 src, sljit_sw srcw) + { + struct sljit_jump *jump; +- sljit_ins inv_bits = (type & SLJIT_I32_OP) ? (1 << 31) : 0; ++ sljit_ins inv_bits = (type & SLJIT_I32_OP) ? W_OP : 0; + + SLJIT_ASSERT((type & 0xff) == SLJIT_EQUAL || (type & 0xff) == SLJIT_NOT_EQUAL); + ADJUST_LOCAL_OFFSET(src, srcw); +@@ -1787,7 +1787,7 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_cmov(struct sljit_compiler *compil + sljit_s32 dst_reg, + sljit_s32 src, sljit_sw srcw) + { +- sljit_ins inv_bits = (dst_reg & SLJIT_I32_OP) ? (1 << 31) : 0; ++ sljit_ins inv_bits = (dst_reg & SLJIT_I32_OP) ? W_OP : 0; + sljit_ins cc; + + CHECK_ERROR(); +diff --git a/src/sljit/sljitNativePPC_common.c b/src/sljit/sljitNativePPC_common.c +index 5ef4ac9..b34e396 100644 +--- a/src/sljit/sljitNativePPC_common.c ++++ b/src/sljit/sljitNativePPC_common.c +@@ -42,7 +42,7 @@ typedef sljit_u32 sljit_ins; + #include + #endif + +-#if (defined SLJIT_LITTLE_ENDIAN && SLJIT_LITTLE_ENDIAN) ++#if (defined _CALL_ELF && _CALL_ELF == 2) + #define SLJIT_PASS_ENTRY_ADDR_TO_CALL 1 + #endif + +-- +2.17.2 + diff --git a/pcre2.spec b/pcre2.spec index c964834..6750f2c 100644 --- a/pcre2.spec +++ b/pcre2.spec @@ -64,6 +64,10 @@ Patch3: pcre2-10.32-Fix-zero-repeated-subroutine-call-at-start-of-patter.pat Patch4: pcre2-10.32-Fix-heap-limit-checking-overflow-bug-in-pcre2_dfa_ma.patch # Fix anchoring a pattern preceded with (*MARK), in upstream after 10.32 Patch5: pcre2-10.32-Fix-non-recognition-of-anchoring-when-preceded-by-MA.patch +# Fix OpenPOWER 64-bit ELFv2 ABI detection in JIT compiler, upstream bug #2353, +# fix an undefined behavior in aarch64 JIT compiler, upstream bug #2355, +# in upstream after 10.32 +Patch6: pcre2-10.32-JIT-compiler-update.patch BuildRequires: autoconf BuildRequires: automake BuildRequires: coreutils @@ -145,6 +149,7 @@ Utilities demonstrating PCRE2 capabilities like pcre2grep or pcre2test. %patch3 -p1 %patch4 -p1 %patch5 -p1 +%patch6 -p1 # Because of multilib patch libtoolize --copy --force autoreconf -vif @@ -248,6 +253,8 @@ make %{?_smp_mflags} check VERBOSE=yes %changelog * Thu Jan 03 2019 Petr Pisar - 10.32-5 - Fix anchoring a pattern preceded with (*MARK) +- Fix OpenPOWER 64-bit ELFv2 ABI detection in JIT compiler (upstream bug #2353) +- Fix an undefined behavior in aarch64 JIT compiler (upstream bug #2355) * Thu Nov 01 2018 Petr Pisar - 10.32-4 - Fix matching a zero-repeated subroutine call at a start of a pattern