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UPDATE: Add gating.yaml of OVT in c10s.

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boyang 2024-04-15 14:27:19 +08:00
parent 937ac2f2a2
commit 61f7cb40c8
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@ -0,0 +1,6 @@
--- !Policy
product_versions:
- rhel-10
decision_context: osci_compose_gate
rules:
- !PassingTestCaseRule {test_case_name: 3rd-esxi-x86_64.brew-build.tier1.functional}