Redo Release 2.3.3

.numatop.metadata

@@ -0,0 +1 @@
+e7f08bb2a29a841eca00aff37a14987c84de1b56 v2.3.tar.gz

0016-numatop-powerpc-Add-power10-support.patch

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+From 25839aa3e2b02b5c001f220b1beeff5a786f83f2 Mon Sep 17 00:00:00 2001
+From: Kajol Jain <kjain@linux.ibm.com>
+Date: Thu, 6 Jul 2023 04:33:56 -0500
+Subject: [PATCH] numatop/powerpc: Add power10 support
+
+Add platform check for power10 processors.
+Add new files called power10.c/power10.h, which includes
+addition of the relevant events, to count per-process/per-thread
+memory accesses and CPU usage information for power10
+processors.
+
+Signed-off-by: Kajol Jain <kjain@linux.ibm.com>
+---
+ Makefile.am               |  2 ++
+ numatop.8                 |  2 +-
+ powerpc/include/power10.h | 50 ++++++++++++++++++++++++++++
+ powerpc/include/types.h   |  5 +--
+ powerpc/plat.c            | 14 ++++++--
+ powerpc/power10.c         | 69 +++++++++++++++++++++++++++++++++++++++
+ 6 files changed, 136 insertions(+), 6 deletions(-)
+ create mode 100644 powerpc/include/power10.h
+ create mode 100644 powerpc/power10.c
+
+diff --git a/Makefile.am b/Makefile.am
+index ae11522..f23e1a6 100644
+--- a/Makefile.am
++++ b/Makefile.am
+@@ -83,10 +83,12 @@ if CPU_PPC
+ libnumatop_la_SOURCES += \
+ 	powerpc/include/power8.h \
+ 	powerpc/include/power9.h \
++	powerpc/include/power10.h \
+ 	powerpc/include/types.h \
+ 	powerpc/plat.c \
+ 	powerpc/power8.c \
+ 	powerpc/power9.c \
++	powerpc/power10.c \
+ 	powerpc/ui_perf_map.c \
+ 	powerpc/util.c
+ endif
+diff --git a/numatop.8 b/numatop.8
+index 9eb983c..7237093 100644
+--- a/numatop.8
++++ b/numatop.8
+@@ -500,4 +500,4 @@ in 3.9. The following steps show how to get and apply the patch set.
+ \fBnumatop\fP supports the Intel Xeon processors: 5500-series, 6500/7500-series, 
+ 5600 series, E7-x8xx-series, and E5-16xx/24xx/26xx/46xx-series. 
+ \fBNote\fP: CPU microcode version 0x618 or 0x70c or later is required on
+-E5-16xx/24xx/26xx/46xx-series. It also supports IBM Power8 and Power9 processors.
++E5-16xx/24xx/26xx/46xx-series. It also supports IBM Power8, Power9 and Power10 processors.
+diff --git a/powerpc/include/power10.h b/powerpc/include/power10.h
+new file mode 100644
+index 0000000..bc6c7a9
+--- /dev/null
++++ b/powerpc/include/power10.h
+@@ -0,0 +1,50 @@
++/*
++ * Copyright (c) 2023, IBM Corporation
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ *   * Redistributions of source code must retain the above copyright notice,
++ *     this list of conditions and the following disclaimer.
++ *   * Redistributions in binary form must reproduce the above copyright
++ *     notice, this list of conditions and the following disclaimer in the
++ *     documentation and/or other materials provided with the distribution.
++ *   * Neither the name of Intel Corporation nor the names of its contributors
++ *     may be used to endorse or promote products derived from this software
++ *     without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
++ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
++ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
++ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
++ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
++ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
++ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
++ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
++ * POSSIBILITY OF SUCH DAMAGE.
++ */
++
++#ifndef _NUMATOP_POWERPC_POWER10_H
++#define _NUMATOP_POWERPC_POWER10_H
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++#include <sys/types.h>
++#include <inttypes.h>
++#include "../../common/include/types.h"
++
++struct _plat_event_config;
++
++extern void power10_profiling_config(perf_count_id_t, struct _plat_event_config *);
++extern void power10_ll_config(plat_event_config_t *cfg);
++extern int power10_offcore_num(void);
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _NUMATOP_POWERPC_POWER10_H */
+diff --git a/powerpc/include/types.h b/powerpc/include/types.h
+index 1ffaafa..30f7eb6 100644
+--- a/powerpc/include/types.h
++++ b/powerpc/include/types.h
+@@ -36,10 +36,11 @@
+ typedef enum {
+ 	CPU_UNSUP = 0,
+ 	CPU_POWER8,
+-	CPU_POWER9
++	CPU_POWER9,
++	CPU_POWER10
+ } cpu_type_t;
+ 
+-#define CPU_TYPE_NUM    3
++#define CPU_TYPE_NUM    4
+ 
+ typedef enum {
+ 	PERF_COUNT_INVALID = -1,
+diff --git a/powerpc/plat.c b/powerpc/plat.c
+index e7f132d..bed27d5 100644
+--- a/powerpc/plat.c
++++ b/powerpc/plat.c
+@@ -35,26 +35,30 @@
+ #include "include/types.h"
+ #include "include/power8.h"
+ #include "include/power9.h"
++#include "include/power10.h"
+ 
+ pfn_plat_profiling_config_t
+ s_plat_profiling_config[CPU_TYPE_NUM] = {
+ 	NULL,
+ 	power8_profiling_config,
+-	power9_profiling_config
++	power9_profiling_config,
++	power10_profiling_config
+ };
+ 
+ pfn_plat_ll_config_t
+ s_plat_ll_config[CPU_TYPE_NUM] = {
+ 	NULL,
+ 	power8_ll_config,
+-	power9_ll_config
++	power9_ll_config,
++	power10_ll_config
+ };
+ 
+ pfn_plat_offcore_num_t
+ s_plat_offcore_num[CPU_TYPE_NUM] = {
+ 	NULL,
+ 	power8_offcore_num,
+-	power9_offcore_num
++	power9_offcore_num,
++	power10_offcore_num
+ };
+ 
+ #define SPRN_PVR	0x11F
+@@ -85,6 +89,10 @@ plat_detect(void)
+ 		s_cpu_type = CPU_POWER9;
+ 		ret = 0;
+ 		break;
++	case 0x80:
++		s_cpu_type = CPU_POWER10;
++		ret = 0;
++		break;
+ 	}
+ 
+ 	return ret;
+diff --git a/powerpc/power10.c b/powerpc/power10.c
+new file mode 100644
+index 0000000..b979f64
+--- /dev/null
++++ b/powerpc/power10.c
+@@ -0,0 +1,69 @@
++/*
++ * Copyright (c) 2023, IBM Corporation
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are met:
++ *
++ *   * Redistributions of source code must retain the above copyright notice,
++ *     this list of conditions and the following disclaimer.
++ *   * Redistributions in binary form must reproduce the above copyright
++ *     notice, this list of conditions and the following disclaimer in the
++ *     documentation and/or other materials provided with the distribution.
++ *   * Neither the name of Intel Corporation nor the names of its contributors
++ *     may be used to endorse or promote products derived from this software
++ *     without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
++ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
++ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
++ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
++ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
++ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
++ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
++ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
++ * POSSIBILITY OF SUCH DAMAGE.
++ */
++
++#include <inttypes.h>
++#include <stdlib.h>
++#include <sys/types.h>
++#include <stdio.h>
++#include <unistd.h>
++#include <string.h>
++#include <strings.h>
++#include "../common/include/os/linux/perf_event.h"
++#include "../common/include/os/plat.h"
++#include "include/power10.h"
++
++static plat_event_config_t s_power10_profiling[PERF_COUNT_NUM] = {
++	{ PERF_TYPE_RAW, 0x600f4, 0, 0, 0, 0, "PM_RUN_CYC" },
++	{ PERF_TYPE_RAW, 0x0F4040000004C040, 0, 0, 0, 0, "PM_DATA_FROM_DMEM" },
++	{ PERF_TYPE_RAW, 0x100f0, 0, 0, 0, 0, "PM_CYC" },
++	{ PERF_TYPE_RAW, 0x500fa, 0, 0, 0, 0, "PM_RUN_INST_CMPL" },
++	{ PERF_TYPE_RAW, 0x094040000002C040, 0, 0, 0, 0, "PM_DATA_FROM_LMEM" },
++	{ PERF_TYPE_RAW, 0x0D4040000003C040, 0, 0, 0, 0, "PM_DATA_FROM_RMEM" },
++};
++
++static plat_event_config_t s_power10_ll = {
++	PERF_TYPE_RAW, 0x0000, 0, 0, 0, 1, "PM_SUSPENDED"
++};
++
++void
++power10_profiling_config(perf_count_id_t perf_count_id, plat_event_config_t *cfg)
++{
++	plat_config_get(perf_count_id, cfg, s_power10_profiling);
++}
++
++void
++power10_ll_config(plat_event_config_t *cfg)
++{
++	memcpy(cfg, &s_power10_ll, sizeof (plat_event_config_t));
++}
++
++int
++power10_offcore_num(void)
++{
++	return (3);
++}
+-- 
+2.31.1
+