ndctl/0185-cxl-test-Update-CXL-memory-parameters.patch
Jeff Moyer 2c91dc1bcd Backport changes up to v74, excluding the config file changes
This includes support for the CXL commands, and adds the following
packages: cxl-cli, cxl-devel, cxl-libs.

Resolves: rhbz#2132167
2022-10-13 16:55:42 -04:00

87 lines
3.0 KiB
Diff

From 74a8134ef2dfa3c22c7e22b0bfd30b6a5cdf678b Mon Sep 17 00:00:00 2001
From: Dan Williams <dan.j.williams@intel.com>
Date: Thu, 14 Jul 2022 10:02:49 -0700
Subject: [PATCH 185/217] cxl/test: Update CXL memory parameters
In support of testing CXL region configurations cxl_test changed the size
of its root decoders and endpoints. Use the size of the first root decoder
to determine if this is an updated kernel.
Link: https://lore.kernel.org/r/165781816971.1555691.18362747345754213762.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vishal Verma <vishal.l.verma@intel.com>
---
test/cxl-topology.sh | 32 +++++++++++++++++++++-----------
1 file changed, 21 insertions(+), 11 deletions(-)
diff --git a/test/cxl-topology.sh b/test/cxl-topology.sh
index ff11614..2583005 100644
--- a/test/cxl-topology.sh
+++ b/test/cxl-topology.sh
@@ -64,14 +64,9 @@ switch[2]=$(jq -r ".[] | .[\"ports:${bridge[1]}\"] | $port_sort | .[0].host" <<<
switch[3]=$(jq -r ".[] | .[\"ports:${bridge[1]}\"] | $port_sort | .[1].host" <<< $json)
-# check that all 8 cxl_test memdevs are enabled by default and have a
-# pmem size of 256M
-json=$($CXL list -b cxl_test -M)
-count=$(jq "map(select(.pmem_size == $((256 << 20)))) | length" <<< $json)
-((count == 8)) || err "$LINENO"
-
-
# validate the expected properties of the 4 root decoders
+# use the size of the first decoder to determine the cxl_test version /
+# properties
json=$($CXL list -b cxl_test -D -d root)
port_id=${root:4}
port_id_len=${#port_id}
@@ -80,26 +75,41 @@ count=$(jq "[ $decoder_sort | .[0] |
select(.volatile_capable == true) |
select(.size == $((256 << 20))) |
select(.nr_targets == 1) ] | length" <<< $json)
-((count == 1)) || err "$LINENO"
+
+if [ $count -eq 1 ]; then
+ decoder_base_size=$((256 << 20))
+ pmem_size=$((256 << 20))
+else
+ decoder_base_size=$((1 << 30))
+ pmem_size=$((1 << 30))
+fi
count=$(jq "[ $decoder_sort | .[1] |
select(.volatile_capable == true) |
- select(.size == $((512 << 20))) |
+ select(.size == $((decoder_base_size * 2))) |
select(.nr_targets == 2) ] | length" <<< $json)
((count == 1)) || err "$LINENO"
count=$(jq "[ $decoder_sort | .[2] |
select(.pmem_capable == true) |
- select(.size == $((256 << 20))) |
+ select(.size == $decoder_base_size) |
select(.nr_targets == 1) ] | length" <<< $json)
((count == 1)) || err "$LINENO"
count=$(jq "[ $decoder_sort | .[3] |
select(.pmem_capable == true) |
- select(.size == $((512 << 20))) |
+ select(.size == $((decoder_base_size * 2))) |
select(.nr_targets == 2) ] | length" <<< $json)
((count == 1)) || err "$LINENO"
+
+# check that all 8 cxl_test memdevs are enabled by default and have a
+# pmem size of 256M, or 1G
+json=$($CXL list -b cxl_test -M)
+count=$(jq "map(select(.pmem_size == $pmem_size)) | length" <<< $json)
+((count == 8)) || err "$LINENO"
+
+
# check that switch ports disappear after all of their memdevs have been
# disabled, and return when the memdevs are enabled.
for s in ${switch[@]}
--
2.27.0