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4.4.1-2

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This commit is contained in:
Kalev Lember 2009-09-03 21:30:43 +00:00
parent 7274853965
commit 8b5fdeceae
8 changed files with 41 additions and 15452 deletions
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2
.cvsignore
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@ -1 +1 @@
gcc-4.4.1-20090818.tar.bz2
gcc-4.4.1-20090902.tar.bz2

29
fastjar-0.97-segfault.patch
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@ -1,29 +0,0 @@
2009-01-14 Jakub Jelinek <jakub@redhat.com>
* jartool.c (make_manifest): Initialize current_time before
calling unix2dostime on it.
--- fastjar-0.97/jartool.c.jj 2008-10-15 18:35:37.000000000 +0200
+++ fastjar-0.97/jartool.c 2009-01-14 15:40:50.000000000 +0100
@@ -820,6 +820,10 @@ int make_manifest(int jfd, const char *m
int mod_time; /* file modification time */
struct zipentry *ze;
+ current_time = time(NULL);
+ if(current_time == (time_t)-1)
+ exit_on_error("time");
+
mod_time = unix2dostime(&current_time);
/* If we are creating a new manifest, create a META-INF directory entry */
@@ -828,10 +832,6 @@ int make_manifest(int jfd, const char *m
memset((file_header + 12), '\0', 16); /*clear mod time, crc, size fields*/
- current_time = time(NULL);
- if(current_time == (time_t)-1)
- exit_on_error("time");
-
PACK_UB2(file_header, LOC_EXTRA, 0);
PACK_UB2(file_header, LOC_COMP, 0);
PACK_UB2(file_header, LOC_FNLEN, nlen);

267
gcc44-power7-2.patch
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@ -1,267 +0,0 @@
2009-04-14 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_secondary_reload_inner): Handle
more possible combinations of addresses.
* config/rs6000/vector.md (vec_reload_and_plus_<mptrsize>): Allow
register+small constant in addition to register+register, and
restrict the insn to only match during reload and afterwards.
(vec_reload_and_reg_<mptrsize>): Allow for and of register
indirect to not generate insn not found message.
--- gcc/config/rs6000/vector.md (revision 146069)
+++ gcc/config/rs6000/vector.md (revision 146118)
@@ -129,14 +129,15 @@ (define_expand "reload_<VEC_R:mode>_<P:m
})
;; Reload sometimes tries to move the address to a GPR, and can generate
-;; invalid RTL for addresses involving AND -16.
+;; invalid RTL for addresses involving AND -16. Allow addresses involving
+;; reg+reg, reg+small constant, or just reg, all wrapped in an AND -16.
(define_insn_and_split "*vec_reload_and_plus_<mptrsize>"
[(set (match_operand:P 0 "gpc_reg_operand" "=b")
(and:P (plus:P (match_operand:P 1 "gpc_reg_operand" "r")
- (match_operand:P 2 "gpc_reg_operand" "r"))
+ (match_operand:P 2 "reg_or_cint_operand" "rI"))
(const_int -16)))]
- "TARGET_ALTIVEC || TARGET_VSX"
+ "(TARGET_ALTIVEC || TARGET_VSX) && (reload_in_progress || reload_completed)"
"#"
"&& reload_completed"
[(set (match_dup 0)
@@ -146,6 +147,21 @@ (define_insn_and_split "*vec_reload_and_
(and:P (match_dup 0)
(const_int -16)))
(clobber:CC (scratch:CC))])])
+
+;; The normal ANDSI3/ANDDI3 won't match if reload decides to move an AND -16
+;; address to a register because there is no clobber of a (scratch), so we add
+;; it here.
+(define_insn_and_split "*vec_reload_and_reg_<mptrsize>"
+ [(set (match_operand:P 0 "gpc_reg_operand" "=b")
+ (and:P (match_operand:P 1 "gpc_reg_operand" "r")
+ (const_int -16)))]
+ "(TARGET_ALTIVEC || TARGET_VSX) && (reload_in_progress || reload_completed)"
+ "#"
+ "&& reload_completed"
+ [(parallel [(set (match_dup 0)
+ (and:P (match_dup 1)
+ (const_int -16)))
+ (clobber:CC (scratch:CC))])])
;; Generic floating point vector arithmetic support
(define_expand "add<mode>3"
--- gcc/config/rs6000/rs6000.c (revision 146069)
+++ gcc/config/rs6000/rs6000.c (revision 146118)
@@ -12574,6 +12574,11 @@ rs6000_secondary_reload_inner (rtx reg,
enum reg_class rclass;
rtx addr;
rtx and_op2 = NULL_RTX;
+ rtx addr_op1;
+ rtx addr_op2;
+ rtx scratch_or_premodify = scratch;
+ rtx and_rtx;
+ rtx cc_clobber;
if (TARGET_DEBUG_ADDR)
{
@@ -12595,7 +12600,8 @@ rs6000_secondary_reload_inner (rtx reg,
switch (rclass)
{
- /* Move reg+reg addresses into a scratch register for GPRs. */
+ /* GPRs can handle reg + small constant, all other addresses need to use
+ the scratch register. */
case GENERAL_REGS:
case BASE_REGS:
if (GET_CODE (addr) == AND)
@@ -12603,70 +12609,152 @@ rs6000_secondary_reload_inner (rtx reg,
and_op2 = XEXP (addr, 1);
addr = XEXP (addr, 0);
}
+
+ if (GET_CODE (addr) == PRE_MODIFY)
+ {
+ scratch_or_premodify = XEXP (addr, 0);
+ gcc_assert (REG_P (scratch_or_premodify));
+ gcc_assert (GET_CODE (XEXP (addr, 1)) == PLUS);
+ addr = XEXP (addr, 1);
+ }
+
if (GET_CODE (addr) == PLUS
&& (!rs6000_legitimate_offset_address_p (TImode, addr, true)
|| and_op2 != NULL_RTX))
{
- if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == CONST
- || GET_CODE (addr) == CONST_INT)
- rs6000_emit_move (scratch, addr, GET_MODE (addr));
- else
- emit_insn (gen_rtx_SET (VOIDmode, scratch, addr));
- addr = scratch;
+ addr_op1 = XEXP (addr, 0);
+ addr_op2 = XEXP (addr, 1);
+ gcc_assert (legitimate_indirect_address_p (addr_op1, true));
+
+ if (!REG_P (addr_op2)
+ && (GET_CODE (addr_op2) != CONST_INT
+ || !satisfies_constraint_I (addr_op2)))
+ {
+ rs6000_emit_move (scratch, addr_op2, Pmode);
+ addr_op2 = scratch;
+ }
+
+ emit_insn (gen_rtx_SET (VOIDmode,
+ scratch_or_premodify,
+ gen_rtx_PLUS (Pmode,
+ addr_op1,
+ addr_op2)));
+
+ addr = scratch_or_premodify;
+ scratch_or_premodify = scratch;
}
- else if (GET_CODE (addr) == PRE_MODIFY
- && REG_P (XEXP (addr, 0))
- && GET_CODE (XEXP (addr, 1)) == PLUS)
+ else if (!legitimate_indirect_address_p (addr, true)
+ && !rs6000_legitimate_offset_address_p (TImode, addr, true))
{
- emit_insn (gen_rtx_SET (VOIDmode, XEXP (addr, 0), XEXP (addr, 1)));
- addr = XEXP (addr, 0);
+ rs6000_emit_move (scratch_or_premodify, addr, Pmode);
+ addr = scratch_or_premodify;
+ scratch_or_premodify = scratch;
}
break;
+ /* Float/Altivec registers can only handle reg+reg addressing. Move
+ other addresses into a scratch register. */
+ case FLOAT_REGS:
+ case VSX_REGS:
+ case ALTIVEC_REGS:
+
/* With float regs, we need to handle the AND ourselves, since we can't
use the Altivec instruction with an implicit AND -16. Allow scalar
loads to float registers to use reg+offset even if VSX. */
- case FLOAT_REGS:
- case VSX_REGS:
- if (GET_CODE (addr) == AND)
+ if (GET_CODE (addr) == AND
+ && (rclass != ALTIVEC_REGS || GET_MODE_SIZE (mode) != 16))
{
and_op2 = XEXP (addr, 1);
addr = XEXP (addr, 0);
}
- /* fall through */
- /* Move reg+offset addresses into a scratch register. */
- case ALTIVEC_REGS:
- if (!legitimate_indirect_address_p (addr, true)
- && !legitimate_indexed_address_p (addr, true)
- && (GET_CODE (addr) != PRE_MODIFY
- || !legitimate_indexed_address_p (XEXP (addr, 1), true))
- && (rclass != FLOAT_REGS
- || GET_MODE_SIZE (mode) != 8
+ /* If we aren't using a VSX load, save the PRE_MODIFY register and use it
+ as the address later. */
+ if (GET_CODE (addr) == PRE_MODIFY
+ && (!VECTOR_MEM_VSX_P (mode)
|| and_op2 != NULL_RTX
- || !rs6000_legitimate_offset_address_p (mode, addr, true)))
+ || !legitimate_indexed_address_p (XEXP (addr, 1), true)))
{
- if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == CONST
- || GET_CODE (addr) == CONST_INT)
- rs6000_emit_move (scratch, addr, GET_MODE (addr));
- else
- emit_insn (gen_rtx_SET (VOIDmode, scratch, addr));
- addr = scratch;
+ scratch_or_premodify = XEXP (addr, 0);
+ gcc_assert (legitimate_indirect_address_p (scratch_or_premodify,
+ true));
+ gcc_assert (GET_CODE (XEXP (addr, 1)) == PLUS);
+ addr = XEXP (addr, 1);
+ }
+
+ if (legitimate_indirect_address_p (addr, true) /* reg */
+ || legitimate_indexed_address_p (addr, true) /* reg+reg */
+ || GET_CODE (addr) == PRE_MODIFY /* VSX pre-modify */
+ || GET_CODE (addr) == AND /* Altivec memory */
+ || (rclass == FLOAT_REGS /* legacy float mem */
+ && GET_MODE_SIZE (mode) == 8
+ && and_op2 == NULL_RTX
+ && scratch_or_premodify == scratch
+ && rs6000_legitimate_offset_address_p (mode, addr, true)))
+ ;
+
+ else if (GET_CODE (addr) == PLUS)
+ {
+ addr_op1 = XEXP (addr, 0);
+ addr_op2 = XEXP (addr, 1);
+ gcc_assert (REG_P (addr_op1));
+
+ rs6000_emit_move (scratch, addr_op2, Pmode);
+ emit_insn (gen_rtx_SET (VOIDmode,
+ scratch_or_premodify,
+ gen_rtx_PLUS (Pmode,
+ addr_op1,
+ scratch)));
+ addr = scratch_or_premodify;
+ scratch_or_premodify = scratch;
}
+
+ else if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == CONST
+ || GET_CODE (addr) == CONST_INT)
+ {
+ rs6000_emit_move (scratch_or_premodify, addr, Pmode);
+ addr = scratch_or_premodify;
+ scratch_or_premodify = scratch;
+ }
+
+ else
+ gcc_unreachable ();
+
break;
default:
gcc_unreachable ();
}
- /* If the original address involved an AND -16 that is part of the Altivec
- addresses, recreate the and now. */
+ /* If the original address involved a pre-modify that we couldn't use the VSX
+ memory instruction with update, and we haven't taken care of already,
+ store the address in the pre-modify register and use that as the
+ address. */
+ if (scratch_or_premodify != scratch && scratch_or_premodify != addr)
+ {
+ emit_insn (gen_rtx_SET (VOIDmode, scratch_or_premodify, addr));
+ addr = scratch_or_premodify;
+ }
+
+ /* If the original address involved an AND -16 and we couldn't use an ALTIVEC
+ memory instruction, recreate the AND now, including the clobber which is
+ generated by the general ANDSI3/ANDDI3 patterns for the
+ andi. instruction. */
if (and_op2 != NULL_RTX)
{
- rtx and_rtx = gen_rtx_SET (VOIDmode,
- scratch,
- gen_rtx_AND (Pmode, addr, and_op2));
- rtx cc_clobber = gen_rtx_CLOBBER (CCmode, gen_rtx_SCRATCH (CCmode));
+ if (! legitimate_indirect_address_p (addr, true))
+ {
+ emit_insn (gen_rtx_SET (VOIDmode, scratch, addr));
+ addr = scratch;
+ }
+
+ and_rtx = gen_rtx_SET (VOIDmode,
+ scratch,
+ gen_rtx_AND (Pmode,
+ addr,
+ and_op2));
+
+ cc_clobber = gen_rtx_CLOBBER (CCmode, gen_rtx_SCRATCH (CCmode));
emit_insn (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, and_rtx, cc_clobber)));
addr = scratch;

3523
gcc44-power7-3.patch
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File diff suppressed because it is too large Load Diff

11448
gcc44-power7.patch
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File diff suppressed because it is too large Load Diff

142
gcc44-unique-object.patch
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@ -1,142 +0,0 @@
2009-07-22 Jason Merrill <jason@redhat.com>
* config/elfos.h (ASM_DECLARE_OBJECT_NAME): Use gnu_unique_object
type if available.
* configure.ac: Test for it.
* configure, config.in: Regenerate.
--- gcc/config/elfos.h.jj 2009-04-14 15:51:24.000000000 +0200
+++ gcc/config/elfos.h 2009-07-23 09:25:46.000000000 +0200
@@ -289,24 +289,37 @@ see the files COPYING3 and COPYING.RUNTI
/* Write the extra assembler code needed to declare an object properly. */
-#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
- do \
- { \
- HOST_WIDE_INT size; \
- \
- ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
- \
- size_directive_output = 0; \
- if (!flag_inhibit_size_directive \
- && (DECL) && DECL_SIZE (DECL)) \
- { \
- size_directive_output = 1; \
- size = int_size_in_bytes (TREE_TYPE (DECL)); \
- ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \
- } \
- \
- ASM_OUTPUT_LABEL (FILE, NAME); \
- } \
+#ifdef HAVE_GAS_GNU_UNIQUE_OBJECT
+#define USE_GNU_UNIQUE_OBJECT 1
+#else
+#define USE_GNU_UNIQUE_OBJECT 0
+#endif
+
+#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
+ do \
+ { \
+ HOST_WIDE_INT size; \
+ \
+ /* For template static data member instantiations or \
+ inline fn local statics, use gnu_unique_object so that \
+ they will be combined even under RTLD_LOCAL. */ \
+ if (USE_GNU_UNIQUE_OBJECT \
+ && !DECL_ARTIFICIAL (DECL) && DECL_ONE_ONLY (DECL)) \
+ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "gnu_unique_object"); \
+ else \
+ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
+ \
+ size_directive_output = 0; \
+ if (!flag_inhibit_size_directive \
+ && (DECL) && DECL_SIZE (DECL)) \
+ { \
+ size_directive_output = 1; \
+ size = int_size_in_bytes (TREE_TYPE (DECL)); \
+ ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \
+ } \
+ \
+ ASM_OUTPUT_LABEL (FILE, NAME); \
+ } \
while (0)
/* Output the size directive for a decl in rest_of_decl_compilation
--- gcc/configure.ac.jj 2009-03-28 09:53:59.000000000 +0100
+++ gcc/configure.ac 2009-07-23 09:25:46.000000000 +0200
@@ -3299,6 +3299,12 @@ gcc_GAS_CHECK_FEATURE([.lcomm with align
[AC_DEFINE(HAVE_GAS_LCOMM_WITH_ALIGNMENT, 1,
[Define if your assembler supports .lcomm with an alignment field.])])
+gcc_GAS_CHECK_FEATURE([gnu_unique_object], gcc_cv_as_gnu_unique_object,
+ [elf,2,19,52],,
+[.type foo, @gnu_unique_object],,
+[AC_DEFINE(HAVE_GAS_GNU_UNIQUE_OBJECT, 1,
+ [Define if your assembler supports @gnu_unique_object.])])
+
AC_CACHE_CHECK([assembler for tolerance to line number 0],
[gcc_cv_as_line_zero],
[gcc_cv_as_line_zero=no
--- gcc/configure.jj 2009-03-28 09:53:37.000000000 +0100
+++ gcc/configure 2009-07-23 09:26:52.000000000 +0200
@@ -24288,6 +24288,44 @@ _ACEOF
fi
+echo "$as_me:$LINENO: checking assembler for gnu_unique_object" >&5
+echo $ECHO_N "checking assembler for gnu_unique_object... $ECHO_C" >&6
+if test "${gcc_cv_as_gnu_unique_object+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ gcc_cv_as_gnu_unique_object=no
+ if test $in_tree_gas = yes; then
+ if test $in_tree_gas_is_elf = yes \
+ && test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 19 \) \* 1000 + 52`
+ then gcc_cv_as_gnu_unique_object=yes
+fi
+ elif test x$gcc_cv_as != x; then
+ echo '.type foo, @gnu_unique_object' > conftest.s
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'
+ { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; }
+ then
+ gcc_cv_as_gnu_unique_object=yes
+ else
+ echo "configure: failed program was" >&5
+ cat conftest.s >&5
+ fi
+ rm -f conftest.o conftest.s
+ fi
+fi
+echo "$as_me:$LINENO: result: $gcc_cv_as_gnu_unique_object" >&5
+echo "${ECHO_T}$gcc_cv_as_gnu_unique_object" >&6
+if test $gcc_cv_as_gnu_unique_object = yes; then
+
+cat >>confdefs.h <<\_ACEOF
+#define HAVE_GAS_GNU_UNIQUE_OBJECT 1
+_ACEOF
+
+fi
+
echo "$as_me:$LINENO: checking assembler for tolerance to line number 0" >&5
echo $ECHO_N "checking assembler for tolerance to line number 0... $ECHO_C" >&6
if test "${gcc_cv_as_line_zero+set}" = set; then
--- gcc/config.in.jj 2009-02-16 22:48:20.000000000 +0100
+++ gcc/config.in 2009-07-23 09:26:56.000000000 +0200
@@ -845,6 +845,12 @@
#endif
+/* Define if your assembler supports @gnu_unique_object. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_GAS_GNU_UNIQUE_OBJECT
+#endif
+
+
/* Define if your assembler and linker support .hidden. */
#undef HAVE_GAS_HIDDEN

80
mingw32-gcc.spec
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@ -1,14 +1,14 @@
%global __os_install_post /usr/lib/rpm/brp-compress %{nil}
%global DATE 20090818
%global SVNREV 150873
%global DATE 20090902
%global SVNREV 151328
Name: mingw32-gcc
Version: 4.4.1
Release: 1%{?dist}
Release: 2%{?dist}
Summary: MinGW Windows cross-compiler (GCC) for C
License: GPLv3+, GPLv3+ with exceptions and GPLv2+ with exceptions
License: GPLv3+ and GPLv3+ with exceptions and GPLv2+ with exceptions
Group: Development/Languages
# We use the same source as Fedora's native gcc.
@ -25,25 +25,21 @@ Patch2: gcc44-c++-builtin-redecl.patch
Patch3: gcc44-ia64-libunwind.patch
Patch4: gcc44-java-nomulti.patch
Patch5: gcc44-ppc32-retaddr.patch
Patch9: gcc44-pr33763.patch
Patch10: gcc44-rh330771.patch
Patch11: gcc44-rh341221.patch
Patch12: gcc44-java-debug-iface-type.patch
Patch13: gcc44-i386-libgomp.patch
Patch15: gcc44-sparc-config-detection.patch
Patch16: gcc44-libgomp-omp_h-multilib.patch
Patch20: gcc44-libtool-no-rpath.patch
Patch21: gcc44-cloog-dl.patch
Patch22: gcc44-raw-string.patch
Patch24: gcc44-unwind-debug-hook.patch
Patch25: gcc44-power7.patch
Patch26: gcc44-power7-2.patch
Patch27: gcc44-power7-3.patch
Patch28: gcc44-pr38757.patch
#Patch29: gcc44-libstdc++-docs.patch
Patch30: gcc44-rh503816-1.patch
Patch31: gcc44-rh503816-2.patch
Patch32: gcc44-unique-object.patch
Patch6: gcc44-pr33763.patch
Patch7: gcc44-rh330771.patch
Patch8: gcc44-rh341221.patch
Patch9: gcc44-java-debug-iface-type.patch
Patch10: gcc44-i386-libgomp.patch
Patch11: gcc44-sparc-config-detection.patch
Patch12: gcc44-libgomp-omp_h-multilib.patch
Patch13: gcc44-libtool-no-rpath.patch
Patch14: gcc44-cloog-dl.patch
Patch15: gcc44-raw-string.patch
Patch16: gcc44-unwind-debug-hook.patch
Patch17: gcc44-pr38757.patch
Patch18: gcc44-libstdc++-docs.patch
Patch19: gcc44-rh503816-1.patch
Patch20: gcc44-rh503816-2.patch
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
@ -128,24 +124,21 @@ MinGW Windows cross-compiler for FORTRAN.
%patch3 -p0 -b .ia64-libunwind~
%patch4 -p0 -b .java-nomulti~
%patch5 -p0 -b .ppc32-retaddr~
%patch9 -p0 -b .pr33763~
%patch10 -p0 -b .rh330771~
%patch11 -p0 -b .rh341221~
%patch12 -p0 -b .java-debug-iface-type~
%patch13 -p0 -b .i386-libgomp~
%patch15 -p0 -b .sparc-config-detection~
%patch16 -p0 -b .libgomp-omp_h-multilib~
%patch20 -p0 -b .libtool-no-rpath~
%patch21 -p0 -b .cloog-dl~
%patch22 -p0 -b .raw-string~
%patch24 -p0 -b .unwind-debug-hook~
%patch25 -p0 -b .power7~
%patch26 -p0 -b .power7-2~
%patch27 -p0 -b .power7-3~
%patch28 -p0 -b .pr38757~
%patch30 -p0 -b .rh503816-1~
%patch31 -p0 -b .rh503816-2~
%patch32 -p0 -b .unique-object~
%patch6 -p0 -b .pr33763~
%patch7 -p0 -b .rh330771~
%patch8 -p0 -b .rh341221~
%patch9 -p0 -b .java-debug-iface-type~
%patch10 -p0 -b .i386-libgomp~
%patch11 -p0 -b .sparc-config-detection~
%patch12 -p0 -b .libgomp-omp_h-multilib~
%patch13 -p0 -b .libtool-no-rpath~
%patch14 -p0 -b .cloog-dl~
%patch15 -p0 -b .raw-string~
%patch16 -p0 -b .unwind-debug-hook~
%patch17 -p0 -b .pr38757~
%patch18 -p0 -b .libstdc++-docs~
%patch19 -p0 -b .rh503816-1~
%patch20 -p0 -b .rh503816-2~
sed -i -e 's/4\.4\.2/%{version}/' gcc/BASE-VER
echo 'Fedora MinGW %{version}-%{release}' > gcc/DEV-PHASE
@ -298,6 +291,11 @@ rm -rf $RPM_BUILD_ROOT
%changelog
* Thu Sep 03 2009 Kalev Lember <kalev@smartlink.ee> - 4.4.1-2
- Update to gcc 4.4.1 20090902 svn 151328.
- Patches taken from native Fedora gcc-4.4.1-8.
- Another license update to keep it in sync with native gcc package.
* Sun Aug 23 2009 Kalev Lember <kalev@smartlink.ee> - 4.4.1-1
- Update to gcc 4.4.1 20090818 svn 150873.
- Patches taken from native Fedora gcc-4.4.1-6.

2
sources
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@ -1 +1 @@
a280c87e7d0a44a99a6bc84bbe3eb86d gcc-4.4.1-20090818.tar.bz2
eb2fb0d2c073de0b4edf78dab958aca4 gcc-4.4.1-20090902.tar.bz2