7 lines
392 B
Plaintext
7 lines
392 B
Plaintext
Microcode revision 0x2000065 for Intel Skylake-SP/X/W (family 6, model 85,
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stepping 4; CPUID 0x50654) CPUs that has been included into microcode-20191112
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release is disabled as it may cause system instability and the previous revision
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0x2000064 is used instead.
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Please refer to /usr/share/doc/microcode_ctl/caveats/06-55-04_readme
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and /usr/share/doc/microcode_ctl/README.caveats for details.
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