Tool to transform and deploy CPU microcode update for x86.
dc2b22a876
Since commit dracut-57~5[1], dracut uses a different set directories as default $fw_dir, which leads to not resetting it to a state where kernel-based FW directories (where the microcode for late load resides) are skipped and leads to having multiple microcode versions in the early cpio, which prevents the caveats mechanism from working properly. [1] https://github.com/dracutdevs/dracut/commit/95aeed8975dd * dracut_99microcode_ctl-fw_dir_override_module_init.sh: Check $fw_dir for the new default directory set as well in the condition for the $fw_dir reset check. * microcode_ctl.spec (Release): Bump to 2. (%changelog): Add a new record. Resolves: #2213125 Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com> |
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.gitignore | ||
01-microcode.conf | ||
06-2d-07_config | ||
06-2d-07_disclaimer | ||
06-2d-07_readme | ||
06-4e-03_config | ||
06-4e-03_disclaimer | ||
06-4e-03_readme | ||
06-4f-01_config | ||
06-4f-01_disclaimer | ||
06-4f-01_readme | ||
06-5e-03_config | ||
06-5e-03_disclaimer | ||
06-5e-03_readme | ||
06-8c-01_config | ||
06-8c-01_disclaimer | ||
06-8c-01_readme | ||
06-8e-9e-0x-0xca_config | ||
06-8e-9e-0x-0xca_disclaimer | ||
06-8e-9e-0x-0xca_readme | ||
06-8e-9e-0x-dell_config | ||
06-8e-9e-0x-dell_disclaimer | ||
06-8e-9e-0x-dell_readme | ||
06-55-04_config | ||
06-55-04_disclaimer | ||
06-55-04_readme | ||
99-microcode-override.conf | ||
0001-releasenote.md-eliminate-usage-of-U-0080.patch | ||
0002-releasenote.md-eliminate-most-of-the-trailing-whites.patch | ||
0003-releasenote.md-remove-excess-Release-Notes-headers.patch | ||
0004-releasenote.md-sort-the-entries-of-the-20230808-rele.patch | ||
0005-releasenote.md-fix-incorrect-platform-mask-for-RPL-H.patch | ||
0006-releasenote.md-fix-stepping-for-RPL-S.patch | ||
0007-releasenote.md-add-missing-06-ba-03-e0-to-the-new-mi.patch | ||
0008-releasenote.md-remove-the-duplicating-06-9e-0c-22-re.patch | ||
0009-releasenote.md-fix-old-revisions-for-06-8e-09-10-and.patch | ||
0010-releasenote.md-add-old-revisions-for-06-be-00-11-06-.patch | ||
check_caveats | ||
codenames.list | ||
dracut_99microcode_ctl-fw_dir_override_module_init.sh | ||
gating.yaml | ||
gen_provides.sh | ||
gen_updates2.py | ||
intel_config | ||
intel_disclaimer | ||
intel_readme | ||
microcode_ctl.spec | ||
microcode.service | ||
README | ||
README.caveats | ||
reload_microcode | ||
sources | ||
update_ucode |
The microcode_ctl package contains microcode files (vendor-provided binary data and/or code in proprietary format that affects behaviour of a device) for Intel CPUs that may be loaded into the CPU during boot. This directory contains information regarding various aspects of the provided microcode files and their usage. * LICENSE.intel-ucode "license" file from the Intel x86 CPU microcode archive. * README This file. * README.caveats Caveats (mechanism for enabling/disabling usage of sets of microcode files based on caveat configuration and user preferences) documentation. Also contains general information about microcode update behaviour and links with additional information about the relevant microarchitectural vulnerabilities. * README.intel-ucode "README.md" file from the Intel x86 CPU microcode archive. * RELEASE_NOTES.intel-ucode "releasenote.md" file from the Intel x86 CPU microcode archive. * SECURITY.intel-ucode "security.md" file from the Intel x86 CPU microcode archive. * SUMMARY.intel-ucode Information about supplied microcode files extracted from their headers, in a table form. Columns have the following meaning: * "Path": path to the microcode file under one of the following directories: * /usr/share/microcode_ctl/ucode_with_caveats/intel * /usr/share/microcode_ctl/ucode_with_caveats * /usr/share/microcode_ctl * /lib/firmware * /etc/firmware * "Offset": offset of the microcode blob within the micocode file in bytes. * "Ext. Offset": offset of the extended signature header within the microcode file in bytes. * "Data Size": size of microcode data in bytes. 0 means 2000 bytes. * "Total Size": size of microcode blob in bytes, incuding headers. 0 means 2048 bytes. * "CPUID": CPU ID signature (in format returned by the CPUID instruction). * "Platform ID Mask": mask of suitable Platform IDs (provided in bits 52..50 of MSR 0x17). * "Revision": microcode revision. * "Date": microcode creation date. * "Checksum": sum (in base 1<< 32) of all 32-bit values comprising the microcode (from Offset up to Offset + Total Size). * "Codenames": list of known CPU codenames associated with the CPUID and Platform ID Mask combination. Please refer to README.cavets, section "Microcode file structure" for additional information regarding microcode header fields. * caveats Directory that contains readme files for each specific caveat.