c0eebc51c5
- Update Intel CPU microcode to microcode-20230516 release:
- Addition of 06-be-00/0x01 (ADL-N A0) microcode at revision 0x10;
- Addition of 06-9a-04/0x40 (AZB A0) microcode at revision 0x4;
- Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006e05 up
to 0x2006f05;
- Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xa6 up to 0xaa;
- Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf0 up
to 0xf2;
- Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf0 up
to 0xf2;
- Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xf0 up
to 0xf2;
- Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xf0 up
to 0xf2;
- Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
revision 0xf4 up to 0xf6;
- Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xf0 up
to 0xf2;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xf0 up
to 0xf2;
- Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xf0 up
to 0xf2;
- Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xf0 up
to 0xf2;
- Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xf4 up
to 0xf8;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000161
up to 0x1000171;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003303
up to 0x4003501;
- Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
0x5003303 up to 0x5003501;
- Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002503
up to 0x7002601;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000389
up to 0xd000390;
- Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x1000211
up to 0x1000230;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb8
up to 0xba;
- Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x32 up
to 0x33;
- Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x28 up
to 0x2a;
- Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x42 up
to 0x44;
- Update of 06-8f-04/0x10 microcode from revision 0x2c000170 up to
0x2c0001d1;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode from revision
0x2b000181 up to 0x2b000461;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-04) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-04) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision
0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b000181
up to 0x2b000461;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-05) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-06) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-06/0x10 microcode from revision 0x2c000170 up to
0x2c0001d1;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b000181
up to 0x2b000461;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-06) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision
0x2b000181 up to 0x2b000461;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-08) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision
0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision
0x2b000181 up to 0x2b000461;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
0x429 up to 0x42a;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
intel-ucode/06-9a-03) from revision 0x429 up to 0x42a;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
intel-ucode/06-9a-04) from revision 0x429 up to 0x42a;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x429
up to 0x42a;
- Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf4 up
to 0xf6;
- Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf4
up to 0xf6;
- Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf4
up to 0xf6;
- Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf4
up to 0xf6;
- Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
0xf4 up to 0xf6;
- Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x57 up
to 0x58;
- Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x112 up
to 0x113;
- Update of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode from revision
0x410e up to 0x4112;
- Update of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode (in
intel-ucode/06-ba-02) from revision 0x410e up to 0x4112;
- Update of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode (in
intel-ucode/06-ba-03) from revision 0x410e up to 0x4112;
- Update of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode from revision 0x410e
up to 0x4112.
* .gitignore: Replace /microcode-20230214.tar.gz entry
with /microcode-20230516.tar.gz.
* 06-55-04_readme: Add a checksum for revision 0x2006f05.
* 06-8c-01_readme: Add a checksum for for revision 0xa6, which was
a part of microcode-20230214 release, and for revision 0xaa.
* 06-8e-9e-0x-0xca_readme: Add a checksum for revision 0xf4 of 06-8e-0c
microcode, a part of microcode-20230214 release, and checksums revision
0xf2/0xf6.
* 06-8e-9e-0x-dell_readme: Likewise.
* codenames.list: Add entries for CPU signatures 906a4/40 (AZB)
and b06e0/01 (ADL-N); correct stepping for b0671/32 (RPL-S B0
instead of S0); fix platform mask for b06a2 and b06a3 (RPL-P/H/U):
e0 instead of 07.
* microcode_ctl.spec (intel_ucode_version): Bump to 20230516.
(Release): Reset to 1.
(%build): Remove bogus *_DUPLICATE files with older microcode revisions.
(%changelog): Add a record.
* sources: Replace microcode-20230214.tar.gz record with
microcode-20230516.tar.gz.
Resolves: #2213124
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
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8 lines
121 B
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/microcode-20190918.tar.gz
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/microcode-20191115.tar.gz
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/microcode-20230516.tar.gz
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/06-2d-07
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/06-4e-03
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/06-55-04
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/06-5e-03
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