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microcode_ctl/06-8c-01_readme
Eugene Syromiatnikov ec7af6e702 Update Intel CPU microcode to microcode-20240531 release 
- Update Intel CPU microcode to microcode-20240531 release, addresses
  CVE-2023-22655, CVE-2023-23583. CVE-2023-28746, CVE-2023-38575,
  CVE-2023-39368, CVE-2023-42667, CVE-2023-43490, CVE-2023-45733,
  CVE-2023-46103, CVE-2023-49141:
  - Addition of 06-aa-04/0xe6 (MTL-H/U C0) microcode at revision 0x1c;
  - Addition of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-02) at
    revision 0x4121;
  - Addition of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-03) at
    revision 0x4121;
  - Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
    intel-ucode/06-ba-08) at revision 0x4121;
  - Addition of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
    intel-ucode/06-ba-08) at revision 0x4121;
  - Addition of 06-ba-08/0xe0 microcode at revision 0x4121;
  - Addition of 06-cf-01/0x87 (EMR-SP A0) microcode at revision
    0x21000230;
  - Addition of 06-cf-02/0x87 (EMR-SP A1) microcode (in
    intel-ucode/06-cf-01) at revision 0x21000230;
  - Addition of 06-cf-01/0x87 (EMR-SP A0) microcode (in
    intel-ucode/06-cf-02) at revision 0x21000230;
  - Addition of 06-cf-02/0x87 (EMR-SP A1) microcode at revision
    0x21000230;
  - Removal of 06-8f-04/0x10 microcode at revision 0x2c000290;
  - Removal of 06-8f-04/0x87 (SPR-SP E0/S1) microcode at revision
    0x2b0004d0;
  - Removal of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
    intel-ucode/06-8f-04) at revision 0x2c000290;
  - Removal of 06-8f-05/0x87 (SPR-SP E2) microcode (in
    intel-ucode/06-8f-04) at revision 0x2b0004d0;
  - Removal of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) at
    revision 0x2c000290;
  - Removal of 06-8f-06/0x87 (SPR-SP E3) microcode (in
    intel-ucode/06-8f-04) at revision 0x2b0004d0;
  - Removal of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
    intel-ucode/06-8f-04) at revision 0x2b0004d0;
  - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
    intel-ucode/06-8f-04) at revision 0x2c000290;
  - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
    intel-ucode/06-8f-04) at revision 0x2b0004d0;
  - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
    intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xb4 up to 0xb6;
  - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
    microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
    revision 0xf8 up to 0xfa;
  - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xf4 up
    to 0xf8;
  - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xf4 up
    to 0xf6;
  - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xf4 up
    to 0xf6;
  - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xfa up
    to 0xfc;
  - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000181
    up to 0x1000191;
  - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003604
    up to 0x4003605;
  - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
    0x5003604 up to 0x5003605;
  - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002703
    up to 0x7002802;
  - Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision
    0xe000014 up to 0xe000015;
  - Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x38 up
    to 0x3e;
  - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0003b9
    up to 0xd0003d1;
  - Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x1000268
    up to 0x1000290;
  - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3e up
    to 0x42;
  - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x22 up
    to 0x24;
  - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xc2
    up to 0xc4;
  - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x34 up
    to 0x36;
  - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x4e up
    to 0x50;
  - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from
    revision 0x2c000290 up to 0x2c000390;
  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
    intel-ucode/06-8f-05) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision
    0x2c000290 up to 0x2c000390;
  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b0004d0
    up to 0x2b0005c0;
  - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from
    revision 0x2c000290 up to 0x2c000390;
  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
    intel-ucode/06-8f-05) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
    intel-ucode/06-8f-05) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
    intel-ucode/06-8f-05) from revision 0x2c000290 up to 0x2c000390;
  - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
    intel-ucode/06-8f-05) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from
    revision 0x2c000290 up to 0x2c000390;
  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
    intel-ucode/06-8f-06) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
    intel-ucode/06-8f-06) from revision 0x2c000290 up to 0x2c000390;
  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
    intel-ucode/06-8f-06) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-06/0x10 microcode from revision 0x2c000290 up to
    0x2c000390;
  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b0004d0
    up to 0x2b0005c0;
  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
    intel-ucode/06-8f-06) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
    intel-ucode/06-8f-06) from revision 0x2c000290 up to 0x2c000390;
  - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
    intel-ucode/06-8f-06) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
    intel-ucode/06-8f-07) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
    intel-ucode/06-8f-07) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
    intel-ucode/06-8f-07) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision
    0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
    intel-ucode/06-8f-07) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from
    revision 0x2c000290 up to 0x2c000390;
  - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
    intel-ucode/06-8f-08) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
    intel-ucode/06-8f-08) from revision 0x2c000290 up to 0x2c000390;
  - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
    intel-ucode/06-8f-08) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from
    revision 0x2c000290 up to 0x2c000390;
  - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
    intel-ucode/06-8f-08) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
    intel-ucode/06-8f-08) from revision 0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision
    0x2c000290 up to 0x2c000390;
  - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision
    0x2b0004d0 up to 0x2b0005c0;
  - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x17 up
    to 0x19;
  - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
    0x32 up to 0x35;
  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
    intel-ucode/06-97-02) from revision 0x32 up to 0x35;
  - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
    from revision 0x32 up to 0x35;
  - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
    from revision 0x32 up to 0x35;
  - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
    intel-ucode/06-97-05) from revision 0x32 up to 0x35;
  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x32
    up to 0x35;
  - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
    from revision 0x32 up to 0x35;
  - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
    from revision 0x32 up to 0x35;
  - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
    0x430 up to 0x433;
  - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
    intel-ucode/06-9a-03) from revision 0x430 up to 0x433;
  - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
    intel-ucode/06-9a-04) from revision 0x430 up to 0x433;
  - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x430
    up to 0x433;
  - Update of 06-9a-04/0x40 (AZB A0) microcode from revision 0x5 up
    to 0x7;
  - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x24000024
    up to 0x24000026;
  - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf8 up
    to 0xfa;
  - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf8
    up to 0xfa;
  - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf8
    up to 0xfa;
  - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf8
    up to 0xfa;
  - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
    0xf8 up to 0xfa;
  - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x5d up
    to 0x5e;
  - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x11d up
    to 0x123;
  - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision
    0x411c up to 0x4121;
  - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
    intel-ucode/06-ba-02) from revision 0x411c up to 0x4121;
  - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
    intel-ucode/06-ba-03) from revision 0x411c up to 0x4121;
  - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x411c
    up to 0x4121;
  - Update of 06-be-00/0x11 (ADL-N A0) microcode from revision 0x12 up
    to 0x17;
  - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
    intel-ucode/06-bf-02) from revision 0x32 up to 0x35;
  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
    intel-ucode/06-bf-02) from revision 0x32 up to 0x35;
  - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x32 up
    to 0x35;
  - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
    from revision 0x32 up to 0x35;
  - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
    intel-ucode/06-bf-05) from revision 0x32 up to 0x35;
  - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
    intel-ucode/06-bf-05) from revision 0x32 up to 0x35;
  - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
    from revision 0x32 up to 0x35;
  - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x32 up
    to 0x35.

* .gitignore: Replace /microcode-20231009.tar.gz entry
with /microcode-20240531.tar.gz.
* 0001-releasenote.md-eliminate-usage-of-U-0080.patch
* 0002-releasenote.md-eliminate-most-of-the-trailing-whites.patch: Remove.
* 0003-releasenote.md-remove-excess-Release-Notes-headers.patch: Likewise.
* 0004-releasenote.md-sort-the-entries-of-the-20230808-rele.patch: Likewise.
* 0005-releasenote.md-fix-incorrect-platform-mask-for-RPL-H.patch: Likewise.
* 0006-releasenote.md-fix-stepping-for-RPL-S.patch: Likewise.
* 0007-releasenote.md-add-missing-06-ba-03-e0-to-the-new-mi.patch: Likewise.
* 0008-releasenote.md-remove-the-duplicating-06-9e-0c-22-re.patch: Likewise.
* 0009-releasenote.md-fix-old-revisions-for-06-8e-09-10-and.patch: Likewise.
* 0010-releasenote.md-add-old-revisions-for-06-be-00-11-06-.patch: Likewise.
* 0011-releasenote.md-add-stub-release-notes-for-microcode-.patch: Likewise.
* 06-8c-01_readme: Add a checksum for revision 0xb6.
* 06-8e-9e-0x-0xca_readme: Add checksum for new microcode revisions
of 06-8e-0c and 06-9e-0[9acd] CPUIDs.
* 06-8e-9e-0x-dell_readme: Likewise.
* codenames.list: Add descriptors for signatures a06a4 (06-aa-04, MTL),
c06f1 (06-cf-01, EMR-SP A0), and c06f2 (06-cf-02, EMR-SP A1).
* microcode_ctl.spec (intel_ucode_version): Bump to 20240531.
(Source0): Add the URL back.
(Patch0001, Patch0002, Patch0003, Patch0004, Patch0005, Patch0006,
Patch0007, Patch0008, Patch0009, Patch0010, Patch0011): Remove.
(%prep): Don't apply the patches.
(%changelog): Add a record.
* sources: Replace microcode-20231009.tar.gz record with
microcode-20240531.tar.gz.
* update_ucode: Also check for symvers.xz in addition to symvers.gz.

Resolves: RHEL-30859
Resolves: RHEL-30862
Resolves: RHEL-30865
Resolves: RHEL-30868
Resolves: RHEL-30871
Resolves: RHEL-41093
Resolves: RHEL-41108
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2024-07-31 05:59:21 +02:00

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Some Intel Tiger Lake-UP3/UP4 CPU models (TGL, family 6, model 140, stepping 1)
had reports of system hangs when a microcode update, that was included
since microcode-20201110 update, was applied[1]. In order to address this,
microcode update had been disabled by default on these systems. The revision
0x88 seems to have fixed the aforementioned issue, hence it is enabled
by default (but can be disabled explicitly; see below).
[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/44
For the reference, SHA1 checksums of 06-8c-01 microcode files containing
microcode revisions in question are listed below:
* 06-8c-01, revision 0x68: 2204a6dee1688980cd228268fdf4b6ed5904fe04
* 06-8c-01, revision 0x88: 61b6590feb2769046d5b0c394179beaf2df51290
* 06-8c-01, revision 0x9a: 48b3ae8d27d8138b5b47052d2f8184bf555ad18e
* 06-8c-01, revision 0xa4: 70753f54f5be84376bdebeb710595e4dc2f6d92f
* 06-8c-01, revision 0xa6: fdcf89e3a15a20df8aeee215b78bf5d13d731044
* 06-8c-01, revision 0xaa: cf84883f6b3184690c25ccade0b10fa839ac8657
* 06-8c-01, revision 0xac: b9f342e564a0be372ed1f4709263bf811feb022a
* 06-8c-01, revision 0xb4: 6596bb8696cde85538bb833d090f0b7a42d6ae14
* 06-8c-01, revision 0xb6: 76556e8248a89f38cd55a6c83dccc995ba176091
Please contact your system vendor for a BIOS/firmware update that contains
the latest microcode version. For the information regarding microcode versions
required for mitigating specific side-channel cache attacks, please refer
to the following knowledge base articles:
* CVE-2020-8695 (Information disclosure issue in Intel SGX via RAPL interface),
CVE-2020-8696 (Vector Register Leakage-Active),
CVE-2020-8698 (Fast Forward Store Predictor):
https://access.redhat.com/articles/5569051
* CVE-2020-24489 (VT-d-related Privilege Escalation),
CVE-2020-24511 (Improper Isolation of Shared Resources),
CVE-2020-24512 (Observable Timing Discrepancy),
CVE-2020-24513 (Information Disclosure on Some Intel Atom Processors):
https://access.redhat.com/articles/6101171
* CVE-2021-0145 (Fast store forward predictor - Cross Domain Training):
https://access.redhat.com/articles/6716541
* CVE-2022-21123 (Shared Buffers Data Read):
https://access.redhat.com/articles/6963124
The information regarding disabling microcode update is provided below.
To disable 06-8c-01 microcode updates for a specific kernel
version, please create a file "disallow-intel-06-8c-01" inside
/lib/firmware/<kernel_version> directory, run
"/usr/libexec/microcode_ctl/update_ucode" to remove it from the firmware
directory where microcode is available for late microcode update, and run
"dracut -f --kver <kernel_version>", so initramfs for this kernel version
is regenerated, for example:
touch /lib/firmware/3.10.0-862.9.1/disallow-intel-06-8c-01
/usr/libexec/microcode_ctl/update_ucode
dracut -f --kver 3.10.0-862.9.1
To avoid addition of this microcode for all kernels, please create file
"/etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-8c-01", run
"/usr/libexec/microcode_ctl/update_ucode" for late microcode updates,
and "dracut -f --regenerate-all" for early microcode updates:
mkdir -p /etc/microcode_ctl/ucode_with_caveats
touch /etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-8c-01
/usr/libexec/microcode_ctl/update_ucode
dracut -f --regenerate-all
Please refer to /usr/share/doc/microcode_ctl/README.caveats for additional
information.
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