Tool to transform and deploy CPU microcode update for x86.
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Denys Vlasenko 207db045e8 Update Intel CPU microcode to microcode-20260210 release
- Update Intel CPU microcode to microcode-20260210 release (RHEL-150997)
- Microcode files (/platform_mask shown) with revision updates (in hex):
  06-6a-06/87: Ice Lake-X: d000410 to d000421
  06-6c-01/10: Ice Lake-D: 10002e0 to 10002f1
  06-7e-05/80: Ice Lake-L: 00ca to 00cc
  06-8c-01/80: Tiger Lake: 00bc to 00be
  06-8c-02/c2: Tiger Lake: 003c to 003e
  06-8d-01/c2: Tiger Lake-H: 0056 to 0058
  06-8f-07/87: Sapphire Rapids: 2b000650 to 2b000661
  06-8f-08/10: Sapphire Rapids with HBM: 2c000410 to 2c000421
  06-8f-08/87: Sapphire Rapids: 2b000650 to 2b000661
  06-97-02/07: Alder Lake: 003d to 003e
  06-97-05/07: Alder Lake: 003d to 003e
  06-9a-03/80: Alder Lake-L: 043a to 043b
  06-9a-04/80: Alder Lake-L: 043a to 043b
  06-9a-04/40: Arizona Beach (Atom C11xx): 000b to 000c
  06-9a-04/80: Alder Lake-L: 043a to 043b
  06-a7-01/02: Rocket Lake: 0064 to 0065
  06-aa-04/e6: Meteor Lake-L: 0025 to 0028
  06-ad-01/20: Granite Rapids-X: a000124 to a000133
  06-ad-01/95: Granite Rapids-X: 10003f0 to 1000405
  06-ae-01/97: Granite Rapids-D: 1000273 to 10002f3
  06-b5-00/80: Arrow Lake-U: 000a to 000d
  06-b7-01/32: Raptor Lake: 0132 to 0133
  06-ba-02/e0: Raptor Lake-P: 6133 to 6134
  06-ba-03/e0: Raptor Lake-P: 6133 to 6134
  06-be-00/19: Gracemont (Alder Lake-N): 001e to 0021
  06-bf-02/07: Raptor Lake-S: 003d to 003e
  06-bf-05/07: Raptor Lake-S: 003d to 003e
  06-c5-02/82: Arrow Lake-H: 011a to 011b
  06-c6-02/82: Arrow Lake: 011a to 011b
  06-cf-02/87: Emerald Rapids: 210002c0 to 210002d3
Resolves: RHEL-150997

Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
2026-02-25 04:10:43 +01:00
.gitignore Update Intel CPU microcode to microcode-20260210 release 2026-02-25 04:10:43 +01:00
01-microcode.conf Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
06-4f-01_config Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
06-4f-01_disclaimer Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
06-4f-01_readme Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
06-8f-08_config Update Intel CPU microcode to microcode-20251111 release 2025-11-24 13:18:06 +01:00
06-8f-08_disclaimer Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
06-8f-08_readme Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
99-microcode-override.conf Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
0001-releasenote.md-cleanup-eliminated-usage-of-U-0080.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0002-releasenote.md-remove-excess-Release-Notes-headers.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0003-releasenote.md-sort-the-entries-of-the-20230808-rele.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0004-releasenote.md-fix-incorrect-platform-mask-for-RPL-H.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0005-releasenote.md-fix-stepping-for-RPL-S.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0006-releasenote.md-add-missing-06-ba-03-e0-to-the-new-mi.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0007-releasenote.md-remove-the-duplicating-06-9e-0c-22-re.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0008-releasenote.md-fix-old-revisions-for-06-8e-09-10-and.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0009-releasenote.md-add-old-revisions-for-06-be-00-11-06-.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0010-releasenote.md-eliminate-trailing-white-space.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0011-releasenote.md-add-information-about-updates-and-rem.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0012-releasenote.md-add-information-about-06-ba-08-microc.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0013-releasenote.md-fix-whitespace-in-microcode-20240531-.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0014-releasenote.md-use-None-for-the-empty-list-of-new-pl.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0015-releasenote.md-add-missing-old-revision-in-microcode.patch Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
0016-releasenote.md-use-new-lines-consistently.patch Update Intel CPU microcode to microcode-20251111 release 2025-11-24 13:18:06 +01:00
0017-releasenote.md-add-information-about-removal-of-CLX-.patch Update Intel CPU microcode to microcode-20251111 release 2025-11-24 13:18:06 +01:00
check_caveats Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
codenames.list Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
dracut_99microcode_ctl-fw_dir_override_module_init.sh Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
gating.yaml Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
gen_provides.sh Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
gen_updates2.py Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
intel_config Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
intel_disclaimer Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
intel_readme Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
microcode_ctl.spec Update Intel CPU microcode to microcode-20260210 release 2026-02-25 04:10:43 +01:00
microcode.service Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
README Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
README.caveats Update Intel CPU microcode to microcode-20250512 release 2025-06-05 13:14:04 +02:00
reload_microcode Bring in RHEL-specific packaging bits 2024-07-29 19:58:41 +02:00
sources Update Intel CPU microcode to microcode-20260210 release 2026-02-25 04:10:43 +01:00
update_ucode update_ucode: typo fix 2024-09-23 17:19:39 +02:00

The microcode_ctl package contains microcode files (vendor-provided binary data
and/or code in proprietary format that affects behaviour of a device) for Intel
CPUs that may be loaded into the CPU during boot.

This directory contains information regarding various aspects of the provided
microcode files and their usage.

 * LICENSE.intel-ucode
   "license" file from the Intel x86 CPU microcode archive.
 * README
   This file.
 * README.caveats
   Caveats (mechanism for enabling/disabling usage of sets of microcode files
   based on caveat configuration and user preferences) documentation.
   Also contains general information about microcode update behaviour and links
   with additional information about the relevant microarchitectural
   vulnerabilities.
 * README.intel-ucode
   "README.md" file from the Intel x86 CPU microcode archive.
 * RELEASE_NOTES.intel-ucode
   "releasenote.md" file from the Intel x86 CPU microcode archive.
 * SECURITY.intel-ucode
   "security.md" file from the Intel x86 CPU microcode archive.
 * SUMMARY.intel-ucode
   Information about supplied microcode files extracted from their headers,
   in a table form.  Columns have the following meaning:
    * "Path": path to the microcode file under one of the following directories:
       * /usr/share/microcode_ctl/ucode_with_caveats/intel
       * /usr/share/microcode_ctl/ucode_with_caveats
       * /usr/share/microcode_ctl
       * /lib/firmware
       * /etc/firmware
    * "Offset": offset of the microcode blob within the micocode file in bytes.
    * "Ext. Offset": offset of the extended signature header within
      the microcode file in bytes.
    * "Data Size": size of microcode data in bytes.  0 means 2000 bytes.
    * "Total Size": size of microcode blob in bytes, incuding headers.
      0 means 2048 bytes.
    * "CPUID": CPU ID signature (in format returned by the CPUID instruction).
    * "Platform ID Mask": mask of suitable Platform IDs (provided in bits
      52..50 of MSR 0x17).
    * "Revision": microcode revision.
    * "Date": microcode creation date.
    * "Checksum": sum (in base 1<< 32) of all 32-bit values comprising
      the microcode (from Offset up to Offset + Total Size).
    * "Codenames": list of known CPU codenames associated with the CPUID
      and Platform ID Mask combination.
   Please refer to README.cavets, section "Microcode file structure"
   for additional information regarding microcode header fields.
 * caveats
   Directory that contains readme files for each specific caveat.