microcode_ctl/SOURCES
2022-09-21 10:12:02 +00:00
..
01-microcode.conf import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
06-2d-07_config import microcode_ctl-20210608-1.el8 2021-09-09 22:12:22 +00:00
06-2d-07_disclaimer import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
06-2d-07_readme import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
06-4e-03_config import microcode_ctl-20210608-1.el8 2021-09-09 22:12:22 +00:00
06-4e-03_disclaimer import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
06-4e-03_readme import microcode_ctl-20220510-1.el8 2022-06-23 17:27:35 +00:00
06-4f-01_config import microcode_ctl-20210608-1.el8 2021-09-09 22:12:22 +00:00
06-4f-01_disclaimer import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
06-4f-01_readme import microcode_ctl-20210608-1.el8 2021-09-09 22:12:22 +00:00
06-5e-03_config import microcode_ctl-20210608-1.el8 2021-09-09 22:12:22 +00:00
06-5e-03_disclaimer import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
06-5e-03_readme import microcode_ctl-20220510-1.el8 2022-06-23 17:27:35 +00:00
06-8c-01_config import microcode_ctl-20210608-1.el8 2021-09-09 22:12:22 +00:00
06-8c-01_disclaimer import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
06-8c-01_readme import microcode_ctl-20220510-1.el8 2022-06-23 17:27:35 +00:00
06-8e-9e-0x-0xca_config import microcode_ctl-20210608-1.el8 2021-09-09 22:12:22 +00:00
06-8e-9e-0x-0xca_disclaimer import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
06-8e-9e-0x-0xca_readme import microcode_ctl-20220510-1.el8 2022-06-23 17:27:35 +00:00
06-8e-9e-0x-dell_config import microcode_ctl-20210608-1.el8 2021-09-09 22:12:22 +00:00
06-8e-9e-0x-dell_disclaimer import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
06-8e-9e-0x-dell_readme import microcode_ctl-20220510-1.el8 2022-06-23 17:27:35 +00:00
06-55-04_config import microcode_ctl-20210608-1.el8 2021-09-09 22:12:22 +00:00
06-55-04_disclaimer import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
06-55-04_readme import microcode_ctl-20220809-1.el8 2022-09-21 10:12:02 +00:00
99-microcode-override.conf import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
check_caveats import microcode_ctl-20210608-1.el8 2021-09-09 22:12:22 +00:00
codenames.list import microcode_ctl-20220510-1.el8 2022-06-23 17:27:35 +00:00
dracut_99microcode_ctl-fw_dir_override_module_init.sh import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
gen_provides.sh import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
gen_updates2.py import microcode_ctl-20210216-1.20210525.1.el8_4 2021-09-09 22:12:19 +00:00
intel_config import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
intel_disclaimer import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
intel_readme import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
microcode.service import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
README import microcode_ctl-20210216-1.20210525.1.el8_4 2021-09-09 22:12:19 +00:00
README.caveats import microcode_ctl-20220809-1.el8 2022-09-21 10:12:02 +00:00
reload_microcode import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00
update_ucode import microcode_ctl-20201112-1.el8 2021-09-09 22:12:10 +00:00

The microcode_ctl package contains microcode files (vendor-provided binary data
and/or code in proprietary format that affects behaviour of a device) for Intel
CPUs that may be loaded into the CPU during boot.

This directory contains information regarding various aspects of the provided
microcode files and their usage.

 * LICENSE.intel-ucode
   "license" file from the Intel x86 CPU microcode archive.
 * README
   This file.
 * README.caveats
   Caveats (mechanism for enabling/disabling usage of sets of microcode files
   based on caveat configuration and user preferences) documentation.
   Also contains general information about microcode update behaviour and links
   with additional information about the relevant microarchitectural
   vulnerabilities.
 * README.intel-ucode
   "README.md" file from the Intel x86 CPU microcode archive.
 * RELEASE_NOTES.intel-ucode
   "releasenote.md" file from the Intel x86 CPU microcode archive.
 * SECURITY.intel-ucode
   "security.md" file from the Intel x86 CPU microcode archive.
 * SUMMARY.intel-ucode
   Information about supplied microcode files extracted from their headers,
   in a table form.  Columns have the following meaning:
    * "Path": path to the microcode file under one of the following directories:
       * /usr/share/microcode_ctl/ucode_with_caveats/intel
       * /usr/share/microcode_ctl/ucode_with_caveats
       * /usr/share/microcode_ctl
       * /lib/firmware
       * /etc/firmware
    * "Offset": offset of the microcode blob within the micocode file in bytes.
    * "Ext. Offset": offset of the extended signature header within
      the microcode file in bytes.
    * "Data Size": size of microcode data in bytes.  0 means 2000 bytes.
    * "Total Size": size of microcode blob in bytes, incuding headers.
      0 means 2048 bytes.
    * "CPUID": CPU ID signature (in format returned by the CPUID instruction).
    * "Platform ID Mask": mask of suitable Platform IDs (provided in bits
      52..50 of MSR 0x17).
    * "Revision": microcode revision.
    * "Date": microcode creation date.
    * "Checksum": sum (in base 1<< 32) of all 32-bit values comprising
      the microcode (from Offset up to Offset + Total Size).
    * "Codenames": list of known CPU codenames associated with the CPUID
      and Platform ID Mask combination.
   Please refer to README.cavets, section "Microcode file structure"
   for additional information regarding microcode header fields.
 * caveats
   Directory that contains readme files for each specific caveat.