Tool to transform and deploy CPU microcode update for x86.
- Update Intel CPU microcode to microcode-20260812 release (RHEL-240770) - Security advisories: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01379.html CVE-2025-31936 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01404.html CVE-2025-31938 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01423.html CVE-2026-20917 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01428.html CVE-2025-35973 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01435.html CVE-2026-20716 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01441.html CVE-2026-20760 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01442.html CVE-2026-20713, CVE-2026-20901 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01443.html CVE-2026-20707 - New microcode files (in hex): 06-b7-04: Raptor Lake: revision 0137 06-d5-01: Wildcat Lake: revision 000c 06-d7-00: Bartlett Lake: revision 0137 - Microcode files (/platform_mask shown) with revision updates (in hex): 06-6a-06/87: Ice Lake-X: d000421 to d000433 06-6c-01/10: Ice Lake-D: 10002f1 to 1000301 06-7e-05/80: Ice Lake-L: 00cc to 00ce 06-8f-07/87: Sapphire Rapids: 2b000670 to 2b000685 06-8f-08/10: Sapphire Rapids with HBM: 2c000421 to 2c000435 06-8f-08/87: Sapphire Rapids: 2b000670 to 2b000685 06-a7-01/02: Rocket Lake: 0065 to 0066 06-ad-01/20: Granite Rapids-X: a000142 to a000151 06-ad-01/95: Granite Rapids-X: 1000423 to 1000434 06-ae-01/97: Granite Rapids-D: 1000307 to 1000309 06-af-03/01: Crestmont (Sierra Forest): 30003a3 to 30003b2 06-b5-00/80: Arrow Lake-U: 000d to 000e 06-b7-01/36: Raptor Lake: 0133 to 0137, platform bit 04 added 06-bd-01/80: Lunar Lake: 0126 to 0128 06-c5-02/82: Arrow Lake-H: 0121 to 0122 06-c6-02/82: Arrow Lake: 0121 to 0122 06-cc-02/94: Panther Lake: 011b to 011c, platform bit 04 added, also used for 06-e5-02 06-cc-03/94: Panther Lake: 011b to 011c, platform bit 04 added, also used for 06-e5-02 06-cf-02/87: Emerald Rapids: 210002e0 to 210002f4 Resolves: RHEL-240770 Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com> |
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| .gitignore | ||
| 01-microcode.conf | ||
| 06-2d-07_config | ||
| 06-2d-07_disclaimer | ||
| 06-2d-07_readme | ||
| 06-4e-03_config | ||
| 06-4e-03_disclaimer | ||
| 06-4e-03_readme | ||
| 06-4f-01_config | ||
| 06-4f-01_disclaimer | ||
| 06-4f-01_readme | ||
| 06-5e-03_config | ||
| 06-5e-03_disclaimer | ||
| 06-5e-03_readme | ||
| 06-8c-01_config | ||
| 06-8c-01_disclaimer | ||
| 06-8c-01_readme | ||
| 06-8e-9e-0x-0xca_config | ||
| 06-8e-9e-0x-0xca_disclaimer | ||
| 06-8e-9e-0x-0xca_readme | ||
| 06-8e-9e-0x-dell_config | ||
| 06-8e-9e-0x-dell_disclaimer | ||
| 06-8e-9e-0x-dell_readme | ||
| 06-8f-08_config | ||
| 06-8f-08_disclaimer | ||
| 06-8f-08_readme | ||
| 06-55-04_config | ||
| 06-55-04_disclaimer | ||
| 06-55-04_readme | ||
| 99-microcode-override.conf | ||
| 0001-releasenote.md-cleanup-eliminated-usage-of-U-0080.patch | ||
| 0002-releasenote.md-remove-excess-Release-Notes-headers.patch | ||
| 0003-releasenote.md-sort-the-entries-of-the-20230808-rele.patch | ||
| 0004-releasenote.md-fix-incorrect-platform-mask-for-RPL-H.patch | ||
| 0005-releasenote.md-fix-stepping-for-RPL-S.patch | ||
| 0006-releasenote.md-add-missing-06-ba-03-e0-to-the-new-mi.patch | ||
| 0007-releasenote.md-remove-the-duplicating-06-9e-0c-22-re.patch | ||
| 0008-releasenote.md-fix-old-revisions-for-06-8e-09-10-and.patch | ||
| 0009-releasenote.md-add-old-revisions-for-06-be-00-11-06-.patch | ||
| 0010-releasenote.md-eliminate-trailing-white-space.patch | ||
| 0011-releasenote.md-add-information-about-updates-and-rem.patch | ||
| 0012-releasenote.md-add-information-about-06-ba-08-microc.patch | ||
| 0013-releasenote.md-fix-whitespace-in-microcode-20240531-.patch | ||
| 0014-releasenote.md-use-None-for-the-empty-list-of-new-pl.patch | ||
| 0015-releasenote.md-add-missing-old-revision-in-microcode.patch | ||
| 0016-releasenote.md-use-new-lines-consistently.patch | ||
| 0017-releasenote.md-add-information-about-removal-of-CLX-.patch | ||
| 0101-releasenote.md-drop-Removed-Platforms-from-microcode.patch | ||
| check_caveats | ||
| codenames.list | ||
| dracut_99microcode_ctl-fw_dir_override_module_init.sh | ||
| gating.yaml | ||
| gen_provides.sh | ||
| gen_updates2.py | ||
| intel_config | ||
| intel_disclaimer | ||
| intel_readme | ||
| microcode_ctl.spec | ||
| microcode.service | ||
| README | ||
| README.caveats | ||
| reload_microcode | ||
| sources | ||
| update_ucode | ||
The microcode_ctl package contains microcode files (vendor-provided binary data
and/or code in proprietary format that affects behaviour of a device) for Intel
CPUs that may be loaded into the CPU during boot.
This directory contains information regarding various aspects of the provided
microcode files and their usage.
* LICENSE.intel-ucode
"license" file from the Intel x86 CPU microcode archive.
* README
This file.
* README.caveats
Caveats (mechanism for enabling/disabling usage of sets of microcode files
based on caveat configuration and user preferences) documentation.
Also contains general information about microcode update behaviour and links
with additional information about the relevant microarchitectural
vulnerabilities.
* README.intel-ucode
"README.md" file from the Intel x86 CPU microcode archive.
* RELEASE_NOTES.intel-ucode
"releasenote.md" file from the Intel x86 CPU microcode archive.
* SECURITY.intel-ucode
"security.md" file from the Intel x86 CPU microcode archive.
* SUMMARY.intel-ucode
Information about supplied microcode files extracted from their headers,
in a table form. Columns have the following meaning:
* "Path": path to the microcode file under one of the following directories:
* /usr/share/microcode_ctl/ucode_with_caveats/intel
* /usr/share/microcode_ctl/ucode_with_caveats
* /usr/share/microcode_ctl
* /lib/firmware
* /etc/firmware
* "Offset": offset of the microcode blob within the micocode file in bytes.
* "Ext. Offset": offset of the extended signature header within
the microcode file in bytes.
* "Data Size": size of microcode data in bytes. 0 means 2000 bytes.
* "Total Size": size of microcode blob in bytes, incuding headers.
0 means 2048 bytes.
* "CPUID": CPU ID signature (in format returned by the CPUID instruction).
* "Platform ID Mask": mask of suitable Platform IDs (provided in bits
52..50 of MSR 0x17).
* "Revision": microcode revision.
* "Date": microcode creation date.
* "Checksum": sum (in base 1<< 32) of all 32-bit values comprising
the microcode (from Offset up to Offset + Total Size).
* "Codenames": list of known CPU codenames associated with the CPUID
and Platform ID Mask combination.
Please refer to README.cavets, section "Microcode file structure"
for additional information regarding microcode header fields.
* caveats
Directory that contains readme files for each specific caveat.