735fed49e1
- Update Intel CPU microcode to microcode-20241112 release, addresses CVE-2024-21820, CVE-2024-21853, CVE-2024-23918, CVE-2024-23984: - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-05) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-05) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-05) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-05) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-06) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-06) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-06) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-06) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-07) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-07) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-07) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-07) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-08) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-08) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-08) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-08) from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision 0x2b0005c0 up to 0x2b000603; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision 0x36 up to 0x37; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from revision 0x36 up to 0x37; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x36 up to 0x37; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x36 up to 0x37; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x36 up to 0x37; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x36 up to 0x37; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x36 up to 0x37; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x36 up to 0x37; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x434 up to 0x435; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x434 up to 0x435; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x434 up to 0x435; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x434 up to 0x435; - Update of 06-aa-04/0xe6 (MTL-H/U C0) microcode from revision 0x1f up to 0x20; - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x129 up to 0x12b; - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision 0x4122 up to 0x4123; - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in intel-ucode/06-ba-02) from revision 0x4122 up to 0x4123; - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-02) from revision 0x4122 up to 0x4123; - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in intel-ucode/06-ba-03) from revision 0x4122 up to 0x4123; - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4122 up to 0x4123; - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-03) from revision 0x4122 up to 0x4123; - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in intel-ucode/06-ba-08) from revision 0x4122 up to 0x4123; - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in intel-ucode/06-ba-08) from revision 0x4122 up to 0x4123; - Update of 06-ba-08/0xe0 microcode from revision 0x4122 up to 0x4123; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x36 up to 0x37; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) from revision 0x36 up to 0x37; - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x36 up to 0x37; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02) from revision 0x36 up to 0x37; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x36 up to 0x37; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) from revision 0x36 up to 0x37; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05) from revision 0x36 up to 0x37; - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x36 up to 0x37; - Update of 06-cf-01/0x87 (EMR-SP A0) microcode from revision 0x21000230 up to 0x21000283; - Update of 06-cf-02/0x87 (EMR-SP A1) microcode (in intel-ucode/06-cf-01) from revision 0x21000230 up to 0x21000283; - Update of 06-cf-01/0x87 (EMR-SP A0) microcode (in intel-ucode/06-cf-02) from revision 0x21000230 up to 0x21000283; - Update of 06-cf-02/0x87 (EMR-SP A1) microcode from revision 0x21000230 up to 0x21000283. * .gitignore: Replace /microcode-20240910.tar.gz entry with /microcode-20241112.tar.gz. * microcode_ctl.spec (intel_ucode_version): Bump to 20241112. (Release): Reset to 1. (%changelog): Add a record, fix a typo in the previous one. * sources: Replace microcode-20240910.tar.gz record with microcode-20241112.tar.gz. Resolves: RHEL-67335 Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
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166 B
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SHA512 (microcode-20241112.tar.gz) = de4ddb0a77e17a4a5b6789537cf71db9ab884c795ef5c77b17d3392fda0fbb4d860cc27bcdbd7512d9412d6f934e6771e889be262b20e77433e0f72d3b6cf1f0
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