import CS microcode_ctl-20250211-1.el10

2025-03-27 13:11:06 +00:00
64 changed files with 662 additions and 3005 deletions
--- a/.gitignore
+++ b/.gitignore
@ -1,9 +1 @@
-SOURCES/06-2d-07
-SOURCES/06-4e-03
-SOURCES/06-55-04
-SOURCES/06-55-06
-SOURCES/06-5e-03
-SOURCES/06-8f-08
-SOURCES/microcode-20190918.tar.gz
-SOURCES/microcode-20191115.tar.gz
-SOURCES/microcode-20250512.tar.gz
+microcode-20250211.tar.gz
--- a/.microcode_ctl.metadata
+++ b/.microcode_ctl.metadata
@ -1,9 +0,0 @@
-bcf2173cd3dd499c37defbc2533703cfa6ec2430 SOURCES/06-2d-07
-06432a25053c823b0e2a6b8e84e2e2023ee3d43e SOURCES/06-4e-03
-2e405644a145de0f55517b6a9de118eec8ec1e5a SOURCES/06-55-04
-01a4238bf65e14179cfc1bc592cce0666306e217 SOURCES/06-55-06
-86c60ee7d5d0d7115a4962c1c61ceecb0fd3a95a SOURCES/06-5e-03
-adf8b6aa2718ff16f3d19d34ec389270073d2b5e SOURCES/06-8f-08
-bc20d6789e6614b9d9f88ee321ab82bed220f26f SOURCES/microcode-20190918.tar.gz
-774636f4d440623b0ee6a2dad65260e81208074d SOURCES/microcode-20191115.tar.gz
-f222241496bf0872b959b03b04b0265165e4c4b3 SOURCES/microcode-20250512.tar.gz
--- a/SOURCES/0001-releasenote.md-cleanup-eliminated-usage-of-U-0080.patch
+++ b/SOURCES/0001-releasenote.md-cleanup-eliminated-usage-of-U-0080.patch
@ -1,7 +1,7 @@
-From 8bed0de45267fff5c64b4da145ae2464ec578bb9 Mon Sep 17 00:00:00 2001
+From 38e1f92bdb74ccf5bf672daaa83c946bcfb84802 Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Thu, 10 Aug 2023 15:20:03 +0200
-Subject: [PATCH 01/17] releasenote.md: cleanup eliminated usage of U+0080
+Subject: [PATCH 01/16] releasenote.md: cleanup eliminated usage of U+0080

 microcode-20231114 release has removed the baffling usage of U+0080;
 however, unfortunately, it also has misaligned the "New Platforms" table
@ -15,10 +15,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 21 insertions(+), 21 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index c1e4821..339d3fb 100644
+index 300576b..a8ab4e5 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -571,8 +571,8 @@
+@@ -484,8 +484,8 @@
 
 | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products
 |:---------------|:---------|:------------|:---------|:---------|:---------
@ -29,7 +29,7 @@ index c1e4821..339d3fb 100644
 
 ### Updated Platforms
 
-@@ -802,25 +802,25 @@
+@@ -715,25 +715,25 @@
 
 | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products
 |:---------------|:---------|:------------|:---------|:---------|:---------
--- a/SOURCES/0002-releasenote.md-remove-excess-Release-Notes-headers.patch
+++ b/SOURCES/0002-releasenote.md-remove-excess-Release-Notes-headers.patch
@ -1,7 +1,7 @@
-From 4538386feddff2069a52ea054b9240f4ca783f3d Mon Sep 17 00:00:00 2001
+From 9ba332e856293a51b9470bb41789a3b16953338a Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 22 Aug 2023 19:50:43 +0200
-Subject: [PATCH 02/17] releasenote.md: remove excess "Release Notes" headers
+Subject: [PATCH 02/16] releasenote.md: remove excess "Release Notes" headers

 Starting with microcode-20220809, the first-level "Release Notes" header
 is duplicated for unknown reason;  remove it, as it does not make sense
@ -18,10 +18,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 3 insertions(+), 13 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index 339d3fb..da3981f 100644
+index a8ab4e5..096da93 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -199,7 +199,6 @@
+@@ -112,7 +112,6 @@
 | ICX-SP         | Dx/M1    | 06-6a-06/87 | 0d0003e7 | N/A      | Xeon Scalable Gen3
 
 
@ -29,7 +29,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20241029](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20241029)
 
 ### Purpose
-@@ -219,7 +218,6 @@
+@@ -132,7 +131,6 @@
 | RPL-E/HX/S     | B0       | 06-b7-01/32 | 00000129 | 0000012b | Core Gen13/Gen14
 
 
@ -37,7 +37,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20240910](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20240910)
 
 ### Purpose
-@@ -254,7 +252,6 @@
+@@ -167,7 +165,6 @@
 | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004121 | 00004122 | Core Gen13
 
 
@ -45,7 +45,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20240813](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20240813)
 
 ## Update: Corrected the MCU file for 06-a5-03
-@@ -329,7 +326,6 @@
+@@ -242,7 +239,6 @@
 | WHL-U          | W0       | 06-8e-0b/d0 | 000000f4 | 000000f6 | Core Gen8 Mobile
 
 
@ -53,7 +53,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20240531](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20240531)
 
 ### Purpose
-@@ -350,7 +346,6 @@
+@@ -263,7 +259,6 @@
 | GLK            | B0       | 06-7a-01/01 | 00000040 | 00000042 | Pentium Silver N/J5xxx, Celeron N/J4xxx
 
 
@ -61,7 +61,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20240514](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20240514)
 
 ### Purpose
-@@ -392,7 +387,6 @@
+@@ -305,7 +300,6 @@
 | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000590 | 2b0005c0 | Xeon Scalable Gen4
 | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000590 | 2b0005c0 | Xeon Scalable Gen4
 
@ -69,7 +69,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20240312](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20240312)
 
 ### Purpose
-@@ -488,7 +482,6 @@
+@@ -401,7 +395,6 @@
 | WHL-U          | V0       | 06-8e-0c/94 | 000000f8 | 000000fa | Core Gen8 Mobile
 
 
@ -77,7 +77,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20231114](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20231114)
 
 ### Purpose
-@@ -541,7 +534,6 @@
+@@ -454,7 +447,6 @@
 | TGL-H          | R0       | 06-8d-01/c2 | 00000046 | 0000004e | Core Gen11 Mobile
 | TGL-R          | C0       | 06-8c-02/c2 | 0000002c | 00000034 | Core Gen11 Mobile
 
@ -85,7 +85,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20230808](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20230808)
 
 ### Purpose
-@@ -629,7 +621,6 @@
+@@ -542,7 +534,6 @@
 | RPL-U 2+8      | Q0       | 06-ba-03/e0 |          | 00004119 | Core Gen13
 
 
@ -93,7 +93,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20230512-rev2](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20230512-rev2)
 
 ### Purpose
-@@ -709,7 +700,7 @@
+@@ -622,7 +613,7 @@
 | WHL-U          | V0       | 06-8e-0c/94 | 000000f4 | 000000f6 | Core Gen8 Mobile
 | WHL-U          | W0       | 06-8e-0b/d0 | 000000f0 | 000000f2 | Core Gen8 Mobile
 
@ -102,7 +102,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20230512](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20230512)
 
 ### Functional Updates
-@@ -776,7 +767,6 @@
+@@ -689,7 +680,6 @@
 | WHL-U          | W0       | 06-8e-0b/d0 |          | 000000f2 | Core Gen8 Mobile
 
 
@ -110,7 +110,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20230214](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20230214)
 
 ### Purpose
-@@ -822,7 +812,7 @@
+@@ -735,7 +725,7 @@
 | RPL-S          | S0       | 06-b7-01/32 | 0000010e | 00000112 | Core Gen13
 | SKX-SP         | B1       | 06-55-03/97 | 0100015e | 01000161 | Xeon Scalable
 
@ -119,7 +119,7 @@ index 339d3fb..da3981f 100644
 ## [microcode-20221108](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20221108)
 
 ### Purpose
-@@ -871,7 +861,7 @@
+@@ -784,7 +774,7 @@
 
 None
 
--- a/SOURCES/0003-releasenote.md-sort-the-entries-of-the-20230808-rele.patch
+++ b/SOURCES/0003-releasenote.md-sort-the-entries-of-the-20230808-rele.patch
@ -1,7 +1,7 @@
-From a33c2383a875d9742be62b1cf7dc3b0ec3a7ca4d Mon Sep 17 00:00:00 2001
+From feb9a3a9c77dea2db3d1a87f52d1063dea226db3 Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Thu, 10 Aug 2023 18:37:21 +0200
-Subject: [PATCH 03/17] releasenote.md: sort the entries of the 20230808
+Subject: [PATCH 03/16] releasenote.md: sort the entries of the 20230808
 release lexicographically

 microcode-20230214 seemingly (but not fully;  the "New Platforms" section
@ -20,10 +20,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 40 insertions(+), 40 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index da3981f..54ef6fa 100644
+index 096da93..3fbc5cf 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -570,55 +570,55 @@
+@@ -483,55 +483,55 @@
 
 | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products
 |:---------------|:---------|:------------|:---------|:---------|:---------
--- a/SOURCES/0004-releasenote.md-fix-incorrect-platform-mask-for-RPL-H.patch
+++ b/SOURCES/0004-releasenote.md-fix-incorrect-platform-mask-for-RPL-H.patch
@ -1,7 +1,7 @@
-From 5520610da4b67444b785d8b822cdec0603589f68 Mon Sep 17 00:00:00 2001
+From 58160d8c02b9dea298a20cc07683061c1aec7a2a Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Thu, 10 Aug 2023 18:48:58 +0200
-Subject: [PATCH 04/17] releasenote.md: fix incorrect platform mask for
+Subject: [PATCH 04/16] releasenote.md: fix incorrect platform mask for
 RPL-H/P/U

 microcode-20230214, microcode-20230512, and microcode-20230512-rev2
@ -50,10 +50,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 9 insertions(+), 9 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index 54ef6fa..b63eb8a 100644
+index 3fbc5cf..78a9ea8 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -679,10 +679,10 @@
+@@ -592,10 +592,10 @@
 | KBL-U/Y        | H0       | 06-8e-09/c0 | 000000f0 | 000000f2 | Core Gen7 Mobile
 | LKF            | B2/B3    | 06-8a-01/10 | 00000032 | 00000033 | Core w/Hybrid Technology
 | RKL-S          | B0       | 06-a7-01/02 | 00000057 | 00000058 | Core Gen11
@ -67,7 +67,7 @@ index 54ef6fa..b63eb8a 100644
 | SKX-D          | H0       | 06-55-04/b7 | 02006e05 | 02006f05 | Xeon D-21xx
 | SKX-SP         | B1       | 06-55-03/97 | 01000161 | 01000171 | Xeon Scalable
 | SKX-SP         | H0/M0/U0 | 06-55-04/b7 | 02006e05 | 02006f05 | Xeon Scalable
-@@ -745,10 +745,10 @@
+@@ -658,10 +658,10 @@
 | KBL-U/Y        | H0       | 06-8e-09/c0 |          | 000000f2 | Core Gen7 Mobile
 | LKF            | B2/B3    | 06-8a-01/10 | 00000032 | 00000033 | Core w/Hybrid Technology
 | RKL-S          | B0       | 06-a7-01/02 | 00000057 | 00000058 | Core Gen11
@ -81,7 +81,7 @@ index 54ef6fa..b63eb8a 100644
 | SKX-D          | H0       | 06-55-04/b7 |          | 02006f05 | Xeon D-21xx
 | SKX-SP         | B1       | 06-55-03/97 | 01000161 | 01000171 | Xeon Scalable
 | SKX-SP         | H0/M0/U0 | 06-55-04/b7 |          | 02006f05 | Xeon Scalable
-@@ -784,9 +784,9 @@
+@@ -697,9 +697,9 @@
 | SPR-SP         | E4       | 06-8f-07/87 |          | 2b000181 | Xeon Scalable Gen4
 | SPR-SP         | E5       | 06-8f-08/87 |          | 2b000181 | Xeon Scalable Gen4
 | SPR-HBM        | B3       | 06-8f-08/10 |          | 2c000170 | Xeon Max
--- a/SOURCES/0005-releasenote.md-fix-stepping-for-RPL-S.patch
+++ b/SOURCES/0005-releasenote.md-fix-stepping-for-RPL-S.patch
@ -1,7 +1,7 @@
-From 42f7f187ecfaf226455a294a17c2209f31e58941 Mon Sep 17 00:00:00 2001
+From 008c8fb7a9e7cd8fe6531cf5a6e3fa7b113be8c1 Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Thu, 10 Aug 2023 18:49:54 +0200
-Subject: [PATCH 05/17] releasenote.md: fix stepping for RPL-S
+Subject: [PATCH 05/16] releasenote.md: fix stepping for RPL-S

 microcode-20221108, microcode-20230214, microcode-20230512,
 and microcode-20230512-rev2 release notes (incorrectly) state RPL-S
@ -22,10 +22,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 4 insertions(+), 4 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index b63eb8a..3cf6eea 100644
+index 78a9ea8..bd3bbff 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -681,7 +681,7 @@
+@@ -594,7 +594,7 @@
 | RKL-S          | B0       | 06-a7-01/02 | 00000057 | 00000058 | Core Gen11
 | RPL-H 6+8      | J0       | 06-ba-02/c0 | 0000410e | 00004112 | Core Gen13
 | RPL-P 6+8      | J0       | 06-ba-02/c0 | 0000410e | 00004112 | Core Gen13
@ -34,7 +34,7 @@ index b63eb8a..3cf6eea 100644
 | RPL-U 2+8      | Q0       | 06-ba-03/c0 | 0000410e | 00004112 | Core Gen13
 | SKX-D          | H0       | 06-55-04/b7 | 02006e05 | 02006f05 | Xeon D-21xx
 | SKX-SP         | B1       | 06-55-03/97 | 01000161 | 01000171 | Xeon Scalable
-@@ -747,7 +747,7 @@
+@@ -660,7 +660,7 @@
 | RKL-S          | B0       | 06-a7-01/02 | 00000057 | 00000058 | Core Gen11
 | RPL-H 6+8      | J0       | 06-ba-02/c0 | 0000410e | 00004112 | Core Gen13
 | RPL-P 6+8      | J0       | 06-ba-02/c0 | 0000410e | 00004112 | Core Gen13
@ -43,7 +43,7 @@ index b63eb8a..3cf6eea 100644
 | RPL-U 2+8      | Q0       | 06-ba-03/c0 | 0000410e | 00004112 | Core Gen13
 | SKX-D          | H0       | 06-55-04/b7 |          | 02006f05 | Xeon D-21xx
 | SKX-SP         | B1       | 06-55-03/97 | 01000161 | 01000171 | Xeon Scalable
-@@ -809,7 +809,7 @@
+@@ -722,7 +722,7 @@
 | JSL            | A0/A1    | 06-9c-00/01 | 24000023 | 24000024 | Pentium N6000/N6005, Celeron N4500/N4505/N5100/N5105
 | LKF            | B2/B3    | 06-8a-01/10 | 00000031 | 00000032 | Core w/Hybrid Technology
 | RKL-S          | B0       | 06-a7-01/02 | 00000056 | 00000057 | Core Gen11
@ -52,7 +52,7 @@ index b63eb8a..3cf6eea 100644
 | SKX-SP         | B1       | 06-55-03/97 | 0100015e | 01000161 | Xeon Scalable
 
 
-@@ -830,7 +830,7 @@
+@@ -743,7 +743,7 @@
 | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products
 |:---------------|:---------|:------------|:---------|:---------|:---------
 | ICL-D          | B0       | 06-6c-01/10 |          | 01000201 | Xeon D-17xx, D-27xx
--- a/SOURCES/0006-releasenote.md-add-missing-06-ba-03-e0-to-the-new-mi.patch
+++ b/SOURCES/0006-releasenote.md-add-missing-06-ba-03-e0-to-the-new-mi.patch
@ -1,7 +1,7 @@
-From 1f76d064dfc79084f93187b131cc73b1735378da Mon Sep 17 00:00:00 2001
+From a050fef74a28611bdc533849baf9189413dc029c Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 22 Aug 2023 16:48:54 +0200
-Subject: [PATCH 06/17] releasenote.md: add missing 06-ba-03/e0 to the new
+Subject: [PATCH 06/16] releasenote.md: add missing 06-ba-03/e0 to the new
 microcode section

 microcode-20230808 release notes for CPUIDs 06-ba-02/e0 (RPL-H/P/PX 6+8),
@ -23,10 +23,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 1 insertion(+)

 diff --git a/releasenote.md b/releasenote.md
-index 3cf6eea..f32d54c 100644
+index bd3bbff..0f441a5 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -565,6 +565,7 @@
+@@ -478,6 +478,7 @@
 |:---------------|:---------|:------------|:---------|:---------|:---------
 | ADL-N          | A0       | 06-be-00/11 |          | 00000011 | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
 | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 |          | 00004119 | Core Gen13
--- a/SOURCES/0007-releasenote.md-remove-the-duplicating-06-9e-0c-22-re.patch
+++ b/SOURCES/0007-releasenote.md-remove-the-duplicating-06-9e-0c-22-re.patch
@ -1,7 +1,7 @@
-From ecf23f715476f5e928bfe6605389695c6875404e Mon Sep 17 00:00:00 2001
+From 680d51126f93a928ae375757054c6d65891cc4b9 Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 22 Aug 2023 17:34:43 +0200
-Subject: [PATCH 07/17] releasenote.md: remove the duplicating 06-9e-0c/22
+Subject: [PATCH 07/16] releasenote.md: remove the duplicating 06-9e-0c/22
 record

 CFL-S stepping P0 (06-9e-0c/22) is already listed as "CFL-H/S"
@ -16,10 +16,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 1 deletion(-)

 diff --git a/releasenote.md b/releasenote.md
-index f32d54c..a59f67c 100644
+index 0f441a5..7986f66 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -584,7 +584,6 @@
+@@ -497,7 +497,6 @@
 | CFL-H/S/E3     | U0       | 06-9e-0a/22 | 000000f2 | 000000f4 | Core Gen8 Desktop, Mobile, Xeon E
 | CFL-H/S        | P0       | 06-9e-0c/22 | 000000f2 | 000000f4 | Core Gen9
 | CFL-S          | B0       | 06-9e-0b/02 | 000000f2 | 000000f4 | Core Gen8
--- a/SOURCES/0008-releasenote.md-fix-old-revisions-for-06-8e-09-10-and.patch
+++ b/SOURCES/0008-releasenote.md-fix-old-revisions-for-06-8e-09-10-and.patch
@ -1,7 +1,7 @@
-From 2721948c99069b34801845280714a9eb260ceb15 Mon Sep 17 00:00:00 2001
+From 98f13ea923726a534982c6a41960263910c24d8d Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 22 Aug 2023 17:36:23 +0200
-Subject: [PATCH 08/17] releasenote.md: fix old revisions for 06-8e-09/10 and
+Subject: [PATCH 08/16] releasenote.md: fix old revisions for 06-8e-09/10 and
 06-55-04/b7 entries

 The values provided are from the microcode-20230214 release, even though
@ -19,10 +19,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 2 insertions(+), 2 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index a59f67c..21038d8 100644
+index 7986f66..b2c1058 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -578,7 +578,7 @@
+@@ -491,7 +491,7 @@
 | ADL            | L0       | 06-9a-03/80 | 0000042a | 0000042c | Core Gen12
 | ADL            | L0       | 06-9a-04/80 | 0000042a | 0000042c | Core Gen12
 | ADL-N          | A0       | 06-be-00/11 |          | 00000011 | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
@ -31,7 +31,7 @@ index a59f67c..21038d8 100644
 | AML-Y42        | V0       | 06-8e-0c/94 | 000000f6 | 000000f8 | Core Gen10 Mobile
 | CFL-H          | R0       | 06-9e-0d/22 | 000000f8 | 000000fa | Core Gen9 Mobile
 | CFL-H/S/E3     | U0       | 06-9e-0a/22 | 000000f2 | 000000f4 | Core Gen8 Desktop, Mobile, Xeon E
-@@ -607,7 +607,7 @@
+@@ -520,7 +520,7 @@
 | RPL-U 2+8      | Q0       | 06-ba-03/e0 |          | 00004119 | Core Gen13
 | SKX-D          | H0       | 06-55-04/b7 | 02006f05 | 02007006 | Xeon D-21xx
 | SKX-SP         | B1       | 06-55-03/97 | 01000171 | 01000181 | Xeon Scalable
--- a/SOURCES/0009-releasenote.md-add-old-revisions-for-06-be-00-11-06-.patch
+++ b/SOURCES/0009-releasenote.md-add-old-revisions-for-06-be-00-11-06-.patch
@ -1,7 +1,7 @@
-From 9de4f3cd43d5d41f1268956b448de331f878fd19 Mon Sep 17 00:00:00 2001
+From 15fe2b79db690d80bdd558741dab72f982bd1944 Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 22 Aug 2023 17:38:34 +0200
-Subject: [PATCH 09/17] releasenote.md: add old revisions for 06-be-00/11,
+Subject: [PATCH 09/16] releasenote.md: add old revisions for 06-be-00/11,
 06-ba-02/e0, and 06-ba-03/e0

 As has been mentioned already in commit "releasenote.md: add missing
@ -11,57 +11,44 @@ in both "New Platforms" and "Updated Platforms" sections
 of microcode-20230808 release notes.  It is, however, puzzling to have
 the "Old Ver" field of these entries empty in the "Updated Platforms"
 section, so it seemingly make sense to populate it with the previous
-microcode versions for the existing platforms along with the mention
-of the platform mask change.
+microcode versions for the existing platforms.

 * releasenote.md (microcode-20230808) <Updated Platforms>: Provide
 00000010 as the "Old Ver" field value for ADL-N A0 (06-be-00/11,
 nee 06-be-00/01);  provide 00004112 as the "Old Ver" field value
 for RPL-H/P/PX 6+8 J0 (06-ba-02/e0, nee 06-ba-02/c0) and RPL-U 2+8 Q0
-(06-ba-03/e0, nee 06-ba-03/c0);  add footnotes about previous
-platform mask values.
+(06-ba-03/e0, nee 06-ba-03/c0).

-Co-Authored-by: Henrique de Moraes Holschuh <hmh@debian.org>
 Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 ---
- releasenote.md | 9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
+ releasenote.md | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index 21038d8..b9ba4f9 100644
+index b2c1058..08ad20a 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -577,7 +577,7 @@
+@@ -490,7 +490,7 @@
 | ADL            | C0       | 06-bf-05/07 | 0000002c | 0000002e | Core Gen12
 | ADL            | L0       | 06-9a-03/80 | 0000042a | 0000042c | Core Gen12
 | ADL            | L0       | 06-9a-04/80 | 0000042a | 0000042c | Core Gen12
 -| ADL-N          | A0       | 06-be-00/11 |          | 00000011 | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
-+| ADL-N (1)      | A0       | 06-be-00/11 | 00000010 | 00000011 | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
+| ADL-N          | A0       | 06-be-00/11 | 00000010 | 00000011 | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
 | AML-Y22        | H0       | 06-8e-09/10 | 000000f2 | 000000f4 | Core Gen8 Mobile
 | AML-Y42        | V0       | 06-8e-0c/94 | 000000f6 | 000000f8 | Core Gen10 Mobile
 | CFL-H          | R0       | 06-9e-0d/22 | 000000f8 | 000000fa | Core Gen9 Mobile
-@@ -602,9 +602,9 @@
+@@ -515,9 +515,9 @@
 | KBL-U23e       | J1       | 06-8e-09/c0 | 000000f2 | 000000f4 | Core Gen7 Mobile
 | KBL-U/Y        | H0       | 06-8e-09/c0 | 000000f2 | 000000f4 | Core Gen7 Mobile
 | RKL-S          | B0       | 06-a7-01/02 | 00000058 | 00000059 | Core Gen11
 -| RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 |          | 00004119 | Core Gen13
-+| RPL-H/P 6+8 (2)| J0       | 06-ba-02/e0 | 00004112 | 00004119 | Core Gen13
+| RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004112 | 00004119 | Core Gen13
 | RPL-S          | B0       | 06-b7-01/32 | 00000113 | 00000119 | Core Gen13
 -| RPL-U 2+8      | Q0       | 06-ba-03/e0 |          | 00004119 | Core Gen13
-+| RPL-U 2+8 (2)  | Q0       | 06-ba-03/e0 | 00004112 | 00004119 | Core Gen13
+| RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004112 | 00004119 | Core Gen13
 | SKX-D          | H0       | 06-55-04/b7 | 02006f05 | 02007006 | Xeon D-21xx
 | SKX-SP         | B1       | 06-55-03/97 | 01000171 | 01000181 | Xeon Scalable
 | SKX-SP         | H0/M0/U0 | 06-55-04/b7 | 02006f05 | 02007006 | Xeon Scalable
-@@ -620,6 +620,9 @@
- | WHL-U          | V0       | 06-8e-0c/94 | 000000f6 | 000000f8 | Core Gen8 Mobile
- | WHL-U          | W0       | 06-8e-0b/d0 | 000000f2 | 000000f4 | Core Gen8 Mobile
- 
-+(1) The previous version of the microcode had the platform mask value of 0x01.
-+(2) Previous versions of the microcode had the platform mask value of 0xc0.
-+
- 
- ## [microcode-20230512-rev2](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20230512-rev2)
- 
 -- 
 2.13.6

--- a/SOURCES/0010-releasenote.md-eliminate-trailing-white-space.patch
+++ b/SOURCES/0010-releasenote.md-eliminate-trailing-white-space.patch
@ -1,31 +1,21 @@
-From bdd4b8302ddd5d58f19e88f2b3a8ffc7f34d6a41 Mon Sep 17 00:00:00 2001
+From 5d7da21fd7e751bcf791a4aaf7725e865bd05dc8 Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 18 Feb 2025 15:19:13 +0100
-Subject: [PATCH 10/17] releasenote.md: eliminate trailing white space
+Subject: [PATCH 10/16] releasenote.md: eliminate trailing white space

-Release notes for microcode-20250512, microcode-20250211,
-and microcode-20220809 releases contain trailing white space
-that seemingly serves no particular purpose;  remove it.
+Release notes for microcode-20250211 and microcode-20220809 releases contain
+trailing white space that seemingly serves no particular purpose;  remove it.

 Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 ---
- releasenote.md | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
+ releasenote.md | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index b9ba4f9..1cc307b 100644
+index 08ad20a..aa88db9 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -49,7 +49,7 @@
- | ADL            | C0       | 06-97-02/07 | 00000038 | 0000003a | Core Gen12
- | ADL            | H0       | 06-97-05/07 | 00000038 | 0000003a | Core Gen12
- | ADL            | L0       | 06-9a-03/80 | 00000436 | 00000437 | Core Gen12
-| ADL            | R0       | 06-9a-04/80 | 00000436 | 00000437 | Core Gen12 
-+| ADL            | R0       | 06-9a-04/80 | 00000436 | 00000437 | Core Gen12
- | ADL-N          | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
- | AML-Y42        | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen10 Mobile
- | AZB            | A0/R0    | 06-9a-04/40 | 00000009 | 0000000a | Intel(R) Atom(R) C1100
-@@ -138,7 +138,7 @@
+@@ -51,7 +51,7 @@
 | RPL-S          | H0       | 06-bf-05/07 | 00000037 | 00000038 | Core Gen13/Gen14
 | RKL-S          | B0       | 06-a7-01/02 | 00000062 | 00000063 | Core Gen11
 | SPR-HBM        | Bx       | 06-8f-08/10 | 2c000390 | 2c0003e0 | Xeon Max
@ -34,7 +24,7 @@ index b9ba4f9..1cc307b 100644
 | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000603 | 2b000620 | Xeon Scalable Gen4
 | TWL            | N0       | 06-be-00/19 | 0000001a | 0000001c | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
 
-@@ -870,7 +870,7 @@ None
+@@ -780,7 +780,7 @@ None
 ### Purpose
 
 - Security updates for [INTEL-SA-00657](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00657.html)
--- a/SOURCES/0011-releasenote.md-add-information-about-updates-and-rem.patch
+++ b/SOURCES/0011-releasenote.md-add-information-about-updates-and-rem.patch
@ -1,7 +1,7 @@
-From 44198d1aa1973d2cc7afb03a690455acacebdfd2 Mon Sep 17 00:00:00 2001
+From 4c72d500e72432f238d8a7cf470895ae5f0c59f0 Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 18 Feb 2025 15:30:20 +0100
-Subject: [PATCH 11/17] releasenote.md: add information about updates and
+Subject: [PATCH 11/16] releasenote.md; add information about updates and
 removals of SPR-SP microcode

 For some reason, information about updates and removals of 06-8f-04
@ -21,10 +21,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 14 insertions(+)

 diff --git a/releasenote.md b/releasenote.md
-index 1cc307b..5184613 100644
+index aa88db9..38934ad 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -142,6 +142,13 @@
+@@ -55,6 +55,13 @@
 | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000603 | 2b000620 | Xeon Scalable Gen4
 | TWL            | N0       | 06-be-00/19 | 0000001a | 0000001c | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
 
@ -38,7 +38,7 @@ index 1cc307b..5184613 100644
 ### New Disclosures Updated in Prior Releases
 
 | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products
-@@ -187,6 +194,7 @@
+@@ -100,6 +107,7 @@
 | RPL-HX/S       | C0       | 06-bf-02/07 | 00000036 | 00000037 | Core Gen13/Gen14
 | RPL-S          | H0       | 06-bf-05/07 | 00000036 | 00000037 | Core Gen13/Gen14
 | RPL-U 2+8      | Q0       | 06-ba-03/e0 | 00004122 | 00004123 | Core Gen13
@ -46,7 +46,7 @@ index 1cc307b..5184613 100644
 | SPR-SP         | E3       | 06-8f-06/87 | 2b0005c0 | 2b000603 | Xeon Scalable Gen4
 | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b0005c0 | 2b000603 | Xeon Scalable Gen4
 | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b0005c0 | 2b000603 | Xeon Scalable Gen4
-@@ -481,6 +489,12 @@
+@@ -394,6 +402,12 @@
 | TGL-R          | C0       | 06-8c-02/c2 | 00000034 | 00000036 | Core Gen11 Mobile
 | WHL-U          | V0       | 06-8e-0c/94 | 000000f8 | 000000fa | Core Gen8 Mobile
 
--- a/SOURCES/0012-releasenote.md-add-information-about-06-ba-08-microc.patch
+++ b/SOURCES/0012-releasenote.md-add-information-about-06-ba-08-microc.patch
@ -1,7 +1,7 @@
-From 1bbcdec78c5de4f4c0128a75fab1a5ab44ea1dd2 Mon Sep 17 00:00:00 2001
+From 2b535c893c9693bdb4e0ac1fe919f3a8f3d29b29 Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 18 Feb 2025 16:54:03 +0100
-Subject: [PATCH 12/17] releasenote.md: add information about 06-ba-08
+Subject: [PATCH 12/16] releasenote.md: add information about 06-ba-08
 microcode file

 This microcode file was first appeared as part of microcode-20240312,
@ -38,10 +38,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 4 insertions(+)

 diff --git a/releasenote.md b/releasenote.md
-index 5184613..1e212cc 100644
+index 38934ad..a4ce9a4 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -148,6 +148,7 @@
+@@ -61,6 +61,7 @@
 |:---------------|:---------|:------------|:---------|:---------|:---------
 | SPR-SP         | E2       | 06-8f-05/87 | 2b000603 |          | Xeon Scalable Gen4
 | SPR-SP         | E3       | 06-8f-06/87 | 2b000603 |          | Xeon Scalable Gen4
@ -49,7 +49,7 @@ index 5184613..1e212cc 100644
 
 ### New Disclosures Updated in Prior Releases
 
-@@ -190,6 +191,7 @@
+@@ -103,6 +104,7 @@
 | EMR-SP         | A0       | 06-cf-01/87 | 21000230 | 21000283 | Xeon Scalable Gen5
 | EMR-SP         | A1       | 06-cf-02/87 | 21000230 | 21000283 | Xeon Scalable Gen5
 | MTL            | C0       | 06-aa-04/e6 | 0000001f | 00000020 | Core™ Ultra Processor
@ -57,7 +57,7 @@ index 5184613..1e212cc 100644
 | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004122 | 00004123 | Core Gen13
 | RPL-HX/S       | C0       | 06-bf-02/07 | 00000036 | 00000037 | Core Gen13/Gen14
 | RPL-S          | H0       | 06-bf-05/07 | 00000036 | 00000037 | Core Gen13/Gen14
-@@ -253,6 +255,7 @@
+@@ -166,6 +168,7 @@
 | ADL            | R0       | 06-9a-04/80 | 00000433 | 00000434 | Core Gen12
 | ADL-N          | N0       | 06-be-00/11 | 00000017 | 0000001a | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
 | MTL            | C0       | 06-aa-04/e6 | 0000001e | 0000001f | Core™ Ultra Processor
@ -65,7 +65,7 @@ index 5184613..1e212cc 100644
 | RPL-E/HX/S     | B0       | 06-b7-01/32 | 00000123 | 00000129 | Core Gen13/Gen14
 | RPL-H/P/PX 6+8 | J0       | 06-ba-02/e0 | 00004121 | 00004122 | Core Gen13
 | RPL-HX/S       | C0       | 06-bf-02/07 | 00000035 | 00000036 | Core Gen13/Gen14
-@@ -438,6 +441,7 @@
+@@ -351,6 +354,7 @@
 | EMR-SP         | A-1      | 06-cf-02/87 |          | 21000200 | Xeon Scalable Gen5
 | EMR-SP         | A-0      | 06-cf-01/87 |          | 21000200 | Xeon Scalable Gen5
 | MTL            | C-0      | 06-aa-04/e6 |          | 0000001c | Core™ Ultra Processor
--- a/SOURCES/0013-releasenote.md-fix-whitespace-in-microcode-20240531-.patch
+++ b/SOURCES/0013-releasenote.md-fix-whitespace-in-microcode-20240531-.patch
@ -1,7 +1,7 @@
-From 64c15b33e8e70fbd2dd159bff14cc9e40d9e1f06 Mon Sep 17 00:00:00 2001
+From 01fcfaa73eba439b25be9b71d121a0c6b5cc70b8 Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 18 Feb 2025 18:26:51 +0100
-Subject: [PATCH 13/17] releasenote.md: fix whitespace in microcode-20240531
+Subject: [PATCH 13/16] releasenote.md: fix whitespace in microcode-20240531
 release notes

 * releasenote.md (microcode-20240531): Add missing spaces in the
@ -13,10 +13,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 2 insertions(+), 2 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index 1e212cc..a315d31 100644
+index a4ce9a4..9e06b53 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -387,8 +387,8 @@
+@@ -300,8 +300,8 @@
 | ADL-N          | N0       | 06-be-00/11 | 00000015 | 00000017 | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
 | AZB            | A0       | 06-9a-04/40 | 00000005 | 00000007 | Intel(R) Atom(R) C1100
 | AZB            | R0       | 06-9a-04/40 | 00000005 | 00000007 | Intel(R) Atom(R) C1100
--- a/SOURCES/0014-releasenote.md-use-None-for-the-empty-list-of-new-pl.patch
+++ b/SOURCES/0014-releasenote.md-use-None-for-the-empty-list-of-new-pl.patch
@ -1,7 +1,7 @@
-From bb4cb428da5cbc22d871f28bbe25aed521b81832 Mon Sep 17 00:00:00 2001
+From 1504477d81e0b914c9cc9e275c5c16eb488fdf70 Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 18 Feb 2025 19:59:16 +0100
-Subject: [PATCH 14/17] releasenote.md: use "None" for the empty list of new
+Subject: [PATCH 14/16] releasenote.md: use "None" for the empty list of new
 platforms

 Having an empty table (with an additional empty line, compared
@ -18,10 +18,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 6 insertions(+), 18 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index a315d31..0f670a7 100644
+index 9e06b53..e9d3cb2 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -176,9 +176,7 @@
+@@ -89,9 +89,7 @@
 
 ### New Platforms
 
@ -32,7 +32,7 @@ index a315d31..0f670a7 100644
 
 ### Updated Platforms
 
-@@ -217,9 +215,7 @@
+@@ -130,9 +128,7 @@
 
 ### New Platforms
 
@ -43,7 +43,7 @@ index a315d31..0f670a7 100644
 
 ### Updated Platforms
 
-@@ -296,9 +292,7 @@
+@@ -209,9 +205,7 @@
 
 ### New Platforms
 
@ -54,7 +54,7 @@ index a315d31..0f670a7 100644
 
 ### Updated Platforms
 
-@@ -346,9 +340,7 @@
+@@ -259,9 +253,7 @@
 
 ### New Platforms
 
@ -65,7 +65,7 @@ index a315d31..0f670a7 100644
 
 ### Updated Platforms
 
-@@ -372,9 +364,7 @@
+@@ -285,9 +277,7 @@
 
 ### New Platforms
 
@ -76,7 +76,7 @@ index a315d31..0f670a7 100644
 
 ### Updated Platforms
 
-@@ -518,9 +508,7 @@
+@@ -431,9 +421,7 @@
 
 ### New Platforms
 
--- a/SOURCES/0015-releasenote.md-add-missing-old-revision-in-microcode.patch
+++ b/SOURCES/0015-releasenote.md-add-missing-old-revision-in-microcode.patch
@ -1,7 +1,7 @@
-From 800d1001ef60697c3ba127da361b0d38adeab5ba Mon Sep 17 00:00:00 2001
+From 2257715e616974bd5df7f600699c1b696da55fbb Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 18 Feb 2025 20:15:00 +0100
-Subject: [PATCH 15/17] releasenote.md: add missing old revision in
+Subject: [PATCH 15/16] releasenote.md: add missing old revision in
 microcode-20230512 release notes

 There is little reason to keep those botched.
@ -16,10 +16,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 5 insertions(+), 5 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index 0f670a7..0cdfa20 100644
+index e9d3cb2..4ddd8b6 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -731,7 +731,7 @@ None
+@@ -641,7 +641,7 @@ None
 |:---------------|:---------|:------------|:---------|:---------|:---------
 | ADL            | L0       | 06-9a-03/80 | 00000429 | 0000042a | Core Gen12
 | ADL            | L0       | 06-9a-04/80 | 00000429 | 0000042a | Core Gen12
@ -28,7 +28,7 @@ index 0f670a7..0cdfa20 100644
 | AML-Y42        | V0       | 06-8e-0c/94 | 000000f4 | 000000f6 | Core Gen10 Mobile
 | CFL-H          | R0       | 06-9e-0d/22 | 000000f4 | 000000f8 | Core Gen9 Mobile
 | CFL-H/S        | P0       | 06-9e-0c/22 | 000000f0 | 000000f2 | Core Gen9
-@@ -751,16 +751,16 @@ None
+@@ -661,16 +661,16 @@ None
 | ICL-U/Y        | D1       | 06-7e-05/80 | 000000b8 | 000000ba | Core Gen10 Mobile
 | ICX-SP         | D0       | 06-6a-06/87 | 0d000389 | 0d000390 | Xeon Scalable Gen3
 | KBL-G/H/S/E3   | B0       | 06-9e-09/2a | 000000f0 | 000000f2 | Core Gen7; Xeon E3 v6
@ -48,7 +48,7 @@ index 0f670a7..0cdfa20 100644
 | SPR-HBM        | B3       | 06-8f-08/10 | 2c000170 | 2c0001d1 | Xeon Max
 | SPR-SP         | E0       | 06-8f-04/87 | 2b000181 | 2b000461 | Xeon Scalable Gen4
 | SPR-SP         | E2       | 06-8f-05/87 | 2b000181 | 2b000461 | Xeon Scalable Gen4
-@@ -773,7 +773,7 @@ None
+@@ -683,7 +683,7 @@ None
 | TGL-H          | R0       | 06-8d-01/c2 | 00000042 | 00000044 | Core Gen11 Mobile
 | TGL-R          | C0       | 06-8c-02/c2 | 00000028 | 0000002a | Core Gen11 Mobile
 | WHL-U          | V0       | 06-8e-0c/94 | 000000f4 | 000000f6 | Core Gen8 Mobile
--- a/SOURCES/0016-releasenote.md-use-new-lines-consistently.patch
+++ b/SOURCES/0016-releasenote.md-use-new-lines-consistently.patch
@ -1,7 +1,7 @@
-From b493d78adacdfbc920b64540380899fea56518d3 Mon Sep 17 00:00:00 2001
+From 1b64eec2c2ddbfff64b3c390d25067f6b4e6e156 Mon Sep 17 00:00:00 2001
 From: Eugene Syromiatnikov <esyr@redhat.com>
 Date: Tue, 18 Feb 2025 20:17:49 +0100
-Subject: [PATCH 16/17] releasenote.md: use new lines consistently
+Subject: [PATCH 16/16] releasenote.md: use new lines consistently

 The empty lines are pretty inconsistent in the latest releases.  Apply
 the following rules uniformely throughout the release notes:
@ -16,10 +16,10 @@ Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
 1 file changed, 30 insertions(+), 8 deletions(-)

 diff --git a/releasenote.md b/releasenote.md
-index 0cdfa20..3c700b5 100644
+index 4ddd8b6..c407920 100644
 --- a/releasenote.md
 +++ b/releasenote.md
-@@ -156,6 +156,7 @@
+@@ -69,6 +69,7 @@
 |:---------------|:---------|:------------|:---------|:---------|:---------
 | CFL-H/S        | P0       | 06-9e-0c/22 | 000000f6 | 000000f8 | Core Gen9
 
@ -27,7 +27,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20241112](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20241112)
 
 ### Purpose
-@@ -164,6 +165,7 @@
+@@ -77,6 +78,7 @@
 - Security updates for [INTEL-SA-01079](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01079.html)
 - Updated security updates for [INTEL-SA-01097](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01097.html)
 - Updated security updates for [INTEL-SA-01103](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01103.html)
@ -35,7 +35,7 @@ index 0cdfa20..3c700b5 100644
 - Update for functional issues. Refer to [Intel® Core™ Ultra Processor](https://cdrdv2.intel.com/v1/dl/getContent/792254) for details.
 - Update for functional issues. Refer to [14th/13th Generation Intel® Core™ Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/740518) for details.
 - Update for functional issues. Refer to [12th Generation Intel® Core™ Processor Family](https://cdrdv2.intel.com/v1/dl/getContent/682436) for details.
-@@ -173,7 +175,6 @@
+@@ -86,7 +88,6 @@
 - Update for functional issues. Refer to [Intel® Xeon® D-2700 Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/714071) for details.
 - Update for functional issues. Refer to [Intel® Xeon® D-1700 and D-1800 Processor Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/714069) for details
 
@ -43,7 +43,7 @@ index 0cdfa20..3c700b5 100644
 ### New Platforms
 
 None
-@@ -230,6 +231,7 @@ None
+@@ -143,6 +144,7 @@ None
 
 - Security updates for [INTEL-SA-01103](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01103.html)
 - Security updates for [INTEL-SA-01097](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01097.html)
@ -51,7 +51,7 @@ index 0cdfa20..3c700b5 100644
 - Update for functional issues. Refer to [Intel® Core™ Ultra Processor](https://cdrdv2.intel.com/v1/dl/getContent/792254) for details.
 - Update for functional issues. Refer to [13th Generation Intel® Core™ Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/740518) for details.
 - Update for functional issues. Refer to [12th Generation Intel® Core™ Processor Family](https://cdrdv2.intel.com/v1/dl/getContent/682436) for details.
-@@ -271,7 +273,6 @@ None
+@@ -184,7 +186,6 @@ None
 - Security updates for [INTEL-SA-01038](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01038.html)
 - Security updates for [INTEL-SA-01046](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01046.html)
 
@ -59,7 +59,7 @@ index 0cdfa20..3c700b5 100644
 - Update for functional issues. Refer to [Intel® Core™ Ultra Processor](https://cdrdv2.intel.com/v1/dl/getContent/792254) for details.
 - Update for functional issues. Refer to [3rd Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/637780) for details.
 - Update for functional issues. Refer to [3rd Generation Intel® Xeon® Scalable Processors Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/634897) for details.
-@@ -289,7 +290,6 @@ None
+@@ -202,7 +203,6 @@ None
 - Update for functional issues. Refer to [Intel® Processors and Intel® Core™ i3 N-Series](https://cdrdv2.intel.com/v1/dl/getContent/764616) for details.
 - Update for functional issues. Refer to [Intel® Atom® x6000E Series, and Intel® Pentium® and Celeron® N and J Series Processors for Internet of Things (IoT) Applications](https://cdrdv2.intel.com/v1/dl/getContent/636674) for details.
 
@ -67,7 +67,7 @@ index 0cdfa20..3c700b5 100644
 ### New Platforms
 
 None
-@@ -337,7 +337,6 @@ None
+@@ -250,7 +250,6 @@ None
 
 - Update for functional issues. Refer to [Intel® Pentium® Silver and Intel® Celeron® Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/336562)
 
@ -75,7 +75,7 @@ index 0cdfa20..3c700b5 100644
 ### New Platforms
 
 None
-@@ -356,6 +355,7 @@ None
+@@ -269,6 +268,7 @@ None
 - Security updates for [INTEL-SA-01051](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01051.html)
 - Security updates for [INTEL-SA-01052](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01052.html)
 - Security updates for [INTEL-SA-01036](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01036.html)
@ -83,7 +83,7 @@ index 0cdfa20..3c700b5 100644
 - Update for functional issues. Refer to [5th Gen Intel® Xeon® Processor Scalable Family](https://cdrdv2.intel.com/v1/dl/getContent/793902) for details.
 - Update for functional issues. Refer to [4th Gen Intel® Xeon® Scalable Processors Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/772415) for details.
 - Update for functional issues. Refer to [14th & 13th Generation Intel® Core™ Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/740518) for details.
-@@ -388,6 +388,7 @@ None
+@@ -301,6 +301,7 @@ None
 | SPR-SP         | E4/S2    | 06-8f-07/87 | 2b000590 | 2b0005c0 | Xeon Scalable Gen4
 | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000590 | 2b0005c0 | Xeon Scalable Gen4
 
@ -91,7 +91,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20240312](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20240312)
 
 ### Purpose
-@@ -421,9 +422,6 @@ None
+@@ -334,9 +335,6 @@ None
 - Update for functional issues. Refer to [Intel® Pentium® Silver and Intel® Celeron® Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/336562) for details.
 - Update for functional issues. Refer to [Intel® Pentium® Silver and Intel® Celeron® Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/634542) for details.
 
@ -101,7 +101,7 @@ index 0cdfa20..3c700b5 100644
 ### New Platforms
 
 | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products
-@@ -540,6 +538,7 @@ None
+@@ -453,6 +451,7 @@ None
 | TGL-H          | R0       | 06-8d-01/c2 | 00000046 | 0000004e | Core Gen11 Mobile
 | TGL-R          | C0       | 06-8c-02/c2 | 0000002c | 00000034 | Core Gen11 Mobile
 
@ -109,7 +109,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20230808](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20230808)
 
 ### Purpose
-@@ -877,6 +876,7 @@ None
+@@ -787,6 +786,7 @@ None
 
 - Security updates for [INTEL-SA-00657](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00657.html)
 - Security updates for [INTEL-SA-00614](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00614.html)
@ -117,7 +117,7 @@ index 0cdfa20..3c700b5 100644
 - Update for functional issues. Refer to [Intel® Xeon® Processor Scalable Family Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/scalable/
 xeon-scalable-spec-update.html?wapkw=processor+specification+update) for details.
 
-@@ -909,11 +909,13 @@ None
+@@ -819,11 +819,13 @@ None
 
 None
 
@ -131,7 +131,7 @@ index 0cdfa20..3c700b5 100644
 - Update for functional issues. Refer to [Second Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338848) for details.
 - Update for functional issues. Refer to [Intel® Xeon® Processor Scalable Family Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/scalable/xeon-scalable-spec-update.html?wapkw=processor+specification+update) for details.
 - Update for functional issues. Refer to [Intel Atom® C3000 Processor Product Family Specification Update](https://www.intel.com/content/www/us/en/processors/atom/atom-c3000-family-spec-update.html?wapkw=processor+specification+update) for details.
-@@ -979,6 +981,7 @@ None
+@@ -889,6 +891,7 @@ None
 
 None
 
@ -139,7 +139,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20220419](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20220419)
 
 ### Purpose
-@@ -1006,6 +1009,7 @@ None
+@@ -916,6 +919,7 @@ None
 
 - Security updates for [INTEL-SA-00528](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00528.html)
 - Security updates for [INTEL-SA-00532](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00532.html)
@ -147,7 +147,7 @@ index 0cdfa20..3c700b5 100644
 - Update for functional issues. Refer to [Third Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/637780) for details.
 - Update for functional issues. Refer to [Second Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338848) for details.
 - Update for functional issues. Refer to [Intel® Xeon® Processor Scalable Family Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/scalable/xeon-scalable-spec-update.html?wapkw=processor+specification+update) for details.
-@@ -1088,6 +1092,7 @@ None
+@@ -998,6 +1002,7 @@ None
 - Security updates for [INTEL-SA-00442](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00442.html)
 - Security updates for [INTEL-SA-00464](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00464.html)
 - Security updates for [INTEL-SA-00465](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00465.html)
@ -155,7 +155,7 @@ index 0cdfa20..3c700b5 100644
 - Update for functional issues. Refer to [Third Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/637780)for details.
 - Update for functional issues. Refer to [Second Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338848) for details.
 - Update for functional issues. Refer to [Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/613537) for details.
-@@ -1189,6 +1194,7 @@ None
+@@ -1099,6 +1104,7 @@ None
 
 None
 
@ -163,7 +163,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20201118](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20201118)
 
 ### Purpose
-@@ -1209,6 +1215,7 @@ None
+@@ -1119,6 +1125,7 @@ None
 |:---------------|:---------|:------------|:---------|:---------|:---------
 | TGL            | B1       | 06-8c-01/80 | 00000068 |          | Core Gen11 Mobile
 
@ -171,7 +171,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20201112](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20201112)
 
 ### Purpose
-@@ -1230,12 +1237,14 @@ None
+@@ -1140,12 +1147,14 @@ None
 
 None
 
@ -186,7 +186,7 @@ index 0cdfa20..3c700b5 100644
 - Update for functional issues. Refer to [Second Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338848) for details.
 - Update for functional issues. Refer to [Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/613537) for details.
 - Update for functional issues. Refer to [Intel® Xeon® Processor E5 v3 Product Family Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-spec-update.html?wapkw=processor+spec+update+e5) for details.
-@@ -1246,7 +1255,6 @@ None
+@@ -1156,7 +1165,6 @@ None
 - Update for functional issues. Refer to [Intel® Xeon® E3-1200 v6 Processor Family Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200v6-spec-update.html) for details.
 - Update for functional issues. Refer to [Intel® Xeon® E-2100 and E-2200 Processor Family Specification Update](https://www.intel.com/content/www/us/en/products/docs/processors/xeon/xeon-e-2100-specification-update.html) for details.
 
@ -194,7 +194,7 @@ index 0cdfa20..3c700b5 100644
 ### New Platforms
 
 | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products
-@@ -1294,6 +1302,7 @@ None
+@@ -1204,6 +1212,7 @@ None
 
 None
 
@ -202,7 +202,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20200616](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20200616)
 
 ### Purpose
-@@ -1316,6 +1325,7 @@ None
+@@ -1226,6 +1235,7 @@ None
 
 None
 
@ -210,7 +210,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20200609](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20200609)
 
 ### Purpose
-@@ -1360,6 +1370,7 @@ None
+@@ -1270,6 +1280,7 @@ None
 
 None
 
@ -218,7 +218,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20200520](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20200520)
 
 ### Purpose
-@@ -1381,6 +1392,7 @@ None
+@@ -1291,6 +1302,7 @@ None
 
 None
 
@ -226,7 +226,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20200508](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20200508)
 
 ### Purpose
-@@ -1401,6 +1413,7 @@ None
+@@ -1311,6 +1323,7 @@ None
 
 None
 
@ -234,7 +234,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20191115](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20191115)
 
 ### Purpose
-@@ -1443,11 +1456,13 @@ None
+@@ -1353,11 +1366,13 @@ None
 
 None
 
@ -248,7 +248,7 @@ index 0cdfa20..3c700b5 100644
 - Correction in release notes for specific processor to CFL-S only.  Prior release showed as CFL-H/S.
 
 ### New Platforms
-@@ -1464,6 +1479,7 @@ None
+@@ -1374,6 +1389,7 @@ None
 
 None
 
@ -256,7 +256,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20191112](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20191112)
 
 ### Purpose
-@@ -1511,12 +1527,14 @@ None
+@@ -1421,12 +1437,14 @@ None
 
 None
 
@ -271,7 +271,7 @@ index 0cdfa20..3c700b5 100644
 - Security updates for [INTEL-SA-00270](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00270.html).
 
 ### New Platforms
-@@ -1543,6 +1561,7 @@ None
+@@ -1453,6 +1471,7 @@ None
 
 None
 
@ -279,7 +279,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20190618](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20190618)
 
 ### Purpose
-@@ -1564,6 +1583,7 @@ None
+@@ -1474,6 +1493,7 @@ None
 
 None
 
@ -287,7 +287,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20190514a](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20190514a)
 
 ### Purpose
-@@ -1624,6 +1644,7 @@ None
+@@ -1534,6 +1554,7 @@ None
 
 None
 
@ -295,7 +295,7 @@ index 0cdfa20..3c700b5 100644
 ## [microcode-20190514](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20190514)
 
 ### Purpose
-@@ -1683,6 +1704,7 @@ None
+@@ -1593,6 +1614,7 @@ None
 
 None
 
--- a/SOURCES/01-microcode.conf
+++ b/SOURCES/01-microcode.conf
--- a/SOURCES/06-4f-01_config
+++ b/SOURCES/06-4f-01_config
--- a/SOURCES/06-4f-01_disclaimer
+++ b/SOURCES/06-4f-01_disclaimer
--- a/SOURCES/06-4f-01_readme
+++ b/SOURCES/06-4f-01_readme
--- a/SOURCES/99-microcode-override.conf
+++ b/SOURCES/99-microcode-override.conf
--- a/SOURCES/README
+++ b/SOURCES/README
--- a/SOURCES/README.caveats
+++ b/SOURCES/README.caveats
@ -10,8 +10,8 @@ behaviour.

 General behaviour
 =================
-In RHEL 8 (as well as RHEL 7 before it), there are currently two main handlers
-for CPU microcode update:
+In RHEL 9 (as well as in RHEL 7 and RHEL 8 before it), there are currently
+two main handlers for CPU microcode update:
 * Early microcode update. It uses GenuineIntel.bin or AuthenticAMD.bin file
   placed at the beginning of an initramfs image
   (/boot/initramfs-KERNEL_VERSION.img, where "KERNEL_VERSION" is a kernel
@ -45,10 +45,10 @@ zero-filled.

 The early microcode is placed into initramfs image by the "dracut" script, which
 scans the aforementioned subdirectories of the configured list of firmware
-directories (by default, the list consists of two directories in RHEL 8,
+directories (by default, the list consists of two directories in RHEL 9,
 "/lib/firmware/updates" and "/lib/firmware").

-In RHEL 8, AMD CPU microcode is shipped as a part of the linux-firmware package,
+In RHEL 9, AMD CPU microcode is shipped as a part of the linux-firmware package,
 and Intel microcode is shipped as a part of the microcode_ctl package.

 The microcode_ctl package currently includes the following:
@ -613,7 +613,7 @@ Mitigation: microcode loading is disabled for the affected CPU model.

 Minimum versions of the kernel package that contain the aforementioned patch
 series:
- - Upstream/RHEL 8: 4.17.0
+ - Upstream/RHEL 8/RHEL 9: 4.17.0
 - RHEL 7.6 onwards:  3.10.0-894
 - RHEL 7.5:  3.10.0-862.6.1
 - RHEL 7.4:  3.10.0-693.35.1
@ -628,7 +628,7 @@ series:

 Early microcode load inside a virtual machine
 ---------------------------------------------
-RHEL 8 kernel supports performing microcode update during early boot stage
+RHEL 9 kernel supports performing microcode update during early boot stage
 from a cpio archive placed at the beginning of the initramfs image.  However,
 when an early microcode update is attempted inside some virtualised
 environments, that may result in unexpected system behaviour.
@ -643,7 +643,7 @@ Mitigation: early microcode loading is disabled for all CPU models on kernels
 without the fix.

 Minimum versions of the kernel package that contain the fix:
- - Upstream/RHEL 8: 4.10.0
+ - Upstream/RHEL 8/RHEL 9: 4.10.0
 - RHEL 7.6 onwards: 3.10.0-930
 - RHEL 7.5: 3.10.0-862.14.1
 - RHEL 7.4: 3.10.0-693.38.1
@ -651,196 +651,6 @@ Minimum versions of the kernel package that contain the fix:
 - RHEL 7.2: 3.10.0-327.73.1


-Intel Sandy Bridge-E/EN/EP caveat
---------------------------------
-Microcode revision 0x718 for Intel Sandy Bridge-E/EN/EP (SNB-EP, family 6,
-model 45, stepping 7), that was released to address MDS vulnerability,
-and was available from microcode-20190618 up to microcode-20190508 release)
-could lead to system instability[1][2].  In order to address this,
-this microcode update was not used and the previous microcode revision
-was provided instead by default; the microcode file, however, was still shipped
-as part of microcode_ctl package and could be used for performing a microcode
-update if it is enforced via the aforementioned overrides.  With the release
-of 0x71a revision of the microcode (as art of microcode-20200520 release)
-that aims at fixing the aforementioned stability issue, the latest microcode
-revision is again used by default; it is still provided via the caveat
-mechanism, hovewer, in order to enable ability to disable it in case such
-a need arises.  (See the sections "check_caveats script" and "reload_microcode
-script" for details regarding caveats mechanism operation.)
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/15
-[2] https://access.redhat.com/solutions/4593951
-
-Caveat name: intel-06-2d-07
-
-Affected microcode: intel-ucode/06-2d-07.
-
-Dependencies: intel
-
-Mitigation: None; the latest revision of the microcode file is used by default;
-previously published microcode revision 0x714 is still available as a fallback
-as part of "intel" caveat.
-
-
-Intel Skylake-SP/W/X caveat
---------------------------
-Microcode revision 0x2000065 (that was provided with microcode releases
-microcode-20191112 up to microcode-20200520) for some CPU models that belong
-to Intel Skylake Scalable Platform (SKL-W/X, family 6, model 85, stepping 4,
-Workstation/HEDT segments) could lead to hangs during reboot[1].  In order
-to address this, by default this microcode update was disabled by default and
-and the previous 0x2000064 microcode revision was used instead; the microcode
-file with, however, is still shipped as part of microcode_ctl package and can
-be used for performing a microcode update if it is enforced
-via the aforementioned overrides. With the availability of 0x2006906 revision
-of the microcode (in the microcode-20200609 release) that fixes
-the aforementioned issue, the latest microcode revision is again used
-by default; it is still provided via caveat mechanism, hovewer, in order
-to enable ability to disable it in case such a need arises.  (See the sections
-"check_caveats script" and "reload_microcode script" for details regarding
-caveats mechanism operation.)
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/21
-
-Caveat name: intel-06-55-04
-
-Affected microcode: intel-ucode/06-55-04.
-
-Dependencies: intel
-
-Mitigation: None; the latest revision of the microcode file is used by default;
-previously published microcode revision 0x2000064 is still available
-as a fallback as part of "intel" caveat.
-
-
-Intel Skylake-U/Y caveat
------------------------
-Some Intel Skylake CPU models (SKL-U/Y, family 6, model 78, stepping 3)
-have reports of system hangs when revision 0xdc of microcode, that is included
-in microcode-20200609 update to address CVE-2020-0543, CVE-2020-0548,
-and CVE-2020-0549, is applied[1].  In order to address this, microcode update
-to the newer revision has been disabled by default on these systems,
-and the previously published microcode revision 0xd6 is used instead; the newer
-microcode files, however, are still shipped as part of microcode_ctl package
-and can be used for performing a microcode update if they are enforced
-via the aforementioned overrides.  (See the sections "check_caveats script"
-and "reload_microcode script" for details.)
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/31
-
-Caveat name: intel-06-4e-03
-
-Affected microcode: intel-ucode/06-4e-03
-
-Dependencies: intel
-
-Mitigation: previously published microcode revision 0xd6 is used by default.
-
-
-Intel Skylake-H/S/Xeon E3 v5 caveat
-----------------------------------
-Some Intel Skylake CPU models (SKL-H/S/Xeon E3 v5, family 6, model 94,
-stepping 3) had reports of system hangs when revision 0xdc of microcode,
-that is included in microcode-20200609 update to address CVE-2020-0543,
-CVE-2020-0548, and CVE-2020-0549, was applied[1].  In order to address this,
-microcode update to the newer revision had been disabled by default on these
-systems, and the previously published microcode revision 0xd6 was used instead.
-The revision 0xea seems[2] to have fixed the aforementioned issue, hence
-the latest microcode revision usage it is enabled by default,
-but can be disabled explicitly via the aforementioned overrides.  (See
-the sections "check_caveats script" and "reload_microcode script" for details.)
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/31#issuecomment-644885826
-[2] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/31#issuecomment-857806014
-
-Caveat names: intel-06-5e-03
-
-Affected microcode: intel-ucode/06-5e-03.
-
-Dependencies: intel
-
-Mitigation: None; the latest revision of the microcode file is used by default;
-previously published microcode revision 0xd6 is still available as a fallback
-as part of "intel" caveat.
-
-
-Dell caveats
------------
-Some Dell systems that use some models of Intel CPUs are susceptible to hangs
-and system instability during or after microcode update to revision 0xc6/0xca
-(included as part of microcode-20191113/microcode-20191115 update that addressed
-CVE-2019-0117, CVE-2019-0123, CVE-2019-11135, and CVE-2019-11139)
-and/or revision 0xd6 (included as part of microcode-20200609 update
-that addressed CVE-2020-0543, CVE-2020-0548, and CVE-2020-0549)
-[1][2][3][4][5][6].  In order to address this, microcode update to the newer
-revision has been disabled by default on these systems, and the previously
-published microcode revisions 0xae/0xb4/0xb8 are used by default
-for the OS-driven microcode update.
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/23
-[2] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/24
-[3] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/33
-[4] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/34
-[5] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/35
-[6] https://bugzilla.redhat.com/show_bug.cgi?id=1846097
-
-Caveat names: intel-06-8e-9e-0x-dell, intel-06-8e-9e-0x-0xca
-
-Affected microcode: intel-ucode/06-8e-09, intel-ucode/06-8e-0a,
-                    intel-ucode/06-8e-0b, intel-ucode/06-8e-0c,
-                    intel-ucode/06-9e-09, intel-ucode/06-9e-0a,
-                    intel-ucode/06-9e-0b, intel-ucode/06-9e-0c,
-                    intel-ucode/06-9e-0d.
-
-Dependencies: intel
-
-Mitigation: previously published microcode revision 0xac/0xb4/0xb8 is used
-            by default if /sys/devices/virtual/dmi/id/bios_vendor reports
-	    "Dell Inc."; otherwise, the latest microcode revision is used.
-	    Caveat with revision 0xca of microcode files is provided
-	    as a convenience for the cases where it was working well before.
-
-
-Intel Tiger Lake-UP3/UP4 caveat
-------------------------------
-Some systems with Intel Tiger Lake-UP3/UP4 CPUs (TGL, family 6, model 140,
-stepping 1) had reports of system hangs when a microcode update,
-that was included since microcode-20201110 release, was applied[1].
-In order to address this, microcode update to a newer revision had been disabled
-by default on these systems.  The revision 0x88 seems to have fixed
-the aforementioned issue, hence it is enabled by default; however, it is still
-can be disabled via the aforementioned overrides.  (See the sections
-"check_caveats script" and "reload_microcode script" for details.)
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/44
-
-Caveat names: intel-06-8c-01
-
-Affected microcode: intel-ucode/06-8c-01.
-
-Dependencies: intel
-
-Mitigation: None; the latest revision of the microcode file is used by default.
-
-
-
-Intel Sapphire Rapids Edge Enhanced caveat
------------------------------------------
-Intel Sapphire Rapids Edge Enhanced CPU models (SPR-EE, family 6, model 143,
-stepping 8) had reports of system exhibiting latency spikes when revsions
-0x2b000603 and newer of the microcode are applied.  In order to address this,
-previous 0x2b0005c0 revision of the microcode is provided, and the usage
-of the latest microcode can be disabled, so the older version is used instead.
-
-Caveat names: intel-06-8f-08
-
-Affected microcode: intel-ucode/06-8f-08.
-
-Dependencies: intel
-
-Mitigation: None; the latest revision of the microcode file is used by default.
-
-

 Additional information
 ======================
--- a/SOURCES/0017-releasenote.md-add-information-about-removal-of-CLX-.patch
+++ b/SOURCES/0017-releasenote.md-add-information-about-removal-of-CLX-.patch
@ -1,39 +0,0 @@
-From 98d372cde3eefee6e91414c400d8c3d608b8eb86 Mon Sep 17 00:00:00 2001
-From: Eugene Syromiatnikov <esyr@redhat.com>
-Date: Mon, 2 Jun 2025 18:56:56 +0200
-Subject: [PATCH 17/17] releasenote.md: add information about removal of CLX-SP
- and EMR-SP microcode
-
-For some reason, information about removal of 06-55-06 (CLX-SP B0)
-and 06-cf-01 (EMR-SP A0) microcode file is missing from microcode-20250512
-release notes.  Document those properly.
-
-* releasenote.md (microcode-20250512): Mention removal of 06-55-06
-and 06-cf-01 microcode files.
-
-Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
---
- releasenote.md | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/releasenote.md b/releasenote.md
-index 3c700b5..d42e9ad 100644
--- a/releasenote.md
-+++ b/releasenote.md
-@@ -85,6 +85,13 @@
- | TWL            | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
- | WHL-U          | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen8 Mobile
- 
-+### Removed Platforms
-+
-+| Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products
-+|:---------------|:---------|:------------|:---------|:---------|:---------
-+| CLX-SP         | B0       | 06-55-06/bf | 04003605 |          | Xeon Scalable Gen2
-+| EMR-SP         | A0       | 06-cf-01/87 | 21000291 |          | Xeon Scalable Gen5
-+
- 
- ## [microcode-20250211](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20250211)
- 
-- 
-2.13.6
-
--- a/SOURCES/0101-releasenote.md-drop-Removed-Platforms-from-microcode.patch
+++ b/SOURCES/0101-releasenote.md-drop-Removed-Platforms-from-microcode.patch
@ -1,51 +0,0 @@
-From 2d7eaaadd3daa8d9e0493a677890cb7935aca032 Mon Sep 17 00:00:00 2001
-From: Eugene Syromiatnikov <esyr@redhat.com>
-Date: Tue, 25 Feb 2025 16:59:48 +0100
-Subject: [PATCH] releasenote.md: drop "Removed Platforms" from
- microcode-20250512 and microcode-20250211
-
-Drop the "Removed Platforms" sub-section from the microcode-20250512
-and microcode-20250211 release notes, as these microcode files
-are not removed in RHEL.
-
-Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
---
- releasenote.md | 15 ---------------
- 1 file changed, 15 deletions(-)
-
-diff --git a/releasenote.md b/releasenote.md
-index d42e9ad..e46f6f0 100644
--- a/releasenote.md
-+++ b/releasenote.md
-@@ -85,13 +85,6 @@
- | TWL            | N0       | 06-be-00/19 | 0000001c | 0000001d | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
- | WHL-U          | V0       | 06-8e-0c/94 | 000000fc | 00000100 | Core Gen8 Mobile
- 
-### Removed Platforms
-
-| Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products
-|:---------------|:---------|:------------|:---------|:---------|:---------
-| CLX-SP         | B0       | 06-55-06/bf | 04003605 |          | Xeon Scalable Gen2
-| EMR-SP         | A0       | 06-cf-01/87 | 21000291 |          | Xeon Scalable Gen5
-
- 
- ## [microcode-20250211](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20250211)
- 
-@@ -149,14 +142,6 @@
- | SPR-SP         | E5/S3    | 06-8f-08/87 | 2b000603 | 2b000620 | Xeon Scalable Gen4
- | TWL            | N0       | 06-be-00/19 | 0000001a | 0000001c | Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
- 
-### Removed Platforms
-
-| Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products
-|:---------------|:---------|:------------|:---------|:---------|:---------
-| SPR-SP         | E2       | 06-8f-05/87 | 2b000603 |          | Xeon Scalable Gen4
-| SPR-SP         | E3       | 06-8f-06/87 | 2b000603 |          | Xeon Scalable Gen4
-| RPL            |          | 06-ba-08/e0 | 00004123 |          | Core Gen13
-
- ### New Disclosures Updated in Prior Releases
- 
- | Processor      | Stepping | F-M-S/PI    | Old Ver  | New Ver  | Products
-- 
-2.13.6
-
--- a/SOURCES/06-2d-07_config
+++ b/SOURCES/06-2d-07_config
@ -1,3 +0,0 @@
-model GenuineIntel 06-2d-07
-path intel-ucode/06-2d-07
-dependency required intel
--- a/SOURCES/06-2d-07_disclaimer
+++ b/SOURCES/06-2d-07_disclaimer
@ -1,4 +0,0 @@
-MDS-related microcode update for Intel Sandy Bridge-EP (family 6, model 45,
-stepping 7; CPUID 0x206d7) CPUs is disabled.
-Please refer to /usr/share/doc/microcode_ctl/caveats/06-2d-07_readme
-and /usr/share/doc/microcode_ctl/README.caveats for details.
--- a/SOURCES/06-2d-07_readme
+++ b/SOURCES/06-2d-07_readme
@ -1,58 +0,0 @@
-Intel Sandy Bridge-E/EN/EP CPU models (SNB-EP, family 6, model 45, stepping 7)
-had issues with MDS-related microcode update that may lead to a system hang
-after a microcode update[1][2].  In order to address this, microcode update
-to the MDS-related revision 0x718 had been disabled, and the previously
-published microcode revision 0x714 is used by default for the OS-driven
-microcode update.  The revision 0x71a of the microcode is intended to fix
-the aforementioned issue, hence it is enabled by default (but can be disabled
-explicitly; see below).
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/15
-[2] https://access.redhat.com/solutions/4593951
-
-For the reference, SHA1 checksums of 06-2d-07 microcode files containing
-microcode revisions in question are listed below:
- * 06-2d-07, revision 0x714: bcf2173cd3dd499c37defbc2533703cfa6ec2430
- * 06-2d-07, revision 0x718: 837cfebbfc09b911151dfd179082ad99cf87e85d
- * 06-2d-07, revision 0x71a: 4512c8149e63e5ed15f45005d7fb5be0041f66f6
-
-Please contact your system vendor for a BIOS/firmware update that contains
-the latest microcode version.  For the information regarding microcode versions
-required for mitigating specific side-channel cache attacks, please refer
-to the following knowledge base articles:
- * CVE-2017-5715 ("Spectre"):
-   https://access.redhat.com/articles/3436091
- * CVE-2018-3639 ("Speculative Store Bypass"):
-   https://access.redhat.com/articles/3540901
- * CVE-2018-3620, CVE-2018-3646 ("L1 Terminal Fault Attack"):
-   https://access.redhat.com/articles/3562741
- * CVE-2018-12130, CVE-2018-12126, CVE-2018-12127, and CVE-2019-11091
-   ("Microarchitectural Data Sampling"):
-   https://access.redhat.com/articles/4138151
-
-The information regarding disabling microcode update is provided below.
-
-To disable usage of the newer microcode revision for a specific kernel
-version, please create file "disallow-intel-06-2d-07" inside
-/lib/firmware/<kernel_version> directory, run
-"/usr/libexec/microcode_ctl/update_ucode" to add it to firmware directory
-where microcode will be available for late microcode update, and run
-"dracut -f --kver <kernel_version>", so initramfs for this kernel version
-is regenerated and the microcode can be loaded early, for example:
-
-    touch /lib/firmware/3.10.0-862.9.1/disallow-intel-06-2d-07
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --kver 3.10.0-862.9.1
-
-To avoid addition of the newer microcode revision for all kernels, please create
-file "/etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-2d-07", run
-"/usr/libexec/microcode_ctl/update_ucode" for late microcode updates,
-and "dracut -f --regenerate-all" for early microcode updates:
-
-    mkdir -p /etc/microcode_ctl/ucode_with_caveats
-    touch /etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-2d-07
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --regenerate-all
-
-Please refer to /usr/share/doc/microcode_ctl/README.caveats for additional
-information.
--- a/SOURCES/06-4e-03_config
+++ b/SOURCES/06-4e-03_config
@ -1,4 +0,0 @@
-model GenuineIntel 06-4e-03
-path intel-ucode/06-4e-03
-dependency required intel
-disable early late
--- a/SOURCES/06-4e-03_disclaimer
+++ b/SOURCES/06-4e-03_disclaimer
@ -1,5 +0,0 @@
-Microcode revisions 0xda and higher for Intel Skylake-U/Y (family 6,
-model 78, stepping 3; CPUID 0x406e3) are disabled as they may cause system
-instability; the previously published revision 0xd6 is used instead.
-Please refer to /usr/share/doc/microcode_ctl/caveats/06-4e-03_readme
-and /usr/share/doc/microcode_ctl/README.caveats for details.
--- a/SOURCES/06-4e-03_readme
+++ b/SOURCES/06-4e-03_readme
@ -1,90 +0,0 @@
-Some Intel Skylake CPU models (SKL-U/Y, family 6, model 78, stepping 3)
-have reports of system hangs when revision 0xdc of microcode, that is included
-since microcode-20200609 update to address CVE-2020-0543, CVE-2020-0548,
-and CVE-2020-0549, is applied[1].  In order to address this, microcode update
-to the newer revision has been disabled by default on these systems,
-and the previously published microcode revision 0xd6 is used by default
-for the OS-driven microcode update.
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/31
-
-For the reference, SHA1 checksums of 06-4e-03 microcode files containing
-microcode revisions in question are listed below:
- * 06-4e-03, revision 0xd6: 06432a25053c823b0e2a6b8e84e2e2023ee3d43e
- * 06-4e-03, revision 0xdc: cd1733458d187486999337ff8b51eeaa0cfbca6c
- * 06-4e-03, revision 0xe2: 41f4513cf563605bc85db38056ac430dec948366
- * 06-4e-03, revision 0xea: 5a54cab9f22f69b819d663e5747ed6ea2a326c55
- * 06-4e-03, revision 0xec: d949a8543d2464d955f5dc4b0777cac863f48729
- * 06-4e-03, revision 0xf0: 37475bac70457ba8df2c1a32bba81bd7bd27d5e8
-
-Please contact your system vendor for a BIOS/firmware update that contains
-the latest microcode version.  For the information regarding microcode versions
-required for mitigating specific side-channel cache attacks, please refer
-to the following knowledge base articles:
- * CVE-2017-5715 ("Spectre"):
-   https://access.redhat.com/articles/3436091
- * CVE-2018-3639 ("Speculative Store Bypass"):
-   https://access.redhat.com/articles/3540901
- * CVE-2018-3620, CVE-2018-3646 ("L1 Terminal Fault Attack"):
-   https://access.redhat.com/articles/3562741
- * CVE-2018-12130, CVE-2018-12126, CVE-2018-12127, and CVE-2019-11091
-   ("Microarchitectural Data Sampling"):
-   https://access.redhat.com/articles/4138151
- * CVE-2019-0117 (Intel SGX Information Leak),
-   CVE-2019-0123 (Intel SGX Privilege Escalation),
-   CVE-2019-11135 (TSX Asynchronous Abort),
-   CVE-2019-11139 (Voltage Setting Modulation):
-   https://access.redhat.com/solutions/2019-microcode-nov
- * CVE-2020-0543 (Special Register Buffer Data Sampling),
-   CVE-2020-0548 (Vector Register Data Sampling),
-   CVE-2020-0549 (L1D Cache Eviction Sampling):
-   https://access.redhat.com/solutions/5142751
- * CVE-2020-8695 (Information disclosure issue in Intel SGX via RAPL interface),
-   CVE-2020-8696 (Vector Register Leakage-Active),
-   CVE-2020-8698 (Fast Forward Store Predictor):
-   https://access.redhat.com/articles/5569051
- * CVE-2020-24489 (VT-d-related Privilege Escalation),
-   CVE-2020-24511 (Improper Isolation of Shared Resources),
-   CVE-2020-24512 (Observable Timing Discrepancy),
-   CVE-2020-24513 (Information Disclosure on Some Intel Atom Processors):
-   https://access.redhat.com/articles/6101171
- * CVE-2021-0127 (Intel Processor Breakpoint Control Flow):
-   https://access.redhat.com/articles/6716541
- * CVE-2022-0005 (Informational disclosure via JTAG),
-   CVE-2022-21123 (Shared Buffers Data Read),
-   CVE-2022-21125 (Shared Buffers Data Sampling),
-   CVE-2022-21127 (Update to Special Register Buffer Data Sampling),
-   CVE-2022-21151 (Optimization Removal-Induced Informational Disclosure),
-   CVE-2022-21166 (Device Register Partial Write):
-   https://access.redhat.com/articles/6963124
-
-The information regarding enforcing microcode update is provided below.
-
-To enforce usage of the latest 06-4e-03 microcode revision for a specific kernel
-version, please create a file "force-intel-06-4e-03" inside
-/lib/firmware/<kernel_version> directory, run
-"/usr/libexec/microcode_ctl/update_ucode" to add it to firmware directory
-where microcode will be available for late microcode update, and run
-"dracut -f --kver <kernel_version>", so initramfs for this kernel version
-is regenerated and the microcode can be loaded early, for example:
-
-    touch /lib/firmware/3.10.0-862.9.1/force-intel-06-4e-03
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --kver 3.10.0-862.9.1
-
-After that, it is possible to perform a late microcode update by executing
-"/usr/libexec/microcode_ctl/reload_microcode" or by writing value "1" to
-"/sys/devices/system/cpu/microcode/reload" directly.
-
-To enforce addition of this microcode for all kernels, please create file
-"/etc/microcode_ctl/ucode_with_caveats/force-intel-06-4e-03", run
-"/usr/libexec/microcode_ctl/update_ucode" for enabling late microcode updates,
-and "dracut -f --regenerate-all" for enabling early microcode updates:
-
-    mkdir -p /etc/microcode_ctl/ucode_with_caveats
-    touch /etc/microcode_ctl/ucode_with_caveats/force-intel-06-4e-03
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --regenerate-all
-
-Please refer to /usr/share/doc/microcode_ctl/README.caveats for additional
-information.
--- a/SOURCES/06-55-04_config
+++ b/SOURCES/06-55-04_config
@ -1,12 +0,0 @@
-model GenuineIntel 06-55-04
-path intel-ucode/06-55-04
-## Bug https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/21
-## affects only SKX-W/X (Workstation and HEDT segments); product segment
-## can be determined by checking bits 5..3 of the CAPID0 field in PCU registers
-## device (see https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-scalable-spec-update.pdf#page=13
-## for Server/FPGA/Fabric segments description; for SKX-W/X no public
-## documentation seems to be available).  Specific device/function numbers
-## are provided for speeding up the search only, VID:DID is the real selector.
-## Commented out since revision 0x2006906 seems to fix the issue.
-#pci_config_val mode=success-all device=0x1e function=3 vid=0x8086 did=0x2083 offset=0x84 size=4 mask=0x38 val=0x38,0x18,0x8
-dependency required intel
--- a/SOURCES/06-55-04_disclaimer
+++ b/SOURCES/06-55-04_disclaimer
@ -1,5 +0,0 @@
-Microcode revisions 0x2000065 and higher for Intel Skylake-X/W (family 6,
-model 85, stepping 4; CPUID 0x50654) were disabled as they could cause system
-hangs on reboot, so the previous revision 0x2000064 was used instead.
-Please refer to /usr/share/doc/microcode_ctl/caveats/06-55-04_readme
-and /usr/share/doc/microcode_ctl/README.caveats for details.
--- a/SOURCES/06-55-04_readme
+++ b/SOURCES/06-55-04_readme
@ -1,99 +0,0 @@
-Intel Skylake Scalable Platform CPU models that belong to Workstation and HEDT
-(Basin Falls) segment (SKL-W/X, family 6, model 85, stepping 4) had reports
-of system hangs on reboot when revision 0x2000065 of microcode, that was included
-from microcode-20191112 update up to microcode-20200520 update, was applied[1].
-In order to address this, microcode update to the newer revision had been
-disabled by default on these systems, and the previously published microcode
-revision 0x2000064 is used by default for the OS-driven microcode update.
-
-Since revision 0x2006906 (included with the microcode-20200609 release)
-it is reported that the issue is no longer present, so the newer microcode
-revision is enabled by default now (but can be disabled explicitly; see below).
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/21
-
-For the reference, SHA1 checksums of 06-55-04 microcode files containing
-microcode revisions in question are listed below:
- * 06-55-04, revision 0x2000064: 2e405644a145de0f55517b6a9de118eec8ec1e5a
- * 06-55-04, revision 0x2000065: f27f12b9d53f492c297afd856cdbc596786fad23
- * 06-55-04, revision 0x2006906: 5f18f985f6d5ad369b5f6549b7f3ee55acaef967
- * 06-55-04, revision 0x2006a08: 4059fb1f60370297454177f63cd7cc20b3fa1212
- * 06-55-04, revision 0x2006a0a: 7ec27025329c82de9553c14a78733ad1013e5462
- * 06-55-04, revision 0x2006b06: cb5bec976cb9754e3a22ab6828b3262a8f9eccf7
- * 06-55-04, revision 0x2006c0a: 76b641375d136c08f5feb46aacebee40468ac085
- * 06-55-04, revision 0x2006d05: dc4207cf4eb916ff34acbdddc474db0df781234f
- * 06-55-04, revision 0x2006e05: bc67d247ad1c9a834bec5e452606db1381d6bc7e
- * 06-55-04, revision 0x2006f05: c47277a6a47caedb518f311ce5d339528a8347e2
- * 06-55-04, revision 0x2007006: 68ae0f321685ff97b50266bc20818f31563fc67c
-
-Please contact your system vendor for a BIOS/firmware update that contains
-the latest microcode version.  For the information regarding microcode versions
-required for mitigating specific side-channel cache attacks, please refer
-to the following knowledge base articles:
- * CVE-2017-5715 ("Spectre"):
-   https://access.redhat.com/articles/3436091
- * CVE-2018-3639 ("Speculative Store Bypass"):
-   https://access.redhat.com/articles/3540901
- * CVE-2018-3620, CVE-2018-3646 ("L1 Terminal Fault Attack"):
-   https://access.redhat.com/articles/3562741
- * CVE-2018-12130, CVE-2018-12126, CVE-2018-12127, and CVE-2019-11091
-   ("Microarchitectural Data Sampling"):
-   https://access.redhat.com/articles/4138151
- * CVE-2019-0117 (Intel SGX Information Leak),
-   CVE-2019-0123 (Intel SGX Privilege Escalation),
-   CVE-2019-11135 (TSX Asynchronous Abort),
-   CVE-2019-11139 (Voltage Setting Modulation):
-   https://access.redhat.com/solutions/2019-microcode-nov
- * CVE-2020-0543 (Special Register Buffer Data Sampling),
-   CVE-2020-0548 (Vector Register Data Sampling),
-   CVE-2020-0549 (L1D Cache Eviction Sampling):
-   https://access.redhat.com/solutions/5142751
- * CVE-2020-8695 (Information disclosure issue in Intel SGX via RAPL interface),
-   CVE-2020-8696 (Vector Register Leakage-Active),
-   CVE-2020-8698 (Fast Forward Store Predictor):
-   https://access.redhat.com/articles/5569051
- * CVE-2020-24489 (VT-d-related Privilege Escalation),
-   CVE-2020-24511 (Improper Isolation of Shared Resources),
-   CVE-2020-24512 (Observable Timing Discrepancy),
-   CVE-2020-24513 (Information Disclosure on Some Intel Atom Processors):
-   https://access.redhat.com/articles/6101171
- * CVE-2021-0127 (Intel Processor Breakpoint Control Flow):
-   https://access.redhat.com/articles/6716541
- * CVE-2022-0005 (Informational disclosure via JTAG),
-   CVE-2022-21123 (Shared Buffers Data Read),
-   CVE-2022-21125 (Shared Buffers Data Sampling),
-   CVE-2022-21127 (Update to Special Register Buffer Data Sampling),
-   CVE-2022-21131 (Protected Processor Inventory Number (PPIN) access protection),
-   CVE-2022-21136 (Overclocking service access protection),
-   CVE-2022-21151 (Optimization Removal-Induced Informational Disclosure),
-   CVE-2022-21166 (Device Register Partial Write):
-   https://access.redhat.com/articles/6963124
- * CVE-2022-21233 (Stale Data Read from legacy xAPIC):
-   https://access.redhat.com/articles/6976398
-
-The information regarding disabling microcode update is provided below.
-
-To disable usage of the newer microcode revision for a specific kernel
-version, please create a file "disallow-intel-06-55-04" inside
-/lib/firmware/<kernel_version> directory, run
-"/usr/libexec/microcode_ctl/update_ucode" to update firmware directory
-used for late microcode updates, and run "dracut -f --kver <kernel_version>"
-so initramfs for this kernel version is regenerated, for example:
-
-    touch /lib/firmware/3.10.0-862.9.1/disallow-intel-06-55-04
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --kver 3.10.0-862.9.1
-
-To disable usage of the newer microcode revision for all kernels, please create
-file "/etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-55-04", run
-"/usr/libexec/microcode_ctl/update_ucode" to update firmware directories
-used for late microcode updates, and run "dracut -f --regenerate-all"
-so initramfs images get regenerated, for example:
-
-    mkdir -p /etc/microcode_ctl/ucode_with_caveats
-    touch /etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-55-04
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --regenerate-all
-
-Please refer to /usr/share/doc/microcode_ctl/README.caveats for additional
-information.
--- a/SOURCES/06-5e-03_config
+++ b/SOURCES/06-5e-03_config
@ -1,3 +0,0 @@
-model GenuineIntel 06-5e-03
-path intel-ucode/06-5e-03
-dependency required intel
--- a/SOURCES/06-5e-03_disclaimer
+++ b/SOURCES/06-5e-03_disclaimer
@ -1,5 +0,0 @@
-Microcode revisions 0xda and higher for Intel Skylake-H/S/Xeon E3 v5 (family 6,
-model 94, stepping 3; CPUID 0x506e3) are disabled as they may cause system
-instability; the previously published revision 0xd6 is used instead.
-Please refer to /usr/share/doc/microcode_ctl/caveats/06-5e-03_readme
-and /usr/share/doc/microcode_ctl/README.caveats for details.
--- a/SOURCES/06-5e-03_readme
+++ b/SOURCES/06-5e-03_readme
@ -1,89 +0,0 @@
-Some Intel Skylake CPU models (SKL-H/S/Xeon E3 v5, family 6, model 94,
-stepping 3) had reports of possible system hangs when revision 0xdc
-of microcode, that is included in microcode-20200609 update to address
-CVE-2020-0543, CVE-2020-0548, and CVE-2020-0549, was applied[1].  In order
-to address this, microcode updates to the newer revision had been disabled
-by default on these systems, and the previously published microcode revision
-0xd6 was used by default for the OS-driven microcode update.  The revision
-0xea seems[2] to have fixed the aforementioned issue, hence it is enabled
-by default (but can be disabled explicitly; see below).
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/31#issuecomment-644885826
-[2] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/31#issuecomment-857806014
-
-For the reference, SHA1 checksums of 06-5e-03 microcode files containing
-microcode revisions in question are listed below:
- * 06-5e-03, revision 0xd6: 86c60ee7d5d0d7115a4962c1c61ceecb0fd3a95a
- * 06-5e-03, revision 0xdc: 5e1020a10678cfc60980131c3d3a2cfd462b4dd7
- * 06-5e-03, revision 0xe2: 031e6e148b590d1c9cfdb6677539eeb4899e831c
- * 06-5e-03, revision 0xea: e6c37056a849fd281f2fdb975361a914e07b86c8
- * 06-5e-03, revision 0xec: 6458bf25da4906479a01ffdcaa6d466e22722e01
- * 06-5e-03, revision 0xf0: 0683706bbbf470abbdad4b9923aa9647bfec9616
-
-Please contact your system vendor for a BIOS/firmware update that contains
-the latest microcode version.  For the information regarding microcode versions
-required for mitigating specific side-channel cache attacks, please refer
-to the following knowledge base articles:
- * CVE-2017-5715 ("Spectre"):
-   https://access.redhat.com/articles/3436091
- * CVE-2018-3639 ("Speculative Store Bypass"):
-   https://access.redhat.com/articles/3540901
- * CVE-2018-3620, CVE-2018-3646 ("L1 Terminal Fault Attack"):
-   https://access.redhat.com/articles/3562741
- * CVE-2018-12130, CVE-2018-12126, CVE-2018-12127, and CVE-2019-11091
-   ("Microarchitectural Data Sampling"):
-   https://access.redhat.com/articles/4138151
- * CVE-2019-0117 (Intel SGX Information Leak),
-   CVE-2019-0123 (Intel SGX Privilege Escalation),
-   CVE-2019-11135 (TSX Asynchronous Abort),
-   CVE-2019-11139 (Voltage Setting Modulation):
-   https://access.redhat.com/solutions/2019-microcode-nov
- * CVE-2020-0543 (Special Register Buffer Data Sampling),
-   CVE-2020-0548 (Vector Register Data Sampling),
-   CVE-2020-0549 (L1D Cache Eviction Sampling):
-   https://access.redhat.com/solutions/5142751
- * CVE-2020-8695 (Information disclosure issue in Intel SGX via RAPL interface),
-   CVE-2020-8696 (Vector Register Leakage-Active),
-   CVE-2020-8698 (Fast Forward Store Predictor):
-   https://access.redhat.com/articles/5569051
- * CVE-2020-24489 (VT-d-related Privilege Escalation),
-   CVE-2020-24511 (Improper Isolation of Shared Resources),
-   CVE-2020-24512 (Observable Timing Discrepancy),
-   CVE-2020-24513 (Information Disclosure on Some Intel Atom Processors):
-   https://access.redhat.com/articles/6101171
- * CVE-2021-0127 (Intel Processor Breakpoint Control Flow):
-   https://access.redhat.com/articles/6716541
- * CVE-2022-0005 (Informational disclosure via JTAG),
-   CVE-2022-21123 (Shared Buffers Data Read),
-   CVE-2022-21125 (Shared Buffers Data Sampling),
-   CVE-2022-21127 (Update to Special Register Buffer Data Sampling),
-   CVE-2022-21151 (Optimization Removal-Induced Informational Disclosure),
-   CVE-2022-21166 (Device Register Partial Write):
-   https://access.redhat.com/articles/6963124
-
-The information regarding disabling microcode update is provided below.
-
-To prevent usage of the latest 06-5e-03 microcode revision for a specific kernel
-version, please create a file "disallow-intel-06-5e-03" inside
-/lib/firmware/<kernel_version> directory, run
-"/usr/libexec/microcode_ctl/update_ucode" to remove it to firmware directory
-where microcode is available for late microcode update, and run
-"dracut -f --kver <kernel_version>", so initramfs for this kernel version
-is regenerated, for example:
-
-    touch /lib/firmware/3.10.0-862.9.1/disallow-intel-06-5e-03
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --kver 3.10.0-862.9.1
-
-To avoid  addition of the latest microcode for all kernels, please create file
-"/etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-5e-03", run
-"/usr/libexec/microcode_ctl/update_ucode" for late microcode updates,
-and "dracut -f --regenerate-all" for early microcode updates:
-
-    mkdir -p /etc/microcode_ctl/ucode_with_caveats
-    touch /etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-5e-03
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --regenerate-all
-
-Please refer to /usr/share/doc/microcode_ctl/README.caveats for additional
-information.
--- a/SOURCES/06-8c-01_config
+++ b/SOURCES/06-8c-01_config
@ -1,3 +0,0 @@
-model GenuineIntel 06-8c-01
-path intel-ucode/06-8c-01
-dependency required intel skip=success match-model-mode=off
--- a/SOURCES/06-8c-01_disclaimer
+++ b/SOURCES/06-8c-01_disclaimer
@ -1,4 +0,0 @@
-Microcode updates for Intel Tiger Lake-UP3/UP4 (family 6, model 140, stepping 1;
-CPUID 0x806c1) are disabled as they may cause system instability.
-Please refer to /usr/share/doc/microcode_ctl/caveats/06-8c-01_readme
-and /usr/share/doc/microcode_ctl/README.caveats for details.
--- a/SOURCES/06-8c-01_readme
+++ b/SOURCES/06-8c-01_readme
@ -1,67 +0,0 @@
-Some Intel Tiger Lake-UP3/UP4 CPU models (TGL, family 6, model 140, stepping 1)
-had reports of system hangs when a microcode update, that was included
-since microcode-20201110 update, was applied[1].  In order to address this,
-microcode update had been disabled by default on these systems.  The revision
-0x88 seems to have fixed the aforementioned issue, hence it is enabled
-by default (but can be disabled explicitly; see below).
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/44
-
-For the reference, SHA1 checksums of 06-8c-01 microcode files containing
-microcode revisions in question are listed below:
- * 06-8c-01, revision 0x68: 2204a6dee1688980cd228268fdf4b6ed5904fe04
- * 06-8c-01, revision 0x88: 61b6590feb2769046d5b0c394179beaf2df51290
- * 06-8c-01, revision 0x9a: 48b3ae8d27d8138b5b47052d2f8184bf555ad18e
- * 06-8c-01, revision 0xa4: 70753f54f5be84376bdebeb710595e4dc2f6d92f
- * 06-8c-01, revision 0xa6: fdcf89e3a15a20df8aeee215b78bf5d13d731044
- * 06-8c-01, revision 0xaa: cf84883f6b3184690c25ccade0b10fa839ac8657
- * 06-8c-01, revision 0xac: b9f342e564a0be372ed1f4709263bf811feb022a
- * 06-8c-01, revision 0xb4: 6596bb8696cde85538bb833d090f0b7a42d6ae14
- * 06-8c-01, revision 0xb6: 76556e8248a89f38cd55a6c83dccc995ba176091
- * 06-8c-01, revision 0xb8: 6e9b138d1db2934479b179af4a3a19e843c4b4e4
- * 06-8c-01, revision 0xbc: 7d529358aaf77df57c122db0b2eceb03989ea9ce
-
-Please contact your system vendor for a BIOS/firmware update that contains
-the latest microcode version.  For the information regarding microcode versions
-required for mitigating specific side-channel cache attacks, please refer
-to the following knowledge base articles:
- * CVE-2020-8695 (Information disclosure issue in Intel SGX via RAPL interface),
-   CVE-2020-8696 (Vector Register Leakage-Active),
-   CVE-2020-8698 (Fast Forward Store Predictor):
-   https://access.redhat.com/articles/5569051
- * CVE-2020-24489 (VT-d-related Privilege Escalation),
-   CVE-2020-24511 (Improper Isolation of Shared Resources),
-   CVE-2020-24512 (Observable Timing Discrepancy),
-   CVE-2020-24513 (Information Disclosure on Some Intel Atom Processors):
-   https://access.redhat.com/articles/6101171
- * CVE-2021-0145 (Fast store forward predictor - Cross Domain Training):
-   https://access.redhat.com/articles/6716541
- * CVE-2022-21123 (Shared Buffers Data Read):
-   https://access.redhat.com/articles/6963124
-
-The information regarding disabling microcode update is provided below.
-
-To disable 06-8c-01 microcode updates for a specific kernel
-version, please create a file "disallow-intel-06-8c-01" inside
-/lib/firmware/<kernel_version> directory, run
-"/usr/libexec/microcode_ctl/update_ucode" to remove it from the firmware
-directory where microcode is available for late microcode update, and run
-"dracut -f --kver <kernel_version>", so initramfs for this kernel version
-is regenerated, for example:
-
-    touch /lib/firmware/3.10.0-862.9.1/disallow-intel-06-8c-01
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --kver 3.10.0-862.9.1
-
-To avoid addition of this microcode for all kernels, please create file
-"/etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-8c-01", run
-"/usr/libexec/microcode_ctl/update_ucode" for late microcode updates,
-and "dracut -f --regenerate-all" for early microcode updates:
-
-    mkdir -p /etc/microcode_ctl/ucode_with_caveats
-    touch /etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-8c-01
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --regenerate-all
-
-Please refer to /usr/share/doc/microcode_ctl/README.caveats for additional
-information.
--- a/SOURCES/06-8e-9e-0x-0xca_config
+++ b/SOURCES/06-8e-9e-0x-0xca_config
@ -1,5 +0,0 @@
-path intel-ucode/*
-vendor GenuineIntel
-dmi mode=fail-equal key=bios_vendor val="Dell Inc."
-dependency required intel
-disable early late
--- a/SOURCES/06-8e-9e-0x-0xca_disclaimer
+++ b/SOURCES/06-8e-9e-0x-0xca_disclaimer
--- a/SOURCES/06-8e-9e-0x-0xca_readme
+++ b/SOURCES/06-8e-9e-0x-0xca_readme
@ -1,225 +0,0 @@
-Some Dell systems that use some models of Intel CPUs are susceptible to hangs
-and system instability during or after microcode update to revision 0xc6/0xca
-(included as part of microcode-20191113/microcode-20191115 update that addressed
-CVE-2019-0117, CVE-2019-0123, CVE-2019-11135, and CVE-2019-11139)
-and/or revision 0xd6 (included as part of microcode-20200609 update
-that addressed CVE-2020-0543, CVE-2020-0548, and CVE-2020-0549)
-[1][2][3][4][5][6].  In order to address this, microcode update to the newer
-revision has been disabled by default on these systems, and the previously
-published microcode revisions 0xae/0xb4/0xb8 are used by default
-for the OS-driven microcode update.
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/23
-[2] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/24
-[3] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/33
-[4] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/34
-[5] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/35
-[6] https://bugzilla.redhat.com/show_bug.cgi?id=1846097
-
-This caveat contains revision 0xca of 06-[89]e-0x microcode publicly released
-by Intel; for the latest revision of the microcode files, please refer to caveat
-06-8e-9e-0x-dell.
-
-For the reference, microarchitectures of the affected CPU models:
- * Amber Lake-Y
- * Kaby Lake-G/H/S/U/Y/Xeon E3
- * Coffee Lake-H/S/U/Xeon E
- * Comet Lake-U 4+2
- * Whiskey Lake-U
-
-Family names of the affected CPU models:
- * 7th Generation Intel® Core™ Processor Family
- * 8th Generation Intel® Core™ Processor Family
- * 9th Generation Intel® Core™ Processor Family
- * 10th Generation Intel® Core™ Processor Family (selected models)
- * Intel® Celeron® Processor G Series
- * Intel® Celeron® Processor 5000 Series
- * Intel® Core™ X-series Processors (i7-7740X, i5-7640X only)
- * Intel® Pentium® Gold Processor Series
- * Intel® Pentium® Processor Series (selected models)
- * Intel® Xeon® Processor E Family
- * Intel® Xeon® Processor E3 v6 Family
-
-SHA1 checksums of the microcode files containing microcode revisions
-in question:
- * 06-8e-09, revision 0xb4: e253c95c29c3eef6576db851dfa069d82a91256f
- * 06-8e-0a, revision 0xb4: 45bcba494be07df9eeccff9627578095a97fba4d
- * 06-8e-0b, revision 0xb8: 3e54bf91d642ad81ff07fe274d0cfb5d10d09c43
- * 06-8e-0c, revision 0xb8: bf635c87177d6dc4e067ec11e1caeb19d3c325f0
- * 06-9e-09, revision 0xb4: 42f68eec4ddb79dd6be0c95c4ce60e514e4504b1
- * 06-9e-0a, revision 0xb4: 37c7cb394dd36610b57943578343723da67d50f0
- * 06-9e-0b, revision 0xb4: b5399109d0a5ce8f5fb623ff942da0322b438b95
- * 06-9e-0c, revision 0xae: 131bce89e4d210de8322ffbc6bd787f1af66a7df
- * 06-9e-0d, revision 0xb8: 22511b007d1df55558d115abb13a1c23ea398317
-
- * 06-8e-09, revision 0xca: 9afa1bae40995207afef13247f114be042d88083
- * 06-8e-0a, revision 0xca: 1d90291cc25e17dc6c36c764cf8c06b41fed4c16
- * 06-8e-0b, revision 0xca: 3fb1246a6594eff5e2c2076c63c600d734f10777
- * 06-8e-0c, revision 0xca: e871540671f59b4fa5d0d454798f09a4d412aace
- * 06-9e-09, revision 0xca: b5eed11108ab7ac1e675fe75d0e7454a400ddd35
- * 06-9e-0a, revision 0xca: e472304aaa2f3815a32822cb111ab3f43bf3dfe4
- * 06-9e-0b, revision 0xca: 78f47c5162da680878ed057dc7c853f9737c524b
- * 06-9e-0c, revision 0xca: f23848a009928796a153cb9e8f44522136969408
- * 06-9e-0d, revision 0xca: c7a3d469469ee828ba9faf91b67af881fceec3b7
-
- * 06-8e-09, revision 0xd6: 2272c621768437d20e602207752201e0966e5a8c
- * 06-8e-0a, revision 0xd6: 0b145afb88e028e612f04c2a86385e7d7c3fefc4
- * 06-8e-0b, revision 0xd6: c3831b05da83be54f3acc451a1bce90f75e2e9e5
- * 06-8e-0c, revision 0xd6: 4b8938a93e23f4b5a2d9de40b87f6afcfdc27c05
- * 06-9e-09, revision 0xd6: 4bacba8c598508e7dd4e87e179586abe7a1a987f
- * 06-9e-0a, revision 0xd6: 4c236afeef9f80ff3a286698fe7cef72926722f0
- * 06-9e-0b, revision 0xd6: 2f9ab9b2ba29559ce177632281d7290a24fed2ef
- * 06-9e-0c, revision 0xd6: 4b9059e519bcab6085b6c103f5d99e509fe0b2bb
- * 06-9e-0d, revision 0xd6: 3a3b7edfd8126bb34b761b46a32102a622047899
-
- * 06-8e-09, revision 0xde: 84d7514101eb8904834a3dacdee684b3c574245f
- * 06-8e-0a, revision 0xe0: 080b9e3ebbcf6bb1eca0fb5f640e6bfbfe3a1e6e
- * 06-8e-0b, revision 0xde: 80fed976231bbff4c7103e373498e07eef0bff31
- * 06-8e-0c, revision 0xde: 84f160587fea4acb81451c8ff53dc51afba06343
- * 06-9e-09, revision 0xde: 422026ffb2cca446693c586be98d0d9e7dfeb116
- * 06-9e-0a, revision 0xde: b6c44b9fe26e1d6bafa27f37ffe010284294bf1c
- * 06-9e-0b, revision 0xde: 6452937a0d359066b95f9e679a41a15490770312
- * 06-9e-0c, revision 0xde: a95021a4e497e0bf3691ecf3d020728f25a3f542
- * 06-9e-0d, revision 0xde: 03b20fdc2fa3f9586f93a7e40d3b61be5b7b788c
-
- * 06-8e-09, revision 0xea: caa7192fb2223e3e52389aca84930aee326b384d
- * 06-8e-0a, revision 0xea: ab4d5d3b51445d055763796a0362f8ab249cf4c8
- * 06-8e-0b, revision 0xea: 5406c513f90286c02476ee0d4a6c8010a263c3ac
- * 06-8e-0c, revision 0xea: 8c045b9056443862c95573efd4646e331a2310d3
- * 06-9e-09, revision 0xea: a9f8a14ca3808f6380d6dff92e1fd693cc909668
- * 06-9e-0a, revision 0xea: b7726bdba2fe74d8f419c68f417d796d569b9ec4
- * 06-9e-0b, revision 0xea: 963dca66aedf2bfb0613d0d9515c6bcfb0589e0c
- * 06-9e-0c, revision 0xea: 1329a4d8166fe7d70833d21428936254e11efbb4
- * 06-9e-0d, revision 0xea: 9c73f2ac6c4edbf8b0aefdd5d6780c7219be702a
-
- * 06-8e-09, revision 0xec: 78eb624be5e8084e438318bdad99f9ddc082def7
- * 06-8e-0a, revision 0xec: 6c41a6ad412f48f81a9d5edf59dcdecc358398bf
- * 06-8e-0b, revision 0xec: 89dd0de598c83eb9714f6839499f322dfce2b693
- * 06-8e-0c, revision 0xec: 225ea349b9cb3b1b94e237deb797e0c60d14a84c
- * 06-9e-09, revision 0xec: fc5c0206fe392a0ddad4dc9363fde2d3e3d1e681
- * 06-9e-0a, revision 0xec: 128002076e4ac3c75697fb4efdf1f8ddcc971fbe
- * 06-9e-0b, revision 0xec: ac8c3865a143b2e03869f15a5b86e560f60ad632
- * 06-9e-0c, revision 0xec: 6e3d695290def517857c8e743dc65161479f0c04
- * 06-9e-0d, revision 0xec: 58b1ec5fee7dd1a761ed901b374ccb978737a979
-
- * 06-8e-09, revision 0xf0: 219e2b9168a09451b17813b97995cc59cc78b414
- * 06-8e-0a, revision 0xf0: 3c4241d0b9d1a1a1e82d03b365fdd3b843006a7c
- * 06-8e-0b, revision 0xf0: 79b61f034cba86e61641114bbab49ec0166c0f35
- * 06-8e-0c, revision 0xf0: 11d166de440dbe9c440e90cb610ef4b9d48242b1
- * 06-9e-09, revision 0xf0: 49e142da74e7298b2db738ff7dd1a9b0fa4e0c3e
- * 06-9e-0a, revision 0xf0: 8de1d4a80cd683bf09854c33905c69d3d7ac7730
- * 06-9e-0b, revision 0xf0: ff092c6ac8333f0abcd94f7d2e2088f31d960e62
- * 06-9e-0c, revision 0xf0: 3702f21e87b75bea6f4b1ee0407b941ef31d4ad1
- * 06-9e-0d, revision 0xf0: 226feaaa431eb76e734ab68efc2ea7b07aa3c7d9
-
- * 06-8e-0c, revision 0xf4: 6a5e140bf8c046acb6958bad1db1fee66c8601ad
- * 06-9e-0d, revision 0xf4: 3433d4394b05a9c8aefb9c46674bad7b7e934f11
-
- * 06-8e-09, revision 0xf2: 2e67e55d7b805edcfaac57898088323df7315b25
- * 06-8e-0a, revision 0xf2: f9e1dbeb969ded845b726c62336f243099714bcf
- * 06-8e-0b, revision 0xf2: 3d45fbcbefd92dbbedf0eed04aeb29c7430c7c0e
- * 06-8e-0c, revision 0xf6: bd37be38dbd046d4d66f126cfaa79e43bfe88c0d
- * 06-9e-09, revision 0xf2: 716257544acf2c871d74e4627e7de86ee1024185
- * 06-9e-0a, revision 0xf2: 933c5d6710195336381e15a160d36aaa52d358fd
- * 06-9e-0b, revision 0xf2: 92eaafdb72f6d4231046aadb92caa0038e94fca8
- * 06-9e-0c, revision 0xf2: ad8922b4f91b5214dd88c56c0a12d15edb9cea5b
- * 06-9e-0d, revision 0xf8: 8fdea727c6ce46b26e0cffa6ee4ff1ba0c45cf14
-
- * 06-8e-09, revision 0xf4: e059ab6b168f3831d624acc153e18ab1c8488570
- * 06-8e-0a, revision 0xf4: d1ade1ccfe5c6105d0786dfe887696808954f8b4
- * 06-8e-0b, revision 0xf4: 0bc93736f3f5b8b6569bebac4e9627ab923621e0
- * 06-8e-0c, revision 0xf8: be93b4826a3f40219a9fc4fc5afa87b320279f6e
- * 06-9e-09, revision 0xf4: 317564f3ac7b99b5900b91e2be3e23b9b66bc2c0
- * 06-9e-0a, revision 0xf4: 9659f73e2c6081eb5c146c5ed763fa5db21df901
- * 06-9e-0b, revision 0xf4: e60b567ad54da129d05a77e305cae4488579979d
- * 06-9e-0c, revision 0xf4: 74d52a11a905dd7b254fa72b014c3bab8022ba3d
- * 06-9e-0d, revision 0xfa: 484738563e793d5b90b94869dc06edf0407182f1
-
- * 06-8e-0c, revision 0xfa: d2c2ed4634b2f345382991237bedb90430fcc0b3
- * 06-9e-09, revision 0xf8: 69b8a5435bfb976ef5ec5930dae870e26835442e
- * 06-9e-0a, revision 0xf6: c1f0f556cd203aa6e1d0d1ffb0a65b32f32692be
- * 06-9e-0c, revision 0xf6: a8dfddd009f750b6528f93556b67d4eeca1e5dfa
- * 06-9e-0d, revision 0xfc: a0ad865fd2d3b9d955a889c96fabc67da0235dda
-
- * 06-8e-09, revision 0xf6: c2786ef2eb4feb8ac3e3efae83c361de3ad8df0d
- * 06-8e-0a, revision 0xf6: 9bb2839d451ecee40c1eb08f40e4baec9a159e90
- * 06-8e-0b, revision 0xf6: 7b60fc7d44654976df32971a45399b3b910f3390
- * 06-8e-0c, revision 0xfc: 34efc9a54dc32082b898116840c0a1a1cef59e69
- * 06-9e-0a, revision 0xf8: 880163a2da13ed1eae1654535d751a788de6fa3f
- * 06-9e-0b, revision 0xf6: ca90c9139d0c1554f6d17ae1bdcf94d0faa6ece7
- * 06-9e-0c, revision 0xf8: 97dcc36772894619ab28be8c35c4ff9f15d684ae
- * 06-9e-0d, revision 0x100: 1a00b6a4373b95811c6396f2a0d8d497f4006fb7
-
- * 06-9e-0a, revision 0xfa: 7ee9924ded3bb07c0c7119db6b0da559e061f9a7
- * 06-9e-0d, revision 0x102: bee5c8aa8a6705ebb27469d44b0215721261f40f
-
- * 06-8e-0c, revision 0x100: a7d1e468848d0f97784123b1f2c7ab368c7e4f36
- * 06-9e-0d, revision 0x104: 93cf5727dea44c038dfadd66a953dc7ce44acdcf
-
-Please contact your system vendor for a BIOS/firmware update that contains
-the latest microcode version.  For the information regarding microcode versions
-required for mitigating specific side-channel cache attacks, please refer
-to the following knowledge base articles:
- * CVE-2017-5715 ("Spectre"):
-   https://access.redhat.com/articles/3436091
- * CVE-2018-3639 ("Speculative Store Bypass"):
-   https://access.redhat.com/articles/3540901
- * CVE-2018-3620, CVE-2018-3646 ("L1 Terminal Fault Attack"):
-   https://access.redhat.com/articles/3562741
- * CVE-2018-12130, CVE-2018-12126, CVE-2018-12127, and CVE-2019-11091
-   ("Microarchitectural Data Sampling"):
-   https://access.redhat.com/articles/4138151
- * CVE-2019-0117 (Intel SGX Information Leak),
-   CVE-2019-0123 (Intel SGX Privilege Escalation),
-   CVE-2019-11135 (TSX Asynchronous Abort),
-   CVE-2019-11139 (Voltage Setting Modulation):
-   https://access.redhat.com/solutions/2019-microcode-nov
- * CVE-2020-0543 (Special Register Buffer Data Sampling),
-   CVE-2020-0548 (Vector Register Data Sampling),
-   CVE-2020-0549 (L1D Cache Eviction Sampling):
-   https://access.redhat.com/solutions/5142751
- * CVE-2020-8695 (Information disclosure issue in Intel SGX via RAPL interface),
-   CVE-2020-8696 (Vector Register Leakage-Active),
-   CVE-2020-8698 (Fast Forward Store Predictor):
-   https://access.redhat.com/articles/5569051
- * CVE-2020-24489 (VT-d-related Privilege Escalation),
-   CVE-2020-24511 (Improper Isolation of Shared Resources),
-   CVE-2020-24512 (Observable Timing Discrepancy),
-   CVE-2020-24513 (Information Disclosure on Some Intel Atom Processors):
-   https://access.redhat.com/articles/6101171
- * CVE-2021-0127 (Intel Processor Breakpoint Control Flow):
-   https://access.redhat.com/articles/6716541
- * CVE-2022-0005 (Informational disclosure via JTAG),
-   CVE-2022-21123 (Shared Buffers Data Read),
-   CVE-2022-21125 (Shared Buffers Data Sampling),
-   CVE-2022-21127 (Update to Special Register Buffer Data Sampling),
-   CVE-2022-21151 (Optimization Removal-Induced Informational Disclosure),
-   CVE-2022-21166 (Device Register Partial Write):
-   https://access.redhat.com/articles/6963124
-
-The information regarding disabling microcode update is provided below.
-
-To disable usage of the newer microcode revision for a specific kernel
-version, please create a file "disallow-intel-06-8e-9e-0x-0xca" inside
-/lib/firmware/<kernel_version> directory, run
-"/usr/libexec/microcode_ctl/update_ucode" to update firmware directory
-used for late microcode updates, and run "dracut -f --kver <kernel_version>"
-so initramfs for this kernel version is regenerated, for example:
-
-    touch /lib/firmware/3.10.0-862.9.1/disallow-intel-06-8e-9e-0x-0xca
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --kver 3.10.0-862.9.1
-
-To disable usage of the newer microcode revision for all kernels, please create
-file "/etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-8e-9e-0x-0xca",
-run "/usr/libexec/microcode_ctl/update_ucode" to update firmware directories
-used for late microcode updates, and run "dracut -f --regenerate-all"
-so initramfs images get regenerated, for example:
-
-    mkdir -p /etc/microcode_ctl/ucode_with_caveats
-    touch /etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-8e-9e-0xca
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --regenerate-all
-
-Please refer to /usr/share/doc/microcode_ctl/README.caveats for additional
-information.
--- a/SOURCES/06-8e-9e-0x-dell_config
+++ b/SOURCES/06-8e-9e-0x-dell_config
@ -1,7 +0,0 @@
-path intel-ucode/*
-vendor GenuineIntel
-## It is deemed that blacklisting all 06-[89]e-0x models on all hardware
-## in cases where no model filter is used is too broad, hence
-## no-model-mode=success.
-dmi mode=fail-equal no-model-mode=success key=bios_vendor val="Dell Inc."
-dependency required intel
--- a/SOURCES/06-8e-9e-0x-dell_disclaimer
+++ b/SOURCES/06-8e-9e-0x-dell_disclaimer
@ -1,7 +0,0 @@
-Some Dell systems that use some models of Intel CPUs are susceptible to hangs
-and system instability during or after microcode update to newer revisions.
-In order to address this, microcode update to these newer revision
-has been disabled by default on these systems, and the previously published
-microcode revisions are used by default for the OS-driven microcode update.
-Please refer to /usr/share/doc/microcode_ctl/caveats/06-8e-9e-0x-dell_readme
-and /usr/share/doc/microcode_ctl/README.caveats for details.
--- a/SOURCES/06-8e-9e-0x-dell_readme
+++ b/SOURCES/06-8e-9e-0x-dell_readme
@ -1,225 +0,0 @@
-Some Dell systems that use some models of Intel CPUs are susceptible to hangs
-and system instability during or after microcode update to revision 0xc6/0xca
-(included as part of microcode-20191113/microcode-20191115 update that addressed
-CVE-2019-0117, CVE-2019-0123, CVE-2019-11135, and CVE-2019-11139)
-and/or revision 0xd6 (included as part of microcode-20200609 update
-that addressed CVE-2020-0543, CVE-2020-0548, and CVE-2020-0549)
-[1][2][3][4][5][6].  In order to address this, microcode update to the newer
-revision has been disabled by default on these systems, and the previously
-published microcode revisions 0xae/0xb4/0xb8 are used by default
-for the OS-driven microcode update.
-
-[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/23
-[2] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/24
-[3] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/33
-[4] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/34
-[5] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/35
-[6] https://bugzilla.redhat.com/show_bug.cgi?id=1846097
-
-This caveat contains latest microcode revisions publicly released by Intel;
-for the revision 0xca of the microcode files, please refer to caveat
-06-8e-9e-0x-0xca.
-
-For the reference, microarchitectures of the affected CPU models:
- * Amber Lake-Y
- * Kaby Lake-G/H/S/U/X/Y/Xeon E3
- * Coffee Lake-H/S/U/Xeon E
- * Comet Lake-U 4+2
- * Whiskey Lake-U
-
-Family names of the affected CPU models:
- * 7th Generation Intel® Core™ Processor Family
- * 8th Generation Intel® Core™ Processor Family
- * 9th Generation Intel® Core™ Processor Family
- * 10th Generation Intel® Core™ Processor Family (selected models)
- * Intel® Celeron® Processor G Series
- * Intel® Celeron® Processor 5000 Series
- * Intel® Core™ X-series Processors (i7-7740X, i5-7640X only)
- * Intel® Pentium® Gold Processor Series
- * Intel® Pentium® Processor Series (selected models)
- * Intel® Xeon® Processor E Family
- * Intel® Xeon® Processor E3 v6 Family
-
-SHA1 checksums of the microcode files containing microcode revisions
-in question:
- * 06-8e-09, revision 0xb4: e253c95c29c3eef6576db851dfa069d82a91256f
- * 06-8e-0a, revision 0xb4: 45bcba494be07df9eeccff9627578095a97fba4d
- * 06-8e-0b, revision 0xb8: 3e54bf91d642ad81ff07fe274d0cfb5d10d09c43
- * 06-8e-0c, revision 0xb8: bf635c87177d6dc4e067ec11e1caeb19d3c325f0
- * 06-9e-09, revision 0xb4: 42f68eec4ddb79dd6be0c95c4ce60e514e4504b1
- * 06-9e-0a, revision 0xb4: 37c7cb394dd36610b57943578343723da67d50f0
- * 06-9e-0b, revision 0xb4: b5399109d0a5ce8f5fb623ff942da0322b438b95
- * 06-9e-0c, revision 0xae: 131bce89e4d210de8322ffbc6bd787f1af66a7df
- * 06-9e-0d, revision 0xb8: 22511b007d1df55558d115abb13a1c23ea398317
-
- * 06-8e-09, revision 0xca: 9afa1bae40995207afef13247f114be042d88083
- * 06-8e-0a, revision 0xca: 1d90291cc25e17dc6c36c764cf8c06b41fed4c16
- * 06-8e-0b, revision 0xca: 3fb1246a6594eff5e2c2076c63c600d734f10777
- * 06-8e-0c, revision 0xca: e871540671f59b4fa5d0d454798f09a4d412aace
- * 06-9e-09, revision 0xca: b5eed11108ab7ac1e675fe75d0e7454a400ddd35
- * 06-9e-0a, revision 0xca: e472304aaa2f3815a32822cb111ab3f43bf3dfe4
- * 06-9e-0b, revision 0xca: 78f47c5162da680878ed057dc7c853f9737c524b
- * 06-9e-0c, revision 0xca: f23848a009928796a153cb9e8f44522136969408
- * 06-9e-0d, revision 0xca: c7a3d469469ee828ba9faf91b67af881fceec3b7
-
- * 06-8e-09, revision 0xd6: 2272c621768437d20e602207752201e0966e5a8c
- * 06-8e-0a, revision 0xd6: 0b145afb88e028e612f04c2a86385e7d7c3fefc4
- * 06-8e-0b, revision 0xd6: c3831b05da83be54f3acc451a1bce90f75e2e9e5
- * 06-8e-0c, revision 0xd6: 4b8938a93e23f4b5a2d9de40b87f6afcfdc27c05
- * 06-9e-09, revision 0xd6: 4bacba8c598508e7dd4e87e179586abe7a1a987f
- * 06-9e-0a, revision 0xd6: 4c236afeef9f80ff3a286698fe7cef72926722f0
- * 06-9e-0b, revision 0xd6: 2f9ab9b2ba29559ce177632281d7290a24fed2ef
- * 06-9e-0c, revision 0xd6: 4b9059e519bcab6085b6c103f5d99e509fe0b2bb
- * 06-9e-0d, revision 0xd6: 3a3b7edfd8126bb34b761b46a32102a622047899
-
- * 06-8e-09, revision 0xde: 84d7514101eb8904834a3dacdee684b3c574245f
- * 06-8e-0a, revision 0xe0: 080b9e3ebbcf6bb1eca0fb5f640e6bfbfe3a1e6e
- * 06-8e-0b, revision 0xde: 80fed976231bbff4c7103e373498e07eef0bff31
- * 06-8e-0c, revision 0xde: 84f160587fea4acb81451c8ff53dc51afba06343
- * 06-9e-09, revision 0xde: 422026ffb2cca446693c586be98d0d9e7dfeb116
- * 06-9e-0a, revision 0xde: b6c44b9fe26e1d6bafa27f37ffe010284294bf1c
- * 06-9e-0b, revision 0xde: 6452937a0d359066b95f9e679a41a15490770312
- * 06-9e-0c, revision 0xde: a95021a4e497e0bf3691ecf3d020728f25a3f542
- * 06-9e-0d, revision 0xde: 03b20fdc2fa3f9586f93a7e40d3b61be5b7b788c
-
- * 06-8e-09, revision 0xea: caa7192fb2223e3e52389aca84930aee326b384d
- * 06-8e-0a, revision 0xea: ab4d5d3b51445d055763796a0362f8ab249cf4c8
- * 06-8e-0b, revision 0xea: 5406c513f90286c02476ee0d4a6c8010a263c3ac
- * 06-8e-0c, revision 0xea: 8c045b9056443862c95573efd4646e331a2310d3
- * 06-9e-09, revision 0xea: a9f8a14ca3808f6380d6dff92e1fd693cc909668
- * 06-9e-0a, revision 0xea: b7726bdba2fe74d8f419c68f417d796d569b9ec4
- * 06-9e-0b, revision 0xea: 963dca66aedf2bfb0613d0d9515c6bcfb0589e0c
- * 06-9e-0c, revision 0xea: 1329a4d8166fe7d70833d21428936254e11efbb4
- * 06-9e-0d, revision 0xea: 9c73f2ac6c4edbf8b0aefdd5d6780c7219be702a
-
- * 06-8e-09, revision 0xec: 78eb624be5e8084e438318bdad99f9ddc082def7
- * 06-8e-0a, revision 0xec: 6c41a6ad412f48f81a9d5edf59dcdecc358398bf
- * 06-8e-0b, revision 0xec: 89dd0de598c83eb9714f6839499f322dfce2b693
- * 06-8e-0c, revision 0xec: 225ea349b9cb3b1b94e237deb797e0c60d14a84c
- * 06-9e-09, revision 0xec: fc5c0206fe392a0ddad4dc9363fde2d3e3d1e681
- * 06-9e-0a, revision 0xec: 128002076e4ac3c75697fb4efdf1f8ddcc971fbe
- * 06-9e-0b, revision 0xec: ac8c3865a143b2e03869f15a5b86e560f60ad632
- * 06-9e-0c, revision 0xec: 6e3d695290def517857c8e743dc65161479f0c04
- * 06-9e-0d, revision 0xec: 58b1ec5fee7dd1a761ed901b374ccb978737a979
-
- * 06-8e-09, revision 0xf0: 219e2b9168a09451b17813b97995cc59cc78b414
- * 06-8e-0a, revision 0xf0: 3c4241d0b9d1a1a1e82d03b365fdd3b843006a7c
- * 06-8e-0b, revision 0xf0: 79b61f034cba86e61641114bbab49ec0166c0f35
- * 06-8e-0c, revision 0xf0: 11d166de440dbe9c440e90cb610ef4b9d48242b1
- * 06-9e-09, revision 0xf0: 49e142da74e7298b2db738ff7dd1a9b0fa4e0c3e
- * 06-9e-0a, revision 0xf0: 8de1d4a80cd683bf09854c33905c69d3d7ac7730
- * 06-9e-0b, revision 0xf0: ff092c6ac8333f0abcd94f7d2e2088f31d960e62
- * 06-9e-0c, revision 0xf0: 3702f21e87b75bea6f4b1ee0407b941ef31d4ad1
- * 06-9e-0d, revision 0xf0: 226feaaa431eb76e734ab68efc2ea7b07aa3c7d9
-
- * 06-8e-0c, revision 0xf4: 6a5e140bf8c046acb6958bad1db1fee66c8601ad
- * 06-9e-0d, revision 0xf4: 3433d4394b05a9c8aefb9c46674bad7b7e934f11
-
- * 06-8e-09, revision 0xf2: 2e67e55d7b805edcfaac57898088323df7315b25
- * 06-8e-0a, revision 0xf2: f9e1dbeb969ded845b726c62336f243099714bcf
- * 06-8e-0b, revision 0xf2: 3d45fbcbefd92dbbedf0eed04aeb29c7430c7c0e
- * 06-8e-0c, revision 0xf6: bd37be38dbd046d4d66f126cfaa79e43bfe88c0d
- * 06-9e-09, revision 0xf2: 716257544acf2c871d74e4627e7de86ee1024185
- * 06-9e-0a, revision 0xf2: 933c5d6710195336381e15a160d36aaa52d358fd
- * 06-9e-0b, revision 0xf2: 92eaafdb72f6d4231046aadb92caa0038e94fca8
- * 06-9e-0c, revision 0xf2: ad8922b4f91b5214dd88c56c0a12d15edb9cea5b
- * 06-9e-0d, revision 0xf8: 8fdea727c6ce46b26e0cffa6ee4ff1ba0c45cf14
-
- * 06-8e-09, revision 0xf4: e059ab6b168f3831d624acc153e18ab1c8488570
- * 06-8e-0a, revision 0xf4: d1ade1ccfe5c6105d0786dfe887696808954f8b4
- * 06-8e-0b, revision 0xf4: 0bc93736f3f5b8b6569bebac4e9627ab923621e0
- * 06-8e-0c, revision 0xf8: be93b4826a3f40219a9fc4fc5afa87b320279f6e
- * 06-9e-09, revision 0xf4: 317564f3ac7b99b5900b91e2be3e23b9b66bc2c0
- * 06-9e-0a, revision 0xf4: 9659f73e2c6081eb5c146c5ed763fa5db21df901
- * 06-9e-0b, revision 0xf4: e60b567ad54da129d05a77e305cae4488579979d
- * 06-9e-0c, revision 0xf4: 74d52a11a905dd7b254fa72b014c3bab8022ba3d
- * 06-9e-0d, revision 0xfa: 484738563e793d5b90b94869dc06edf0407182f1
-
- * 06-8e-0c, revision 0xfa: d2c2ed4634b2f345382991237bedb90430fcc0b3
- * 06-9e-09, revision 0xf8: 69b8a5435bfb976ef5ec5930dae870e26835442e
- * 06-9e-0a, revision 0xf6: c1f0f556cd203aa6e1d0d1ffb0a65b32f32692be
- * 06-9e-0c, revision 0xf6: a8dfddd009f750b6528f93556b67d4eeca1e5dfa
- * 06-9e-0d, revision 0xfc: a0ad865fd2d3b9d955a889c96fabc67da0235dda
-
- * 06-8e-09, revision 0xf6: c2786ef2eb4feb8ac3e3efae83c361de3ad8df0d
- * 06-8e-0a, revision 0xf6: 9bb2839d451ecee40c1eb08f40e4baec9a159e90
- * 06-8e-0b, revision 0xf6: 7b60fc7d44654976df32971a45399b3b910f3390
- * 06-8e-0c, revision 0xfc: 34efc9a54dc32082b898116840c0a1a1cef59e69
- * 06-9e-0a, revision 0xf8: 880163a2da13ed1eae1654535d751a788de6fa3f
- * 06-9e-0b, revision 0xf6: ca90c9139d0c1554f6d17ae1bdcf94d0faa6ece7
- * 06-9e-0c, revision 0xf8: 97dcc36772894619ab28be8c35c4ff9f15d684ae
- * 06-9e-0d, revision 0x100: 1a00b6a4373b95811c6396f2a0d8d497f4006fb7
-
- * 06-9e-0a, revision 0xfa: 7ee9924ded3bb07c0c7119db6b0da559e061f9a7
- * 06-9e-0d, revision 0x102: bee5c8aa8a6705ebb27469d44b0215721261f40f
-
- * 06-8e-0c, revision 0x100: a7d1e468848d0f97784123b1f2c7ab368c7e4f36
- * 06-9e-0d, revision 0x104: 93cf5727dea44c038dfadd66a953dc7ce44acdcf
-
-Please contact your system vendor for a BIOS/firmware update that contains
-the latest microcode version.  For the information regarding microcode versions
-required for mitigating specific side-channel cache attacks, please refer
-to the following knowledge base articles:
- * CVE-2017-5715 ("Spectre"):
-   https://access.redhat.com/articles/3436091
- * CVE-2018-3639 ("Speculative Store Bypass"):
-   https://access.redhat.com/articles/3540901
- * CVE-2018-3620, CVE-2018-3646 ("L1 Terminal Fault Attack"):
-   https://access.redhat.com/articles/3562741
- * CVE-2018-12130, CVE-2018-12126, CVE-2018-12127, and CVE-2019-11091
-   ("Microarchitectural Data Sampling"):
-   https://access.redhat.com/articles/4138151
- * CVE-2019-0117 (Intel SGX Information Leak),
-   CVE-2019-0123 (Intel SGX Privilege Escalation),
-   CVE-2019-11135 (TSX Asynchronous Abort),
-   CVE-2019-11139 (Voltage Setting Modulation):
-   https://access.redhat.com/solutions/2019-microcode-nov
- * CVE-2020-0543 (Special Register Buffer Data Sampling),
-   CVE-2020-0548 (Vector Register Data Sampling),
-   CVE-2020-0549 (L1D Cache Eviction Sampling):
-   https://access.redhat.com/solutions/5142751
- * CVE-2020-8695 (Information disclosure issue in Intel SGX via RAPL interface),
-   CVE-2020-8696 (Vector Register Leakage-Active),
-   CVE-2020-8698 (Fast Forward Store Predictor):
-   https://access.redhat.com/articles/5569051
- * CVE-2020-24489 (VT-d-related Privilege Escalation),
-   CVE-2020-24511 (Improper Isolation of Shared Resources),
-   CVE-2020-24512 (Observable Timing Discrepancy),
-   CVE-2020-24513 (Information Disclosure on Some Intel Atom Processors):
-   https://access.redhat.com/articles/6101171
- * CVE-2021-0127 (Intel Processor Breakpoint Control Flow):
-   https://access.redhat.com/articles/6716541
- * CVE-2022-0005 (Informational disclosure via JTAG),
-   CVE-2022-21123 (Shared Buffers Data Read),
-   CVE-2022-21125 (Shared Buffers Data Sampling),
-   CVE-2022-21127 (Update to Special Register Buffer Data Sampling),
-   CVE-2022-21151 (Optimization Removal-Induced Informational Disclosure),
-   CVE-2022-21166 (Device Register Partial Write):
-   https://access.redhat.com/articles/6963124
-
-The information regarding disabling microcode update is provided below.
-
-To disable usage of the newer microcode revision for a specific kernel
-version, please create a file "disallow-intel-06-8e-9e-0x-dell" inside
-/lib/firmware/<kernel_version> directory, run
-"/usr/libexec/microcode_ctl/update_ucode" to update firmware directory
-used for late microcode updates, and run "dracut -f --kver <kernel_version>"
-so initramfs for this kernel version is regenerated, for example:
-
-    touch /lib/firmware/3.10.0-862.9.1/disallow-intel-06-8e-9e-0x-dell
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --kver 3.10.0-862.9.1
-
-To disable usage of the newer microcode revision for all kernels, please create
-file "/etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-8e-9e-0x-dell",
-run "/usr/libexec/microcode_ctl/update_ucode" to update firmware directories
-used for late microcode updates, and run "dracut -f --regenerate-all"
-so initramfs images get regenerated, for example:
-
-    mkdir -p /etc/microcode_ctl/ucode_with_caveats
-    touch /etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-8e-9e-dell
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --regenerate-all
-
-Please refer to /usr/share/doc/microcode_ctl/README.caveats for additional
-information.
--- a/SOURCES/06-8f-08_config
+++ b/SOURCES/06-8f-08_config
@ -1,9 +0,0 @@
-model GenuineIntel 06-8f-08
-path intel-ucode/06-87-08
-## A possible way to disable 0x2b000603 and newer microcode on SPR-EE by default
-## Based on https://cdrdv2.intel.com/v1/dl/getcontent/772415
-## and https://cdrdv2.intel.com/v1/dl/getcontent/784461
-## "fail-any" and not "success-eny" as imposing the problematic microcode
-## versions only affect latencies and not system stability.
-#pci_config_val mode=fail-any bus=0x1f device=0x1e function=3 vid=0x8086 offset=0x94 size=4 mask=0xc0 val=0x00,0x80
-dependency required intel
--- a/SOURCES/06-8f-08_disclaimer
+++ b/SOURCES/06-8f-08_disclaimer
@ -1,5 +0,0 @@
-Microcode revisions 0x2b000603 and higher for Intel Sapphire Rapids Edge
-Enhanced (family 6, model 143, stepping 8; CPUID 0x806f8) could cause latency
-spikes, so the previous revision 0x2b000603 was used instead.
-Please refer to /usr/share/doc/microcode_ctl/caveats/06-8f-08_readme
-and /usr/share/doc/microcode_ctl/README.caveats for details.
--- a/SOURCES/06-8f-08_readme
+++ b/SOURCES/06-8f-08_readme
@ -1,43 +0,0 @@
-Intel Sapphire Rapids Edge Enhanced CPU models (SPR-EE, family 6, model 143,
-stepping 8) had reports of system exhibiting latency spikes when revsions
-0x2b000603 and newer of the microcode are applied.  In order to address this,
-previous 0x2b0005c0 revision of the microcode is provided, and the usage
-of the latest microcode can be disabled (see below), so the older version
-is used instead.
-
-For the reference, SHA1 checksums of 06-8f-08 microcode files containing
-microcode revisions in question are listed below:
- * 06-8f-08, revision 0x2b0005c0: adf8b6aa2718ff16f3d19d34ec389270073d2b5e
- * 06-8f-08, revision 0x2b000603: 729014bd05dfb6593152ea7ee12330791bc22bec
- * 06-8f-08, revision 0x2b000620: e39812f7aff520c79f3f6fa013bd501781d92f8e
- * 06-8f-08, revision 0x2b000639: 39d91f7a962245ba79fea0611732c86efbd71bc5
-
-Please contact your system vendor for a BIOS/firmware update that contains
-the latest microcode version.
-
-The information regarding disabling microcode update is provided below.
-
-To disable usage of the newer microcode revision for a specific kernel
-version, please create a file "disallow-intel-06-8f-08" inside
-/lib/firmware/<kernel_version> directory, run
-"/usr/libexec/microcode_ctl/update_ucode" to update firmware directory
-used for late microcode updates, and run "dracut -f --kver <kernel_version>"
-so initramfs for this kernel version is regenerated, for example:
-
-    touch /lib/firmware/3.10.0-862.9.1/disallow-intel-06-8f-08
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --kver 3.10.0-862.9.1
-
-To disable usage of the newer microcode revision for all kernels, please create
-file "/etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-8f-08", run
-"/usr/libexec/microcode_ctl/update_ucode" to update firmware directories
-used for late microcode updates, and run "dracut -f --regenerate-all"
-so initramfs images get regenerated, for example:
-
-    mkdir -p /etc/microcode_ctl/ucode_with_caveats
-    touch /etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-8f-0f
-    /usr/libexec/microcode_ctl/update_ucode
-    dracut -f --regenerate-all
-
-Please refer to /usr/share/doc/microcode_ctl/README.caveats for additional
-information.
--- a/SOURCES/check_caveats
+++ b/SOURCES/check_caveats
--- a/SOURCES/codenames.list
+++ b/SOURCES/codenames.list
@ -1,7 +1,6 @@
 # format=extended
 # SPDX-License-Identifier: CC0-1.0
 # Segment; Unused; Codename; Stepping; PF; CPUID; Abbreviation; Variant(s); Families; Models
-# The lines that start with "#!" are based on speculative information

 Server;;Pentium Pro;B0;00;611;;;Pentium Pro;
 Server;;Pentium Pro;C0;00;612;;;Pentium Pro;
@ -288,11 +287,9 @@ Mobile;;Comet Lake;V0;94;806ec;CML;U 4+2;Core Gen10 Mobile;
 Mobile;;Whiskey Lake;W0;d0;806eb;WHL;U;Core Gen8 Mobile;
 Mobile;;Whiskey Lake;V0;94;806ec;WHL;U;Core Gen8 Mobile;
 Mobile;;Whiskey Lake;V0;94;806ed;WHL;U;Core Gen8 Mobile;
-#!Server;;Sapphire Rapids;B0;10;806f4;SPR;HBM;Xeon Max (ES);
 Server;;Sapphire Rapids;E0,S1;87;806f4;SPR;SP;Xeon Scalable Gen4;
 Server;;Sapphire Rapids;B1;10;806f5;SPR;HBM;Xeon Max;
 Server;;Sapphire Rapids;E2;87;806f5;SPR;SP;Xeon Scalable Gen4;
-#!Server;;Sapphire Rapids;B2;10;806f6;SPR;HBM;Xeon Max (ES);
 Server;;Sapphire Rapids;E3;87;806f6;SPR;SP;Xeon Scalable Gen4;
 Server;;Sapphire Rapids;E4,S2;87;806f7;SPR;SP;Xeon Scalable Gen4;
 Server;;Sapphire Rapids;B3;10;806f8;SPR;HBM;Xeon Max;
@ -328,26 +325,13 @@ Mobile;;Comet Lake;A0;80;a0660;CML;U 6+2;Core Gen10 Mobile;
 Mobile;;Comet Lake;K1;80;a0661;CML;U 6+2 v2;Core Gen10 Mobile;
 Desktop;;Rocket Lake;B0;02;a0671;RKL;S;Core Gen11;
 Mobile;;Meteor Lake;C0;e6;a06a4;MTL;H,U;Core™ Ultra Processor;
-Server;;Granite Ridge;H0;20;a06d1;GNR;AP,SP;Xeon Scalable Gen6;
-Server;;Granite Ridge;B0;95;a06d1;GNR;AP,SP;Xeon Scalable Gen6;
 Server;;Sierra Forest;C0;01;a06f3;SRF;SP;Xeon 6700-Series Processors with E-Cores;
-Mobile;;Arrow Lake;A1;80;b0650;ARL;U;Core™ Ultra Processor (Series2)
 Desktop;;Raptor Lake;B0;32;b0671;RPL;S;Core Gen13;
-#!Desktop;;Raptor Lake;??;32;b0674;RPL;S;Core Gen13;
 Mobile;;Raptor Lake;J0;e0;b06a2;RPL;P 6+8,H 6+8;Core Gen13;
 Mobile;;Raptor Lake;Q0;e0;b06a3;RPL;U 2+8;Core Gen13;
-#!Mobile;;Raptor Lake;M0;e0;b06a8;RPL;P 6+8,H 6+8;Core Gen13;
-Mobile;;Lunar Lake;B0;80;b06d1;LNL;;Core™ Ultra 200 V Series Processor;
 SOC;;Alder Lake;A0;01;b06e0;ADL;N;;Core i3-N305/N300, N50/N97/N100/N200, Atom x7211E/x7213E/x7425E
-Desktop;;Alder Lake;C0;07;b06f2;ADL;;Core Gen12;
-Desktop;;Alder Lake;C0;07;b06f5;ADL;;Core Gen12;
-#!Desktop;;Bartlett Lake;??;07;b06f6;BTL;S;Core™ processor (Series 2);
-#!Desktop;;Bartlett Lake;??;07;b06f7;BTL;S;Core™ processor (Series 2);
-Mobile;;Arrow Lake;A1;82;c0652;ARL;H;Core™ Ultra Processor (Series2);
-Desktop;;Arrow Lake;B0;82;c0662;ARL;S;Core™ Ultra Processor (Series2);
-Mobile;;Arrow Lake;B0;82;c0662;ARL;HX 8P;Core™ Ultra Processor (Series2);
-#!Desktop;;Arrow Lake;??;82;c0664;ARL;S;Core™ Ultra Processor (Series2);
-#!Desktop;;Arrow Lake;??;82;c06a2;ARL;S;Core™ Ultra Processor (Series2);
+Desktop;;Alder Lake;C0;03;b06f2;ADL;;Core Gen12;
+Desktop;;Alder Lake;C0;03;b06f5;ADL;;Core Gen12;
 Server;;Emerald Rapids;A0;87;c06f1;EMR;SP;Xeon Scalable Gen5;
 Server;;Emerald Rapids;A1;87;c06f2;EMR;SP;Xeon Scalable Gen5;

--- a/SOURCES/dracut_99microcode_ctl-fw_dir_override_module_init.sh
+++ b/SOURCES/dracut_99microcode_ctl-fw_dir_override_module_init.sh
--- a/SOURCES/gen_provides.sh
+++ b/SOURCES/gen_provides.sh
@ -43,25 +43,43 @@ for f in $(grep -E '/intel-ucode.*/[0-9a-f][0-9a-f]-[0-9a-f][0-9a-f]-[0-9a-f][0-

 			# ext_sig, 12 bytes in size
 			IFS=' ' read cpuid pf_mask <<- EOF
-			$(hexdump -s "$skip" -n 8 \
-				-e '"" 1/4 "%08x " 1/4 "%u" "\n"' "$f")
+			$(dd if="$f" ibs=1 skip="$skip" count=8 status=none \
+				| xxd -e -g4 | xxd -r | hexdump -n 8 \
+				-e '"" 4/1 "%02x" " 0x" 4/1 "%02x" "\n"')
 			EOF
+			# Converting values from the constructed %#08x format
+			pf_mask="$((pf_mask))"

 			skip="$((skip + 12))"
 			ext_sig_pos="$((ext_sig_pos + 1))"
 		else
 			# Microcode header, 48 bytes, last 3 fields reserved
+			# cksum, ldrver are ignored
 			IFS=' ' read hdrver rev \
-			       date_y date_d date_m \
+			       date_m date_d date_y \
 			       cpuid cksum ldrver \
 			       pf_mask datasz totalsz <<- EOF
-			$(hexdump -s "$skip" -n 36 \
-				-e '"" 1/4 "%u " 1/4 "%#x " \
-			               1/2 "%04x " 1/1 "%02x " 1/1 "%02x " \
-				       1/4 "%08x " 1/4 "%x " 1/4 "%#x " \
-				       1/4 "%u " 1/4 "%u " 1/4 "%u" "\n"' "$f")
+			$(dd if="$f" ibs=1 skip="$skip" count=36 status=none \
+				| xxd -e -g4 | xxd -r | hexdump -n 36 \
+				-e '"0x" 4/1 "%02x" " 0x" 4/1 "%02x" " " \
+			               1/1 "%02x " 1/1 "%02x " 2/1 "%02x" " " \
+				       4/1 "%02x" " 0x" 4/1 "%02x" " 0x" 4/1 "%02x" \
+				       " 0x" 4/1 "%x" \
+				       " 0x" 4/1 "%02x" " 0x" 4/1 "%02x" "\n"')
 			EOF

+			# Converting values from the constructed %#08x format
+			rev="$(printf '%#x' "$((rev))")"
+			pf_mask="$((pf_mask))"
+			datasz="$((datasz))"
+			totalsz="$((totalsz))"
+
+			# Skipping files with unexpected hdrver value
+			[ 1 = "$((hdrver))" ] || {
+				echo "$f+$skip@$file_sz: incorrect hdrver $((hdrver))" >&2
+				break
+			}
+
 			[ 0 != "$datasz" ] || datasz=2000
 			[ 0 != "$totalsz" ] || totalsz=2048

@ -80,9 +98,12 @@ for f in $(grep -E '/intel-ucode.*/[0-9a-f][0-9a-f]-[0-9a-f][0-9a-f]-[0-9a-f][0-
 				# ext_sig table header, 20 bytes in size,
 				# last 3 fields are reserved.
 				IFS=' ' read ext_sig_cnt  <<- EOF
-				$(hexdump -s "$skip" -n 4 \
-					-e '"" 1/4 "%u" "\n"' "$f")
+				$(dd if="$f" ibs=1 skip="$skip" count=4 status=none \
+					| xxd -e -g4 | hexdump -n 4 \
+					-e '"0x" 4/1 "%02x" "\n"')
 				EOF
+				# Converting values from the constructed format
+				ext_sig_cnt="$((ext_sig_cnt))"

 				skip="$((skip + 20))"
 			else
--- a/SOURCES/gen_updates2.py
+++ b/SOURCES/gen_updates2.py
@ -144,7 +144,7 @@ def read_revs_dir(path, args, src=None, ret=None):
                offs = 0
                while offs < sz:
                    f.seek(offs, os.SEEK_SET)
-                    hdr = struct.unpack("IiIIIIIIIIII", f.read(48))
+                    hdr = struct.unpack("<IiIIIIIIIIII", f.read(48))
                    ret.append({"path": rp, "src": src or path,
                                "cpuid": hdr[3], "pf": hdr[6], "rev": hdr[1],
                                "date": hdr[2], "offs": offs, "cksum": hdr[4],
@ -152,7 +152,7 @@ def read_revs_dir(path, args, src=None, ret=None):

                    if hdr[8] and hdr[8] - hdr[7] > 48:
                        f.seek(hdr[7], os.SEEK_CUR)
-                        ext_tbl = struct.unpack("IIIII", f.read(20))
+                        ext_tbl = struct.unpack("<IIIII", f.read(20))
                        log_status("Found %u extended signatures for %s:%#x" %
                                   (ext_tbl[0], rp, offs), level=1)

@ -160,7 +160,7 @@ def read_revs_dir(path, args, src=None, ret=None):
                        ext_sig_cnt = 0
                        while cur_offs < offs + hdr[8] \
                                and ext_sig_cnt <= ext_tbl[0]:
-                            ext_sig = struct.unpack("III", f.read(12))
+                            ext_sig = struct.unpack("<III", f.read(12))
                            ignore = args.ignore_ext_dups and \
                                (ext_sig[0] == hdr[3])
                            if not ignore:
--- a/SOURCES/intel_config
+++ b/SOURCES/intel_config
--- a/SOURCES/intel_disclaimer
+++ b/SOURCES/intel_disclaimer
--- a/SOURCES/intel_readme
+++ b/SOURCES/intel_readme
--- a/SOURCES/microcode.service
+++ b/SOURCES/microcode.service
--- a/SPECS/microcode_ctl.spec
+++ b/SPECS/microcode_ctl.spec
--- a/SOURCES/reload_microcode
+++ b/SOURCES/reload_microcode
--- a/1
+++ b/1
@ -0,0 +1 @@
+SHA512 (microcode-20250211.tar.gz) = 493216fb14097c7c9bda3117fbcae8ad4300fb8646918338119ef303000aad6f73ca04acc59c9a890b0b2b58e097798f673954f15e3142948267bbeeacc842cf
--- a/SOURCES/update_ucode
+++ b/SOURCES/update_ucode
				`@ -0,0 +1 @@`
				`SHA512 (microcode-20250211.tar.gz) = 493216fb14097c7c9bda3117fbcae8ad4300fb8646918338119ef303000aad6f73ca04acc59c9a890b0b2b58e097798f673954f15e3142948267bbeeacc842cf`