From b51e492aaf48ca4cba239312e61265e317e805bb Mon Sep 17 00:00:00 2001 From: Denys Vlasenko Date: Mon, 24 Nov 2025 12:46:30 +0100 Subject: [PATCH] Update Intel CPU microcode to microcode-20251111 release - Fix typo in /usr/share/microcode_ctl/ucode_with_caveats/intel-06-8f-08/config (RHEL-123517) - Update Intel CPU microcode to microcode-20251111 release (RHEL-128195) - Addition of 06-ae-01/0x97 microcode at revision 0x1000273; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-07) from revision 0x2b000643 up to 0x2b000650; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-07) from revision 0x2b000643 up to 0x2b000650; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-07) from revision 0x2b000643 up to 0x2b000650; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision 0x2b000643 up to 0x2b000650; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-07) from revision 0x2b000643 up to 0x2b000650; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c000401 up to 0x2c000410; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-08) from revision 0x2b000643 up to 0x2b000650; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-08) from revision 0x2c000401 up to 0x2c000410; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-08) from revision 0x2b000643 up to 0x2b000650; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c000401 up to 0x2c000410; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-08) from revision 0x2b000643 up to 0x2b000650; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-08) from revision 0x2b000643 up to 0x2b000650; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision 0x2c000401 up to 0x2c000410; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision 0x2b000643 up to 0x2b000650; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision 0x3a up to 0x3d; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from revision 0x3a up to 0x3d; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x3a up to 0x3d; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x3a up to 0x3d; - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-97-02) from revision 0x3a up to 0x3d; - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-97-02) from revision 0x3a up to 0x3d; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x3a up to 0x3d; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x3a up to 0x3d; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x3a up to 0x3d; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x3a up to 0x3d; - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-97-05) from revision 0x3a up to 0x3d; - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-97-05) from revision 0x3a up to 0x3d; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x437 up to 0x43a; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x437 up to 0x43a; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x437 up to 0x43a; - Update of 06-9a-04/0x40 (AZB A0) microcode from revision 0xa up to 0xb; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x437 up to 0x43a; - Update of 06-ad-01/0x20 (GNR-AP/SP H0) microcode from revision 0xa000100 up to 0xa000124; - Update of 06-ad-01/0x95 (GNR-AP/SP B0) microcode from revision 0x10003d0 up to 0x10003f0; - Update of 06-af-03/0x01 (SRF-SP C0) microcode from revision 0x3000362 up to 0x3000382; - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x12f up to 0x132; - Update of 06-b7-04/0x32 microcode (in intel-ucode/06-b7-01) from revision 0x12f up to 0x132; - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision 0x4129 up to 0x6133; - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in intel-ucode/06-ba-02) from revision 0x4129 up to 0x6133; - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-02) from revision 0x4129 up to 0x6133; - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in intel-ucode/06-ba-03) from revision 0x4129 up to 0x6133; - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4129 up to 0x6133; - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-03) from revision 0x4129 up to 0x6133; - Update of 06-bd-01/0x80 (LNL B0) microcode from revision 0x123 up to 0x125; - Update of 06-be-00/0x19 (ADL-N A0) microcode from revision 0x1d up to 0x1e; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x3a up to 0x3d; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) from revision 0x3a up to 0x3d; - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x3a up to 0x3d; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02) from revision 0x3a up to 0x3d; - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-bf-02) from revision 0x3a up to 0x3d; - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-bf-02) from revision 0x3a up to 0x3d; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x3a up to 0x3d; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) from revision 0x3a up to 0x3d; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05) from revision 0x3a up to 0x3d; - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x3a up to 0x3d; - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-bf-05) from revision 0x3a up to 0x3d; - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-bf-05) from revision 0x3a up to 0x3d; - Update of 06-c5-02/0x82 (ARL-H A1) microcode from revision 0x119 up to 0x11a; - Update of 06-c6-02/0x82 (ARL-HX 8P/S B0) microcode (in intel-ucode/06-c5-02) from revision 0x119 up to 0x11a; - Update of 06-c6-04/0x82 microcode (in intel-ucode/06-c5-02) from revision 0x119 up to 0x11a; - Update of 06-ca-02/0x82 microcode (in intel-ucode/06-c5-02) from revision 0x119 up to 0x11a; - Update of 06-c5-02/0x82 (ARL-H A1) microcode (in intel-ucode/06-c6-02) from revision 0x119 up to 0x11a; - Update of 06-c6-02/0x82 (ARL-HX 8P/S B0) microcode from revision 0x119 up to 0x11a; - Update of 06-c6-04/0x82 microcode (in intel-ucode/06-c6-02) from revision 0x119 up to 0x11a; - Update of 06-ca-02/0x82 microcode (in intel-ucode/06-c6-02) from revision 0x119 up to 0x11a; - Update of 06-cf-01/0x87 (EMR-SP A0) microcode (in intel-ucode/06-cf-02) from revision 0x210002b3 up to 0x210002c0; - Update of 06-cf-02/0x87 (EMR-SP A1) microcode from revision 0x210002b3 up to 0x210002c0. Resolves: RHEL-123517, RHEL-128195 Signed-off-by: Denys Vlasenko --- .gitignore | 1 + ...senote.md-use-new-lines-consistently.patch | 8 - ...dd-information-about-removal-of-CLX-.patch | 2 +- 06-8f-08_config | 2 +- microcode_ctl.spec | 140 +++++++++++++++++- sources | 2 +- 6 files changed, 143 insertions(+), 12 deletions(-) diff --git a/.gitignore b/.gitignore index d721c89..7087b8e 100644 --- a/.gitignore +++ b/.gitignore @@ -5,3 +5,4 @@ /microcode-20241112.tar.gz /microcode-20250211.tar.gz /microcode-20250512.tar.gz +/microcode-20251111.tar.gz diff --git a/0016-releasenote.md-use-new-lines-consistently.patch b/0016-releasenote.md-use-new-lines-consistently.patch index 7d20c9a..e5e0dd3 100644 --- a/0016-releasenote.md-use-new-lines-consistently.patch +++ b/0016-releasenote.md-use-new-lines-consistently.patch @@ -19,14 +19,6 @@ diff --git a/releasenote.md b/releasenote.md index 0cdfa20..3c700b5 100644 --- a/releasenote.md +++ b/releasenote.md -@@ -156,6 +156,7 @@ - |:---------------|:---------|:------------|:---------|:---------|:--------- - | CFL-H/S | P0 | 06-9e-0c/22 | 000000f6 | 000000f8 | Core Gen9 - -+ - ## [microcode-20241112](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20241112) - - ### Purpose @@ -164,6 +165,7 @@ - Security updates for [INTEL-SA-01079](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01079.html) - Updated security updates for [INTEL-SA-01097](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01097.html) diff --git a/0017-releasenote.md-add-information-about-removal-of-CLX-.patch b/0017-releasenote.md-add-information-about-removal-of-CLX-.patch index b49f1fa..b425178 100644 --- a/0017-releasenote.md-add-information-about-removal-of-CLX-.patch +++ b/0017-releasenote.md-add-information-about-removal-of-CLX-.patch @@ -31,7 +31,7 @@ index 3c700b5..d42e9ad 100644 +| CLX-SP | B0 | 06-55-06/bf | 04003605 | | Xeon Scalable Gen2 +| EMR-SP | A0 | 06-cf-01/87 | 21000291 | | Xeon Scalable Gen5 + - + # Release Notes ## [microcode-20250211](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20250211) -- diff --git a/06-8f-08_config b/06-8f-08_config index c069767..9e9477d 100644 --- a/06-8f-08_config +++ b/06-8f-08_config @@ -1,5 +1,5 @@ model GenuineIntel 06-8f-08 -path intel-ucode/06-87-08 +path intel-ucode/06-8f-08 ## A possible way to disable 0x2b000603 and newer microcode on SPR-EE by default ## Based on https://cdrdv2.intel.com/v1/dl/getcontent/772415 ## and https://cdrdv2.intel.com/v1/dl/getcontent/784461 diff --git a/microcode_ctl.spec b/microcode_ctl.spec index b372606..97b4681 100644 --- a/microcode_ctl.spec +++ b/microcode_ctl.spec @@ -1,4 +1,4 @@ -%define intel_ucode_version 20250812 +%define intel_ucode_version 20251111 %define caveat_dir %{_datarootdir}/microcode_ctl/ucode_with_caveats %define microcode_ctl_libexec %{_libexecdir}/microcode_ctl @@ -467,6 +467,144 @@ rm -rf %{buildroot} %changelog +* Mon Nov 24 2025 Denys Vlasenko - 4:20251111-1 +- Fix typo in /usr/share/microcode_ctl/ucode_with_caveats/intel-06-8f-08/config + (RHEL-123517) +- Update Intel CPU microcode to microcode-20251111 release (RHEL-128195) + - Addition of 06-ae-01/0x97 microcode at revision 0x1000273; + - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in + intel-ucode/06-8f-07) from revision 0x2b000643 up to 0x2b000650; + - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in + intel-ucode/06-8f-07) from revision 0x2b000643 up to 0x2b000650; + - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in + intel-ucode/06-8f-07) from revision 0x2b000643 up to 0x2b000650; + - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision + 0x2b000643 up to 0x2b000650; + - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in + intel-ucode/06-8f-07) from revision 0x2b000643 up to 0x2b000650; + - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from + revision 0x2c000401 up to 0x2c000410; + - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in + intel-ucode/06-8f-08) from revision 0x2b000643 up to 0x2b000650; + - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in + intel-ucode/06-8f-08) from revision 0x2c000401 up to 0x2c000410; + - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in + intel-ucode/06-8f-08) from revision 0x2b000643 up to 0x2b000650; + - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from + revision 0x2c000401 up to 0x2c000410; + - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in + intel-ucode/06-8f-08) from revision 0x2b000643 up to 0x2b000650; + - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in + intel-ucode/06-8f-08) from revision 0x2b000643 up to 0x2b000650; + - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision + 0x2c000401 up to 0x2c000410; + - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision + 0x2b000643 up to 0x2b000650; + - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision + 0x3a up to 0x3d; + - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-97-02) from revision 0x3a up to 0x3d; + - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) + from revision 0x3a up to 0x3d; + - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) + from revision 0x3a up to 0x3d; + - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-97-02) from + revision 0x3a up to 0x3d; + - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-97-02) from + revision 0x3a up to 0x3d; + - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in + intel-ucode/06-97-05) from revision 0x3a up to 0x3d; + - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x3a + up to 0x3d; + - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) + from revision 0x3a up to 0x3d; + - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) + from revision 0x3a up to 0x3d; + - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-97-05) from + revision 0x3a up to 0x3d; + - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-97-05) from + revision 0x3a up to 0x3d; + - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision + 0x437 up to 0x43a; + - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in + intel-ucode/06-9a-03) from revision 0x437 up to 0x43a; + - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in + intel-ucode/06-9a-04) from revision 0x437 up to 0x43a; + - Update of 06-9a-04/0x40 (AZB A0) microcode from revision 0xa up + to 0xb; + - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x437 + up to 0x43a; + - Update of 06-ad-01/0x20 (GNR-AP/SP H0) microcode from revision + 0xa000100 up to 0xa000124; + - Update of 06-ad-01/0x95 (GNR-AP/SP B0) microcode from revision + 0x10003d0 up to 0x10003f0; + - Update of 06-af-03/0x01 (SRF-SP C0) microcode from revision 0x3000362 + up to 0x3000382; + - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x12f up + to 0x132; + - Update of 06-b7-04/0x32 microcode (in intel-ucode/06-b7-01) from + revision 0x12f up to 0x132; + - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision + 0x4129 up to 0x6133; + - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in + intel-ucode/06-ba-02) from revision 0x4129 up to 0x6133; + - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-02) from + revision 0x4129 up to 0x6133; + - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in + intel-ucode/06-ba-03) from revision 0x4129 up to 0x6133; + - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4129 + up to 0x6133; + - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-03) from + revision 0x4129 up to 0x6133; + - Update of 06-bd-01/0x80 (LNL B0) microcode from revision 0x123 up + to 0x125; + - Update of 06-be-00/0x19 (ADL-N A0) microcode from revision 0x1d up + to 0x1e; + - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in + intel-ucode/06-bf-02) from revision 0x3a up to 0x3d; + - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-bf-02) from revision 0x3a up to 0x3d; + - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x3a up + to 0x3d; + - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02) + from revision 0x3a up to 0x3d; + - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-bf-02) from + revision 0x3a up to 0x3d; + - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-bf-02) from + revision 0x3a up to 0x3d; + - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in + intel-ucode/06-bf-05) from revision 0x3a up to 0x3d; + - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-bf-05) from revision 0x3a up to 0x3d; + - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05) + from revision 0x3a up to 0x3d; + - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x3a up + to 0x3d; + - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-bf-05) from + revision 0x3a up to 0x3d; + - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-bf-05) from + revision 0x3a up to 0x3d; + - Update of 06-c5-02/0x82 (ARL-H A1) microcode from revision 0x119 up + to 0x11a; + - Update of 06-c6-02/0x82 (ARL-HX 8P/S B0) microcode (in + intel-ucode/06-c5-02) from revision 0x119 up to 0x11a; + - Update of 06-c6-04/0x82 microcode (in intel-ucode/06-c5-02) from + revision 0x119 up to 0x11a; + - Update of 06-ca-02/0x82 microcode (in intel-ucode/06-c5-02) from + revision 0x119 up to 0x11a; + - Update of 06-c5-02/0x82 (ARL-H A1) microcode (in intel-ucode/06-c6-02) + from revision 0x119 up to 0x11a; + - Update of 06-c6-02/0x82 (ARL-HX 8P/S B0) microcode from revision + 0x119 up to 0x11a; + - Update of 06-c6-04/0x82 microcode (in intel-ucode/06-c6-02) from + revision 0x119 up to 0x11a; + - Update of 06-ca-02/0x82 microcode (in intel-ucode/06-c6-02) from + revision 0x119 up to 0x11a; + - Update of 06-cf-01/0x87 (EMR-SP A0) microcode (in + intel-ucode/06-cf-02) from revision 0x210002b3 up to 0x210002c0; + - Update of 06-cf-02/0x87 (EMR-SP A1) microcode from revision 0x210002b3 + up to 0x210002c0. + * Wed Aug 20 2025 Denys Vlasenko - 4:20250812-1 - Update Intel CPU microcode to microcode-20250812 release - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000404 diff --git a/sources b/sources index 45f274c..4097569 100644 --- a/sources +++ b/sources @@ -1,3 +1,3 @@ -SHA512 (microcode-20250812.tar.gz) = 5c21676d1c1783c937c78ca00b9f8d9a870bc7dfdde564bdf2ba277931223fa8d6a2f21d6a0e6249b4ba8ccc2e47d5b3cbf41cc5edc08360c909b3f1c7f2dec1 +SHA512 (microcode-20251111.tar.gz) = a11ded3158d761ae68258ca61a15014258d68ea28e9e9c94c125a49490a1df0f4b5c6cc37e97b42d84594760e455a1444feb2106e920ea6dd09934e545d92188 SHA512 (06-55-06) = 0045a5a0cf88a91b1a0b544d5674cdf7be44467b4a160b28304b5a221d3de4fab3f99ad5ec2ebc15ad73a9ca938baba7d8c72164132ea189a7a4ed9b83306223 SHA512 (06-8f-08) = 972bde0bf664679891e4bb3740fd3e55fb5b36f288df29e2f5936e6e472a9f14f0c5be58e9f604d5e3f08c06d43bce7d749f66c07698f9cb885b7f016377bda7