diff --git a/.gitignore b/.gitignore index ece0978..0148d4f 100644 --- a/.gitignore +++ b/.gitignore @@ -1,6 +1,6 @@ /microcode-20190918.tar.gz /microcode-20191115.tar.gz -/microcode-20220510.tar.gz +/microcode-20220809.tar.gz /06-2d-07 /06-4e-03 /06-55-04 diff --git a/0001-releasenote.md-changes-summary-fixes-for-microcode-2.patch b/0001-releasenote.md-changes-summary-fixes-for-microcode-2.patch deleted file mode 100644 index 938e31b..0000000 --- a/0001-releasenote.md-changes-summary-fixes-for-microcode-2.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 6ff5aa24a9460441cf2f1008792af134aeca0931 Mon Sep 17 00:00:00 2001 -From: Eugene Syromiatnikov -Date: Tue, 10 May 2022 20:48:31 +0200 -Subject: [PATCH] releasenote.md: changes summary fixes for microcode-20220510 - -* releasenote.md (New Platforms): Change the second 06-bf-02/03 entry -to 06-bf-05/03. -(Updated Platforms): Change the case to lower in PF of 06-37-09/0f; -change "GKL-R" to "GLK-R" (stands for Gemini Lake Refresh). - -Signed-off-by: Eugene Syromiatnikov ---- - releasenote.md | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/releasenote.md b/releasenote.md -index 7fac640..c4a1ba7 100644 ---- a/releasenote.md -+++ b/releasenote.md -@@ -18,13 +18,13 @@ - | ADL | L0 | 06-9a-03/80 | | 0000041c | Core Gen12 - | ADL | L0 | 06-9a-04/80 | | 0000041c | Core Gen12 - | ADL | C0 | 06-bf-02/03 | | 0000001f | Core Gen12 --| ADL | C0 | 06-bf-02/03 | | 0000001f | Core Gen12 -+| ADL | C0 | 06-bf-05/03 | | 0000001f | Core Gen12 - - ### Updated Platforms - - | Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products - |:---------------|:---------|:------------|:---------|:---------|:--------- --| VLV | D0 | 06-37-09/0F | 0000090c | 0000090d | Atom E38xx -+| VLV | D0 | 06-37-09/0f | 0000090c | 0000090d | Atom E38xx - | SKL-U/Y | D0 | 06-4e-03/c0 | 000000ec | 000000f0 | Core Gen6 Mobile - | SKX-SP | B1 | 06-55-03/97 | 0100015c | 0100015d | Xeon Scalable - | SKX-SP | H0/M0/U0 | 06-55-04/b7 | 02006c0a | 02006d05 | Xeon Scalable -@@ -38,7 +38,7 @@ - | DNV | B0 | 06-5f-01/01 | 00000036 | 00000038 | Atom C Series - | ICX-SP | D0 | 06-6a-06/87 | 0d000331 | 0d000363 | Xeon Scalable Gen3 - | GLK | B0 | 06-7a-01/01 | 00000038 | 0000003a | Pentium Silver N/J5xxx, Celeron N/J4xxx --| GKL-R | R0 | 06-7a-08/01 | 0000001c | 0000001e | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120 -+| GLK-R | R0 | 06-7a-08/01 | 0000001c | 0000001e | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120 - | ICL-U/Y | D1 | 06-7e-05/80 | 000000a8 | 000000b0 | Core Gen10 Mobile - | LKF | B2/B3 | 06-8a-01/10 | 0000002d | 00000031 | Core w/Hybrid Technology - | TGL | B1 | 06-8c-01/80 | 0000009a | 000000a4 | Core Gen11 Mobile --- -2.13.6 - diff --git a/06-55-04_readme b/06-55-04_readme index 7ebd3e4..373e600 100644 --- a/06-55-04_readme +++ b/06-55-04_readme @@ -22,6 +22,7 @@ microcode revisions in question are listed below: * 06-55-04, revision 0x2006b06: cb5bec976cb9754e3a22ab6828b3262a8f9eccf7 * 06-55-04, revision 0x2006c0a: 76b641375d136c08f5feb46aacebee40468ac085 * 06-55-04, revision 0x2006d05: dc4207cf4eb916ff34acbdddc474db0df781234f + * 06-55-04, revision 0x2006e05: bc67d247ad1c9a834bec5e452606db1381d6bc7e Please contact your system vendor for a BIOS/firmware update that contains the latest microcode version. For the information regarding microcode versions @@ -65,6 +66,8 @@ to the following knowledge base articles: CVE-2022-21151 (Optimization Removal-Induced Informational Disclosure), CVE-2022-21166 (Device Register Partial Write): https://access.redhat.com/articles/6963124 + * CVE-2022-21233 (Stale Data Read from legacy xAPIC): + https://access.redhat.com/articles/6976398 The information regarding disabling microcode update is provided below. diff --git a/README.caveats b/README.caveats index 6e43232..947b0f8 100644 --- a/README.caveats +++ b/README.caveats @@ -874,3 +874,5 @@ Intel CPU vulnerabilities is available in the following knowledge base articles: CVE-2022-21151 (Optimization Removal-Induced Informational Disclosure), CVE-2022-21166 (Device Register Partial Write): https://access.redhat.com/articles/6963124 + * CVE-2022-21233 (Stale Data Read from legacy xAPIC): + https://access.redhat.com/articles/6976398 diff --git a/microcode_ctl.spec b/microcode_ctl.spec index 1a4b006..0c3d35a 100644 --- a/microcode_ctl.spec +++ b/microcode_ctl.spec @@ -1,4 +1,4 @@ -%define intel_ucode_version 20220510 +%define intel_ucode_version 20220809 %define caveat_dir %{_datarootdir}/microcode_ctl/ucode_with_caveats %define microcode_ctl_libexec %{_libexecdir}/microcode_ctl @@ -121,9 +121,6 @@ Source1000: gen_provides.sh Source1001: codenames.list Source1002: gen_updates2.py -# microcode-20220510-1-g6ff5aa2 "releasenote.md: changes summary fixes for microcode-20220510" -Patch1001: 0001-releasenote.md-changes-summary-fixes-for-microcode-2.patch - BuildArch: noarch BuildRequires: systemd-units # dd, hexdump, and xxd are used in gen_provides.sh @@ -152,8 +149,6 @@ is no longer used for microcode upload and, as a result, no longer provided. %prep %setup -n "Intel-Linux-Processor-Microcode-Data-Files-microcode-%{intel_ucode_version}" -%patch1001 -p1 - %build # replacing SNB-EP (CPUID 0x206d7) microcode with pre-MDS version mv intel-ucode/06-2d-07 intel-ucode-with-caveats/ @@ -550,6 +545,69 @@ rm -rf %{buildroot} %changelog +* Tue Aug 09 2022 Eugene Syromiatnikov - 4:20220809-1 +- Update Intel CPU microcode to microcode-20220510 release, addresses + CVE-2022-21233 (#2115663): + - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in + intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006d05 up + to 0x2006e05; + - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015d + up to 0x100015e; + - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000363 + up to 0xd000375; + - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3a up + to 0x3c; + - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1e up + to 0x20; + - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb0 + up to 0xb2; + - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x26 up + to 0x28; + - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x3e up + to 0x40; + - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode from revision + 0x1f up to 0x22; + - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-97-02) from revision 0x1f up to 0x22; + - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) + from revision 0x1f up to 0x22; + - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) + from revision 0x1f up to 0x22; + - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in + intel-ucode/06-97-05) from revision 0x1f up to 0x22; + - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode from revision 0x1f + up to 0x22; + - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) + from revision 0x1f up to 0x22; + - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) + from revision 0x1f up to 0x22; + - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision + 0x41c up to 0x421; + - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in + intel-ucode/06-9a-03) from revision 0x41c up to 0x421; + - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in + intel-ucode/06-9a-04) from revision 0x41c up to 0x421; + - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x41c + up to 0x421; + - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x53 up + to 0x54; + - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in + intel-ucode/06-bf-02) from revision 0x1f up to 0x22; + - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-bf-02) from revision 0x1f up to 0x22; + - Update of 06-bf-02/0x03 (ADL C0) microcode from revision 0x1f up + to 0x22; + - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-bf-02) + from revision 0x1f up to 0x22; + - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in + intel-ucode/06-bf-05) from revision 0x1f up to 0x22; + - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-bf-05) from revision 0x1f up to 0x22; + - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-bf-05) + from revision 0x1f up to 0x22; + - Update of 06-bf-05/0x03 (ADL C0) microcode from revision 0x1f up + to 0x22. + * Tue May 10 2022 Eugene Syromiatnikov - 4:20220510-1 - Update Intel CPU microcode to microcode-20220510 release, addresses CVE-2022-0005, CVE-2022-21131, CVE-2022-21136, CVE-2022-21151 (#2090248, diff --git a/sources b/sources index 199e5ff..86fb85c 100644 --- a/sources +++ b/sources @@ -1,6 +1,6 @@ SHA512 (microcode-20190918.tar.gz) = 82e5212238d3e35470d139240d9157877ac252725598ec31bfe1763755681539a4ecdf24e04c4e4270215578a9ca3c063c8fc353accf99999c3d4ac2780a6e0c SHA512 (microcode-20191115.tar.gz) = 11014c16bde83ac290bc75e458242f5e64b8dffd49de2e938f61f4a09979cd5e80dd1a85d2ccbac067e4398dc3d93ef3583e4aa9b2e545ba46d26e65ec1e2881 -SHA512 (microcode-20220510.tar.gz) = 00329ce62a6d9cc66fb8594d132ef67951086ab1250ceaf908d5a357753ed62557275f55c5eb7b3ad55d1fdd312b5d1a436b214cdcbf6e3e1a840c8bf6f4795d +SHA512 (microcode-20220809.tar.gz) = 1c91df1cbba33953f4ad19cc53215cad843c61a08509596fad32a84b4f0012d9d29bce64b58eb405c345af7f646d5982e45227570ce3605780be6e8bf31a63e1 SHA512 (06-2d-07) = 631ec8ad8ad3c9b32d9569689f673010d26c13c7cc377d66b8fc5150de52485076d1514ba867dfa4f468889a31d6701cd8a0789d465ad069d98c8ea0f5bd3204 SHA512 (06-4e-03) = 248066b521bf512b5d8e4a8c7e921464ce52169c954d6e4ca580d8c172cd789519e22b4cf56c212e452b4191741f0202019f7061d322c9433b5af9ce5413b567 SHA512 (06-55-04) = db2783cd62680510a7105e7c3fd9d5fffac6a33159ba811f4669f8afb9a5badde4c009bf1868e6a53eb3ac2286812404127bcd45fcbc65fe004788e25ae3e222