From 396cd10b46c9b4e58657666e58786a415c5eb347 Mon Sep 17 00:00:00 2001 From: Eugene Syromiatnikov Date: Mon, 22 May 2023 04:50:44 +0200 Subject: [PATCH] Update Intel CPU microcode to microcode-20230214 release - Update Intel CPU microcode to microcode-20230214 release, addresses CVE-2022-21216, CVE-2022-33196, CVE-2022-33972, CVE-2022-38090: - Addition of 06-6c-01/0x10 (ICL-D B0) microcode at revision 0x1000211; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode at revision 0x2b000181; - Addition of 06-8f-04/0x10 microcode at revision 0x2c000170; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-04) at revision 0x2b000181; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-04) at revision 0x2c000170; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-04) at revision 0x2b000181; - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) at revision 0x2c000170; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-04) at revision 0x2b000181; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-04) at revision 0x2b000181; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-04) at revision 0x2c000170; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-05) at revision 0x2b000181; - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) at revision 0x2c000170; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode at revision 0x2b000181; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode at revision 0x2c000170; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-05) at revision 0x2b000181; - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) at revision 0x2c000170; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-05) at revision 0x2b000181; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-05) at revision 0x2b000181; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-05) at revision 0x2c000170; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-06) at revision 0x2b000181; - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) at revision 0x2c000170; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-06) at revision 0x2b000181; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-06) at revision 0x2c000170; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode at revision 0x2b000181; - Addition of 06-8f-06/0x10 microcode at revision 0x2c000170; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-06) at revision 0x2b000181; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-06) at revision 0x2b000181; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-06) at revision 0x2c000170; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-07) at revision 0x2b000181; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-07) at revision 0x2b000181; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-07) at revision 0x2b000181; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode at revision 0x2b000181; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-07) at revision 0x2b000181; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-08) at revision 0x2b000181; - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) at revision 0x2c000170; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-08) at revision 0x2b000181; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-08) at revision 0x2c000170; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-08) at revision 0x2b000181; - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) at revision 0x2c000170; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-08) at revision 0x2b000181; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode at revision 0x2b000181; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode at revision 0x2c000170; - Addition of 06-b7-01/0x32 (RPL-S S0) microcode at revision 0x112; - Addition of 06-ba-02/0xc0 microcode at revision 0x410e; - Addition of 06-ba-03/0xc0 microcode (in intel-ucode/06-ba-02) at revision 0x410e; - Addition of 06-ba-02/0xc0 microcode (in intel-ucode/06-ba-03) at revision 0x410e; - Addition of 06-ba-03/0xc0 microcode at revision 0x410e; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xa4 up to 0xa6; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from revision 0xf0 up to 0xf4; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xf0 up to 0xf4; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015e up to 0x1000161; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003302 up to 0x4003303; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003302 up to 0x5003303; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002501 up to 0x7002503; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000375 up to 0xd000389; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3c up to 0x3e; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x20 up to 0x22; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb2 up to 0xb8; - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x31 up to 0x32; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x40 up to 0x42; - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x16 up to 0x17; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x421 up to 0x429; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x421 up to 0x429; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x421 up to 0x429; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x421 up to 0x429; - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x24000023 up to 0x24000024; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf0 up to 0xf4; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf0 up to 0xf4; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf0 up to 0xf4; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf0 up to 0xf4; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xf0 up to 0xf4; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x54 up to 0x57; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x22 up to 0x2c (old pf 0x3). * .gitignore: Replace /microcode-20220809.tar.gz entry with /microcode-20230214.tar.gz. * codenames.list: Add entries for CPU signatures 606c1 (ICL-D B0), 806f4 (SPR-SP E0/S1), 806f5 (SPR-HBM B1, SPR-SP E2), 806f6 (SPR-SP E3), 806f7 (SPR-SP E4/S2), 806f8 (SPR-HBM B3, SPR-SP E5/S3), b0671 (RPL-S S0), 806a2 (SPR-P 6+8/H 6+8 J0), and 806a3 (SPR-U 2+8 Q0). * microcode_ctl.spec (intel_ucode_version): Bump to 20230214. (Release): Reset to 1. (%changelog): Add a record. * sources: Replace microcode-20220809.tar.gz record with microcode-20230214.tar.gz. Resolves: #2171237 Resolves: #2171262 Signed-off-by: Eugene Syromiatnikov --- .gitignore | 2 +- codenames.list | 11 +++ microcode_ctl.spec | 181 ++++++++++++++++++++++++++++++++++++++++++++- sources | 2 +- 4 files changed, 192 insertions(+), 4 deletions(-) diff --git a/.gitignore b/.gitignore index 0148d4f..66bd28c 100644 --- a/.gitignore +++ b/.gitignore @@ -1,6 +1,6 @@ /microcode-20190918.tar.gz /microcode-20191115.tar.gz -/microcode-20220809.tar.gz +/microcode-20230214.tar.gz /06-2d-07 /06-4e-03 /06-55-04 diff --git a/codenames.list b/codenames.list index a48b6da..3694570 100644 --- a/codenames.list +++ b/codenames.list @@ -265,6 +265,7 @@ SOC;;XMM 7272 (SoFIA);;01;60650;;;XMM 7272 Mobile;;Cannon Lake;D0;80;60663;CNL;U;Core Gen8 Mobile; Server;;Ice Lake;C0;87;606a5;ICX;SP;Xeon Scalable Gen3; Server;;Ice Lake;D0;87;606a6;ICX;SP;Xeon Scalable Gen3; +Server;;Ice Lake;B0;10;606c1;ICL;D;;Xeon D-17xx, D-27xx SOC;;Gemini Lake;B0;01;706a1;GLK;;;Pentium J5005/N5000, Celeron J4005/J4105/N4000/N4100 SOC;;Gemini Lake;R0;01;706a8;GLK;R;;Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120 Mobile;;Ice Lake;D1;80;706e5;ICL;U,Y;Core Gen10 Mobile; @@ -286,6 +287,13 @@ Mobile;;Comet Lake;V0;94;806ec;CML;U 4+2;Core Gen10 Mobile; Mobile;;Whiskey Lake;W0;d0;806eb;WHL;U;Core Gen8 Mobile; Mobile;;Whiskey Lake;V0;94;806ec;WHL;U;Core Gen8 Mobile; Mobile;;Whiskey Lake;V0;94;806ed;WHL;U;Core Gen8 Mobile; +Server;;Sapphire Rapids;E0,S1;87;806f4;SPR;SP;Xeon Scalable Gen4; +Server;;Sapphire Rapids;B1;10;806f5;SPR;HBM;Xeon Max; +Server;;Sapphire Rapids;E2;87;806f5;SPR;SP;Xeon Scalable Gen4; +Server;;Sapphire Rapids;E3;87;806f6;SPR;SP;Xeon Scalable Gen4; +Server;;Sapphire Rapids;E4,S2;87;806f7;SPR;SP;Xeon Scalable Gen4; +Server;;Sapphire Rapids;B3;10;806f8;SPR;HBM;Xeon Max; +Server;;Sapphire Rapids;E5,S3;87;806f8;SPR;SP;Xeon Scalable Gen4; SOC;;Elkhart Rate;B1;01;90661;EHL;;Pentium J6426/N6415, Celeron J6412/J6413/N6210/N6211, Atom x6000E; Desktop;;Alder Lake;C0;02;90672;ADL;S 8+8;Core Gen12; Mobile;;Alder Lake;C0;03;90672;ADL;HX;Core Gen12 Mobile; @@ -315,6 +323,9 @@ Desktop;;Comet Lake;Q0;22;a0655;CML;S 10+2;Core Gen10 Desktop; Mobile;;Comet Lake;A0;80;a0660;CML;U 6+2;Core Gen10 Mobile; Mobile;;Comet Lake;K1;80;a0661;CML;U 6+2 v2;Core Gen10 Mobile; Desktop;;Rocket Lake;B0;02;a0671;RKL;S;Core Gen11; +Desktop;;Raptor Lake;S0;32;b0671;RPL;S;Core Gen13; +Mobile;;Raptor Lake;J0;07;b06a2;RPL;P 6+8,H 6+8;Core Gen13; +Mobile;;Raptor Lake;Q0;07;b06a3;RPL;U 2+8;Core Gen13; Desktop;;Alder Lake;C0;03;b06f2;ADL;;Core Gen12; Desktop;;Alder Lake;C0;03;b06f5;ADL;;Core Gen12; diff --git a/microcode_ctl.spec b/microcode_ctl.spec index a896cd4..bffe0ce 100644 --- a/microcode_ctl.spec +++ b/microcode_ctl.spec @@ -1,4 +1,4 @@ -%define intel_ucode_version 20220809 +%define intel_ucode_version 20230214 %define caveat_dir %{_datarootdir}/microcode_ctl/ucode_with_caveats %define microcode_ctl_libexec %{_libexecdir}/microcode_ctl @@ -12,7 +12,7 @@ Summary: CPU microcode updates for Intel x86 processors Name: microcode_ctl Version: %{intel_ucode_version} -Release: 2%{?dist} +Release: 1%{?dist} Epoch: 4 License: CC0 and Redistributable, no modification permitted URL: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files @@ -545,6 +545,183 @@ rm -rf %{buildroot} %changelog +* Wed Feb 15 2023 Eugene Syromiatnikov - 4:20230214-1 +- Update Intel CPU microcode to microcode-20230214 release, addresses + CVE-2022-21216, CVE-2022-33196, CVE-2022-33972, CVE-2022-38090 (#2171237, + #2171262): + - Addition of 06-6c-01/0x10 (ICL-D B0) microcode at revision 0x1000211; + - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode at revision + 0x2b000181; + - Addition of 06-8f-04/0x10 microcode at revision 0x2c000170; + - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in + intel-ucode/06-8f-04) at revision 0x2b000181; + - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in + intel-ucode/06-8f-04) at revision 0x2c000170; + - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in + intel-ucode/06-8f-04) at revision 0x2b000181; + - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) at + revision 0x2c000170; + - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in + intel-ucode/06-8f-04) at revision 0x2b000181; + - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in + intel-ucode/06-8f-04) at revision 0x2b000181; + - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in + intel-ucode/06-8f-04) at revision 0x2c000170; + - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in + intel-ucode/06-8f-05) at revision 0x2b000181; + - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) at + revision 0x2c000170; + - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode at revision + 0x2b000181; + - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode at revision + 0x2c000170; + - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in + intel-ucode/06-8f-05) at revision 0x2b000181; + - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) at + revision 0x2c000170; + - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in + intel-ucode/06-8f-05) at revision 0x2b000181; + - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in + intel-ucode/06-8f-05) at revision 0x2b000181; + - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in + intel-ucode/06-8f-05) at revision 0x2c000170; + - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in + intel-ucode/06-8f-06) at revision 0x2b000181; + - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) at + revision 0x2c000170; + - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in + intel-ucode/06-8f-06) at revision 0x2b000181; + - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in + intel-ucode/06-8f-06) at revision 0x2c000170; + - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode at revision + 0x2b000181; + - Addition of 06-8f-06/0x10 microcode at revision 0x2c000170; + - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in + intel-ucode/06-8f-06) at revision 0x2b000181; + - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in + intel-ucode/06-8f-06) at revision 0x2b000181; + - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in + intel-ucode/06-8f-06) at revision 0x2c000170; + - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in + intel-ucode/06-8f-07) at revision 0x2b000181; + - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in + intel-ucode/06-8f-07) at revision 0x2b000181; + - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in + intel-ucode/06-8f-07) at revision 0x2b000181; + - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode at revision + 0x2b000181; + - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in + intel-ucode/06-8f-07) at revision 0x2b000181; + - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in + intel-ucode/06-8f-08) at revision 0x2b000181; + - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) at + revision 0x2c000170; + - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in + intel-ucode/06-8f-08) at revision 0x2b000181; + - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in + intel-ucode/06-8f-08) at revision 0x2c000170; + - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in + intel-ucode/06-8f-08) at revision 0x2b000181; + - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) at + revision 0x2c000170; + - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in + intel-ucode/06-8f-08) at revision 0x2b000181; + - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode at revision + 0x2b000181; + - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode at revision + 0x2c000170; + - Addition of 06-b7-01/0x32 (RPL-S S0) microcode at revision 0x112; + - Addition of 06-ba-02/0xc0 microcode at revision 0x410e; + - Addition of 06-ba-03/0xc0 microcode (in intel-ucode/06-ba-02) at + revision 0x410e; + - Addition of 06-ba-02/0xc0 microcode (in intel-ucode/06-ba-03) at + revision 0x410e; + - Addition of 06-ba-03/0xc0 microcode at revision 0x410e; + - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in + intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xa4 up to 0xa6; + - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) + microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from + revision 0xf0 up to 0xf4; + - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in + intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xf0 up + to 0xf4; + - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015e + up to 0x1000161; + - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003302 + up to 0x4003303; + - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision + 0x5003302 up to 0x5003303; + - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002501 + up to 0x7002503; + - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000375 + up to 0xd000389; + - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3c up + to 0x3e; + - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x20 up + to 0x22; + - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb2 + up to 0xb8; + - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x31 up + to 0x32; + - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x40 up + to 0x42; + - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x16 up + to 0x17; + - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision + 0x22 up to 0x2c (old pf 0x3); + - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) + from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) + from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in + intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x22 + up to 0x2c (old pf 0x3); + - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) + from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) + from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision + 0x421 up to 0x429; + - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in + intel-ucode/06-9a-03) from revision 0x421 up to 0x429; + - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in + intel-ucode/06-9a-04) from revision 0x421 up to 0x429; + - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x421 + up to 0x429; + - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x24000023 + up to 0x24000024; + - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf0 up + to 0xf4; + - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf0 + up to 0xf4; + - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf0 + up to 0xf4; + - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf0 + up to 0xf4; + - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision + 0xf0 up to 0xf4; + - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x54 up + to 0x57; + - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in + intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x22 up to + 0x2c (old pf 0x3); + - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02) + from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in + intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05) + from revision 0x22 up to 0x2c (old pf 0x3); + - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x22 up to + 0x2c (old pf 0x3). + * Tue Oct 25 2022 Eugene Syromiatnikov - 4:20220809-2 - Change the logger severity level to warning to align with the kmsg one (#2136506). diff --git a/sources b/sources index 86fb85c..6863105 100644 --- a/sources +++ b/sources @@ -1,6 +1,6 @@ SHA512 (microcode-20190918.tar.gz) = 82e5212238d3e35470d139240d9157877ac252725598ec31bfe1763755681539a4ecdf24e04c4e4270215578a9ca3c063c8fc353accf99999c3d4ac2780a6e0c SHA512 (microcode-20191115.tar.gz) = 11014c16bde83ac290bc75e458242f5e64b8dffd49de2e938f61f4a09979cd5e80dd1a85d2ccbac067e4398dc3d93ef3583e4aa9b2e545ba46d26e65ec1e2881 -SHA512 (microcode-20220809.tar.gz) = 1c91df1cbba33953f4ad19cc53215cad843c61a08509596fad32a84b4f0012d9d29bce64b58eb405c345af7f646d5982e45227570ce3605780be6e8bf31a63e1 +SHA512 (microcode-20230214.tar.gz) = 6456cd6719923eeacb1f9d6d7372efd2bcd0de9e04350c722543ff41e45c7715ba52a2d330ad5818fbf44ea9df6b2ac482d6f8bd420b191427881dcfe3bd81e2 SHA512 (06-2d-07) = 631ec8ad8ad3c9b32d9569689f673010d26c13c7cc377d66b8fc5150de52485076d1514ba867dfa4f468889a31d6701cd8a0789d465ad069d98c8ea0f5bd3204 SHA512 (06-4e-03) = 248066b521bf512b5d8e4a8c7e921464ce52169c954d6e4ca580d8c172cd789519e22b4cf56c212e452b4191741f0202019f7061d322c9433b5af9ce5413b567 SHA512 (06-55-04) = db2783cd62680510a7105e7c3fd9d5fffac6a33159ba811f4669f8afb9a5badde4c009bf1868e6a53eb3ac2286812404127bcd45fcbc65fe004788e25ae3e222