2020-01-21 23:13:12 +00:00
|
|
|
Intel Sandy Bridge-E/EN/EP CPU models (SNB-EP, family 6, model 45, stepping 7)
|
2020-07-28 08:28:48 +00:00
|
|
|
had issues with MDS-related microcode update that may lead to a system hang
|
|
|
|
|
after a microcode update[1][2]. In order to address this, microcode update
|
|
|
|
|
to the MDS-related revision 0x718 had been disabled, and the previously
|
2020-01-21 23:13:12 +00:00
|
|
|
published microcode revision 0x714 is used by default for the OS-driven
|
2020-07-28 08:28:48 +00:00
|
|
|
microcode update. The revision 0x71a of the microcode is intended to fix
|
|
|
|
|
the aforementioned issue, hence it is enabled by default (but can be disabled
|
|
|
|
|
explicitly; see below).
|
|
|
|
|
|
|
|
|
|
[1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/15
|
|
|
|
|
[2] https://access.redhat.com/solutions/4593951
|
2020-01-21 23:13:12 +00:00
|
|
|
|
|
|
|
|
For the reference, SHA1 checksums of 06-2d-07 microcode files containing
|
|
|
|
|
microcode revisions in question are listed below:
|
|
|
|
|
* 06-2d-07, revision 0x714: bcf2173cd3dd499c37defbc2533703cfa6ec2430
|
|
|
|
|
* 06-2d-07, revision 0x718: 837cfebbfc09b911151dfd179082ad99cf87e85d
|
2020-07-28 08:28:48 +00:00
|
|
|
* 06-2d-07, revision 0x71a: 4512c8149e63e5ed15f45005d7fb5be0041f66f6
|
2020-01-21 23:13:12 +00:00
|
|
|
|
|
|
|
|
Please contact your system vendor for a BIOS/firmware update that contains
|
2020-07-28 08:28:48 +00:00
|
|
|
the latest microcode version. For the information regarding microcode versions
|
2020-01-21 23:13:12 +00:00
|
|
|
required for mitigating specific side-channel cache attacks, please refer
|
|
|
|
|
to the following knowledge base articles:
|
|
|
|
|
* CVE-2017-5715 ("Spectre"):
|
|
|
|
|
https://access.redhat.com/articles/3436091
|
|
|
|
|
* CVE-2018-3639 ("Speculative Store Bypass"):
|
|
|
|
|
https://access.redhat.com/articles/3540901
|
|
|
|
|
* CVE-2018-3620, CVE-2018-3646 ("L1 Terminal Fault Attack"):
|
|
|
|
|
https://access.redhat.com/articles/3562741
|
|
|
|
|
* CVE-2018-12130, CVE-2018-12126, CVE-2018-12127, and CVE-2019-11091
|
|
|
|
|
("Microarchitectural Data Sampling"):
|
|
|
|
|
https://access.redhat.com/articles/4138151
|
|
|
|
|
|
2020-07-28 08:28:48 +00:00
|
|
|
The information regarding disabling microcode update is provided below.
|
2020-01-21 23:13:12 +00:00
|
|
|
|
2020-07-28 08:28:48 +00:00
|
|
|
To disable usage of the newer microcode revision for a specific kernel
|
|
|
|
|
version, please create file "disallow-intel-06-2d-07" inside
|
|
|
|
|
/lib/firmware/<kernel_version> directory, run
|
|
|
|
|
"/usr/libexec/microcode_ctl/update_ucode" to add it to firmware directory
|
|
|
|
|
where microcode will be available for late microcode update, and run
|
|
|
|
|
"dracut -f --kver <kernel_version>", so initramfs for this kernel version
|
|
|
|
|
is regenerated and the microcode can be loaded early, for example:
|
2020-01-21 23:13:12 +00:00
|
|
|
|
2020-07-28 08:28:48 +00:00
|
|
|
touch /lib/firmware/3.10.0-862.9.1/disallow-intel-06-2d-07
|
2020-01-21 23:13:12 +00:00
|
|
|
/usr/libexec/microcode_ctl/update_ucode
|
|
|
|
|
dracut -f --kver 3.10.0-862.9.1
|
|
|
|
|
|
2020-07-28 08:28:48 +00:00
|
|
|
To avoid addition of the newer microcode revision for all kernels, please create
|
|
|
|
|
file "/etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-2d-07", run
|
|
|
|
|
"/usr/libexec/microcode_ctl/update_ucode" for late microcode updates,
|
|
|
|
|
and "dracut -f --regenerate-all" for early microcode updates:
|
2020-01-21 23:13:12 +00:00
|
|
|
|
|
|
|
|
mkdir -p /etc/microcode_ctl/ucode_with_caveats
|
2020-07-28 08:28:48 +00:00
|
|
|
touch /etc/microcode_ctl/ucode_with_caveats/disallow-intel-06-2d-07
|
2020-01-21 23:13:12 +00:00
|
|
|
/usr/libexec/microcode_ctl/update_ucode
|
|
|
|
|
dracut -f --regenerate-all
|
|
|
|
|
|
|
|
|
|
Please refer to /usr/share/doc/microcode_ctl/README.caveats for additional
|
|
|
|
|
information.
|
