diff --git a/0001-Revert-ac-radeonsi-remove-has_syncobj-has_fence_to_h.patch b/0001-Revert-ac-radeonsi-remove-has_syncobj-has_fence_to_h.patch new file mode 100644 index 0000000..2460001 --- /dev/null +++ b/0001-Revert-ac-radeonsi-remove-has_syncobj-has_fence_to_h.patch @@ -0,0 +1,153 @@ +From fddf49504e1bebb7efc52c1a0516300c0f217f18 Mon Sep 17 00:00:00 2001 +From: Pierre-Eric Pelloux-Prayer +Date: Wed, 26 Jun 2024 12:11:48 +0200 +Subject: [PATCH] Revert "ac, radeonsi: remove has_syncobj, + has_fence_to_handle" + +This reverts commit 02fe3c32cdfc3cf48cd691d6321978b8d4c3e61b. + +Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11352 +--- + src/amd/common/ac_gpu_info.c | 12 ++++++++++++ + src/amd/common/ac_gpu_info.h | 2 ++ + src/gallium/drivers/r600/r600_pipe_common.c | 1 + + src/gallium/drivers/radeonsi/si_fence.c | 10 ++++++++++ + src/gallium/drivers/radeonsi/si_get.c | 8 ++++++-- + 5 files changed, 31 insertions(+), 2 deletions(-) + +diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c +index 78febf796b4..3f711bd45ec 100644 +--- a/src/amd/common/ac_gpu_info.c ++++ b/src/amd/common/ac_gpu_info.c +@@ -355,6 +355,14 @@ static intptr_t readlink(const char *path, char *buf, size_t bufsiz) + + #define CIK_TILE_MODE_COLOR_2D 14 + ++static bool has_syncobj(int fd) ++{ ++ uint64_t value; ++ if (drmGetCap(fd, DRM_CAP_SYNCOBJ, &value)) ++ return false; ++ return value ? true : false; ++} ++ + static bool has_timeline_syncobj(int fd) + { + uint64_t value; +@@ -1068,7 +1076,9 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info, + info->memory_freq_mhz_effective *= ac_memory_ops_per_clock(info->vram_type); + + info->has_userptr = true; ++ info->has_syncobj = has_syncobj(fd); + info->has_timeline_syncobj = has_timeline_syncobj(fd); ++ info->has_fence_to_handle = info->has_syncobj; + info->has_local_buffers = true; + info->has_bo_metadata = true; + info->has_eqaa_surface_allocator = info->gfx_level < GFX11; +@@ -1974,7 +1984,9 @@ void ac_print_gpu_info(const struct radeon_info *info, FILE *f) + fprintf(f, "Kernel & winsys capabilities:\n"); + fprintf(f, " drm = %i.%i.%i\n", info->drm_major, info->drm_minor, info->drm_patchlevel); + fprintf(f, " has_userptr = %i\n", info->has_userptr); ++ fprintf(f, " has_syncobj = %u\n", info->has_syncobj); + fprintf(f, " has_timeline_syncobj = %u\n", info->has_timeline_syncobj); ++ fprintf(f, " has_fence_to_handle = %u\n", info->has_fence_to_handle); + fprintf(f, " has_local_buffers = %u\n", info->has_local_buffers); + fprintf(f, " has_bo_metadata = %u\n", info->has_bo_metadata); + fprintf(f, " has_eqaa_surface_allocator = %u\n", info->has_eqaa_surface_allocator); +diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h +index 68fbe909a97..40670d87770 100644 +--- a/src/amd/common/ac_gpu_info.h ++++ b/src/amd/common/ac_gpu_info.h +@@ -218,7 +218,9 @@ struct radeon_info { + uint32_t max_submitted_ibs[AMD_NUM_IP_TYPES]; + bool is_amdgpu; + bool has_userptr; ++ bool has_syncobj; + bool has_timeline_syncobj; ++ bool has_fence_to_handle; + bool has_local_buffers; + bool has_bo_metadata; + bool has_eqaa_surface_allocator; +diff --git a/src/gallium/drivers/r600/r600_pipe_common.c b/src/gallium/drivers/r600/r600_pipe_common.c +index aaa171a07ed..5a10aad5907 100644 +--- a/src/gallium/drivers/r600/r600_pipe_common.c ++++ b/src/gallium/drivers/r600/r600_pipe_common.c +@@ -1338,6 +1338,7 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen, + printf("drm = %i.%i.%i\n", rscreen->info.drm_major, + rscreen->info.drm_minor, rscreen->info.drm_patchlevel); + printf("has_userptr = %i\n", rscreen->info.has_userptr); ++ printf("has_syncobj = %u\n", rscreen->info.has_syncobj); + + printf("r600_max_quad_pipes = %i\n", rscreen->info.r600_max_quad_pipes); + printf("max_gpu_freq_mhz = %i\n", rscreen->info.max_gpu_freq_mhz); +diff --git a/src/gallium/drivers/radeonsi/si_fence.c b/src/gallium/drivers/radeonsi/si_fence.c +index a1ae9125e00..1d2406df9fd 100644 +--- a/src/gallium/drivers/radeonsi/si_fence.c ++++ b/src/gallium/drivers/radeonsi/si_fence.c +@@ -374,10 +374,16 @@ static void si_create_fence_fd(struct pipe_context *ctx, struct pipe_fence_handl + + switch (type) { + case PIPE_FD_TYPE_NATIVE_SYNC: ++ if (!sscreen->info.has_fence_to_handle) ++ goto finish; ++ + sfence->gfx = ws->fence_import_sync_file(ws, fd); + break; + + case PIPE_FD_TYPE_SYNCOBJ: ++ if (!sscreen->info.has_syncobj) ++ goto finish; ++ + sfence->gfx = ws->fence_import_syncobj(ws, fd); + break; + +@@ -385,6 +391,7 @@ static void si_create_fence_fd(struct pipe_context *ctx, struct pipe_fence_handl + unreachable("bad fence fd type when importing"); + } + ++finish: + if (!sfence->gfx) { + FREE(sfence); + return; +@@ -400,6 +407,9 @@ static int si_fence_get_fd(struct pipe_screen *screen, struct pipe_fence_handle + struct si_fence *sfence = (struct si_fence *)fence; + int gfx_fd = -1; + ++ if (!sscreen->info.has_fence_to_handle) ++ return -1; ++ + util_queue_fence_wait(&sfence->ready); + + /* Deferred fences aren't supported. */ +diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c +index a9ac90dca52..3c8a75e9583 100644 +--- a/src/gallium/drivers/radeonsi/si_get.c ++++ b/src/gallium/drivers/radeonsi/si_get.c +@@ -168,8 +168,6 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param) + case PIPE_CAP_ALLOW_GLTHREAD_BUFFER_SUBDATA_OPT: /* TODO: remove if it's slow */ + case PIPE_CAP_NULL_TEXTURES: + case PIPE_CAP_HAS_CONST_BW: +- case PIPE_CAP_FENCE_SIGNAL: +- case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_CL_GL_SHARING: + return 1; + +@@ -287,9 +285,15 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param) + PIPE_CONTEXT_PRIORITY_MEDIUM | + PIPE_CONTEXT_PRIORITY_HIGH; + ++ case PIPE_CAP_FENCE_SIGNAL: ++ return sscreen->info.has_syncobj; ++ + case PIPE_CAP_CONSTBUF0_FLAGS: + return SI_RESOURCE_FLAG_32BIT; + ++ case PIPE_CAP_NATIVE_FENCE_FD: ++ return sscreen->info.has_fence_to_handle; ++ + case PIPE_CAP_DRAW_PARAMETERS: + case PIPE_CAP_MULTI_DRAW_INDIRECT: + case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: +-- +2.45.2 + diff --git a/0001-llvmpipe-Init-eglQueryDmaBufModifiersEXT-num_modifie.patch b/0001-llvmpipe-Init-eglQueryDmaBufModifiersEXT-num_modifie.patch new file mode 100644 index 0000000..ba224c2 --- /dev/null +++ b/0001-llvmpipe-Init-eglQueryDmaBufModifiersEXT-num_modifie.patch @@ -0,0 +1,41 @@ +From 1f3ea20998329788f6a14166d8ba9b3948b7e864 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jos=C3=A9=20Exp=C3=B3sito?= +Date: Thu, 27 Jun 2024 13:07:11 +0200 +Subject: [PATCH] llvmpipe: Init eglQueryDmaBufModifiersEXT num_modifiers +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Initialize the number of modifiers when `max` is 0 as documented [1]: + + If is 0, no formats are returned, but the total number + of formats is returned in , and no error is generated. + +[1] https://registry.khronos.org/EGL/extensions/EXT/EGL_EXT_image_dma_buf_import_modifiers.txt +Fixes: d74ea2c117fe ("llvmpipe: Implement dmabuf handling") +Signed-off-by: José Expósito +--- + src/gallium/drivers/llvmpipe/lp_texture.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/src/gallium/drivers/llvmpipe/lp_texture.c b/src/gallium/drivers/llvmpipe/lp_texture.c +index 0044e689aab..30d5057cf9f 100644 +--- a/src/gallium/drivers/llvmpipe/lp_texture.c ++++ b/src/gallium/drivers/llvmpipe/lp_texture.c +@@ -1724,10 +1724,10 @@ llvmpipe_resource_get_param(struct pipe_screen *screen, + static void + llvmpipe_query_dmabuf_modifiers(struct pipe_screen *pscreen, enum pipe_format format, int max, uint64_t *modifiers, unsigned int *external_only, int *count) + { +- if (max) { +- *count = 1; ++ *count = 1; ++ ++ if (max) + *modifiers = DRM_FORMAT_MOD_LINEAR; +- } + } + + static bool +-- +2.45.2 + diff --git a/fix-egl-on-s390x.patch b/fix-egl-on-s390x.patch new file mode 100644 index 0000000..38b8362 --- /dev/null +++ b/fix-egl-on-s390x.patch @@ -0,0 +1,131 @@ +From 5ca85d75c05de9df7c3170122dfdb04bc795b43a Mon Sep 17 00:00:00 2001 +From: Daniel Stone +Date: Fri, 21 Jun 2024 11:24:31 +0100 +Subject: [PATCH 1/3] dri: Fix BGR format exclusion + +The check we had for BGR vs. RGB formats was testing completely the +wrong thing. Fix it so we can restore the previous set of configs we +expose to the frontend, which also fixes surfaceless platform on s390x. + +Signed-off-by: Daniel Stone +Fixes: ad0edea53a73 ("st/dri: Check format properties from format helpers") +Closes: mesa/mesa#11360 +Part-of: +--- + src/gallium/frontends/dri/dri_screen.c | 20 ++++++++++++-------- + 1 file changed, 12 insertions(+), 8 deletions(-) + +diff --git a/src/gallium/frontends/dri/dri_screen.c b/src/gallium/frontends/dri/dri_screen.c +index 97d11f324ee0b..2e9ce01147a89 100644 +--- a/src/gallium/frontends/dri/dri_screen.c ++++ b/src/gallium/frontends/dri/dri_screen.c +@@ -386,17 +386,21 @@ dri_fill_in_modes(struct dri_screen *screen) + uint8_t msaa_modes[MSAA_VISUAL_MAX_SAMPLES]; + + /* Expose only BGRA ordering if the loader doesn't support RGBA ordering. */ +- if (!allow_rgba_ordering && +- util_format_get_component_shift(pipe_formats[f], +- UTIL_FORMAT_COLORSPACE_RGB, 0) ++ if (!allow_rgba_ordering) { ++ unsigned sh_ax = util_format_get_component_shift(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 3); ++ unsigned sh_b = util_format_get_component_shift(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 2); + #if UTIL_ARCH_BIG_ENDIAN +- > ++ unsigned sz_b = util_format_get_component_bits(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 2); ++ ++ if (sz_b + sh_b == sh_ax) ++ continue; + #else +- < ++ unsigned sz_ax = util_format_get_component_bits(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 3); ++ ++ if (sz_ax + sh_ax == sh_b) ++ continue; + #endif +- util_format_get_component_shift(pipe_formats[f], +- UTIL_FORMAT_COLORSPACE_RGB, 2)) +- continue; ++ } + + if (!allow_rgb10 && + util_format_get_component_bits(pipe_formats[f], +-- +GitLab + + +From 94e15d0f64a3a5ca6b86a3e02343cac0d453aed6 Mon Sep 17 00:00:00 2001 +From: Daniel Stone +Date: Fri, 21 Jun 2024 14:19:06 +0100 +Subject: [PATCH 2/3] egl/surfaceless: Enable RGBA configs + +Doing this is harmless since we operate on an allowlist of pipe_configs +anyway. + +Signed-off-by: Daniel Stone +Part-of: +--- + src/egl/drivers/dri2/platform_surfaceless.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/src/egl/drivers/dri2/platform_surfaceless.c b/src/egl/drivers/dri2/platform_surfaceless.c +index 0668ec9285ff3..4b69874d3f60a 100644 +--- a/src/egl/drivers/dri2/platform_surfaceless.c ++++ b/src/egl/drivers/dri2/platform_surfaceless.c +@@ -190,6 +190,8 @@ surfaceless_get_capability(void *loaderPrivate, enum dri_loader_cap cap) + switch (cap) { + case DRI_LOADER_CAP_FP16: + return 1; ++ case DRI_LOADER_CAP_RGBA_ORDERING: ++ return 1; + default: + return 0; + } +-- +GitLab + + +From 9eeaa4618f8a7bc8215ac3f195ced7f8eae4342e Mon Sep 17 00:00:00 2001 +From: Daniel Stone +Date: Fri, 21 Jun 2024 14:19:06 +0100 +Subject: [PATCH 3/3] egl/gbm: Enable RGBA configs + +Doing this is harmless since we operate on an allowlist of pipe_configs +anyway. + +Signed-off-by: Daniel Stone +Part-of: +--- + src/gallium/drivers/lima/ci/lima-fails.txt | 2 -- + src/gbm/backends/dri/gbm_dri.c | 2 ++ + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/src/gallium/drivers/lima/ci/lima-fails.txt b/src/gallium/drivers/lima/ci/lima-fails.txt +index d6c4edbb5ef5e..155498dbb5679 100644 +--- a/src/gallium/drivers/lima/ci/lima-fails.txt ++++ b/src/gallium/drivers/lima/ci/lima-fails.txt +@@ -55,9 +55,7 @@ wayland-dEQP-EGL.functional.wide_color.window_888_colorspace_srgb,Fail + + x11-dEQP-EGL.functional.create_context.no_config,Fail + x11-dEQP-EGL.functional.image.modify.renderbuffer_depth16_renderbuffer_clear_depth,Fail +-x11-dEQP-EGL.functional.render.multi_context.gles2.rgb888_window,Fail + x11-dEQP-EGL.functional.render.multi_context.gles2.rgba8888_pbuffer,Fail +-x11-dEQP-EGL.functional.render.multi_thread.gles2.rgb888_window,Fail + x11-dEQP-EGL.functional.render.multi_thread.gles2.rgba8888_pbuffer,Fail + x11-dEQP-EGL.functional.wide_color.pbuffer_8888_colorspace_srgb,Fail + x11-dEQP-EGL.functional.wide_color.window_8888_colorspace_srgb,Fail +diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c +index 0526f4f8dc16f..6cc2d5d8197f5 100644 +--- a/src/gbm/backends/dri/gbm_dri.c ++++ b/src/gbm/backends/dri/gbm_dri.c +@@ -108,6 +108,8 @@ dri_get_capability(void *loaderPrivate, enum dri_loader_cap cap) + switch (cap) { + case DRI_LOADER_CAP_FP16: + return 1; ++ case DRI_LOADER_CAP_RGBA_ORDERING: ++ return 1; + default: + return 0; + } +-- +GitLab + diff --git a/fix-s390x-modes.patch b/fix-s390x-modes.patch deleted file mode 100644 index 9e62f34..0000000 --- a/fix-s390x-modes.patch +++ /dev/null @@ -1,34 +0,0 @@ -diff -up mesa-24.1.0/src/gallium/frontends/dri/dri_screen.c.s390x mesa-24.1.0/src/gallium/frontends/dri/dri_screen.c ---- mesa-24.1.0/src/gallium/frontends/dri/dri_screen.c.s390x 2024-06-20 14:57:54.495763904 -0400 -+++ mesa-24.1.0/src/gallium/frontends/dri/dri_screen.c 2024-06-20 15:01:33.555766438 -0400 -@@ -386,17 +386,21 @@ dri_fill_in_modes(struct dri_screen *scr - uint8_t msaa_modes[MSAA_VISUAL_MAX_SAMPLES]; - - /* Expose only BGRA ordering if the loader doesn't support RGBA ordering. */ -- if (!allow_rgba_ordering && -- util_format_get_component_shift(pipe_formats[f], -- UTIL_FORMAT_COLORSPACE_RGB, 0) -+ if (!allow_rgba_ordering) { -+ unsigned sh_ax = util_format_get_component_shift(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 3); -+ unsigned sh_b = util_format_get_component_shift(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 2); - #if UTIL_ARCH_BIG_ENDIAN -- > -+ unsigned sz_b = util_format_get_component_bits(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 2); -+ -+ if (sz_b + sh_b == sh_ax) -+ continue; - #else -- < -+ unsigned sz_ax = util_format_get_component_bits(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 3); -+ -+ if (sz_ax + sh_ax == sh_b) -+ continue; - #endif -- util_format_get_component_shift(pipe_formats[f], -- UTIL_FORMAT_COLORSPACE_RGB, 2)) -- continue; -+ } - - if (!allow_rgb10 && - util_format_get_component_bits(pipe_formats[f], - diff --git a/mesa.spec b/mesa.spec index 422590a..f3eeb12 100644 --- a/mesa.spec +++ b/mesa.spec @@ -68,9 +68,9 @@ Name: mesa Summary: Mesa graphics libraries -%global ver 24.1.0 +%global ver 24.1.2 Version: %{lua:ver = string.gsub(rpm.expand("%{ver}"), "-", "~"); print(ver)} -Release: 3%{?dist} +Release: 1%{?dist} License: MIT AND BSD-3-Clause AND SGI-B-2.0 URL: http://www.mesa3d.org @@ -112,7 +112,11 @@ BuildRequires: wayland-devel # mesa patches (< 10000) Patch10: gnome-shell-glthread-disable.patch -Patch11: fix-s390x-modes.patch +Patch11: 0001-llvmpipe-Init-eglQueryDmaBufModifiersEXT-num_modifie.patch +Patch12: 0001-Revert-ac-radeonsi-remove-has_syncobj-has_fence_to_h.patch + +# s390x only +Patch100: fix-egl-on-s390x.patch # spirv-llvm-translator (>= 10000) Patch10000: 0001-Update-LongConstantCompositeINTEL-to-LongCompositesI.patch @@ -427,7 +431,11 @@ The drivers with support for the Vulkan API. %prep %autosetup -n %{name}-%{ver} -N -%autopatch -p1 -M 9999 +%autopatch -p1 -M 99 +%ifarch s390x +%autopatch -p1 -m 100 -M 9999 +%endif + cp %{SOURCE1} docs/ # Extract meson @@ -866,6 +874,9 @@ popd %endif %changelog +* Fri Jun 28 2024 José Expósito - 24.1.2-1 +- Update to mesa 24.1.2 + * Wed Jun 26 2024 José Expósito - 24.1.0-3 - Fix egl on s390x Resolves: https://issues.redhat.com/browse/RHEL-44948 diff --git a/rpminspect.yaml b/rpminspect.yaml new file mode 100644 index 0000000..c8bcce5 --- /dev/null +++ b/rpminspect.yaml @@ -0,0 +1,4 @@ +badfuncs: + allowed: + /usr/lib*/libvulkan_freedreno.so: + - inet_addr diff --git a/sources b/sources index 44001bc..08ecf12 100644 --- a/sources +++ b/sources @@ -1,5 +1,5 @@ SHA512 (libclc-17.0.6.src.tar.xz) = 6165bfa0112fb42756cd0e83a0d3d4406985b1d6db6eed8abb3bee9a74fcc451cc88928b24231493694035c35d9bcd367aa6a4a67da631cb4ee5e7a98037fee3 -SHA512 (mesa-24.1.0.tar.xz) = 4b7ed1940fc812ef4efb55978d3ffe3d0e2ae53d5b57a3baca10a52db2ba5852c5ee7e75c3739bd8d384c80bf1cba970a384250050f01f03bba98f255e12cec5 +SHA512 (mesa-24.1.2.tar.xz) = ea28540552f9f28200c22423afcf9d9bb961557eae0dc11416c5ef60788c3e7f6d2b841c6bdbe2827d1339ea9d854623c1a0e08d4f1fd79d304fcdd52f790637 SHA512 (meson-1.3.0.tar.gz) = fbcbdd9551ad12b7be84411b96357e01c7c0c38a8e9933093d2e71ed7e12bd4278245798684d389c332eb75dd50c99310affc9acb01cf8bedd45265335083a32 SHA512 (spirv-llvm-translator-854179a.tar.gz) = 7b8b1f974e10bfe8b9680b5b769fa60fa438b0070d0aee7795597c79999942e44a0629035b7f5bdd0b86e742fa200f8cb9596b60f0f61c9eea919ea8b21d3d6a SHA512 (wayland-protocols-1.34.tar.xz) = d180eaaf87281dc7adade19070ee8308a5cb3dc2f60cff077960436ad647d3d207eb63fa0b079b7b315109654ad6e6b5e2588bfe859900e67edf8c67b1c3ad20