From e1b3859dbf66f173d21318b744cc539e7b48b576 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jaroslav=20=C5=A0karvada?= Date: Tue, 21 Oct 2014 11:15:49 +0200 Subject: [PATCH] More crash fixes (by crash-fix patch from David McInnis) --- memtest86+-5.01-array-size-fix.patch | 20 ------ memtest86+-5.01-crash-fix.patch | 99 ++++++++++++++++++++++++++++ memtest86+.spec | 9 ++- 3 files changed, 105 insertions(+), 23 deletions(-) delete mode 100644 memtest86+-5.01-array-size-fix.patch create mode 100644 memtest86+-5.01-crash-fix.patch diff --git a/memtest86+-5.01-array-size-fix.patch b/memtest86+-5.01-array-size-fix.patch deleted file mode 100644 index fdecd97..0000000 --- a/memtest86+-5.01-array-size-fix.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- memtest86+-5.01/controller.c~ 2013-08-10 02:01:58.000000000 +0000 -+++ memtest86+-5.01/controller.c 2013-12-12 20:58:12.873555378 +0000 -@@ -292,7 +292,7 @@ - - /* First, locate the PCI bus where the MCH is located */ - -- for(i = 0; i < sizeof(possible_nhm_bus); i++) { -+ for(i = 0; i < sizeof(possible_nhm_bus) / sizeof(possible_nhm_bus[0]); i++) { - pci_conf_read( possible_nhm_bus[i], 3, 4, 0x00, 2, &vid); - pci_conf_read( possible_nhm_bus[i], 3, 4, 0x02, 2, &did); - vid &= 0xFFFF; -@@ -327,7 +327,7 @@ - ctrl.mode = ECC_NONE; - - /* First, locate the PCI bus where the MCH is located */ -- for(i = 0; i < sizeof(possible_nhm_bus); i++) { -+ for(i = 0; i < sizeof(possible_nhm_bus) / sizeof(possible_nhm_bus[0]); i++) { - pci_conf_read( possible_nhm_bus[i], 3, 4, 0x00, 2, &vid); - pci_conf_read( possible_nhm_bus[i], 3, 4, 0x02, 2, &did); - vid &= 0xFFFF; diff --git a/memtest86+-5.01-crash-fix.patch b/memtest86+-5.01-crash-fix.patch new file mode 100644 index 0000000..de7c86b --- /dev/null +++ b/memtest86+-5.01-crash-fix.patch @@ -0,0 +1,99 @@ +diff --git a/controller.c b/controller.c +index f4f7371..183e9c3 100644 +--- a/controller.c ++++ b/controller.c +@@ -2,6 +2,8 @@ + * MemTest86+ V5 Specific code (GPL V2.0) + * By Samuel DEMEULEMEESTER, sdemeule@memtest.org + * http://www.canardpc.com - http://www.memtest.org ++ * ++ * Edited by David McInnis Oct 4, 2014 + */ + + //#include "defs.h" +@@ -292,7 +294,7 @@ static void setup_nhm(void) + + /* First, locate the PCI bus where the MCH is located */ + +- for(i = 0; i < sizeof(possible_nhm_bus); i++) { ++ for(i = 0; i < sizeof(possible_nhm_bus) / sizeof(possible_nhm_bus[0]); i++) { + pci_conf_read( possible_nhm_bus[i], 3, 4, 0x00, 2, &vid); + pci_conf_read( possible_nhm_bus[i], 3, 4, 0x02, 2, &did); + vid &= 0xFFFF; +@@ -327,7 +329,7 @@ static void setup_nhm32(void) + ctrl.mode = ECC_NONE; + + /* First, locate the PCI bus where the MCH is located */ +- for(i = 0; i < sizeof(possible_nhm_bus); i++) { ++ for(i = 0; i < sizeof(possible_nhm_bus) / sizeof(possible_nhm_bus[0]); i++) { + pci_conf_read( possible_nhm_bus[i], 3, 4, 0x00, 2, &vid); + pci_conf_read( possible_nhm_bus[i], 3, 4, 0x02, 2, &did); + vid &= 0xFFFF; +@@ -1424,7 +1426,7 @@ static void poll_fsb_amd64(void) { + unsigned long dramchr; + float clockratio; + double dramclock; +- unsigned int dummy[3]; ++ unsigned int dummy[4]; + int ram_type; + + float coef = 10; +@@ -2851,13 +2853,13 @@ static void poll_timings_nf4ie(void) { + + static void poll_timings_i875(void) { + +- ulong dev6, dev62; ++ ulong dev6; + ulong temp; + float cas; + int rcd, rp, ras, chan; + long *ptr, *ptr2; + +- pci_conf_read( 0, 6, 0, 0x40, 4, &dev62); ++ pci_conf_read( 0, 6, 0, 0x40, 4, &dev6); + ptr2=(long*)(dev6+0x68); + + /* Read the MMR Base Address & Define the pointer */ +diff --git a/init.c b/init.c +index 754b8d7..5bd8b4f 100644 +--- a/init.c ++++ b/init.c +@@ -7,6 +7,8 @@ + * + * Released under version 2 of the Gnu Public License. + * By Chris Brady ++ * ++ * Edited by David McInnis October 4, 2014 + */ + + +@@ -914,7 +916,6 @@ void cpu_type(void) + default: + cprint(0, COL_MID, "Unknown Intel"); + break; +- break; + } + + } +diff --git a/main.c b/main.c +index 0bc7ca0..613f811 100644 +--- a/main.c ++++ b/main.c +@@ -422,7 +422,7 @@ void test_start(void) + //initialise_cpus(); + btrace(my_cpu_num, __LINE__, "BeforeInit", 1, 0, 0); + /* Draw the screen and get system information */ +- init(); ++ init(); + + /* Set defaults and initialize variables */ + set_defaults(); +@@ -737,7 +737,7 @@ void test_start(void) + /* Do the same test for each CPU */ + if (++cpu_sel >= act_cpus) + { +- cpu_sel = 0; ++ cpu_sel = 0; + next_test(); + } else { + continue; diff --git a/memtest86+.spec b/memtest86+.spec index 5ebc292..e6aeecf 100644 --- a/memtest86+.spec +++ b/memtest86+.spec @@ -9,7 +9,7 @@ Name: memtest86+ Version: 5.01 -Release: 7%{?dist} +Release: 8%{?dist} License: GPLv2 Summary: Stand-alone memory tester for x86 and x86-64 computers Group: System Environment/Base @@ -27,7 +27,7 @@ Patch0: memtest86+-5.01-no-scp.patch # http://forum.canardpc.com/threads/83443-Memtest86-V5.01-crashes-with-gcc-4.7.2-or-later Patch1: memtest86+-5.01-no-optimization.patch Patch2: memtest86+-5.01-compile-fix.patch -Patch3: memtest86+-5.01-array-size-fix.patch +Patch3: memtest86+-5.01-crash-fix.patch URL: http://www.memtest.org BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n) # require glibc-devel.i386 via this file: @@ -56,7 +56,7 @@ cp -p %{SOURCE5} README.%{readme_suffix} %patch0 -p1 -b .no-scp %patch1 -p1 -b .no-optimization %patch2 -p1 -b .compile-fix -%patch3 -p1 -b .array-size-fix +%patch3 -p1 -b .crash-fix sed -i -e's,0x5000,0x100000,' memtest.lds %ifarch x86_64 @@ -120,6 +120,9 @@ rm -rf %{buildroot} %{_mandir}/man8/*.8.gz %changelog +* Tue Oct 21 2014 Jaroslav Škarvada - 5.01-8 +- More crash fixes (by crash-fix patch from David McInnis) + * Fri Sep 5 2014 Jaroslav Škarvada - 5.01-7 - Fixed typo in memtest-setup help, added its options to man / help