From b0e7de50c38792fbb791321c62f6908b4088e985 Mon Sep 17 00:00:00 2001 From: Robert Scheck Date: Tue, 29 Dec 2015 06:06:05 +0100 Subject: [PATCH] Added patch by Khem Raj to use static inlines as the external inline definition has changed with GCC 5 (to fix ppc64 builds) --- lzop-1.03-gcc5_ppc64.patch | 100 +++++++++++++++++++++++++++++++++++++ lzop.spec | 12 ++++- 2 files changed, 110 insertions(+), 2 deletions(-) create mode 100644 lzop-1.03-gcc5_ppc64.patch diff --git a/lzop-1.03-gcc5_ppc64.patch b/lzop-1.03-gcc5_ppc64.patch new file mode 100644 index 0000000..867b88b --- /dev/null +++ b/lzop-1.03-gcc5_ppc64.patch @@ -0,0 +1,100 @@ +From ecccbcf66da53779d88e38e2af7f82eff8dde7f8 Mon Sep 17 00:00:00 2001 +From: Khem Raj +Date: Sun, 16 Aug 2015 10:35:47 -0700 +Subject: [PATCH] use static inlines as the external inline definition has + changed with gcc5 + +Signed-off-by: Khem Raj +--- +Upstream-Status: Pending + + src/miniacc.h | 24 ++++++++---------------- + 1 file changed, 8 insertions(+), 16 deletions(-) + +diff --git a/src/miniacc.h b/src/miniacc.h +index 09e6f0c..cae98d1 100644 +--- a/src/miniacc.h ++++ b/src/miniacc.h +@@ -2880,8 +2880,7 @@ typedef void (__acc_cdecl_sighandler *acc_sighandler_t)(acc_signo_t); + #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline) + #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC) + #if !defined(ACC_UA_GET_LE16) +-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp); +-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) { ++static __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) { + __acc_ua_volatile const acc_uint16e_t* p = (__acc_ua_volatile const acc_uint16e_t*) pp; + unsigned long v; + __asm__ __volatile__("lhbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p)); +@@ -2890,8 +2889,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const + #define ACC_UA_GET_LE16(p) __ACC_UA_GET_LE16(p) + #endif + #if !defined(ACC_UA_SET_LE16) +-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v); +-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) { ++static __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) { + __acc_ua_volatile acc_uint16e_t* p = (__acc_ua_volatile acc_uint16e_t*) pp; + __asm__ __volatile__("sthbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v)); + } +@@ -2916,8 +2914,7 @@ extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsi + #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline) + #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC) + #if !defined(ACC_UA_GET_LE32) +-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp); +-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) { ++static __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) { + __acc_ua_volatile const acc_uint32e_t* p = (__acc_ua_volatile const acc_uint32e_t*) pp; + unsigned long v; + __asm__ __volatile__("lwbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p)); +@@ -2926,8 +2923,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const + #define ACC_UA_GET_LE32(p) __ACC_UA_GET_LE32(p) + #endif + #if !defined(ACC_UA_SET_LE32) +-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v); +-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) { ++static __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) { + __acc_ua_volatile acc_uint32e_t* p = (__acc_ua_volatile acc_uint32e_t*) pp; + __asm__ __volatile__("stwbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v)); + } +@@ -3307,8 +3303,7 @@ typedef void (__acc_cdecl_sighandler *acc_sighandler_t)(acc_signo_t); + #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline) + #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC) + #if !defined(ACC_UA_GET_LE16) +-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp); +-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) { ++static __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) { + __acc_ua_volatile const acc_uint16e_t* p = (__acc_ua_volatile const acc_uint16e_t*) pp; + unsigned long v; + __asm__ __volatile__("lhbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p)); +@@ -3317,8 +3312,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const + #define ACC_UA_GET_LE16(p) __ACC_UA_GET_LE16(p) + #endif + #if !defined(ACC_UA_SET_LE16) +-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v); +-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) { ++static __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) { + __acc_ua_volatile acc_uint16e_t* p = (__acc_ua_volatile acc_uint16e_t*) pp; + __asm__ __volatile__("sthbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v)); + } +@@ -3343,8 +3337,7 @@ extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsi + #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline) + #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC) + #if !defined(ACC_UA_GET_LE32) +-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp); +-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) { ++static __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) { + __acc_ua_volatile const acc_uint32e_t* p = (__acc_ua_volatile const acc_uint32e_t*) pp; + unsigned long v; + __asm__ __volatile__("lwbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p)); +@@ -3353,8 +3346,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const + #define ACC_UA_GET_LE32(p) __ACC_UA_GET_LE32(p) + #endif + #if !defined(ACC_UA_SET_LE32) +-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v); +-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) { ++static __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) { + __acc_ua_volatile acc_uint32e_t* p = (__acc_ua_volatile acc_uint32e_t*) pp; + __asm__ __volatile__("stwbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v)); + } +-- +2.5.0 + diff --git a/lzop.spec b/lzop.spec index 4b7feca..e8f6b6d 100644 --- a/lzop.spec +++ b/lzop.spec @@ -1,11 +1,12 @@ Summary: Real-time file compressor Name: lzop Version: 1.03 -Release: 12%{?dist} +Release: 13%{?dist} License: GPLv2+ Group: Applications/Archiving URL: http://www.lzop.org/ Source: http://www.lzop.org/download/%{name}-%{version}.tar.gz +Patch0: lzop-1.03-gcc5_ppc64.patch BuildRequires: lzo-devel BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n) @@ -19,6 +20,7 @@ to gzip. %prep %setup -q +%patch0 -p1 -b .gcc5_ppc64 %build %configure @@ -33,11 +35,17 @@ rm -rf $RPM_BUILD_ROOT %files %defattr(-,root,root,-) -%doc AUTHORS COPYING NEWS README THANKS +%{!?_licensedir:%global license %%doc} +%license COPYING +%doc AUTHORS NEWS README THANKS %{_bindir}/%{name} %{_mandir}/man?/%{name}.* %changelog +* Tue Dec 29 2015 Robert Scheck - 1.03-13 +- Added patch by Khem Raj to use static inlines as the external + inline definition has changed with GCC 5 (to fix ppc64 builds) + * Wed Jun 17 2015 Fedora Release Engineering - 1.03-12 - Rebuilt for https://fedoraproject.org/wiki/Fedora_23_Mass_Rebuild